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add set mac, cmsis-dap load sdram, ...

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This commit is contained in:
pvvx 2017-12-28 18:43:58 +03:00
parent 0830a1244a
commit b381813514
27 changed files with 255 additions and 88 deletions
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29
USDK/component/common/api/at_cmd/atcmd_sys.c
View file

@ -1269,20 +1269,21 @@ void fATFO(void *arg) {
rdsize = size;
else
rdsize = 8 * symbs_line;
flash_otp_read(&flashobj, addr, rdsize, flash_data);
uint8_t *ptr = flash_data;
while (ptr < flash_data + rdsize) {
if (symbs_line > size)
symbs_line = size;
printf("%08X ", addr);
print_hex_dump(ptr, symbs_line, ' ');
printf("\r\n");
addr += symbs_line;
ptr += symbs_line;
size -= symbs_line;
if (size == 0)
break;
}
if (flash_otp_read(&flashobj, addr, rdsize, flash_data)) {
uint8_t *ptr = flash_data;
while (ptr < flash_data + rdsize) {
if (symbs_line > size)
symbs_line = size;
printf("%08X ", addr);
print_hex_dump(ptr, symbs_line, ' ');
printf("\r\n");
addr += symbs_line;
ptr += symbs_line;
size -= symbs_line;
if (size == 0)
break;
}
} else break;
}
free(flash_data);
}

36
USDK/component/common/api/wifi/wifi_conf.c
View file

@ -635,10 +635,38 @@ int wifi_is_ready_to_transceive(rtw_interface_t interface) {
}
//----------------------------------------------------------------------------//
int wifi_set_mac_address(char * mac) {
char buf[13 + 17 + 1];
rtw_memset(buf, 0, sizeof(buf));
snprintf(buf, 13 + 17, "write_mac %s", mac);
int mactostr(char * s, unsigned char *mac, bool fmt)
{
char *ptrb = s;
unsigned char *ptrm = mac;
int i = 6;
while(i--) {
unsigned char x = ptrm[0] >> 4;
if (x <= 9) ptrb[0] = x + '0';
else ptrb[0] = x - 10 + 'a';
ptrb++;
x = ptrm[0] & 0x0f;
if (x <= 9) ptrb[0] = x + '0';
else ptrb[0] = x - 10 + 'a';
ptrb++;
ptrm++;
if(fmt && i) {
ptrb[0] = ':';
ptrb++;
}
};
*ptrb = '\0';
if (fmt) return 12+5;
return 12;
}
//----------------------------------------------------------------------------//
int wifi_set_mac_address(char * new_mac) {
// char buf[13 + 17 + 1];
char buf[10 + 12 + 1];
memcpy(buf,"write_mac ", 10);
// snprintf(buf, 13 + 17, "write_mac %s", mac);
//BAG NotWork! rtl_sprintf(buf, "write_mac %02x%02x%02x%02x%02x%02x", new_mac[0], new_mac[1], new_mac[2], new_mac[3], new_mac[4], new_mac[5]);
mactostr(&buf[10], new_mac, false);
return wext_private_command(WLAN0_NAME, buf, SHOW_PRIVATE_OUT);
}

2
USDK/component/common/api/wifi/wifi_conf.h
View file

@ -703,6 +703,8 @@ int wifi_disable_packet_filter(unsigned char filter_id);
int wifi_remove_packet_filter(unsigned char filter_id);
#endif
int mactostr(char * s, unsigned char *mac, bool fmt);
#ifdef __cplusplus
}
#endif

2
USDK/component/common/api/wifi/wifi_util.c
View file

@ -237,7 +237,7 @@ int wext_set_mac_address(const char *ifname, char * mac)
{
char buf[13+17+1];
memset(buf, 0, sizeof(buf));
snprintf(buf, 13+17, "write_mac %s", mac);
snprintf(buf, 13+17, "write_mac %02x%02x%02x%02x%02x%02x", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
return wext_private_command(ifname, buf, 0);
}

4
USDK/component/common/api/wifi_api.c
View file

@ -43,7 +43,7 @@
#include "main.h"
#include "wifi_user_set.h"
#if 0
#if 1
#undef debug_printf
#define debug_printf(fmt, ...) rtl_printf(fmt, ##__VA_ARGS__)
#undef info_printf
@ -558,7 +558,7 @@ LOCAL int _wifi_on(rtw_mode_t mode) {
wext_set_adaptivity(wifi_cfg.adaptivity & 3);
debug_printf("Wlan0 init...\n");
// rltk_wlan_deinit_fastly();
ret = rltk_wlan_init(WLAN0_IDX, mode); // rtw_mode_t
debug_printf("netif_set_up 0...\n");

4
USDK/component/common/application/uart_adapter/uart_adapter.c
View file

@ -284,10 +284,10 @@ int uartadapter_uart_open(ua_socket_t *ua_socket, ua_uart_set_str *puartpara)
#define txflow UA_UART_CTS_PIN
if(puartpara->FlowControl){
pin_mode(txflow, PullDown); // init CTS in low
serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlRTSCTS, rxflow, txflow);
serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlRTSCTS);//, rxflow, txflow);
}
else
serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlNone, rxflow, txflow);
serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlNone);//, rxflow, txflow);
//---------------------------- add Flow
/*uart irq handle*/

33
USDK/component/common/example/uart_atcmd/example_uart_atcmd.c
View file

@ -287,9 +287,9 @@ int reset_uart_atcmd_setting(){
return 0;
}
#ifdef UART_AT_RX_WAKE
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
#include "gpio_irq_api.h"
#define UART_AT_RX_WAKE UART_RX
void gpio_uart_at_rx_irq_callback (uint32_t id, gpio_irq_event event)
{
/* WAKELOCK_LOGUART is also handled in log service.
@ -301,16 +301,12 @@ void gpio_uart_at_rx_irq_callback (uint32_t id, gpio_irq_event event)
void uart_at_rx_wakeup()
{
gpio_irq_t gpio_rx_wake;
#ifdef RTL8711AM
#if (UART_AT_RX_WAKE!=PA_0)||(UART_AT_RX_WAKE!=PE_3)
#error "Set pin rx_wakeup!"
#endif
#endif
gpio_irq_init(&gpio_rx_wake, UART_AT_RX_WAKE, gpio_uart_at_rx_irq_callback, 0);
gpio_irq_set(&gpio_rx_wake, IRQ_FALL, 1); // Falling Edge Trigger
gpio_irq_enable(&gpio_rx_wake);
}
#endif
#endif // UART_AT_RX_WAKE
void uart_atcmd_reinit(UART_LOG_CONF* uartconf){
serial_baud(&at_cmd_sobj,uartconf->BaudRate);
@ -318,14 +314,15 @@ void uart_atcmd_reinit(UART_LOG_CONF* uartconf){
// set flow control, only support RTS and CTS concurrent mode
// rxflow and tx flow is fixed by hardware
#define rxflow UART_RTS
#define txflow UART_CTS
// unsigned rxflow = UART_RTS;
unsigned txflow = UART_CTS;
if(uartconf->FlowControl){
pin_mode(txflow, PullDown); //init CTS in low
serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS, rxflow, txflow);
serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS);//, rxflow, txflow);
}
else
serial_set_flow_control(&at_cmd_sobj, FlowControlNone, rxflow, txflow);
serial_set_flow_control(&at_cmd_sobj, FlowControlNone);//, rxflow, txflow);
}
void uart_at_send_string(char *str)
@ -535,21 +532,25 @@ void uart_atcmd_main(void)
{
UART_LOG_CONF uartconf;
unsigned rx = UART_RX;
unsigned tx = UART_TX;
unsigned rxflow = UART_RTS;
unsigned txflow = UART_CTS;
read_uart_atcmd_setting_from_system_data(&uartconf);
serial_init(&at_cmd_sobj, UART_TX, UART_RX);
serial_init(&at_cmd_sobj, tx, rx);
printf("tx: %02x, rx: %02x\n", tx, rx);
serial_baud(&at_cmd_sobj,uartconf.BaudRate);
serial_format(&at_cmd_sobj, uartconf.DataBits, (SerialParity)uartconf.Parity, uartconf.StopBits);
serial_rx_fifo_level(&at_cmd_sobj, FifoLvHalf);
// set flow control, only support RTS and CTS concurrent mode
// rxflow and tx flow is fixed by hardware
#define rxflow UART_RTS
#define txflow UART_CTS
if(uartconf.FlowControl){
pin_mode(txflow, PullDown); //init CTS in low
serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS, rxflow, txflow);
serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS);//, rxflow, txflow);
}
else
serial_set_flow_control(&at_cmd_sobj, FlowControlNone, rxflow, txflow);
serial_set_flow_control(&at_cmd_sobj, FlowControlNone);//, rxflow, txflow);
/*uart_at_lock_init();*/
@ -564,9 +565,11 @@ void uart_atcmd_main(void)
serial_irq_handler(&at_cmd_sobj, uart_irq, (uint32_t)&at_cmd_sobj);
serial_irq_set(&at_cmd_sobj, RxIrq, 1);
#ifdef UART_AT_RX_WAKE
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
uart_at_rx_wakeup();
#endif
#endif // UART_AT_RX_WAKE
}
static void uart_atcmd_thread(void *param)

52
USDK/component/common/example/uart_atcmd/example_uart_atcmd.h
View file

@ -13,33 +13,45 @@
#include "osdep_api.h"
#if defined(RTL8710AF)
// RTL8710AF
#define UART_TX PA_4 // PC_3
#define UART_RX PA_0 // PC_0
#define UART_RTS PA_2 // PC_2
#define UART_CTS PA_1 // PC_1
#elif 0 // defined(RTL8711AM)
// RTL8711AM
#define UART_TX PA_7
#define UART_RX PA_6 // no Interrupt!
#define UART_RTS PA_3
#define UART_CTS PA_5
#elif 0 // else
#if defined(RTL8710AF) && defined(RTL8711AM)
#if 0
// RTL8711AM + RTL8710AF + RTL8195AM
#define UART_TX PE_0
#define UART_RX PE_3
#define UART_AT_RX_WAKE PE_3
#define UART_RTS PE_1
#define UART_CTS PE_2
#elif 0
// RTL8711AM + RTL8710AF
#define UART_TX PC_3
#define UART_RX PC_0 // no Interrupt!
//#define UART_AT_RX_WAKE PE_3
#define UART_RTS PC_2
#define UART_CTS PC_1
#elif 1
// RTL8711AM - RAK473
#define UART_TX PA_7
#define UART_RX PA_6 // no Interrupt!
//#define UART_RX_INT PE_3
#define UART_RTS PA_3
#define UART_CTS PA_5
#endif
#elif defined(RTL8710AF)
// RTL8710AF
#define UART_TX PA_4
#define UART_RX PA_0
#define UART_AT_RX_WAKE PA_0
#define UART_RTS PA_2
#define UART_CTS PA_1
#elif defined(RTL8711AM)
// RTL8711AM + RTL8710AF
#define UART_TX PE_0
#define UART_RX PE_3
#define UART_RTS PE_1
#define UART_CTS PE_2
// RTL8711AM - RAK473
#define UART_TX PA_7
#define UART_RX PA_6 // no Interrupt!
//#define UART_AT_RX_WAKE PE_3
#define UART_RTS PA_3
#define UART_CTS PA_5
#endif

3
USDK/component/common/mbed/hal/serial_api.h
View file

@ -67,7 +67,8 @@ void serial_break_clear(serial_t *obj);
void serial_pinout_tx(PinName tx);
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow);
// rxflow and tx flow is fixed by hardware
void serial_set_flow_control(serial_t *obj, FlowControl type);// PinName rxflow, PinName txflow);
#ifdef __cplusplus
}

1
USDK/component/common/mbed/hal_ext/flash_api.h
View file

@ -45,6 +45,7 @@ int flash_set_extend_addr (flash_t * obj, uint32_t data);
int flash_get_extend_addr (flash_t * obj);
unsigned int flash_get_size (flash_t *obj);
int flash_otp_read (flash_t *obj, uint32_t address, uint32_t Length, uint8_t * data);
unsigned int flash_read_id (flash_t *obj);
#ifdef __cplusplus
}

36
USDK/component/common/mbed/targets/hal/rtl8195a/flash_api.c
View file

@ -587,6 +587,26 @@ unsigned int flash_get_size(flash_t *obj) {
return flashchip_size;
}
unsigned int flash_read_id(flash_t *obj)
{
flash_turnon();
/* Disable SPI_FLASH User Mode */
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
/* Set Ctrlr1; 1 byte data frames */
HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(3));
/* Send flash RX command and read the data */
SpicRxCmdRefinedRtl8195A(FLASH_CMD_RDID, obj->SpicInitPara);
unsigned int ret = HAL_SPI_READ32(REG_SPIC_DR0);
/* Disable SPI_FLASH User Mode */
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
SpicDisableRtl8195A();
return ret;
}
/*
* Read Flash OTP data
*/
@ -619,17 +639,25 @@ int flash_otp_read(flash_t *obj, uint32_t address, uint32_t Length,
flashobj.SpicInitPara.Mode.BitMode);
SpicTxCmdWithDataRtl8195A(FLASH_CMD_WRDI, 0, 0, flashobj.SpicInitPara); // exit secured OTP
break;
// case FLASH_OTHERS: // ?
case FLASH_MICRON: // (4Bh) READ OTP ARRAY
#if CONFIG_DEBUG_LOG > 4
DBG_SPIF_INFO("MICRON: @TODO !\n");
#endif
// FLASH_CMD_ROTPA
ret = 0;
break;
#endif
default:
DBG_8195A("Flash type?");
DBG_8195A("Flash type %d [%06x]?\n", flashobj.SpicInitPara.flashtype, flash_read_id(&flashobj));
/* Read Flash status reg */
/*
SpicRxCmdRefinedRtl8195A(0x05, flashobj.SpicInitPara);
u16 st = HAL_SPI_READ32(REG_SPIC_DR0);
SpicRxCmdRefinedRtl8195A(0x35, flashobj.SpicInitPara);
st = (st & 0xFF) | (HAL_SPI_READ32(REG_SPIC_DR0) << 8);
DBG_8195A("Flash status: 0x%04x\n", st);
*/
ret = 0;
}
SpicDisableRtl8195A();
return ret;
}

2
USDK/component/common/mbed/targets/hal/rtl8195a/serial_api.c
View file

@ -436,7 +436,7 @@ void serial_recv_comp_handler(serial_t *obj, void *handler, uint32_t id)
pHalRuartAdapter->RxCompCbPara = (void*)id;
}
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
void serial_set_flow_control(serial_t *obj, FlowControl type) // , PinName rxflow, PinName txflow)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;

2
USDK/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c
View file

@ -609,7 +609,7 @@ SpicReadIDRtl8195A(
SpicInitPara.flashtype = FLASH_MICRON;
else if(SpicInitPara.id[0] == 0xC2)
SpicInitPara.flashtype = FLASH_MXIC;
else if(SpicInitPara.id[0] == 0xEF)
else if(SpicInitPara.id[0] == 0xEF || SpicInitPara.id[0] == 0xC8) // + GigaDevice
SpicInitPara.flashtype = FLASH_WINBOND;
else
SpicInitPara.flashtype = FLASH_OTHERS;

22
USDK/flasher.mk
View file

@ -182,6 +182,13 @@ else
ifeq ($(FLASHER_TYPE),cmsis-dap)
FLASHER:=cmsis-dap
flashboot:
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
-c 'rtl8710_flash_write $(RAM1P_IMAGE) 0' \
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
flashburn:
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
@ -196,6 +203,13 @@ flashimage2p:
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0xb000' \
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
flash_OTA:
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0x80000' \
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
flashwebfs:
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
@ -223,6 +237,14 @@ runram:
-c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \
-c 'mww 0x40000210 0x20111157' -c 'rtl8710_reboot' -c shutdown
runsdram:
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
-c 'load_image $(RAM1R_IMAGE) 0x10000bc8 bin' \
-c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \
-c 'boot_load_srdam $(RAM3_IMAGE) 0x30000000' \
-c shutdown
endif
endif

15
USDK/flasher/rtl8710.ocd
View file

@ -338,3 +338,18 @@ proc rtl8710_reboot {} {
mww 0xE000ED0C 0x05FA0007
}
proc boot_load_srdam {local_filename loc} {
echo "# Set flag WISDRAM"
mww 0x1FFF0000 0x12345678
mww 0x40000210 0x20011113
resume
echo "# Wait Init SDRAM..."
# sleep 1000
while {[rtl8710_flasher_mrw 0x1FFF0000] == 0x12345678 } { sleep 10 }
halt
echo "# Load SDRAM image..."
load_image $local_filename $loc
resume
# echo "# Go"
mww 0x1FFF0000 1
}

1
flasher/cortex.ocd
View file

@ -97,3 +97,4 @@ proc load_ram_binary { local_filename address } {
boot_from_ram
resume
}

16
flasher/rtl8710.ocd
View file

@ -338,3 +338,19 @@ proc rtl8710_reboot {} {
mww 0xE000ED0C 0x05FA0007
}
proc boot_load_srdam {local_filename loc} {
echo "# Set flag WISDRAM"
mww 0x1FFF0000 0x12345678
mww 0x40000210 0x20011113
resume
echo "# Wait Init SDRAM..."
# sleep 1000
while {[rtl8710_flasher_mrw 0x1FFF0000] == 0x12345678 } { sleep 10 }
halt
echo "# Load SDRAM image..."
load_image $local_filename $loc
resume
# echo "# Go"
mww 0x1FFF0000 1
}

4
project.mk
View file

@ -48,8 +48,8 @@ DRAM_C += project/src/console/atcmd_user.c
DRAM_C += project/src/console/wifi_console.c
#DRAM_C += project/src/console/wlan_tst.c
#ADD_SRC_C += project/src/console/pwm_tst.c
ADD_SRC_C += project/src/WS2812/ws2812_tst.c
ADD_SRC_C += project/src/WS2812/WS2812.c
#ADD_SRC_C += project/src/WS2812/ws2812_tst.c
#ADD_SRC_C += project/src/WS2812/WS2812.c
ifdef USE_SDCARD
ADD_SRC_C += project/src/console/sd_fat.c

2
project/inc/platform_autoconf.h
View file

@ -31,7 +31,7 @@
#define RTL8195A 1
/* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz,
6 - 200000000 Hz, 7 - 100000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */
#define CONFIG_CPU_CLK 1
#define CONFIG_CPU_CLK 0
//166.6MHZ - RUN/IDLE/SLP ~63/21/6.4 mA
//83.3MHZ - RUN/IDLE/SLP ~55/15/6.4 mA
//41.6MHZ - RUN/IDLE ~51/11 mA

1
project/inc/web/web_srv.h
View file

@ -185,6 +185,7 @@ typedef struct s_http_response
//#define tcp_urlstrcpy(str, len) web_conn->msgbuflen += urlencode(&web_conn->msgbuf[web_conn->msgbuflen], str, web_conn->msgbufsize - web_conn->msgbuflen - 1, len)
#define tcp_puts(...) web_conn->msgbuflen += rtl_sprintf((char *)&web_conn->msgbuf[web_conn->msgbuflen], __VA_ARGS__)
#define tcp_puts_fd(...) web_conn->msgbuflen += rtl_sprintf((char *)&web_conn->msgbuf[web_conn->msgbuflen], __VA_ARGS__)
#define tcp_put_mac(m) web_conn->msgbuflen += mactostr((char *)&web_conn->msgbuf[web_conn->msgbuflen], (unsigned char *)m, true)
/*
#define tcp_puts_fd(fmt, ...) do { \
static const char flash_str[] ICACHE_RODATA_ATTR = fmt; \

2
project/inc/web/web_utils.h
View file

@ -31,7 +31,7 @@ uint8 * cmpcpystr(uint8 *pbuf, uint8 *pstr, uint8 a, uint8 b, uint16 len);
uint8 * web_strnstr(const uint8* buffer, const uint8* token, int n);
bool base64decode(const uint8 *in, int len, uint8_t *out, int *outlen);
size_t base64encode(char* target, size_t target_len, const char* source, size_t source_len);
void strtomac(uint8 *s, uint8 *macaddr);
int strtomac(uint8 *s, uint8 *macaddr);
//uint32 strtoip(uint8 *s); // ipaddr_addr();
int urldecode(uint8 *d, uint8 *s, uint16 lend, uint16 lens);
//int urlencode(uint8 *d, uint8 *s, uint16 lend, uint16 lens);

2
project/src/ina219/ina219buf.c
View file

@ -129,6 +129,8 @@ void ina219_init(void)
// (!) Установки драйвера I2C заданы в структуре ina219drv
// rtl_printf("INA219 control reg = 0x%04x\n", p->config);
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
// HAL_GPIO_PullCtrl((u32)PC_4, (u32)PullUp);
// HAL_GPIO_PullCtrl((u32)PC_5, (u32)PullUp);
_i2c_init(&p->i2c);
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
rtl_printf("I2C%d mode = %d, drvStatus = %d\n", p->i2c.idx, p->i2c.mode, p->i2c.status);

6
project/src/ina219/ina219drv.c
View file

@ -47,8 +47,8 @@ INA219DRV ina219drv = {
// Если шаг заполнения 1 ms -> буфер на 0.71 сек
// Оптимизация под TCP: (TCP_MSS*2 - 80)/4 = (1460*2 - 80)/4 = 710
.i2c.status = DRV_I2C_OFF,
.i2c.idx = 1, // I2C1
.i2c.io_sel = S0, // PC_4, PC_5
.i2c.idx = 1, // =1: I2C1
.i2c.io_sel = S0, // =S0: PC_4, PC_5
.i2c.mode = DRV_I2C_FS_MODE // DRV_I2C_FS_MODE
};
/*
@ -270,6 +270,8 @@ void ina219_init(void)
};
// (!) Установки драйвера I2C заданы в структуре ina219drv
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
GPIO_PullCtrl_8195a((u32)PC_4, DIN_PULL_HIGH); // HAL_GPIO_PullCtrl((u32)PC_4, (u32)PullUp);
GPIO_PullCtrl_8195a((u32)PC_5, DIN_PULL_HIGH); // HAL_GPIO_PullCtrl((u32)PC_5, (u32)PullUp);
_i2c_init(&p->i2c);
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
rtl_printf("I2C%d mode = %d, drvStatus = %d\n", p->i2c.idx, p->i2c.mode, p->i2c.status);

1
project/src/user/user_start.c
View file

@ -74,7 +74,6 @@ void user_init_thrd(void) {
if(!syscfg.cfg.b.debug_print_enable) print_off = 1;
/* Initilaize the console stack */
console_init();
/* Web Disk Init */

8
project/src/web/web_int_callbacks.c
View file

@ -533,14 +533,14 @@ extern int adc_ws(TCP_SERV_CONN *ts_conn, char cmd);
else ifcmp("auth") tcp_put((wifi_ap_cfg.security) ? '1' : '0');
else ifcmp("hssid") tcp_put((wifi_ap_cfg.ssid_hidden & 1) + '0');
else ifcmp("bint") tcp_puts("%u", wifi_ap_cfg.beacon_interval);
else ifcmp("mac") tcp_puts(MACSTR, MAC2STR(xnetif[WLAN_AP_NETIF_NUM].hwaddr));
else ifcmp("mac") tcp_put_mac(xnetif[WLAN_AP_NETIF_NUM].hwaddr); //s(MACSTR, MAC2STR(xnetif[WLAN_AP_NETIF_NUM].hwaddr));
else ifcmp("hostname") tcp_strcpy(lwip_host_name[1]);
else ifcmp("dhcp") tcp_puts("%u", wifi_ap_dhcp.mode);
else ifcmp("ip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.ip));
else ifcmp("gw") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.gw));
else ifcmp("msk") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.mask));
else ifcmp("cip") tcp_puts(IPSTR, IP2STR(&xnetif[WLAN_ST_NETIF_NUM].ip_addr.addr));
// else ifcmp("mac") strtomac(pvar, wifi_ap_cfg.macaddr);
else ifcmp("mac") tcp_put_mac(xnetif[WLAN_AP_NETIF_NUM].hwaddr);
// else ifcmp("sip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.start_ip));
// else ifcmp("eip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.end_ip));
#if DEBUGSOO > 2
@ -565,8 +565,8 @@ extern int adc_ws(TCP_SERV_CONN *ts_conn, char cmd);
wifi_st_cfg.password[IW_PASSPHRASE_MAX_SIZE] = '\0';
tcp_strcpy(wifi_st_cfg.password);
}
else ifcmp("mac") tcp_puts(MACSTR, MAC2STR(xnetif[WLAN_ST_NETIF_NUM].hwaddr));
else ifcmp("bssid") tcp_puts(MACSTR, MAC2STR(wifi_st_cfg.bssid));
else ifcmp("mac") tcp_put_mac(xnetif[WLAN_ST_NETIF_NUM].hwaddr); // (MACSTR, MAC2STR(xnetif[WLAN_ST_NETIF_NUM].hwaddr));
else ifcmp("bssid") tcp_put_mac(wifi_st_cfg.bssid); // (MACSTR, MAC2STR(wifi_st_cfg.bssid));
else ifcmp("sbss") tcp_puts("%u", wifi_st_cfg.flg);
else ifcmp("sleep") tcp_puts("%d", wifi_st_cfg.sleep);
else ifcmp("dtim") tcp_puts("%u", wifi_st_cfg.dtim);

28
project/src/web/web_int_vars.c
View file

@ -263,7 +263,19 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
else ifcmp("ip") wifi_ap_dhcp.ip = ipaddr_addr(pvar);
else ifcmp("gw") wifi_ap_dhcp.gw = ipaddr_addr(pvar);
else ifcmp("msk") wifi_ap_dhcp.mask = ipaddr_addr(pvar);
// else ifcmp("mac") strtomac(pvar, wifi_ap_cfg.macaddr);
else ifcmp("mac") {
if(wifi_mode & RTW_MODE_AP) {
uint8 new_mac[6];
if (strtomac(pvar, new_mac)) {
uint16 xs = 0;
for(int i = 0; i < 6; i++) xs += new_mac[i];
if (xs != 0 && xs != 0xff*6 && memcmp(xnetif[WLAN_AP_NETIF_NUM].hwaddr, new_mac, 6)) {
if(wifi_mode == RTW_MODE_STA_AP) new_mac[5]--; // если AP+ST, то последняя цифра mac - 1
wifi_set_mac_address(new_mac);
}
}
}
}
// else ifcmp("sip") wifi_ap_dhcp.start_ip = ipaddr_addr(pvar);
// else ifcmp("eip") wifi_ap_dhcp.end_ip = ipaddr_addr(pvar);
#if DEBUGSOO > 2
@ -321,7 +333,19 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
else ifcmp("ip") wifi_st_dhcp.ip = ipaddr_addr(pvar);
else ifcmp("gw") wifi_st_dhcp.gw = ipaddr_addr(pvar);
else ifcmp("msk") wifi_st_dhcp.mask = ipaddr_addr(pvar);
// else ifcmp("mac") strtomac(pvar, wifi_st_cfg.mac);
else ifcmp("mac") {
if(wifi_mode & RTW_MODE_STA) {
uint8 new_mac[6];
if (strtomac(pvar, new_mac)) {
uint16 xs = 0;
for(int i = 0; i < 6; i++) xs += new_mac[i];
if (xs != 0 && xs != 0xff*6 && memcmp(xnetif[WLAN_ST_NETIF_NUM].hwaddr, new_mac, 6)) {
// if(wifi_mode == RTW_MODE_STA_AP) new_mac[5]--; // если AP+ST, то последняя цифра mac - 1
wifi_set_mac_address(new_mac);
}
}
}
}
// else ifcmp("sbss") wifi_st_cfg.bssidx = val;
#if DEBUGSOO > 5
else os_printf(" - none!\n");

29
project/src/web/web_utils.c
View file

@ -375,18 +375,27 @@ uint32 ICACHE_FLASH_ATTR str_array_b(uint8 *s, uint8 *buf, uint32 max_buf)
/******************************************************************************
* FunctionName : strtmac
*******************************************************************************/
void ICACHE_FLASH_ATTR strtomac(uint8 *s, uint8 *macaddr)
int ICACHE_FLASH_ATTR strtomac(uint8 *s, uint8 *macaddr)
{
uint8 pbuf[4];
s = cmpcpystr(pbuf, s, 0, ':', 3);
*macaddr++ = hextoul(pbuf);
int i = 4;
while(i--) {
s = cmpcpystr(pbuf, s, ':', ':', 3);
*macaddr++ = hextoul(pbuf);
uint8 * ptrm = macaddr;
int slen = strlen(s);
uint8 * ptr = s;
if(slen == (6*2 + 5) || slen == (6*2)) {
uint8 pbuf[4];
pbuf[2] = 0;
slen = 6;
while(slen--) {
pbuf[0] = ptr[0];
pbuf[1] = ptr[1];
*ptrm++ = (uint8)hextoul(pbuf);
if(ptr[2] != ':') ptr +=2;
else ptr +=3;
}
return 1;
} else {
rtl_memset(macaddr, 0xff, 6);
return 0;
}
s = cmpcpystr(pbuf, s, ':', ' ', 3);
*macaddr++ = hextoul(pbuf);
}
/******************************************************************************
* FunctionName : urldecode