j3d1/RTL00_WEB
1
0
Fork 0
mirror of https://github.com/pvvx/RTL00_WEB.git synced 2024-11-22 14:04:21 +00:00
Code Issues Projects Releases Packages Wiki Activity

add bitband I/O

Browse source
This commit is contained in:
pvvx 2017-07-11 15:14:48 +03:00
parent 6386e78c5b
commit 9292f63c37
1 changed files with 59 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

59
USDK/component/soc/realtek/8195a/fwlib/src/bitband_io.c Normal file
View file

@ -0,0 +1,59 @@
#include "bitband_io.h"
volatile uint8_t * BitBandAddr(void *addr, uint8_t bit) {
return (volatile uint8_t *)(BITBAND_ADDR((u32)addr, bit));
}
volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit) {
return (volatile uint8_t *)(BITBAND_PERI((u32)addr, bit));
}
volatile uint8_t * GetOutPinBitBandAddr(PinName pin) {
uint32_t paddr = NULL;
uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
if(ippin < 0xff) {
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_PORTB_DR * (ippin >> 5)), ippin & 0x1f);
}
return paddr;
}
volatile uint8_t * GetInPinBitBandAddr(PinName pin) {
volatile uint8_t * paddr = NULL;
uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
if(ippin < 0xff) {
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_EXT_PORTA + (ippin >> 5) * 4), ippin & 0x1f);
}
return paddr;
}
volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
{
volatile uint8_t *paddr = NULL;
uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
if(ippin < 0xff) {
if(_pHAL_Gpio_Adapter == NULL) {
extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
_pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter;
}
if(_pHAL_Gpio_Adapter->Gpio_Func_En == 0) GPIO_FuncOn_8195a();
delayMicroseconds(100);
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
GpioFunctionChk(ippin, ENABLE);
GPIO_PullCtrl_8195a(ippin, HAL_GPIO_HIGHZ); // Make the pin pull control default as High-Z
paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_PORTB_DR * (ippin >> 5)), ippin & 0x1f);
*paddr = val; // data register
HAL_GPIO_PIN gpio;
gpio.pin_name = ippin;
gpio.pin_mode = pmode;
HAL_GPIO_Init_8195a(&gpio);
*paddr = val; // data register
// paddr[(GPIO_PORTB_DDR - GPIO_PORTB_DR) * 32] = pmode == DOUT_PUSH_PULL; // data direction
// GPIO_PullCtrl_8195a(ippin, pmode); // set GPIO_PULL_CTRLx
// paddr[(GPIO_PORTB_CTRL - GPIO_PORTB_DR) * 32] = 0; // data source control, we should keep it as default: data source from software
}
return paddr;
}