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add i2c sample
This commit is contained in:
pvvx
parent
1752a87a8e
commit
60ffc5c30f
8 changed files with 929 additions and 8 deletions
452
project/src/driver/i2c_drv.c
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452
project/src/driver/i2c_drv.c
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/*
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* i2c_drv.c
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*
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* Created on: 02/05/2017.
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* Author: pvvx
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*/
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#include "driver/i2c_drv.h"
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#if CONFIG_I2C_EN
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#include "pinmap.h"
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typedef struct {
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unsigned char sda;
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unsigned char scl;
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unsigned char sel;
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unsigned char id;
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} PinMapI2C;
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#define I2C_SEL(idx, ps) ((idx<<4) | ps)
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static const PinMapI2C PinMap_I2C[] = {
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// sda, scl, sel, id
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// I2C0
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{PD_4, PD_5, I2C_SEL(0, S0), I2C0},
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{PH_1, PH_0, I2C_SEL(0, S1), I2C0},
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{PC_8, PC_9, I2C_SEL(0, S2), I2C0},
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{PE_7, PE_6, I2C_SEL(0, S3), I2C0},
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// I2C1
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{PC_4, PC_5, I2C_SEL(1, S0), I2C1},
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{PH_3, PH_2, I2C_SEL(1, S1), I2C1},
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{PD_7, PD_6, I2C_SEL(1, S2), I2C1},
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// I2C2
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{PB_7, PB_6, I2C_SEL(2, S0), I2C2},
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{PE_1, PE_0, I2C_SEL(2, S1), I2C2},
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{PC_7, PC_6, I2C_SEL(2, S2), I2C2},
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// I2C3
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{PB_3, PB_2, I2C_SEL(3, S0), I2C3},
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{PE_3, PE_2, I2C_SEL(3, S1), I2C3},
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{PE_5, PE_4, I2C_SEL(3, S2), I2C3},
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{PD_9, PD_8, I2C_SEL(3, S3), I2C3},
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{0xff, 0xff, 0, 0}
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};
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static void * i2c_base_reg[4] = {
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I2C0_REG_BASE,
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I2C1_REG_BASE,
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I2C2_REG_BASE,
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I2C3_REG_BASE
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};
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#if 1
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#define test_printf
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#define i2c_dump_regs(p)
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#else
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#define test_printf rtl_printf
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LOCAL int i2c_dump_regs(i2c_drv_t *pi2c)
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{
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uint32 *ptr = pi2c->base_regs;
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test_printf("%s:", __func__);
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for(int i = 0; i < (0xA0>>2); i++) {
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if(!(i%4)) {
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test_printf("\n%08x:", &ptr[i]);
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}
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test_printf("\t%08x", ptr[i]);
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}
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test_printf("\n");
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}
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#endif
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#define i2c_reg(r) *((volatile uint32 *)(pi2c->base_regs + r))
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// flg =0 write, =1 Read
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LOCAL int i2c_ready(i2c_drv_t *pi2c, unsigned char flg)
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{
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test_printf("%s:\n", __func__);
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// Test enable i2c
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if(!(i2c_reg(REG_DW_I2C_IC_ENABLE) & BIT_IC_ENABLE)) {
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error_printf("I2C%d disable!\n", pi2c->idx);
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pi2c->status = DRV_I2C_IC_OFF;
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return DRV_I2C_IC_OFF;
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}
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// Wait Receive FIFO is empty & Transmit FIFO Completely Empty
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int poll_count = DRV_I2C_POOL_TIMEOUT;
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do {
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if(i2c_reg(REG_DW_I2C_IC_RAW_INTR_STAT) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
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error_printf("I2C%d Abort!\n", pi2c->idx);
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// Clear abort status.
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(volatile)i2c_reg(REG_DW_I2C_IC_CLR_TX_ABRT);
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// Be sure that all interrupts flag are cleared.
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// (volatile)i2c_reg(REG_DW_I2C_IC_CLR_INTR);
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pi2c->status = DRV_I2C_ABORT;
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return DRV_I2C_ABORT;
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}
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if(flg) {
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// Receive FIFO ready ?
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if(i2c_reg(REG_DW_I2C_IC_STATUS) & (BIT_IC_STATUS_RFNE | BIT_IC_STATUS_RFF)) {
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// pi2c->status = DRV_I2C_IC_ENABLE;
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return DRV_I2C_OK;
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}
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}
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else {
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// Transmit FIFO is not full ?
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if(i2c_reg(REG_DW_I2C_IC_STATUS) & BIT_IC_STATUS_TFNF) {
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// pi2c->status = DRV_I2C_IC_ENABLE;
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return DRV_I2C_OK;
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}
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}
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} while(poll_count--);
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error_printf("I2C%d Timeout!\n", pi2c->idx);
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pi2c->status = DRV_I2C_TIMEOUT;
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return DRV_I2C_TIMEOUT;
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}
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int _i2c_break(i2c_drv_t *pi2c)
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{
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test_printf("%s\n", __func__);
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// (volatile)i2c_reg(REG_DW_I2C_IC_CLR_INTR);
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// ABORT operation
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int poll_count = DRV_I2C_POOL_TIMEOUT;
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i2c_reg(REG_DW_I2C_IC_ENABLE) |= 2;
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// Wait until controller is disabled.
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while(i2c_reg(REG_DW_I2C_IC_ENABLE) & 2) {
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if(poll_count-- <= 0) {
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error_printf("Error abort i2c%d\n", pi2c->idx);
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pi2c->status = DRV_I2C_TIMEOUT;
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return DRV_I2C_TIMEOUT;
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};
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};
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pi2c->status = DRV_I2C_OFF;
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// All interrupts flag are cleared.
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(volatile)i2c_reg(REG_DW_I2C_IC_CLR_INTR);
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return DRV_I2C_OK;
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}
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/* (!) вызывать после _i2c_init */
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int _i2c_set_speed(i2c_drv_t *pi2c, uint32 clk_hz)
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{
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test_printf("%s:\n", __func__);
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if(clk_hz < 10000 || clk_hz > HalGetCpuClk()/16) {
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error_printf("I2C%d Error clk!\n", pi2c->idx);
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return DRV_I2C_ERR;
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}
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uint32 tmp;
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uint32 CpuClkTmp = HalGetCpuClk()/clk_hz;
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switch(pi2c->mode) {
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case I2C_SS_MODE:
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// Standard Speed Clock SCL High Count
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tmp = (CpuClkTmp * I2C_SS_MIN_SCL_HTIME)/(I2C_SS_MIN_SCL_HTIME + I2C_SS_MIN_SCL_LTIME);
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i2c_reg(REG_DW_I2C_IC_SS_SCL_HCNT) = BIT_CTRL_IC_SS_SCL_HCNT(tmp);
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// Standard Speed Clock SCL Low Count
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tmp = (CpuClkTmp * I2C_SS_MIN_SCL_LTIME)/(I2C_SS_MIN_SCL_HTIME + I2C_SS_MIN_SCL_LTIME);
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i2c_reg(REG_DW_I2C_IC_SS_SCL_LCNT) = BIT_CTRL_IC_SS_SCL_LCNT(tmp);
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break;
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case I2C_HS_MODE:
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// Standard Speed Clock SCL High Count
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i2c_reg(REG_DW_I2C_IC_SS_SCL_HCNT) = BIT_CTRL_IC_SS_SCL_HCNT(400);
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// Standard Speed Clock SCL Low Count
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i2c_reg(REG_DW_I2C_IC_SS_SCL_LCNT) = BIT_CTRL_IC_SS_SCL_LCNT(470);
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// Fast Speed Clock SCL High Count
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i2c_reg(REG_DW_I2C_IC_FS_SCL_HCNT) = BIT_CTRL_IC_FS_SCL_HCNT(85);
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// Fast Speed I2C Clock SCL Low Count
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i2c_reg(REG_DW_I2C_IC_FS_SCL_LCNT) = BIT_CTRL_IC_FS_SCL_LCNT(105);
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// High Speed I2C Clock SCL High Count
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tmp = (CpuClkTmp * I2C_HS_MIN_SCL_HTIME_100)/(I2C_HS_MIN_SCL_HTIME_100 + I2C_HS_MIN_SCL_LTIME_100);
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if (tmp > 8) tmp -= 3;
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i2c_reg(REG_DW_I2C_IC_HS_SCL_HCNT) = BIT_CTRL_IC_HS_SCL_HCNT(tmp);
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// High Speed I2C Clock SCL Low Count
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tmp = (CpuClkTmp * I2C_HS_MIN_SCL_LTIME_100)/(I2C_HS_MIN_SCL_HTIME_100 + I2C_HS_MIN_SCL_LTIME_100);
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if (tmp > 6) tmp -= 6;
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i2c_reg(REG_DW_I2C_IC_HS_SCL_LCNT) = BIT_CTRL_IC_FS_SCL_LCNT(tmp);
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break;
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// case I2C_FS_MODE:
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default:
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pi2c->mode = I2C_FS_MODE;
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// Fast Speed Clock SCL High Count
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tmp = (CpuClkTmp * I2C_FS_MIN_SCL_HTIME)/(I2C_FS_MIN_SCL_HTIME + I2C_FS_MIN_SCL_LTIME);
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if (tmp > 4) tmp -= 4;// this part is according to the fine-tune result
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i2c_reg(REG_DW_I2C_IC_FS_SCL_HCNT) = BIT_CTRL_IC_FS_SCL_HCNT(tmp);
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// Fast Speed I2C Clock SCL Low Count
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tmp = (CpuClkTmp * I2C_FS_MIN_SCL_LTIME)/(I2C_FS_MIN_SCL_HTIME + I2C_FS_MIN_SCL_LTIME);
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if (tmp > 3) tmp -= 3; // this part is according to the fine-tune result
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i2c_reg(REG_DW_I2C_IC_FS_SCL_LCNT) = BIT_CTRL_IC_FS_SCL_LCNT(tmp);
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}
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return DRV_I2C_OK;
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}
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LOCAL int i2c_disable(i2c_drv_t *pi2c)
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{
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test_printf("%s:\n", __func__);
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pi2c->status = DRV_I2C_IC_OFF;
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if(i2c_reg(REG_DW_I2C_IC_ENABLE_STATUS) & BIT_IC_ENABLE_STATUS_IC_EN) {
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test_printf("I2C%d Already disable!\n", pi2c->idx);
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return DRV_I2C_OK;
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}
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// Disable controller.
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int poll_count = DRV_I2C_POOL_TIMEOUT;
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i2c_reg(REG_DW_I2C_IC_ENABLE) &= ~BIT_IC_ENABLE;
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// Wait until controller is disabled.
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while(i2c_reg(REG_DW_I2C_IC_ENABLE_STATUS) & BIT_IC_ENABLE_STATUS_IC_EN) {
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if(poll_count-- <= 0) {
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error_printf("I2C%d Error disable!\n", pi2c->idx);
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pi2c->status = DRV_I2C_TIMEOUT;
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return DRV_I2C_TIMEOUT;
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};
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};
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return DRV_I2C_OK;
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}
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LOCAL int i2c_enable(i2c_drv_t *pi2c)
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{
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test_printf("%s:\n", __func__);
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int poll_count = DRV_I2C_POOL_TIMEOUT;
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if(!(i2c_reg(REG_DW_I2C_IC_ENABLE_STATUS) & BIT_IC_ENABLE_STATUS_IC_EN)) {
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// Enable controller.
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i2c_reg(REG_DW_I2C_IC_ENABLE) = BIT_IC_ENABLE;
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// Wait until controller is enabled
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while(!(i2c_reg(REG_DW_I2C_IC_ENABLE_STATUS) & BIT_IC_ENABLE_STATUS_IC_EN)) {
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if(poll_count-- <= 0) {
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error_printf("I2C%d Error enable\n", pi2c->idx);
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pi2c->status = DRV_I2C_TIMEOUT;
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return DRV_I2C_TIMEOUT;
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};
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};
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};
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// Be sure that all interrupts flag are cleared.
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(volatile)i2c_reg(REG_DW_I2C_IC_CLR_INTR);
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pi2c->status = DRV_I2C_IC_ENABLE;
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return DRV_I2C_OK;
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}
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// IC On & Enable CLK
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LOCAL void _i2c_ic_on(i2c_drv_t *pi2c)
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{
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test_printf("%s:\n", __func__);
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uint32 tmp = 1 << (pi2c->idx << 1);
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HAL_PERI_ON_WRITE32(REG_PESOC_PERI_CLK_CTRL1,
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HAL_PERI_ON_READ32(REG_PESOC_PERI_CLK_CTRL1) | tmp);
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HAL_PERI_ON_WRITE32(REG_PESOC_PERI_CLK_CTRL1,
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HAL_PERI_ON_READ32(REG_PESOC_PERI_CLK_CTRL1) | (tmp << 1));
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tmp = BIT_PERI_I2C0_EN << pi2c->idx;
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HAL_PERI_ON_WRITE32(REG_SOC_PERI_FUNC0_EN,
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HAL_PERI_ON_READ32(REG_SOC_PERI_FUNC0_EN) & (~tmp));
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HAL_PERI_ON_WRITE32(REG_SOC_PERI_FUNC0_EN,
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HAL_PERI_ON_READ32(REG_SOC_PERI_FUNC0_EN) | tmp);
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tmp = HAL_READ32(PERI_ON_BASE, REG_PESOC_CLK_SEL);
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tmp &= (~(BIT_PESOC_PERI_SCLK_SEL(3)));
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HAL_WRITE32(PERI_ON_BASE, REG_PESOC_CLK_SEL, tmp);
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HalPinCtrlRtl8195A(I2C0 + pi2c->idx, pi2c->io_sel, 1);
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}
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// IC Off & Disable CLK
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void _i2c_ic_off(i2c_drv_t *pi2c)
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{
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test_printf("%s:\n", __func__);
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if(pi2c->status) {
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// mask all interrupts
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i2c_reg(REG_DW_I2C_IC_INTR_MASK) = 0;
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// Disable (Abort I2C Controller)
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_i2c_break(pi2c);
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i2c_disable(pi2c);
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uint32 mask = BIT_PERI_I2C0_EN << pi2c->idx;
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HAL_PERI_ON_WRITE32(REG_SOC_PERI_FUNC0_EN,
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HAL_PERI_ON_READ32(REG_SOC_PERI_FUNC0_EN) | mask);
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HalPinCtrlRtl8195A(I2C0 + pi2c->idx, pi2c->io_sel, 0);
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#ifdef CONFIG_SOC_PS_MODULE
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REG_POWER_STATE i2cPwrState;
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// To register a new peripheral device power state
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i2cPwrState.FuncIdx = I2C0 + pi2c->idx;
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i2cPwrState.PwrState = INACT;
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RegPowerState(i2cPwrState);
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#endif
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pi2c->status = DRV_I2C_OFF;
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}
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}
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/* (!) вызывать до _i2c_init, если параметрв драйвера не заданы в i2c_drv_t */
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int _i2c_setup(i2c_drv_t *pi2c, PinName sda, PinName scl, unsigned char mode)
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{
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test_printf("%s:\n", __func__);
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if(mode < DRV_I2C_SS_MODE || mode > DRV_I2C_HS_MODE) {
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error_printf("I2C Error mode!\n");
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return DRV_I2C_ERR;
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}
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// Pins -> index
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PinMapI2C *p = PinMap_I2C;
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while(p->sda != 0xFF) {
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if(p->sda == sda && p->scl == scl) {
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pi2c->io_sel = RTL_GET_PERI_SEL(p->sel);
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pi2c->idx = RTL_GET_PERI_IDX(p->sel);
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pi2c->mode = mode;
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return DRV_I2C_OK;
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}
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p++;
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}
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error_printf("I2C Error pins!\n");
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return DRV_I2C_ERR;
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}
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/* (!) Использует заполненную структуру i2c_drv_t */
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int _i2c_init(i2c_drv_t *pi2c)
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{
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test_printf("%s:\n", __func__);
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// Set base address regs i2c
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pi2c->base_regs = i2c_base_reg[pi2c->idx];
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// IC On & Enable CLK
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if(pi2c->status == DRV_I2C_OFF) _i2c_ic_on(pi2c);
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// mask all interrupts
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i2c_reg(REG_DW_I2C_IC_INTR_MASK) = 0;
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// disable i2c
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if(i2c_disable(pi2c)) return pi2c->status;
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// Set Control Register:
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// bit0: master enabled,
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// bit1..2: fast mode (400 kbit/s), ...
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// bit2: Slave Addressing Mode 7-bit
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// bit4: Master Addressing Mode 7-bit
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// bit5: Restart disable
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// bit6: Slave Mode Disable
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// bit7: STOP_DET_IFADDRESSED
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// bit8: TX_EMPTY_CTRL
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// bit9: RX_FIFO_FULL_HLD_CTRL
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// Set MASTER_MODE
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i2c_reg(REG_DW_I2C_IC_CON) =
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BIT_CTRL_IC_CON_MASTER_MODE(1)
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| BIT_IC_CON_SPEED(pi2c->mode)
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| BIT_CTRL_IC_CON_IC_10BITADDR_SLAVE(0)
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| BIT_CTRL_IC_CON_IC_10BITADDR_MASTER(0)
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| BIT_CTRL_IC_CON_IC_RESTART_EN(1)
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| BIT_CTRL_IC_CON_IC_SLAVE_DISABLE(1);
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// Master Target Address
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// i2c_reg(REG_DW_I2C_IC_TAR) = 0x40;
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// Slave Address
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// i2c_reg(REG_DW_I2C_IC_SAR) = 0x55;
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// High Speed Master ID (00001xxx) bit0..2
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// i2c_reg(REG_DW_I2C_IC_HS_MADDR) = BIT_CTRL_IC_HS_MADDR(0x4);
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// Standard Speed Clock SCL High Count (100kHz)
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i2c_reg(REG_DW_I2C_IC_SS_SCL_HCNT) = BIT_CTRL_IC_SS_SCL_HCNT(400);
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// Standard Speed Clock SCL Low Count (100kHz)
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i2c_reg(REG_DW_I2C_IC_SS_SCL_LCNT) = BIT_CTRL_IC_SS_SCL_LCNT(470);
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// Fast Speed Clock SCL High Count (400kHz)
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i2c_reg(REG_DW_I2C_IC_FS_SCL_HCNT) = BIT_CTRL_IC_FS_SCL_HCNT(80);
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// Fast Speed I2C Clock SCL Low Count (400kHz)
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i2c_reg(REG_DW_I2C_IC_FS_SCL_LCNT) = BIT_CTRL_IC_FS_SCL_LCNT(100);
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// High Speed I2C Clock SCL High Count (1MHz)
|
||||
i2c_reg(REG_DW_I2C_IC_HS_SCL_HCNT) = BIT_CTRL_IC_HS_SCL_HCNT(30);
|
||||
// High Speed I2C Clock SCL Low Count (1MHz)
|
||||
i2c_reg(REG_DW_I2C_IC_HS_SCL_LCNT) = BIT_CTRL_IC_FS_SCL_LCNT(40);
|
||||
// SDA Hold (IC_CLK period, when I2C controller acts as a transmitter/receiver)
|
||||
i2c_reg(REG_DW_I2C_IC_SDA_HOLD) = BIT_CTRL_IC_SDA_HOLD(10);
|
||||
// General Call Ack
|
||||
i2c_reg(REG_DW_I2C_IC_ACK_GENERAL_CALL) = BIT_CTRL_IC_ACK_GENERAL_CALL(1);
|
||||
// Receive FIFO Threshold Level
|
||||
// i2c_reg(REG_DW_I2C_IC_RX_TL) = 0x0;
|
||||
// Transmit FIFO Threshold Level
|
||||
// i2c_reg(REG_DW_I2C_IC_TX_TL) = 0x0;
|
||||
// Transmit Abort Source
|
||||
// i2c_reg(REG_DW_I2C_IC_TX_ABRT_SOURCE) = 0x0;
|
||||
// DMA Transmit Data Level Register
|
||||
// i2c_reg(REG_DW_I2C_IC_DMA_TDLR) = 0x09;
|
||||
|
||||
#ifdef CONFIG_SOC_PS_MODULE
|
||||
REG_POWER_STATE i2cPwrState;
|
||||
// To register a new peripheral device power state
|
||||
i2cPwrState.FuncIdx = I2C0 + pi2c->idx;
|
||||
i2cPwrState.PwrState = ACT;
|
||||
RegPowerState(i2cPwrState);
|
||||
#endif
|
||||
i2c_dump_regs(pi2c);
|
||||
// pi2c->status = DRV_I2C_IC_OFF;
|
||||
return DRV_I2C_OK;
|
||||
}
|
||||
|
||||
int _i2c_write(i2c_drv_t *pi2c, uint32 address, const char *data, int length, int stop)
|
||||
{
|
||||
test_printf("%s: [%d]%d\n", __func__, length, stop);
|
||||
uint8_t *d = (uint8_t *)data;
|
||||
// Write slave address to TAR.
|
||||
// bit12: = 1 - 10-bit addressing mode when acting as a master
|
||||
// bit11: = 1 - Special Command Enable
|
||||
// bit10: = 1 - Special Command Type START BYTE
|
||||
i2c_reg(REG_DW_I2C_IC_TAR) = address;
|
||||
// Enable controller
|
||||
if(i2c_enable(pi2c)) return pi2c->status;
|
||||
while (length--) {
|
||||
// Transmit FIFO is not full
|
||||
if(i2c_ready(pi2c, 0)) return pi2c->status; // BIT_IC_STATUS_TFNF
|
||||
// Fill IC_DATA_CMD[7:0] with the data.
|
||||
// Send stop after last byte ?
|
||||
if(length == 0 && stop) i2c_reg(REG_DW_I2C_IC_DATA_CMD) = *d | BIT_IC_DATA_CMD_STOP;
|
||||
else i2c_reg(REG_DW_I2C_IC_DATA_CMD) = *d;
|
||||
d++;
|
||||
}
|
||||
// Disable controller.
|
||||
if(stop) {
|
||||
if(i2c_disable(pi2c)) return pi2c->status;
|
||||
}
|
||||
return DRV_I2C_OK;
|
||||
}
|
||||
|
||||
int _i2c_read(i2c_drv_t *pi2c, uint32 address, const char *data, int length, int stop)
|
||||
{
|
||||
test_printf("%s: [%d]%d\n", __func__, length, stop);
|
||||
uint8_t *d = (uint8_t *)data;
|
||||
int len = length;
|
||||
// Write slave address to TAR.
|
||||
// bit12: = 1 - 10-bit addressing mode when acting as a master
|
||||
// bit11: = 1 - Special Command Enable
|
||||
// bit10: = 1 - Special Command Type START BYTE
|
||||
i2c_reg(REG_DW_I2C_IC_TAR) = address;
|
||||
// Enable controller.
|
||||
if(i2c_enable(pi2c)) return pi2c->status;
|
||||
while (len--) {
|
||||
// Transmit FIFO is not full
|
||||
if(i2c_ready(pi2c, 0)) return pi2c->status; // BIT_IC_STATUS_TFE
|
||||
// Send stop after last byte ?
|
||||
if (len == 0 && stop) {
|
||||
// bit10: = 1 - Restart Bit Control
|
||||
// bit9: = 1 - Stop Bit Control
|
||||
// bit8: = 1 - Command read / = 0 Command write
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = BIT_IC_DATA_CMD_CMD | BIT_IC_DATA_CMD_STOP;
|
||||
} else {
|
||||
// Read command -IC_DATA_CMD[8] = 1.
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = BIT_IC_DATA_CMD_CMD;
|
||||
}
|
||||
// Receive FIFO ready?
|
||||
if(i2c_reg(REG_DW_I2C_IC_STATUS) & (BIT_IC_STATUS_RFNE | BIT_IC_STATUS_RFF)) {
|
||||
// IC_DATA_CMD[7:0] contains received data.
|
||||
if(length) {
|
||||
*d++ = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||
length--;
|
||||
}
|
||||
else (volatile) i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||
};
|
||||
}
|
||||
while(length) {
|
||||
// Receive FIFO ready?
|
||||
if(i2c_ready(pi2c, 1)) return pi2c->status; // BIT_IC_STATUS_TFE
|
||||
// IC_DATA_CMD[7:0] contains received data.
|
||||
*d++ = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||
length--;
|
||||
};
|
||||
// Disable controller.
|
||||
if(stop) {
|
||||
if(i2c_disable(pi2c)) return pi2c->status;
|
||||
}
|
||||
return DRV_I2C_OK;
|
||||
}
|
||||
|
||||
#endif // CONFIG_I2C_EN
|
||||
274
project/src/ina219/ina219buf.c
Normal file
274
project/src/ina219/ina219buf.c
Normal file
|
|
@ -0,0 +1,274 @@
|
|||
/*
|
||||
* ina219buf.c
|
||||
*
|
||||
* Created on: 02/05/2017
|
||||
* Author: pvvx
|
||||
*/
|
||||
#include <platform_opts.h>
|
||||
#include "rtl8195a.h"
|
||||
#include "device.h"
|
||||
#include "PinNames.h"
|
||||
|
||||
#include "basic_types.h"
|
||||
#include "diag.h"
|
||||
#include "osdep_api.h"
|
||||
|
||||
//#include "i2c_api.h"
|
||||
//#include "i2c_ex_api.h"
|
||||
#include "pinmap.h"
|
||||
#include "rtl_lib.h"
|
||||
#include "ina219/ina219buf.h"
|
||||
#include "rtl8195a/rtl_libc.h"
|
||||
#include "driver/i2c_drv.h"
|
||||
|
||||
INA219DRV ina219drv = {
|
||||
.addr = INA219_ADDRESS>>1,
|
||||
.config =
|
||||
INA219_CONFIG_BVOLTAGERANGE_16V | // INA219_CONFIG_BVOLTAGERANGE_32V
|
||||
INA219_CONFIG_GAIN_8_320MV | // INA219_CONFIG_GAIN_1_40MV |
|
||||
INA219_CONFIG_BADCRES_12BIT |
|
||||
INA219_CONFIG_SADCRES_12BIT_2S_1060US | // INA219_CONFIG_SADCRES_12BIT_128S_69MS |
|
||||
INA219_CONFIG_MODE_SANDBVOLT_CONTINUOUS,
|
||||
.calibration = 8192,
|
||||
.i2c.status = DRV_I2C_OFF,
|
||||
.i2c.idx = 1, // I2C1
|
||||
.i2c.io_sel = S0, // PC_4, PC_5
|
||||
.i2c.mode = DRV_I2C_FS_MODE // DRV_I2C_HS_MODE
|
||||
};
|
||||
|
||||
void ina219_write(unsigned char reg, unsigned short data)
|
||||
{
|
||||
PINA219DRV p = &ina219drv;
|
||||
p->buf_i2c.uc[0] = reg;
|
||||
p->buf_i2c.uc[1] = (unsigned char)((unsigned short)(data >> 8));
|
||||
p->buf_i2c.uc[2] = (unsigned char)data;
|
||||
_i2c_write(&p->i2c, p->addr, (const char *)p->buf_i2c.uc, 3, 1);
|
||||
}
|
||||
|
||||
unsigned int ina219_read(unsigned char reg)
|
||||
{
|
||||
PINA219DRV p = &ina219drv;
|
||||
p->buf_i2c.uc[0] = reg;
|
||||
_i2c_write(&p->i2c, p->addr, (const char *)p->buf_i2c.uc, 1, 1);
|
||||
p->buf_i2c.ui = 0;
|
||||
_i2c_read(&p->i2c, p->addr, (const char *)p->buf_i2c.uc, 2, 1);
|
||||
return (p->buf_i2c.uc[0] << 8) | p->buf_i2c.uc[1];
|
||||
}
|
||||
|
||||
#define i2c_reg(r) *((volatile uint32 *)(pi2c->base_regs + r))
|
||||
|
||||
/* Пример непрерывного чтения регистров
|
||||
* тока и напряжения IN219 по прерыванию таймера */
|
||||
void ina_tick_handler(void *par) {
|
||||
PINA219DRV p = &ina219drv;
|
||||
i2c_drv_t *pi2c = &p->i2c;
|
||||
switch(p->status) {
|
||||
default:
|
||||
// Disable controller.
|
||||
i2c_reg(REG_DW_I2C_IC_ENABLE) = 0;
|
||||
p->status = 1;
|
||||
break;
|
||||
case 1:
|
||||
// Master Target Address
|
||||
i2c_reg(REG_DW_I2C_IC_TAR) = p->addr;
|
||||
// Enable controller.
|
||||
i2c_reg(REG_DW_I2C_IC_ENABLE) = BIT_IC_ENABLE;
|
||||
p->status = 2;
|
||||
break;
|
||||
case 2:
|
||||
// Заполним FIFO ic I2C командами инициализации INA219
|
||||
// Write addr reg.
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = INA219_REG_CONFIG;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = p->config >> 8;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = (p->config & 0x0FF) | BIT_IC_DATA_CMD_STOP;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = INA219_REG_CALIBRATION;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = p->calibration >> 8;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = (p->calibration & 0x0FF) | BIT_IC_DATA_CMD_STOP;
|
||||
//
|
||||
p->status = 3;
|
||||
break;
|
||||
case 4:
|
||||
if (i2c_reg(REG_DW_I2C_IC_RAW_INTR_STAT) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||
uint32 tmp = i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
||||
p->errs++;
|
||||
p->status = 0;
|
||||
break;
|
||||
} else {
|
||||
// Считаем готовые значения из FIFO ic I2C
|
||||
p->buf_i2c.uc[1] = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||
p->buf_i2c.uc[0] = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||
p->buf_i2c.uc[3] = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||
p->buf_i2c.uc[2] = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||
p->count++;
|
||||
}
|
||||
case 3:
|
||||
// Заполним FIFO ic I2C командами чтения
|
||||
// Write addr reg.
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = INA219_REG_BUSVOLTAGE | BIT_IC_DATA_CMD_STOP;
|
||||
// Read command.
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = BIT_IC_DATA_CMD_CMD;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = BIT_IC_DATA_CMD_CMD | BIT_IC_DATA_CMD_STOP;
|
||||
// Write addr reg.
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = INA219_REG_SHUNTVOLTAGE | BIT_IC_DATA_CMD_STOP;
|
||||
// Read command.
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = BIT_IC_DATA_CMD_CMD;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = BIT_IC_DATA_CMD_CMD | BIT_IC_DATA_CMD_STOP;
|
||||
p->status = 4;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void ina219_init(void)
|
||||
{
|
||||
PINA219DRV p = &ina219drv;
|
||||
if(p->init <= 0) {
|
||||
rtl_printf("Init INA219\n");
|
||||
p->status = 0;
|
||||
p->count = 0;
|
||||
p->errs = 0;
|
||||
// (!) Установки драйвера I2C заданы в структуре ina219drv
|
||||
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
|
||||
_i2c_init(&p->i2c);
|
||||
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
|
||||
rtl_printf("I2C%d mode = %d, drvStatus = %d\n", p->i2c.idx, p->i2c.mode, p->i2c.status);
|
||||
// (!) Инициализация INA219 перенесена в прерывание таймера
|
||||
// ina219_write(INA219_REG_CONFIG, p->config);
|
||||
// ina219_write(INA219_REG_CALIBRATION, p->calibration);
|
||||
// Initial a periodical timer
|
||||
gtimer_init(&p->timer, INA219_TIMER);
|
||||
// Tick every 0.000532 sec (N*532 μs)
|
||||
uint32 tus = (1 << ((p->config >> 3) & 7));
|
||||
tus *= 532;
|
||||
gtimer_start_periodical(&p->timer, tus, (void*)ina_tick_handler, (uint32_t)&ina219drv);
|
||||
rtl_printf("INA219 Read Period = %u us\n", tus);
|
||||
p->init = 1;
|
||||
}
|
||||
}
|
||||
|
||||
void ina219_deinit(void)
|
||||
{
|
||||
PINA219DRV p = &ina219drv;
|
||||
i2c_drv_t *pi2c = &p->i2c;
|
||||
if(p->init > 0) {
|
||||
rtl_printf("Deinit INA219\n");
|
||||
gtimer_stop(&p->timer);
|
||||
gtimer_deinit(&p->timer);
|
||||
// (!) Не используется ina219_write / ina219_read для сокращения кода
|
||||
// ina219_write(INA219_REG_CONFIG, INA219_CONFIG_MODE_POWERDOWN);
|
||||
// Break controller.
|
||||
i2c_reg(REG_DW_I2C_IC_ENABLE) |= 2;
|
||||
vTaskDelay(2); // +WDT
|
||||
// Disable controller.
|
||||
i2c_reg(REG_DW_I2C_IC_ENABLE) = 0;
|
||||
vTaskDelay(2); // +WDT
|
||||
// Master Target Address
|
||||
i2c_reg(REG_DW_I2C_IC_TAR) = p->addr;
|
||||
// Enable controller.
|
||||
i2c_reg(REG_DW_I2C_IC_ENABLE) = BIT_IC_ENABLE;
|
||||
// Заполним FIFO ic I2C командой отключения INA219
|
||||
vTaskDelay(2); // +WDT
|
||||
// Write addr reg. INA219 POWER_DOWN
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = INA219_REG_CONFIG;
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = (INA219_CONFIG_MODE_POWERDOWN >> 8);
|
||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD) = (INA219_CONFIG_MODE_POWERDOWN & 0x0F) | BIT_IC_DATA_CMD_STOP;
|
||||
vTaskDelay(2); // +WDT
|
||||
_i2c_deinit(&p->i2c);
|
||||
}
|
||||
p->init = -1;
|
||||
}
|
||||
|
||||
LOCAL void ShowIna(void)
|
||||
{
|
||||
PINA219DRV p = &ina219drv;
|
||||
rtl_printf("INA219: %d, %d\n", p->buf_i2c.us[0], p->buf_i2c.ss[1]);
|
||||
rtl_printf("INA219: Cnt = %u, Err = %u\n", p->count, p->errs);
|
||||
}
|
||||
|
||||
LOCAL void fATINA(int argc, char *argv[])
|
||||
{
|
||||
if(argc > 1) {
|
||||
if(atoi(argv[1])) {
|
||||
ina219_init();
|
||||
vTaskDelay(10); // +WDT
|
||||
}
|
||||
else ina219_deinit();
|
||||
}
|
||||
ShowIna();
|
||||
}
|
||||
|
||||
|
||||
extern void dump_bytes(uint32 addr, int size);
|
||||
extern uint32 hextoul(uint8 *s);
|
||||
|
||||
i2c_drv_t ti2c;
|
||||
/* Sample:
|
||||
* ati2c i
|
||||
* ati2c w 40 5
|
||||
* ati2c r 40 2
|
||||
*/
|
||||
LOCAL void fATI2C(int argc, char *argv[])
|
||||
{
|
||||
i2c_drv_t *pi2c = &ti2c;
|
||||
uint8 buf[32];
|
||||
if(argc > 1) {
|
||||
if(argv[1][0] == 'i') {
|
||||
if(!pi2c->status) {
|
||||
uint8 sda = 0;
|
||||
uint8 scl = 0;
|
||||
uint8 mode = 0;
|
||||
uint32 speed = 0;
|
||||
if(argc > 2) sda = hextoul(argv[2]);
|
||||
else if(argc > 3) scl = hextoul(argv[3]);
|
||||
else if(argc > 4) mode = hextoul(argv[4]);
|
||||
else if(argc > 5) speed = hextoul(argv[5]);
|
||||
if(!sda) sda = PC_4;
|
||||
if(!scl) scl = PC_5;
|
||||
if(!mode) mode = DRV_I2C_FS_MODE;
|
||||
if(!speed) speed = 400000;
|
||||
if(_i2c_setup(pi2c, sda, scl, mode) == DRV_I2C_OK
|
||||
&& _i2c_init(pi2c) == DRV_I2C_OK
|
||||
&& _i2c_set_speed(pi2c, speed) == DRV_I2C_OK) {
|
||||
rtl_printf("I2C%d Init\n", pi2c->idx);
|
||||
};
|
||||
} else {
|
||||
rtl_printf("Already init!\n");
|
||||
return;
|
||||
};
|
||||
} else {
|
||||
if(pi2c->status) {
|
||||
if(argv[1][0] == 'd') {
|
||||
_i2c_ic_off(pi2c);
|
||||
rtl_printf("I2C%d DeInit\n", pi2c->idx);
|
||||
return;
|
||||
};
|
||||
int i;
|
||||
for(i = 0; i + 2 < argc; i++) {
|
||||
buf[i] = hextoul(argv[i+2]);
|
||||
};
|
||||
if(i) {
|
||||
if(argv[1][0] == 'w') {
|
||||
_i2c_write(pi2c, buf[0], &buf[1], i-1, 1);
|
||||
rtl_printf("I2C%d write[%d]:\n", pi2c->idx, i-1);
|
||||
dump_bytes(&buf[0], i);
|
||||
}
|
||||
else if(argv[1][0] == 'r') {
|
||||
i = buf[1];
|
||||
if(i > sizeof(buf) - 1) i = sizeof(buf) - 1;
|
||||
_i2c_read(pi2c, buf[0], &buf[1], i, 1);
|
||||
rtl_printf("I2C%d read[%d]:\n", pi2c->idx, i);
|
||||
dump_bytes(&buf[0], i+1);
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
rtl_printf("I2C%d drvStatus = %d\n", pi2c->idx, pi2c->status);
|
||||
return;
|
||||
}
|
||||
|
||||
MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_ina219[] = {
|
||||
{"ATI2C", 0, fATI2C, ": Test I2C, <i>nit, <d>einit, <w>rite, <r>ead"},
|
||||
{"ATINA", 0, fATINA, "=[0/1]: INA219 =1 start, =0 stop"}
|
||||
};
|
||||
|
||||
|
|
@ -685,6 +685,9 @@ static err_t TCP_SRV_CODE_ATTR tcpsrv_poll(void *arg, struct tcp_pcb *pcb) {
|
|||
else tcpsrv_server_close(ts_conn);
|
||||
}
|
||||
else tcpsrv_server_close(ts_conn);
|
||||
#ifdef SRV_WDGREFESH_IN_POOL
|
||||
WDGRefresh();
|
||||
#endif
|
||||
return ERR_OK;
|
||||
}
|
||||
/******************************************************************************
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue