update

USDK/Realtek.lic

@@ -0,0 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ ******************************************************************************/

USDK/component/soc/realtek/8195a/fwlib/hal_api.h

@@ -40,7 +40,7 @@ HalPinCtrlRtl8195A(
     IN BOOL   Operation
     );
 
-extern _LONG_CALL_ VOID 
+extern _LONG_CALL_ int
 HalSerialPutcRtl8195a(
     IN  u8 c
     );

USDK/component/soc/realtek/8195a/fwlib/hal_diag.h

@@ -86,7 +86,7 @@ HalLogUartInit(
     );
 
 
-extern _LONG_CALL_ROM_ VOID 
+extern _LONG_CALL_ROM_ int
 HalSerialPutcRtl8195a(
     IN  u8 c
     );

USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c

@@ -1,5 +1,6 @@
 /* 
  *  BootLoader Ver 0.3 (19/10/2017)
+ *  + Ver 0.4 (20/01/2018)
  *  Created on: 12/02/2017
  *      Author: pvvx
  */
@@ -508,9 +509,14 @@ LOCAL const char * const txt_tab_seg[] = {
 		"ROM"		// 7
 		};
 
-LOCAL const uint32 tab_seg_def[] = { 0x10000000, 0x10070000, 0x1fff0000,
+LOCAL const uint32 tab_seg_def[] = {
-		0x20000000, 0x30000000, 0x30200000, 0x40000000, 0x40800000, 0x98000000,
+		0x10000000, 0x10070000,
-		0xA0000000, 0xE0000000, 0xE0010000, 0x00000000, 0x00050000 };
+		0x1fff0000,	0x20000000,
+		0x30000000, 0x30200000,
+		0x40000000, 0x40800000,
+		0x98000000, 0xA0000000,
+		0xE0000000, 0xE0010000,
+		0x00000000, 0x00050000 };
 
 LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) {
 	uint32 ret = SEG_ID_ERR;
@@ -518,7 +524,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) {
 	if (size > 0) {
 		do {
 			ret++;
-			if (addr >= ptr[0] && addr + size <= ptr[1]) {
+			if (addr >= ptr[0] && addr + size <= ptr[1] && size <= ptr[1] - ptr[0]) {
 				return ret;
 			};
 			ptr += 2;

USDK/component/soc/realtek/8195a/fwlib/ram_lib/startup.c

@@ -185,7 +185,12 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
 	_pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter;
 	VectorTableInitRtl8195A(STACK_TOP);	// 0x1FFFFFFC
 	loguart_wait_tx_fifo_empty(); //	иначе глючит LogUART, если переключение CLK приходится на вывод символов !
-#if 1 // if set CLK CPU
+	uint8 ChipId = HalGetChipId();
+#ifdef ARDUINO
+	// 0 - 166666666 Hz, 1 - 83333333 Hz
+	*((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3
+	HalCpuClkConfig(ChipId < CHIP_ID_8195AM);
+#else  // if set CLK CPU
 	if(HalGetCpuClk() != PLATFORM_CLOCK) {
 		//----- CLK CPU
 #if	CPU_CLOCK_SEL_DIV5_3
@@ -198,7 +203,7 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
 		HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
 #endif // CPU_CLOCK_SEL_DIV5_3
 	};
-#endif
+#endif // ARDUINO
 	PSHalInitPlatformLogUart(); // HalInitPlatformLogUartV02(); // Show "<RTL8195A>"... :(
 	HalReInitPlatformTimer(); // HalInitPlatformTimerV02(); HalTimerOpInit_Patch((VOID*) (&HalTimerOp));
 	SystemCoreClockUpdate();
@@ -225,7 +230,7 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
 */
 //	SpicFlashInitRtl8195A(SpicDualBitMode); //	SpicReadIDRtl8195A(); SpicDualBitMode
 	//---- SDRAM
-	uint8 ChipId = HalGetChipId();
+//	uint8 ChipId = HalGetChipId();
 	if (ChipId >= CHIP_ID_8195AM) {
 		if((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT(21)) == 0) { // SDR not init?
  #ifdef FIX_SDR_CALIBRATION // for speed :)

USDK/flasher/RTL_RunRAM.JLinkScript

@@ -4,7 +4,7 @@ r1
 trst1
 h
 r
-loadbin build/bin/ram_1.r.bin 0x10000bc8
+loadbin build/bin/ram_1.bin 0x10000bc8
 loadbin build/bin/ram_2.bin 0x10006000
 r
 w4 0x40000210,0x20011113

flasher/RTL_RunRAM.JLinkScript

@@ -4,7 +4,7 @@ r1
 trst1
 h
 r
-loadbin build/bin/ram_1.r.bin 0x10000bc8
+loadbin build/bin/ram_1.bin 0x10000bc8
 loadbin build/bin/ram_2.bin 0x10006000
 r
 w4 0x40000210,0x20011113

flasher/RTL_RunRAM_SDR.JLinkScript

@@ -4,7 +4,7 @@ r1
 trst1
 r
 h
-loadbin build/bin/ram_1.r.bin 0x10000bc8
+loadbin build/bin/ram_1.bin 0x10000bc8
 loadbin build/bin/ram_2.bin 0x10006000
 r
 w4 0x40000210,0x20011113

tools/rtlaimage/rtlaimage.py

@@ -10,7 +10,7 @@ import os
 import struct
 import sys
 
-__version__ = "17.01.18"
+__version__ = "20.01.18"
 
 PYTHON2 = sys.version_info[0] < 3  # True if on pre-Python 3
 
@@ -255,7 +255,7 @@ class xFirmwareImage(object):
 						print('Error: Segment %s is big!' % self.name)
 					f.write(self.data)
 					while i < gap:
-						f.write('\0')
+						f.write('\xff')
 						i += 1
 				else:
 					f.write(self.data)
@@ -310,7 +310,6 @@ def elf2image(args):
 		try:
 			with open(fn, "wb") as f:
 				for s in image:
-					if s.hm & HM_IS_SRAM:
 					s.save_sram(f, fn)
 				f.close()
 				

userset.mk

@@ -6,8 +6,8 @@ SDK_PATH = USDK/
 #GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/6.2017-q1-update/bin/# + or set in PATH
 #OPENOCD_PATH = D:/MCU/OpenOCD/bin/# + or set in PATH
 TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
-#FLASHER_TYPE = Jlink
+FLASHER_TYPE = Jlink
-FLASHER_TYPE = cmsis-dap
+#FLASHER_TYPE = cmsis-dap
 FLASHER_SPEED = 3500
 FLASHER_PATH = flasher/
 JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/