mirror of
https://github.com/pvvx/RTL00_WEB.git
synced 2024-11-22 05:54:19 +00:00
update
This commit is contained in:
parent
eac35630e6
commit
25980c5c59
16 changed files with 204 additions and 129 deletions
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@ -274,7 +274,7 @@ rtw_result_t _wext_enable_powersave(int adapter_num, uint8 ips_mode, uint8 lps_m
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_adapter * pad = get_padaptern(adapter_num);
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_adapter * pad = get_padaptern(adapter_num);
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rtw_result_t ret = RTW_ERROR;
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rtw_result_t ret = RTW_ERROR;
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if(pad) {
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if(pad) {
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ret = rtw_pm_set_ips(pad, ips_mode); // 2 режима 1,2 !
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ret = rtw_pm_set_ips(pad, ips_mode); // 2 режима 1,2 ?
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if(ret == RTW_SUCCESS) {
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if(ret == RTW_SUCCESS) {
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LeaveAllPowerSaveMode(pad);
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LeaveAllPowerSaveMode(pad);
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ret = rtw_pm_set_lps(pad, lps_mode);
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ret = rtw_pm_set_lps(pad, lps_mode);
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@ -688,7 +688,6 @@ int wifi_run(rtw_mode_t mode) {
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case RTW_MODE_STA_AP:
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case RTW_MODE_STA_AP:
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ret = wifi_run_ap() | wifi_run_st();
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ret = wifi_run_ap() | wifi_run_st();
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// _wext_enable_powersave(0, 0, 0);
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// _wext_enable_powersave(0, 0, 0);
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// _wext_set_lps_dtim(0, 0);
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break;
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break;
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case RTW_MODE_STA:
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case RTW_MODE_STA:
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ret = wifi_run_st();
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ret = wifi_run_st();
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@ -64,7 +64,7 @@ void spi_init (spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName sse
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/* SsiClockDivider doesn't support odd number */
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/* SsiClockDivider doesn't support odd number */
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DBG_SSI_INFO("SystemClock: %d\n", SystemGetCpuClk());
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DBG_SSI_INFO("SystemClock: %d\n", SystemGetCpuClk());
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DBG_SSI_INFO("MaxSsiFreq : %d\n", (SystemClock >> 2) >> 1);
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DBG_SSI_INFO("MaxSsiFreq : %d\n", (SystemGetCpuClk() >> 2) >> 1);
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ssi_mosi = pinmap_peripheral(mosi, PinMap_SSI_MOSI);
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ssi_mosi = pinmap_peripheral(mosi, PinMap_SSI_MOSI);
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ssi_miso = pinmap_peripheral(miso, PinMap_SSI_MISO);
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ssi_miso = pinmap_peripheral(miso, PinMap_SSI_MISO);
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@ -80,10 +80,10 @@ struct v4l2_file_operations {
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//ssize_t (*read) (struct file *, char __user *, size_t, loff_t *);
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//ssize_t (*read) (struct file *, char __user *, size_t, loff_t *);
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//ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *);
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//ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *);
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//unsigned int (*poll) (struct file *, struct poll_table_struct *);
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//unsigned int (*poll) (struct file *, struct poll_table_struct *);
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long (*ioctl) (unsigned int, unsigned long);
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long (*ioctl) (unsigned int, void *);
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long (*unlocked_ioctl) (unsigned int, unsigned long);
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long (*unlocked_ioctl) (unsigned int, void *);
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#ifdef CONFIG_COMPAT
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#ifdef CONFIG_COMPAT
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long (*compat_ioctl32) (unsigned int, unsigned long);
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long (*compat_ioctl32) (unsigned int, void *);
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#endif
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#endif
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//unsigned long (*get_unmapped_area) (struct file *, unsigned long,
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//unsigned long (*get_unmapped_area) (struct file *, unsigned long,
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// unsigned long, unsigned long, unsigned long);
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// unsigned long, unsigned long, unsigned long);
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@ -22,7 +22,7 @@
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#include "videodev2.h"
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#include "videodev2.h"
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typedef int _LOCK_T;
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//typedef int _LOCK_T;
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struct vb2_alloc_ctx;
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struct vb2_alloc_ctx;
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struct vb2_fileio_data;
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struct vb2_fileio_data;
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@ -739,7 +739,7 @@ HAL_Status HalSsiIntReadRtl8195a(VOID *Adapter, VOID *RxData, u32 Length)
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u32 RxFifoThresholdLevel;
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u32 RxFifoThresholdLevel;
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// u8 Index = pHalSsiAdapter->Index;
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// u8 Index = pHalSsiAdapter->Index;
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DBG_SSI_INFO("HalSsiIntReadRtl8195a: Idx=%d, RxData=0x%x, Len=0x%x\r\n", Index, RxData, Length);
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DBG_SSI_INFO("HalSsiIntReadRtl8195a: Idx=%d, RxData=0x%x, Len=0x%x\r\n", pHalSsiAdapter->Index, RxData, Length);
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// if (HalSsiBusyRtl8195a(Adapter)) {
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// if (HalSsiBusyRtl8195a(Adapter)) {
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// As a Slave mode, if the peer(Master) side is power off, the BUSY flag is always on
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// As a Slave mode, if the peer(Master) side is power off, the BUSY flag is always on
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// DBG_SSI_WARN("HalSsiIntReadRtl8195a: SSI%d is busy\n", Index);
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// DBG_SSI_WARN("HalSsiIntReadRtl8195a: SSI%d is busy\n", Index);
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@ -747,7 +747,7 @@ HAL_Status HalSsiIntReadRtl8195a(VOID *Adapter, VOID *RxData, u32 Length)
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// }
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// }
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if (Length == 0) {
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if (Length == 0) {
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SSI_DBG_INT_READ("SSI%d RxData addr: 0x%X, Length: %d\n", Index, RxData, Length);
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SSI_DBG_INT_READ("SSI%d RxData addr: 0x%X, Length: %d\n", pHalSsiAdapter->Index, RxData, Length);
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return HAL_ERR_PARA;
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return HAL_ERR_PARA;
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}
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}
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@ -774,7 +774,7 @@ HAL_Status HalSsiIntReadRtl8195a(VOID *Adapter, VOID *RxData, u32 Length)
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}
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}
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pHalSsiAdapter->RxData = RxData;
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pHalSsiAdapter->RxData = RxData;
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DBG_SSI_INFO("SSI%d RxData addr: 0x%X, Length: %d\n", Index,
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DBG_SSI_INFO("SSI%d RxData addr: 0x%X, Length: %d\n", pHalSsiAdapter->Index,
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pHalSsiAdapter->RxData, pHalSsiAdapter->RxLength);
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pHalSsiAdapter->RxData, pHalSsiAdapter->RxLength);
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pHalSsiAdapter->InterruptMask |= BIT_IMR_RXFIM | BIT_IMR_RXOIM | BIT_IMR_RXUIM;
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pHalSsiAdapter->InterruptMask |= BIT_IMR_RXFIM | BIT_IMR_RXOIM | BIT_IMR_RXUIM;
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@ -108,11 +108,13 @@ HAL_GPIO_Init(
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GPIO_PullCtrl_8195a(chip_pin, HAL_GPIO_HIGHZ);
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GPIO_PullCtrl_8195a(chip_pin, HAL_GPIO_HIGHZ);
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// HAL_Status ret =
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// HAL_Status ret =
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HAL_GPIO_Init_8195a(GPIO_Pin);
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#if CONFIG_DEBUG_LOG > 3
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#if CONFIG_DEBUG_LOG > 3
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HAL_Status ret = HAL_GPIO_Init_8195a(GPIO_Pin);
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if (ret != HAL_OK) {
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if (ret != HAL_OK) {
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GpioFunctionChk(chip_pin, DISABLE);
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GpioFunctionChk(chip_pin, DISABLE);
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}
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}
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#else
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HAL_GPIO_Init_8195a(GPIO_Pin);
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#endif
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#endif
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}
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}
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@ -154,11 +156,14 @@ HAL_GPIO_Irq_Init(
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GPIO_Pin->pin_mode);
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GPIO_Pin->pin_mode);
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HAL_GPIO_MaskIrq_8195a(GPIO_Pin);
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HAL_GPIO_MaskIrq_8195a(GPIO_Pin);
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// HAL_Status ret =
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// HAL_Status ret =
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HAL_GPIO_Init_8195a(GPIO_Pin);
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#if CONFIG_DEBUG_LOG > 3
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#if CONFIG_DEBUG_LOG > 3
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HAL_Status ret = HAL_GPIO_Init_8195a(GPIO_Pin);
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if (ret != HAL_OK) {
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if (ret != HAL_OK) {
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GpioFunctionChk(chip_pin, DISABLE);
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GpioFunctionChk(chip_pin, DISABLE);
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}
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}
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#else
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HAL_GPIO_Init_8195a(GPIO_Pin);
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#endif
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#endif
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}
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}
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@ -287,6 +287,12 @@
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#define SDRAM_DATA_SECTION \
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#define SDRAM_DATA_SECTION \
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SECTION(".sdram.data")
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SECTION(".sdram.data")
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#if defined(CONFIG_SDR_EN)
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#define SDRAM_CODE_SECTION SECTION(".sdram.text")
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#else
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#define SDRAM_CODE_SECTION
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#endif
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//3 Wlan Section
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//3 Wlan Section
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#define WLAN_ROM_TEXT_SECTION \
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#define WLAN_ROM_TEXT_SECTION \
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SECTION(".wlan.rom.text")
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SECTION(".wlan.rom.text")
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@ -2,6 +2,7 @@
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# pvvx 21.09.2016
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# pvvx 21.09.2016
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include userset.mk
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include userset.mk
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include $(SDK_PATH)paths.mk
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include $(SDK_PATH)paths.mk
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include project.mk
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#---------------------------
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#---------------------------
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#FLASHER = stlink-v2-1
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#FLASHER = stlink-v2-1
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#FLASHER = stlink-v2
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#FLASHER = stlink-v2
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@ -113,7 +114,11 @@ reset:
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@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_Reset.JLinkScript
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@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_Reset.JLinkScript
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runram:
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runram:
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@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_RunRAM.JLinkScript
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ifdef USE_SDRAM
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$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_RunRAM_SDR.JLinkScript
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else
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$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_RunRAM.JLinkScript
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endif
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readfullflash:
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readfullflash:
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@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_FFlash.JLinkScript
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@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_FFlash.JLinkScript
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@ -53,7 +53,13 @@ mp: LIBS +=_rtsp _usbh _usbd
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endif
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endif
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# m c nosys gcc
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# m c nosys gcc
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PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/gcc
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PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/gcc
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ifdef USE_SDRAM
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LDFILE ?= rlx8195A-symbol-v04-img3.ld
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else
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LDFILE ?= rlx8195A-symbol-v04-img2.ld
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LDFILE ?= rlx8195A-symbol-v04-img2.ld
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endif
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BOOTS = sdk/component/soc/realtek/8195a/misc/bsp/image
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BOOTS = sdk/component/soc/realtek/8195a/misc/bsp/image
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# Include folder list
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# Include folder list
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@ -95,11 +101,14 @@ INCLUDES += sdk/component/common/drivers/wlan/realtek/src/hal/OUTSRC
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INCLUDES += sdk/component/common/drivers/sdio/realtek/sdio_host/inc
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INCLUDES += sdk/component/common/drivers/sdio/realtek/sdio_host/inc
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INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/wlan/realtek/wlan_ram_map/rom
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INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/wlan/realtek/wlan_ram_map/rom
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INCLUDES += sdk/component/common/network/ssl/ssl_ram_map/rom
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INCLUDES += sdk/component/common/network/ssl/ssl_ram_map/rom
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#INCLUDES += sdk/component/common/media/codec
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ifdef USE_UVC
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#INCLUDES += sdk/component/common/drivers/usb_class/host/uvc/inc
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INCLUDES += sdk/component/common/media/codec
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#INCLUDES += sdk/component/common/drivers/usb_class/device
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INCLUDES += sdk/component/common/video/v4l2/inc
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#INCLUDES += sdk/component/common/drivers/usb_class/device/class
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INCLUDES += sdk/component/common/drivers/usb_class/host/uvc/inc
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#INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include
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INCLUDES += sdk/component/common/drivers/usb_class/device
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INCLUDES += sdk/component/common/drivers/usb_class/device/class
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INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include
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endif
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# Source file list
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# Source file list
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# -------------------------------------------------------------------
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# -------------------------------------------------------------------
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@ -430,3 +439,4 @@ ADD_SRC_C += sdk/component/common/example/uart_atcmd/example_uart_atcmd.c
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ADD_SRC_C += sdk/component/common/example/example_entry.c
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ADD_SRC_C += sdk/component/common/example/example_entry.c
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ADD_SRC_C += sdk/component/common/application/xmodem/uart_fw_update.c
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ADD_SRC_C += sdk/component/common/application/xmodem/uart_fw_update.c
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endif
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endif
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15
project.mk
15
project.mk
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@ -1,9 +1,10 @@
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#=============================================
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#=============================================
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# SDK CONFIG
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# SDK CONFIG
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#=============================================
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#=============================================
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#WEB_INA219_DRV = 1
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WEB_INA219_DRV = 1
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#WEB_ADC_DRV = 1
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#WEB_ADC_DRV = 1
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#USE_SDCARD = 1
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#USE_SDCARD = 1
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#USE_UVC = 1
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#USE_AT = 1
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#USE_AT = 1
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#USE_FATFS = 1
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#USE_FATFS = 1
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#USE_SDIOH = 1
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#USE_SDIOH = 1
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@ -26,6 +27,11 @@ endif
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RTOSDIR=freertos_v9.0.0
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RTOSDIR=freertos_v9.0.0
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LWIPDIR=lwip_v1.4.1
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LWIPDIR=lwip_v1.4.1
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ifdef USE_UVC
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USE_SDRAM = 1
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USE_GCC_LIB = 1
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endif
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include $(SDK_PATH)sdkset.mk
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include $(SDK_PATH)sdkset.mk
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#CFLAGS += -DDEFAULT_BAUDRATE=1562500
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#CFLAGS += -DDEFAULT_BAUDRATE=1562500
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CFLAGS += -DLOGUART_STACK_SIZE=1024
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CFLAGS += -DLOGUART_STACK_SIZE=1024
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@ -45,8 +51,13 @@ ifdef USE_SDCARD
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ADD_SRC_C += project/src/console/sd_fat.c
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ADD_SRC_C += project/src/console/sd_fat.c
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endif
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endif
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ifdef USE_UVC
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ADD_SRC_C += project/src/console/uvc_capture_tst.c
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endif
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ifdef WEB_INA219_DRV
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ifdef WEB_INA219_DRV
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ADD_SRC_C += project/src/driver/i2c_drv.c
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ADD_SRC_C += project/src/driver/i2c_drv.c
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CFLAGS += -DUSE_I2C_CONSOLE=1
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ADD_SRC_C += project/src/ina219/ina219drv.c
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ADD_SRC_C += project/src/ina219/ina219drv.c
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CFLAGS += -DWEB_INA219_DRV=1
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CFLAGS += -DWEB_INA219_DRV=1
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endif
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endif
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@ -57,6 +68,7 @@ ADD_SRC_C += project/src/adc_ws/adc_ws.c
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CFLAGS += -DWEB_ADC_DRV=1
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CFLAGS += -DWEB_ADC_DRV=1
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endif
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endif
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#Web-<2D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#Web-<2D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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INCLUDES += project/inc/web
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INCLUDES += project/inc/web
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ADD_SRC_C += project/src/tcpsrv/tcp_srv_conn.c
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ADD_SRC_C += project/src/tcpsrv/tcp_srv_conn.c
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@ -69,3 +81,4 @@ ADD_SRC_C += project/src/web/web_int_callbacks.c
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ADD_SRC_C += project/src/web/web_int_vars.c
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ADD_SRC_C += project/src/web/web_int_vars.c
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ADD_SRC_C += project/src/web/web_auth.c
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ADD_SRC_C += project/src/web/web_auth.c
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@ -11,22 +11,22 @@
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#include "device.h"
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#include "device.h"
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typedef struct _I2C_HND_ {
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typedef struct _I2C_HND_ {
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signed char status;
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signed char status; // _i2c_status_e
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unsigned char idx;
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unsigned char idx; // Номер контроллера I2C
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unsigned char io_sel;
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unsigned char io_sel; // Location Index(Pin Mux Selection): S0 -> PC_4, PC_5
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unsigned char mode; // if(I2C_FIXED_SPEED_MODE != 0) user set -> i2c_mode_e
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unsigned char mode; // _i2c_mode_e, if(I2C_FIXED_SPEED_MODE != 0) user set -> i2c_mode_e
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void * base_regs;
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void * base_regs;
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} i2c_drv_t, *i2c_drv_p;
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} i2c_drv_t, *i2c_drv_p;
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typedef enum
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typedef enum
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{
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{
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DRV_I2C_OFF = 0, // IC I2C DeInit
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DRV_I2C_OFF = 0, // IC I2C DeInit
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DRV_I2C_OK = 0, // DRV ret Ok
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DRV_I2C_OK = 0, // DRV ret Ok
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DRV_I2C_IC_OFF = 1, // IC I2C Off
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DRV_I2C_IC_OFF = 1, // IC I2C Off
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DRV_I2C_IC_ENABLE = 2, // IC I2C On
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DRV_I2C_IC_ENABLE = 2, // IC I2C On
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DRV_I2C_ERR = -1, // DRV ret err
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DRV_I2C_ERR = -1, // DRV ret err
|
||||||
DRV_I2C_ABORT = -1, // IC I2C Abort
|
DRV_I2C_ABORT = -1, // IC I2C Abort
|
||||||
DRV_I2C_TIMEOUT = -3 // IC I2C / DRV ret Timeout
|
DRV_I2C_TIMEOUT = -3 // IC I2C / DRV ret Timeout
|
||||||
} _i2c_status_e;
|
} _i2c_status_e;
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -112,6 +112,9 @@ static void copy_align4_to_align1(unsigned char * pd, void * ps, unsigned int le
|
||||||
// return size;
|
// return size;
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
/*
|
||||||
|
* int print_hex_dump(uint8_t *buf, int len, unsigned char k)
|
||||||
|
*/
|
||||||
int print_hex_dump(uint8_t *buf, int len, unsigned char k) {
|
int print_hex_dump(uint8_t *buf, int len, unsigned char k) {
|
||||||
uint32_t ss[2];
|
uint32_t ss[2];
|
||||||
ss[0] = 0x78323025; // "%02x"
|
ss[0] = 0x78323025; // "%02x"
|
||||||
|
|
|
@ -88,7 +88,7 @@ LOCAL int i2c_ready(i2c_drv_t *pi2c, unsigned char flg)
|
||||||
if(i2c_reg(REG_DW_I2C_IC_RAW_INTR_STAT) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
if(i2c_reg(REG_DW_I2C_IC_RAW_INTR_STAT) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||||
error_printf("I2C%d Abort!\n", pi2c->idx);
|
error_printf("I2C%d Abort!\n", pi2c->idx);
|
||||||
// Clear abort status.
|
// Clear abort status.
|
||||||
i2c_reg(REG_DW_I2C_IC_CLR_TX_ABRT);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_CLR_TX_ABRT);
|
||||||
// Be sure that all interrupts flag are cleared.
|
// Be sure that all interrupts flag are cleared.
|
||||||
// i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
// i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
||||||
pi2c->status = DRV_I2C_ABORT;
|
pi2c->status = DRV_I2C_ABORT;
|
||||||
|
@ -131,7 +131,7 @@ int _i2c_break(i2c_drv_t *pi2c)
|
||||||
};
|
};
|
||||||
pi2c->status = DRV_I2C_OFF;
|
pi2c->status = DRV_I2C_OFF;
|
||||||
// All interrupts flag are cleared.
|
// All interrupts flag are cleared.
|
||||||
i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
||||||
return DRV_I2C_OK;
|
return DRV_I2C_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -226,7 +226,7 @@ LOCAL int i2c_enable(i2c_drv_t *pi2c)
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
// Be sure that all interrupts flag are cleared.
|
// Be sure that all interrupts flag are cleared.
|
||||||
i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
||||||
pi2c->status = DRV_I2C_IC_ENABLE;
|
pi2c->status = DRV_I2C_IC_ENABLE;
|
||||||
return DRV_I2C_OK;
|
return DRV_I2C_OK;
|
||||||
}
|
}
|
||||||
|
@ -433,7 +433,7 @@ int _i2c_read(i2c_drv_t *pi2c, uint32 address, const char *data, int length, int
|
||||||
*d++ = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
*d++ = i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||||
length--;
|
length--;
|
||||||
}
|
}
|
||||||
else i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
else (volatile uint32)i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
while(length) {
|
while(length) {
|
||||||
|
@ -450,4 +450,121 @@ int _i2c_read(i2c_drv_t *pi2c, uint32 address, const char *data, int length, int
|
||||||
return DRV_I2C_OK;
|
return DRV_I2C_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if defined(USE_I2C_CONSOLE) && USE_I2C_CONSOLE
|
||||||
|
//extern void dump_bytes(uint32 addr, int size);
|
||||||
|
extern int print_hex_dump(uint8_t *buf, int len, unsigned char k);
|
||||||
|
extern uint32 hextoul(uint8 *s);
|
||||||
|
|
||||||
|
i2c_drv_t ti2c;
|
||||||
|
/* I2C Init:
|
||||||
|
* ati2c i [sda_pin [scl_pin [mode [speed]]]]
|
||||||
|
* I2C Deinit:
|
||||||
|
* ati2c d
|
||||||
|
* I2C Write:
|
||||||
|
* iati2c W address data1 [data2 ... [data8]...]
|
||||||
|
* I2C write + stop:
|
||||||
|
* iati2c w address data1 [data2 ... [data8]...]
|
||||||
|
* I2C Read:
|
||||||
|
* ati2c R address count
|
||||||
|
* I2C read + stop:
|
||||||
|
* ati2c r address count
|
||||||
|
*/
|
||||||
|
LOCAL void fATI2C(int argc, char *argv[])
|
||||||
|
{
|
||||||
|
i2c_drv_t *pi2c = &ti2c;
|
||||||
|
uint8 buf[32];
|
||||||
|
if(argc > 1) {
|
||||||
|
if(argv[1][0] == 'i') {
|
||||||
|
//
|
||||||
|
if(!pi2c->status) {
|
||||||
|
uint8 sda = 0;
|
||||||
|
uint8 scl = 0;
|
||||||
|
uint8 mode = 0;
|
||||||
|
uint32 speed = 0;
|
||||||
|
if(argc > 2) sda = hextoul(argv[2]);
|
||||||
|
else if(argc > 3) scl = hextoul(argv[3]);
|
||||||
|
else if(argc > 4) mode = hextoul(argv[4]);
|
||||||
|
else if(argc > 5) speed = hextoul(argv[5]);
|
||||||
|
if(!sda) sda = PC_4;
|
||||||
|
if(!scl) scl = PC_5;
|
||||||
|
if(!mode) mode = DRV_I2C_FS_MODE;
|
||||||
|
if(!speed) speed = 50000;
|
||||||
|
if(_i2c_setup(pi2c, sda, scl, mode) == DRV_I2C_OK
|
||||||
|
&& _i2c_init(pi2c) == DRV_I2C_OK
|
||||||
|
&& _i2c_set_speed(pi2c, speed) == DRV_I2C_OK) {
|
||||||
|
rtl_printf("I2C%d Init: %02x %02x %02x %08x\n", pi2c->idx, sda, scl, mode, speed);
|
||||||
|
};
|
||||||
|
} else {
|
||||||
|
rtl_printf("Already init!\n");
|
||||||
|
return;
|
||||||
|
};
|
||||||
|
} else if(argv[1][0] == '?') {
|
||||||
|
rtl_printf("I2C Init:\n\tati2c i [sda_pin [scl_pin [mode [speed]]]]\n");
|
||||||
|
rtl_printf("I2C Deinit:\n\tati2c d\n");
|
||||||
|
rtl_printf("I2C Write:\n\tati2c W address data1 [data2 ... [data8]...]\n");
|
||||||
|
rtl_printf("I2C write + stop:\n\tati2c w address data1 [data2 ... [data8]...]\n");
|
||||||
|
rtl_printf("I2C Read:\n\tati2c R address count\n");
|
||||||
|
rtl_printf("I2C read + stop:\n\tati2c r address count\n");
|
||||||
|
rtl_printf("I2C get:\n\tati2c g address wrcount wrdata1 [..wrdata6] rdcount\n");
|
||||||
|
} else {
|
||||||
|
if(pi2c->status) {
|
||||||
|
if(argv[1][0] == 'd') {
|
||||||
|
_i2c_ic_off(pi2c);
|
||||||
|
rtl_printf("I2C%d DeInit\n", pi2c->idx);
|
||||||
|
return;
|
||||||
|
};
|
||||||
|
int i;
|
||||||
|
for(i = 0; i + 2 < argc; i++) {
|
||||||
|
buf[i] = hextoul(argv[i+2]);
|
||||||
|
};
|
||||||
|
if(i) {
|
||||||
|
if(argv[1][0] == 'w' || argv[1][0] == 'W') {
|
||||||
|
// >ati2c w 40 2
|
||||||
|
// I2C1 write[1]: 40 02 00
|
||||||
|
// I2C1 drvStatus = 1
|
||||||
|
_i2c_write(pi2c, buf[0], &buf[1], i-1, argv[1][0] == 'w');
|
||||||
|
rtl_printf("I2C%d write[%d]: ", pi2c->idx, i-1);
|
||||||
|
print_hex_dump(buf, i, ' ');
|
||||||
|
rtl_printf("\n");
|
||||||
|
} else if(argv[1][0] == 'r' || argv[1][0] == 'R') {
|
||||||
|
// >ati2c r 40 2
|
||||||
|
// I2C1 read[2]: 40 07 d8
|
||||||
|
// I2C1 drvStatus = 1
|
||||||
|
i = buf[1];
|
||||||
|
if(i > sizeof(buf) - 1) i = sizeof(buf) - 1;
|
||||||
|
_i2c_read(pi2c, buf[0], &buf[1], i, argv[1][0] == 'r');
|
||||||
|
rtl_printf("I2C%d read[%d]: ", pi2c->idx, i);
|
||||||
|
print_hex_dump(buf, i+1, ' ');
|
||||||
|
rtl_printf("\n");
|
||||||
|
} else if(argv[1][0] == 'g') {
|
||||||
|
// >ati2c g 5a 1 6 3
|
||||||
|
// I2C1 get[3]: 5a 5e 3a 6c
|
||||||
|
// I2C1 drvStatus = 1
|
||||||
|
if (argc < 5 || buf[1] == 0 || buf[1] > sizeof(buf) - 2) {
|
||||||
|
rtl_printf("Error command string!\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if(_i2c_write(pi2c, buf[0], &buf[2], buf[1], 0) >= 0) {
|
||||||
|
i = buf[buf[1] + 2]; // кол-во байт чтения
|
||||||
|
if(i == 0 || i > sizeof(buf) - 1) i = sizeof(buf) - 1;
|
||||||
|
_i2c_read(pi2c, buf[0], &buf[1], i, 1);
|
||||||
|
rtl_printf("I2C%d get[%d]: ", pi2c->idx, i);
|
||||||
|
print_hex_dump(buf, i+1, ' ');
|
||||||
|
}
|
||||||
|
rtl_printf("\n");
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
rtl_printf("I2C%d Status = %d\n", pi2c->idx, pi2c->status);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_i2c[] = {
|
||||||
|
{"ATI2C", 0, fATI2C, ": Test I2C, <i>nit, <d>einit, <w/W>rite, <r/R>ead"},
|
||||||
|
};
|
||||||
|
#endif // USE_I2C_CONSOLE
|
||||||
|
|
||||||
|
|
||||||
#endif // CONFIG_I2C_EN
|
#endif // CONFIG_I2C_EN
|
||||||
|
|
|
@ -127,6 +127,7 @@ void ina219_init(void)
|
||||||
p->count = 0;
|
p->count = 0;
|
||||||
p->errs = 0;
|
p->errs = 0;
|
||||||
// (!) Установки драйвера I2C заданы в структуре ina219drv
|
// (!) Установки драйвера I2C заданы в структуре ina219drv
|
||||||
|
// rtl_printf("INA219 control reg = 0x%04x\n", p->config);
|
||||||
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
|
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
|
||||||
_i2c_init(&p->i2c);
|
_i2c_init(&p->i2c);
|
||||||
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
|
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
|
||||||
|
@ -137,10 +138,10 @@ void ina219_init(void)
|
||||||
// Initial a periodical timer
|
// Initial a periodical timer
|
||||||
gtimer_init(&p->timer, INA219_TIMER);
|
gtimer_init(&p->timer, INA219_TIMER);
|
||||||
// Tick every 0.000532 sec (N*532 μs)
|
// Tick every 0.000532 sec (N*532 μs)
|
||||||
uint32 tus = (1 << ((p->config >> 3) & 7));
|
uint32 tus = 1 << ((p->config >> 3) & 7);
|
||||||
tus *= 532;
|
tus *= 532;
|
||||||
gtimer_start_periodical(&p->timer, tus, (void*)ina_tick_handler, (uint32_t)&ina219drv);
|
|
||||||
rtl_printf("INA219 Read Period = %u us\n", tus);
|
rtl_printf("INA219 Read Period = %u us\n", tus);
|
||||||
|
gtimer_start_periodical(&p->timer, tus, (void*)ina_tick_handler, (uint32_t)&ina219drv);
|
||||||
p->init = 1;
|
p->init = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -103,7 +103,7 @@ void ina_tick_handler(void *par) {
|
||||||
break;
|
break;
|
||||||
case 4:
|
case 4:
|
||||||
if (i2c_reg(REG_DW_I2C_IC_RAW_INTR_STAT) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
if (i2c_reg(REG_DW_I2C_IC_RAW_INTR_STAT) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||||
i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_CLR_INTR);
|
||||||
p->errs++;
|
p->errs++;
|
||||||
p->status = 0;
|
p->status = 0;
|
||||||
break;
|
break;
|
||||||
|
@ -123,10 +123,10 @@ void ina_tick_handler(void *par) {
|
||||||
else p->buf_rx++;
|
else p->buf_rx++;
|
||||||
};
|
};
|
||||||
} else {
|
} else {
|
||||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||||
i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
(volatile uint32)i2c_reg(REG_DW_I2C_IC_DATA_CMD);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
case 3:
|
case 3:
|
||||||
|
@ -279,8 +279,9 @@ void ina219_init(void)
|
||||||
// Tick every 0.000532 sec (N*532 μs)
|
// Tick every 0.000532 sec (N*532 μs)
|
||||||
// uint32 tus = (1 << ((p->config >> 3) & 7));
|
// uint32 tus = (1 << ((p->config >> 3) & 7));
|
||||||
// tus *= 532;
|
// tus *= 532;
|
||||||
gtimer_start_periodical(&p->timer, 532*2, (void*)ina_tick_handler, (uint32_t)&ina219drv);
|
uint32 tus = 532*2;
|
||||||
rtl_printf("INA219 Timer Period = %u us\n", p->timer.hal_gtimer_adp.TimerLoadValueUs);
|
gtimer_start_periodical(&p->timer, tus, (void*)ina_tick_handler, (uint32_t)&ina219drv);
|
||||||
|
rtl_printf("INA219 Timer Period = %u us\n", tus);
|
||||||
p->init = 1;
|
p->init = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -340,94 +341,7 @@ LOCAL void fATINA(int argc, char *argv[])
|
||||||
ShowIna();
|
ShowIna();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
extern void dump_bytes(uint32 addr, int size);
|
|
||||||
extern uint32 hextoul(uint8 *s);
|
|
||||||
|
|
||||||
i2c_drv_t ti2c;
|
|
||||||
/* Sample:
|
|
||||||
* ati2c i
|
|
||||||
* ati2c w 40 5
|
|
||||||
* ati2c r 40 2
|
|
||||||
*/
|
|
||||||
LOCAL void fATI2C(int argc, char *argv[])
|
|
||||||
{
|
|
||||||
i2c_drv_t *pi2c = &ti2c;
|
|
||||||
uint8 buf[32];
|
|
||||||
if(argc > 1) {
|
|
||||||
if(argv[1][0] == 'i') {
|
|
||||||
if(!pi2c->status) {
|
|
||||||
uint8 sda = 0;
|
|
||||||
uint8 scl = 0;
|
|
||||||
uint8 mode = 0;
|
|
||||||
uint32 speed = 0;
|
|
||||||
if(argc > 2) sda = hextoul(argv[2]);
|
|
||||||
else if(argc > 3) scl = hextoul(argv[3]);
|
|
||||||
else if(argc > 4) mode = hextoul(argv[4]);
|
|
||||||
else if(argc > 5) speed = hextoul(argv[5]);
|
|
||||||
if(!sda) sda = PC_4;
|
|
||||||
if(!scl) scl = PC_5;
|
|
||||||
if(!mode) mode = DRV_I2C_FS_MODE;
|
|
||||||
if(!speed) speed = 400000;
|
|
||||||
if(_i2c_setup(pi2c, sda, scl, mode) == DRV_I2C_OK
|
|
||||||
&& _i2c_init(pi2c) == DRV_I2C_OK
|
|
||||||
&& _i2c_set_speed(pi2c, speed) == DRV_I2C_OK) {
|
|
||||||
rtl_printf("I2C%d Init\n", pi2c->idx);
|
|
||||||
};
|
|
||||||
} else {
|
|
||||||
rtl_printf("Already init!\n");
|
|
||||||
return;
|
|
||||||
};
|
|
||||||
} else {
|
|
||||||
if(pi2c->status) {
|
|
||||||
if(argv[1][0] == 'd') {
|
|
||||||
_i2c_ic_off(pi2c);
|
|
||||||
rtl_printf("I2C%d DeInit\n", pi2c->idx);
|
|
||||||
return;
|
|
||||||
};
|
|
||||||
int i;
|
|
||||||
for(i = 0; i + 2 < argc; i++) {
|
|
||||||
buf[i] = hextoul(argv[i+2]);
|
|
||||||
};
|
|
||||||
if(i) {
|
|
||||||
if(argv[1][0] == 'w') {
|
|
||||||
_i2c_write(pi2c, buf[0], &buf[1], i-1, 1);
|
|
||||||
rtl_printf("I2C%d write[%d]:\n", pi2c->idx, i-1);
|
|
||||||
dump_bytes((uint32)&buf[0], i);
|
|
||||||
}
|
|
||||||
else if(argv[1][0] == 'r') {
|
|
||||||
i = buf[1];
|
|
||||||
if(i > sizeof(buf) - 1) i = sizeof(buf) - 1;
|
|
||||||
_i2c_read(pi2c, buf[0], &buf[1], i, 1);
|
|
||||||
rtl_printf("I2C%d read[%d]:\n", pi2c->idx, i);
|
|
||||||
dump_bytes((uint32)&buf[0], i+1);
|
|
||||||
};
|
|
||||||
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
rtl_printf("I2C%d drvStatus = %d\n", pi2c->idx, pi2c->status);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
LOCAL void fATLED(int argc, char *argv[])
|
|
||||||
{
|
|
||||||
if(argc > 1) {
|
|
||||||
EGTIM_FCTRL(1);
|
|
||||||
EGTIM_RSIG_SEL(atoi(argv[1]));
|
|
||||||
EGTIME_PIN_G0_OPT_SEL(atoi(argv[2]));
|
|
||||||
EGTIME_PIN_G1_OPT_SEL(atoi(argv[3]));
|
|
||||||
EGTIME_PIN_G1_OPT_SEL(atoi(argv[4]));
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
EGTIM_FCTRL(0);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_ina219[] = {
|
MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_ina219[] = {
|
||||||
{"ATLED", 0, fATLED, ": Test LED"},
|
|
||||||
{"ATI2C", 0, fATI2C, ": Test I2C, <i>nit, <d>einit, <w>rite, <r>ead"},
|
|
||||||
{"ATINA", 0, fATINA, "=[0/1]: INA219 =1 start, =0 stop"}
|
{"ATINA", 0, fATINA, "=[0/1]: INA219 =1 start, =0 stop"}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -19,8 +19,10 @@
|
||||||
#include "esp_comp.h"
|
#include "esp_comp.h"
|
||||||
|
|
||||||
#ifdef CONFIG_DEBUG_LOG
|
#ifdef CONFIG_DEBUG_LOG
|
||||||
|
#undef DEBUGSOO
|
||||||
#define DEBUGSOO 2 // уровень вывода отладочной инфы по умолчанию = 2, =1 только error
|
#define DEBUGSOO 2 // уровень вывода отладочной инфы по умолчанию = 2, =1 только error
|
||||||
#else
|
#else
|
||||||
|
#undef DEBUGSOO
|
||||||
#define DEBUGSOO 0
|
#define DEBUGSOO 0
|
||||||
#endif
|
#endif
|
||||||
// Lwip funcs - http://www.ecoscentric.com/ecospro/doc/html/ref/lwip.html
|
// Lwip funcs - http://www.ecoscentric.com/ecospro/doc/html/ref/lwip.html
|
||||||
|
|
Loading…
Reference in a new issue