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pvvx 2017-12-12 23:34:32 +03:00
parent b3dc0dda87
commit 0830a1244a
29 changed files with 240 additions and 152 deletions
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3
USDK/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
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@ -712,7 +712,8 @@ VOID HalSsiSetSclkRtl8195a(VOID *Adapter, u32 ClkRate)
}
ClockDivider &= 0xFFFE; // bit 0 always is 0
}
DBG_SSI_INFO("spi_frequency: Set SCLK Freq=%d\r\n", (ssi_clk/ClockDivider));
// DBG_SSI_INFO("spi_frequency: Set SCLK Freq=%d\r\n", (ssi_clk/ClockDivider));
DiagPrintf("spi_frequency: Set SCLK Freq=%d\r\n", (ssi_clk/ClockDivider));
pHalSsiAdapter->ClockDivider = ClockDivider;
SsiEn = HAL_SSI_READ32(spi_idx, REG_DW_SSI_SSIENR); // Backup SSI_EN register