mirror of
https://github.com/pvvx/RTL00_HelloWorld.git
synced 2024-11-22 04:24:16 +00:00
134 lines
7 KiB
C
134 lines
7 KiB
C
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/*
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* Test: Speed rd Flash
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include "cortex.h"
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#include "rtl8710.h"
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#include "rom_lib.h"
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#include "hal_pinmux.h"
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#include "hal_platform.h"
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#include "hal_spi_flash.h"
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#include "hal_api.h"
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#include "rtl8195a\rtl8195a_peri_on.h"
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#include "hal_peri_on.h"
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//#include "mask.h"
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//#include "cpu/cortex/core_cm3.h"
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#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
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#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
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#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
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#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
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#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
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#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
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#define __O volatile /*!< Defines 'write only' permissions */
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#define __IO volatile /*!< Defines 'read / write' permissions */
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#define __I volatile /*!< Defines 'read only' permissions */
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typedef struct
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{
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__IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
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__O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
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__IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
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__IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
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} CoreDebug_Type;
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/** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
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*/
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typedef struct
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{
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__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
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__IO uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
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__IO uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
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__IO uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
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__IO uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
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__IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
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__IO uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
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__I uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
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__IO uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
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__IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
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__IO uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
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uint32_t RESERVED0[1];
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__IO uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
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__IO uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
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__IO uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
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uint32_t RESERVED1[1];
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__IO uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
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__IO uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
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__IO uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
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uint32_t RESERVED2[1];
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__IO uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
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__IO uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
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__IO uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
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} DWT_Type;
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#define DWT_CTRL_CYCCNTENA_Pos 0 /*!< DWT CTRL: CYCCNTENA Position */
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#define DWT_CTRL_CYCCNTENA_Msk (0x1UL << DWT_CTRL_CYCCNTENA_Pos) /*!< DWT CTRL: CYCCNTENA Mask */
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int main(void)
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{
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u32 t[10];
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int i = 333333, x = 3;
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HalPinCtrlRtl8195A(JTAG, 0, 1);
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while(i--) asm("nop");
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PERI_ON->PESOC_CLK_CTRL |= PERI_ON_CLK_CTRL_ACTCK_TIMER_EN | PERI_ON_CLK_CTRL_SLPCK_TIMER_EN | PERI_ON_CLK_CTRL_ACTCK_LOG_UART_EN | PERI_ON_CLK_CTRL_ACTCK_FLASH_EN | PERI_ON_CLK_CTRL_SLPCK_FLASH_EN;
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PERI_ON->GPIO_PULL_CTRL2 |= (PERI_ON->GPIO_PULL_CTRL2 & (~3)) | 2;
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PERI_ON->OSC32K_CTRL |= 1;
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PERI_ON->SOC_FUNC_EN |= PERI_ON_SOC_FUNC_EN_LOG_UART | PERI_ON_SOC_FUNC_EN_FLASH;
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HalPinCtrlRtl8195A(SPI_FLASH, 0, 1); // SPI_FLASH_PIN_FCTRL(ON); // enable spi flash pins
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HalCpuClkConfig(0); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
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HalInitPlatformLogUartV02();
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HalInitPlatformTimerV02();
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HalShowBuildInfoV02();
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// SpicLoadInitParaFromClockRtl8195AV02();
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SpicInitRtl8195AV02(2, SpicQuadBitMode);// SpicDualBitMode);
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SpicWaitBusyDoneRtl8195A();
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printf("Flash[0]: 0x%08X\r\n", *(volatile u32 *)SPI_FLASH_BASE );
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// HalDelayUs(1000000);
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printf("CPU CLK : %d Hz\r\n", HalGetCpuClk());
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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if(!(DWT->CTRL & DWT_CTRL_CYCCNTENA_Msk)) { // <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>?
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DWT->CYCCNT = 0; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
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}
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while(x--) {
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t[0] = DWT->CYCCNT;
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printf("t0 = %d\r\n", DWT->CYCCNT - t[0]);
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t[0] = DWT->CYCCNT;
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volatile u32 * ptr = (volatile u32 *)SPI_FLASH_BASE+0x4000;
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for(i=0; i < 16384; i++) *ptr++;
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t[1] = DWT->CYCCNT - t[0];
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printf("read(): tFlash = %d, clk/byte = %d\r\n", t[1], t[1] >> 16);
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ptr = (volatile u32 *)SPI_FLASH_BASE+0x10000;
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t[0] = DWT->CYCCNT;
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memcpy((u8 *)0x10010000,(u8 *) SPI_FLASH_BASE+0x10000, 65536);
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for(i=0; i < 16384; i++) *ptr++;
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t[2] = DWT->CYCCNT - t[0];
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printf("memcpy(): tFlash = %d, clk/byte = %d\r\n", t[2], t[2] >> 16);
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ptr = (volatile u32 *)0x10000000;
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t[0] = DWT->CYCCNT;
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for(i=0; i < 16384; i++) *ptr++;
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t[3] = DWT->CYCCNT - t[0];
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printf("read(): tRAM = %d, clk/byte = %d\r\n", t[3], t[3]>>16);
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ptr = (volatile u32 *)0x1FFF0000;
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t[0] = DWT->CYCCNT;
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for(i=0; i < 16384; i++) *ptr++;
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t[4] = DWT->CYCCNT - t[0];
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printf("read(): tTCM = %d, clk/byte = %d\r\n", t[4], t[4]>>16);
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printf("read(): tFlash/tTCM = %d, tFlash/tRAM = %d\r\n", t[1]/t[4], t[1]/t[3]);
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printf("memcpy(): tFlash/tTCM = %d, tFlash/tRAM = %d\r\n", t[2]/t[4], t[2]/t[3]);
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}
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printf("Flash[0]: 0x%08X\r\n", *(volatile u32 *)SPI_FLASH_BASE );
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printf("End");
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while(1);
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}
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extern uint8_t STACK_TOP;
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uint32_t *cortex_vectors[] __attribute__((section(".vectors"))) = {
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(uint32_t *)&STACK_TOP,
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(uint32_t *)main
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};
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