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pvvx 2017-04-22 16:44:33 +03:00
parent cf7a2d9683
commit f7b901aa27
76 changed files with 3753 additions and 3990 deletions
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2
RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/diag.h
View file

@ -89,6 +89,8 @@ prvDiagSPrintf(
IN const char *fmt, ...
);
extern char print_off;
#if CONFIG_DEBUG_LOG > 3
#define debug_printf(fmt, ...) rtl_printf(fmt, ##__VA_ARGS__)
#define info_printf(fmt, ...) rtl_printf(fmt, ##__VA_ARGS__)

3
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_diag.h
View file

@ -51,6 +51,9 @@
#define UART_STOP_1BIT 0x0
#define UART_STOP_2BIT 0x4
#ifndef DEFAULT_BAUDRATE
#define DEFAULT_BAUDRATE UART_BAUD_RATE_38400
#endif
#define HAL_UART_READ32(addr) HAL_READ32(LOG_UART_REG_BASE, addr)
#define HAL_UART_WRITE32(addr, value) HAL_WRITE32(LOG_UART_REG_BASE, addr, value)

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/hal_misc_v0.c
View file

@ -336,7 +336,7 @@ PatchHalInitPlatformLogUart(
UartIrqHandle.Priority = 0;
//4 Inital Log uart
UartAdapter.BaudRate = UART_BAUD_RATE_38400;
UartAdapter.BaudRate = DEFAULT_BAUDRATE;
UartAdapter.DataLength = UART_DATA_LEN_8BIT;
UartAdapter.FIFOControl = 0xC1;
UartAdapter.IntEnReg = 0x00;

5
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
View file

@ -13,8 +13,9 @@
//-------------------------------------------------------------------------
// Data declarations
#define DEFAULT_BAUDRATE UART_BAUD_RATE_38400
#ifndef DEFAULT_BAUDRATE
#define DEFAULT_BAUDRATE 38400
#endif
/* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz,
6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */

1
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sys_on.h
View file

@ -616,6 +616,7 @@
#define BIT_MASK_XTAL_DRV_RF_LATCH 0xffffffffL
#define BIT_XTAL_DRV_RF_LATCH(x) (((x) & BIT_MASK_XTAL_DRV_RF_LATCH) << BIT_SHIFT_XTAL_DRV_RF_LATCH)
// BIT25 - To release DAC delta sigma clock gating
//2 REG_RSVD

74
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_pwm.c
View file

@ -3,8 +3,8 @@
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
* --------------------------
* bug fixing: pvvx
*/
@ -15,9 +15,10 @@
#include "rtl8195a_pwm.h"
#include "hal_pwm.h"
extern HAL_PWM_ADAPTER PWMPin[];
//extern HAL_PWM_ADAPTER PWMPin[];
extern HAL_TIMER_OP HalTimerOp;
//extern HAL_TIMER_OP HalTimerOp;
extern u32 gTimerRecord;
/**
* @brief Configure a G-Timer to generate a tick with certain time.
@ -33,33 +34,30 @@ Pwm_SetTimerTick_8195a(
u32 tick_time
)
{
TIMER_ADAPTER TimerAdapter;
if (tick_time <= MIN_GTIMER_TIMEOUT) {
tick_time = MIN_GTIMER_TIMEOUT;
}
else {
tick_time = (((tick_time-1)/TIMER_TICK_US)+1) * TIMER_TICK_US;
}
// Initial a G-Timer for the PWM pin
if (pPwmAdapt->tick_time != tick_time) {
TimerAdapter.IrqDis = 1; // Disable Irq
TimerAdapter.IrqHandle.IrqFun = (IRQ_FUN) NULL;
TimerAdapter.IrqHandle.IrqNum = TIMER2_7_IRQ;
TimerAdapter.IrqHandle.Priority = 10;
TimerAdapter.IrqHandle.Data = (u32)NULL;
TimerAdapter.TimerId = pPwmAdapt->gtimer_id;
TimerAdapter.TimerIrqPriority = 0;
TimerAdapter.TimerLoadValueUs = tick_time-1;
TimerAdapter.TimerMode = 1; // auto-reload with user defined value
HalTimerOp.HalTimerInit((VOID*) &TimerAdapter);
pPwmAdapt->tick_time = tick_time;
DBG_PWM_INFO("%s: Timer_Id=%d Count=%d\n", __FUNCTION__, pPwmAdapt->gtimer_id, tick_time);
// if timer is running ?
if(gTimerRecord & (1 << pPwmAdapt->gtimer_id)) {
HalTimerReLoadRtl8195a_Patch(pPwmAdapt->gtimer_id, tick_time);
} else {
TIMER_ADAPTER TimerAdapter;
TimerAdapter.IrqDis = 1; // Disable Irq
TimerAdapter.IrqHandle.IrqFun = (IRQ_FUN) NULL;
TimerAdapter.IrqHandle.IrqNum = TIMER2_7_IRQ;
TimerAdapter.IrqHandle.Priority = 10;
TimerAdapter.IrqHandle.Data = (u32)NULL;
TimerAdapter.TimerId = pPwmAdapt->gtimer_id;
TimerAdapter.TimerIrqPriority = 0;
TimerAdapter.TimerLoadValueUs = tick_time-1;
TimerAdapter.TimerMode = 1; // auto-reload with user defined value
HalTimerInitRtl8195a_Patch((VOID*) &TimerAdapter);
}
}
}
@ -95,7 +93,7 @@ HAL_Pwm_SetDuty_8195a(
period = MIN_GTIMER_TIMEOUT*2;
}
else {
tick_time = period / 0x3fc; // a duty cycle be devided into 1020 ticks
tick_time = period / 1020; // 0x3fc; // a duty cycle be devided into 1020 ticks
if (tick_time < MIN_GTIMER_TIMEOUT) {
tick_time = MIN_GTIMER_TIMEOUT;
}
@ -103,36 +101,24 @@ HAL_Pwm_SetDuty_8195a(
Pwm_SetTimerTick_8195a(pPwmAdapt, tick_time);
tick_time = pPwmAdapt->tick_time;
#if 0
// Check if current tick time needs adjustment
if ((pPwmAdapt->tick_time << 12) <= period) {
// need a longger tick time
}
else if ((pPwmAdapt->tick_time >> 2) >= period) {
// need a shorter tick time
}
#endif
period_tick = period/tick_time;
if (period_tick == 0) {
period_tick = 1;
}
if (pulse_width >= period) {
// pulse_width = period-1;
pulse_width = period;
}
pulsewidth_tick = pulse_width/tick_time;
if (pulsewidth_tick == 0) {
// pulsewidth_tick = 1;
}
timer_id = pPwmAdapt->gtimer_id;
pPwmAdapt->period = period_tick & 0x3ff;
pPwmAdapt->pulsewidth = pulsewidth_tick & 0x3ff;
pPwmAdapt->period = period_tick & BIT_MASK_PERI_PWM0_PERIOD;
pPwmAdapt->pulsewidth = pulsewidth_tick & BIT_MASK_PERI_PWM0_DUTY;
RegAddr = REG_PERI_PWM0_CTRL + (pwm_id*4);
RegValue = BIT31 | (timer_id<<24) | (pulsewidth_tick<<12) | period_tick;
RegValue = BIT_PERI_PWM0_EN | BIT_PERI_PWM0_GT_SEL(timer_id) | BIT_PERI_PWM0_DUTY(pulsewidth_tick) | BIT_PERI_PWM0_PERIOD(period_tick);
HAL_WRITE32(PERI_ON_BASE, RegAddr, RegValue);
}
@ -157,10 +143,10 @@ HAL_Pwm_Init_8195a(
pwm_id = pPwmAdapt->pwm_id;
pin_sel = pPwmAdapt->sel;
// Initial a G-Timer for the PWM pin
Pwm_SetTimerTick_8195a(pPwmAdapt, MIN_GTIMER_TIMEOUT);
//p/ Pwm_SetTimerTick_8195a(pPwmAdapt, MIN_GTIMER_TIMEOUT);
// Set default duty ration
HAL_Pwm_SetDuty_8195a(pPwmAdapt, 20000, 10000);
//p/ HAL_Pwm_SetDuty_8195a(pPwmAdapt, 20000, 10000);
// Configure the Pin Mux
PinCtrl((PWM0+pwm_id), pin_sel, 1);
@ -187,7 +173,7 @@ HAL_Pwm_Enable_8195a(
// Configure the Pin Mux
if (!pPwmAdapt->enable) {
PinCtrl((PWM0+pwm_id), pPwmAdapt->sel, 1);
HalTimerOp.HalTimerEn(pPwmAdapt->gtimer_id);
HalTimerEnRtl8195a_Patch(pPwmAdapt->gtimer_id);
pPwmAdapt->enable = 1;
}
}
@ -211,7 +197,7 @@ HAL_Pwm_Disable_8195a(
// Configure the Pin Mux
if (pPwmAdapt->enable) {
PinCtrl((PWM0+pwm_id), pPwmAdapt->sel, 0);
HalTimerOp.HalTimerDis(pPwmAdapt->gtimer_id);
HalTimerDisRtl8195a(pPwmAdapt->gtimer_id);
pPwmAdapt->enable = 0;
}
}

4
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c
View file

@ -142,8 +142,6 @@ HalRuartResetTRxFifoRtl8195a(
return HAL_OK;
}
extern u64 div_u64(u64 dividend, u32 divisor);
HAL_Status
HalRuartGenBaudRateRtl8195a(
IN RUART_SPEED_SETTING *pBaudSetting
@ -154,7 +152,7 @@ HalRuartGenBaudRateRtl8195a(
u32 min_err=0xffffffff;
u32 uart_ovsr;
u32 uart_ovsr_mod;
u32 min_uart_ovsr =0; // ovsr with mini err
u32 min_uart_ovsr; // ovsr with mini err
u32 min_uart_ovsr_mod;
u64 uart_clock;
u32 divisor_temp;

48
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_adc.c
View file

@ -650,7 +650,7 @@ RtkADCPinMuxInit(
ADCLocalTemp |= BIT25;
/* To release DAC delta sigma clock gating */
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_SYS_SYSPLL_CTRL2,ADCLocalTemp);
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL2, ADCLocalTemp);
/* Turn on DAC active clock */
ACTCK_ADC_CCTRL(ON);
@ -1267,12 +1267,14 @@ RtkADCReceive(
pHALADCGdmaAdpt->MuliBlockCunt = 0;
pHALADCGdmaOp->HalGdmaChSeting(pHALADCGdmaAdpt);
pHALADCGdmaOp->HalGdmaChEn(pHALADCGdmaAdpt);
pSalADCHND->DevSts = ADC_STS_RX_ING;
AdcTempDat = HAL_ADC_READ32(REG_ADC_POWER);
AdcTempDat |= BIT_ADC_PWR_AUTO;
HAL_ADC_WRITE32(REG_ADC_POWER, AdcTempDat);
pHALADCGdmaOp->HalGdmaChEn(pHALADCGdmaAdpt);
pSalADCHND->DevSts = ADC_STS_RX_ING;
return _EXIT_SUCCESS;
}
return _EXIT_FAILURE;
@ -1288,9 +1290,6 @@ RtkADCReceiveBuf(
PSAL_ADC_HND pSalADCHND = (PSAL_ADC_HND) Data;
PSAL_ADC_HND_PRIV pSalADCHNDPriv = NULL;
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
PHAL_ADC_OP pHalADCOP = NULL;
//PIRQ_HANDLE pIrqHandleADCGdma = NULL;
@ -1299,13 +1298,8 @@ RtkADCReceiveBuf(
/* To Get the SAL_I2C_MNGT_ADPT Pointer */
pSalADCHNDPriv = CONTAINER_OF(pSalADCHND, SAL_ADC_HND_PRIV, SalADCHndPriv);
pSalADCMngtAdpt = CONTAINER_OF(pSalADCHNDPriv->ppSalADCHnd, SAL_ADC_MNGT_ADPT, pSalHndPriv);
pHalADCOP = pSalADCMngtAdpt->pHalOp;
pHalADCOP = pSalADCMngtAdpt->pHalOp;
/* Clear ADC Status */
//HAL_ADC_READ32(REG_ADC_INTR_STS);
@ -1315,11 +1309,12 @@ RtkADCReceiveBuf(
//DBG_8195A(">>INTR:%x\n",AdcTempDat);
ADCFullStsFlag = 0;
HalDelayUs(2000);
/// HalDelayUs(2000); ?
HalDelayUs(20);
DBG_ADC_INFO("RtkADCReceiveBuf, Check to enable ADC manully or not\n");
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_POWER);
if (unlikely((AdcTempDat & 0x00000008) == 0)) {
if (unlikely((AdcTempDat & BIT_ADC_ISO_MANUAL) == 0)) {
;
}
else {
@ -1329,23 +1324,22 @@ RtkADCReceiveBuf(
//AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_POWER);
}
pSalADCHND->pInitDat->ADCIntrMSK = (BIT_ADC_FIFO_FULL_EN);
pHalADCOP->HalADCIntrCtrl(pSalADCHND->pInitDat);
pSalADCHND->DevSts = ADC_STS_IDLE;
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
if ((AdcTempDat & 0x00000001) == 0){
if ((AdcTempDat & BIT_ADC_EN_MANUAL) == 0){
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD1);
DBG_ADC_INFO("RtkADCReceiveBuf, Before set, Reg AD1:%x\n", AdcTempDat);
AdcTempDat |= (0x01);
AdcTempDat |= BIT_ADC_EN_MANUAL;
HAL_ADC_WRITE32(REG_ADC_ANAPAR_AD1, AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD1);
DBG_ADC_INFO("RtkADCReceiveBuf, After set, Reg AD1:%x\n", AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCReceiveBuf, Before set, Reg AD0:%x\n", AdcTempDat);
AdcTempDat |= (0x01);
AdcTempDat |= BIT_ADC_EN_MANUAL;
HAL_ADC_WRITE32(REG_ADC_ANAPAR_AD0, AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCReceiveBuf, After set, Reg AD0:%x\n", AdcTempDat);
@ -1359,14 +1353,14 @@ RtkADCReceiveBuf(
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCReceiveBuf, End of ADC, Before set, AD0:%x\n", AdcTempDat);
AdcTempDat &= (~0x01);
AdcTempDat &= (~BIT_ADC_EN_MANUAL);
HAL_ADC_WRITE32(REG_ADC_ANAPAR_AD0, AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCReceiveBuf, End of ADC, After set, AD0:%x\n", AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD1);
DBG_ADC_INFO("RtkADCReceiveBuf, End of ADC, Before set, AD1:%x\n", AdcTempDat);
AdcTempDat &= (~0x01);
AdcTempDat &= (~BIT_ADC_EN_MANUAL);
HAL_ADC_WRITE32(REG_ADC_ANAPAR_AD1, AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD1);
DBG_ADC_INFO("RtkADCReceiveBuf, End of ADC, After set, AD1:%x\n", AdcTempDat);
@ -1410,7 +1404,7 @@ RtkADCRxManualRotate(
DBG_ADC_INFO("RtkADCRxManualRotate, Check to enable ADC manully or not\n");
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_POWER);
if (unlikely((AdcTempDat & 0x00000008) == 0)) {
if (unlikely((AdcTempDat & BIT_ADC_ISO_MANUAL) == 0)) {
;
}
else {
@ -1426,7 +1420,7 @@ RtkADCRxManualRotate(
pSalADCHND->DevSts = ADC_STS_IDLE;
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
if ((AdcTempDat & 0x00000001) == 0){
if ((AdcTempDat & BIT_ADC_EN_MANUAL) == 0){
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD1);
DBG_ADC_INFO("RtkADCRxManualRotate, Before set, Reg AD1:%x\n", AdcTempDat);
/* Clear for manual rotrate first*/
@ -1435,7 +1429,7 @@ RtkADCRxManualRotate(
AdcTempDat |= (BIT0);
/* Enable manual mode, this is to turn cali. off */
AdcTempDat &= ~(BIT11);
// AdcTempDat &= ~(BIT11);
AdcTempDat |= (BIT11);
/* Set rotation to default state
@ -1476,7 +1470,7 @@ RtkADCRxManualRotate(
/* Read Content */
for (tempcnt=0; tempcnt<16; tempcnt++){
ADCDatBuf[0] = (u32)HAL_ADC_READ32(REG_ADC_FIFO_READ);
ADCDatBuf[0] = (u32)HAL_ADC_READ32(REG_ADC_FIFO_READ);
}
/* Close ADC */
@ -1507,7 +1501,7 @@ RtkADCRxManualRotate(
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCRxManualRotate, Before set, Reg AD0:%x\n", AdcTempDat);
AdcTempDat |= (0x01);
AdcTempDat |= BIT_ADC_EN_MANUAL;
HAL_ADC_WRITE32(REG_ADC_ANAPAR_AD0, AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCRxManualRotate, After set, Reg AD0:%x\n", AdcTempDat);
@ -1537,14 +1531,14 @@ RtkADCRxManualRotate(
/* Close ADC */
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCRxManualRotate, End of ADC, Before set, AD0:%x\n", AdcTempDat);
AdcTempDat &= (~0x01);
AdcTempDat &= (~BIT_ADC_EN_MANUAL);
HAL_ADC_WRITE32(REG_ADC_ANAPAR_AD0, AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD0);
DBG_ADC_INFO("RtkADCRxManualRotate, End of ADC, After set, AD0:%x\n", AdcTempDat);
AdcTempDat = (u32)HAL_ADC_READ32(REG_ADC_ANAPAR_AD1);
DBG_ADC_INFO("RtkADCRxManualRotate, End of ADC, Before set, AD1:%x\n", AdcTempDat);
AdcTempDat &= (~0x01);
AdcTempDat &= (~BIT0);
/* Disable manual mode */
AdcTempDat &= (~BIT11);

6
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_log_uart.c
View file

@ -161,7 +161,7 @@ void HalLogUartIrqHandle(VOID * Data) {
void HalLogUartSetBaudRate(HAL_LOG_UART_ADAPTER *pUartAdapter) {
u32 clk4 = HalGetCpuClk() >> 2; // PLATFORM_CLOCK/2; // (unsigned int) HalGetCpuClk() >> 2; // div 4
if (pUartAdapter->BaudRate == 0)
pUartAdapter->BaudRate = UART_BAUD_RATE_38400;
pUartAdapter->BaudRate = DEFAULT_BAUDRATE;
u32 br16 = pUartAdapter->BaudRate << 4; // * 16
if ((br16 != 0) && (br16 <= clk4)) {
unsigned int dll = clk4 / br16;
@ -200,7 +200,7 @@ u32 HalLogUartInitSetting(HAL_LOG_UART_ADAPTER *pUartAdapter) {
// HalPinCtrlRtl8195A(LOG_UART, 0, 1); ????
u32 clk4 = HalGetCpuClk() >> 2; // PLATFORM_CLOCK/2; // (unsigned int) HalGetCpuClk() >> 2; // div 4
if (pUartAdapter->BaudRate == 0)
pUartAdapter->BaudRate = UART_BAUD_RATE_38400;
pUartAdapter->BaudRate = DEFAULT_BAUDRATE;
u32 br16 = pUartAdapter->BaudRate << 4; // * 16
HAL_UART_WRITE32(UART_INTERRUPT_EN_REG_OFF, 0); // 40003004 = 0;
if (br16 <= clk4) {
@ -418,7 +418,7 @@ void HalInitLogUart(void) {
HAL_PERI_ON_WRITE32(REG_PESOC_CLK_CTRL,
HAL_PERI_ON_READ32(REG_PESOC_CLK_CTRL) | BIT_SOC_ACTCK_LOG_UART_EN); // 40000230 |= 0x1000u;
HalPinCtrlRtl8195A(LOG_UART, 0, 1);
UartAdapter.BaudRate = UART_BAUD_RATE_38400;
UartAdapter.BaudRate = DEFAULT_BAUDRATE;
UartAdapter.DataLength = UART_DATA_LEN_8BIT;
UartAdapter.FIFOControl = FCR_RX_TRIG_MASK | FCR_FIFO_EN; // 0xC1;
UartAdapter.IntEnReg = IER_ERBFI | IER_ELSI; // 5

4
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_pwm.c
View file

@ -3,8 +3,8 @@
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
* --------------------------
* bug fixing: pvvx
*/

21
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
View file

@ -46,7 +46,6 @@ PatchHalLogUartInit(
u32 Divisor;
u32 Dlh;
u32 Dll;
u32 SysClock;
/*
Interrupt enable Register
@ -71,21 +70,11 @@ PatchHalLogUartInit(
// set up buad rate division
#ifdef CONFIG_FPGA
SysClock = SYSTEM_CLK;
Divisor = (SysClock / (16 * (UartAdapter.BaudRate)));
Divisor = (SYSTEM_CLK / (16 * (UartAdapter.BaudRate)));
#else
{
u32 SampleRate, Remaind;
SysClock = HalGetCpuClk() >> 2;
SampleRate = (16 * (UartAdapter.BaudRate));
Divisor= SysClock/SampleRate;
Remaind = ((SysClock*10)/SampleRate) - (Divisor*10);
if (Remaind > 4) Divisor++;
Divisor = HalGetCpuClk()/(32 * UartAdapter.BaudRate);
Divisor = (Divisor & 1) + (Divisor >> 1);
}
#endif
@ -98,7 +87,7 @@ PatchHalLogUartInit(
HAL_UART_WRITE32(UART_DLL_OFF, Dll);
HAL_UART_WRITE32(UART_DLH_OFF, Dlh);
// clear DLAB bit
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0);
// HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0); // есть далее
// set data format
SetData = UartAdapter.Parity | UartAdapter.Stop | UartAdapter.DataLength;
@ -160,7 +149,7 @@ PSHalInitPlatformLogUart(
UartIrqHandle.Priority = 0;
//4 Inital Log uart
UartAdapter.BaudRate = UART_BAUD_RATE_38400;
UartAdapter.BaudRate = DEFAULT_BAUDRATE;
UartAdapter.DataLength = UART_DATA_LEN_8BIT;
UartAdapter.FIFOControl = 0xC1;
UartAdapter.IntEnReg = 0x00;

4
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_ssi.c
View file

@ -547,13 +547,13 @@ HalSsiInit(VOID *Data)
DBG_SSI_ERR("Invalid SPI Index.\n");
break;
}
/*
ret = FunctionChk(Function, (u32)PinmuxSelect);
if(ret == _FALSE){
DBG_SSI_ERR("Invalid Pinmux Setting.\n");
return HAL_ERR_PARA;
}
*/
#ifdef CONFIG_SOC_PS_MODULE
REG_POWER_STATE SsiPwrState;
#endif

17
RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c
View file

@ -6,11 +6,9 @@
*/
//======================================================
#ifndef LOGUART_STACK_SIZE
#define LOGUART_STACK_SIZE 400 // USE_MIN_STACK_SIZE to 128
#define LOGUART_STACK_SIZE 400 // USE_MIN_STACK_SIZE modify from 512 to 128
#endif
#ifndef CONSOLE_PRIORITY
#define CONSOLE_PRIORITY 0
#endif
//======================================================
#include "rtl8195a.h"
#include "rtl_bios_data.h"
@ -43,7 +41,7 @@ _LONG_CALL_ extern void UartLogHistoryCmd(
IN u8 RevData, IN UART_LOG_CTL *prvUartLogCtl,
IN u8 EchoFlag);
_LONG_CALL_ extern void UartLogCmdExecute(IN PUART_LOG_CTL pUartLogCtlExe);
//_LONG_CALL_ extern void UartLogCmdExecute(IN PUART_LOG_CTL pUartLogCtlExe);
//======================================================
extern PCOMMAND_TABLE UartLogRamCmdTable[];
extern UartLogRamCmdTableSize;
@ -128,9 +126,9 @@ void UartLogIrqHandleRam(void * Data) {
// для передачи ' ' или ','.
// Начальные пробелы cmd или arg удаляются.
//======================================================
int GetArgvRam(IN u8 *pstr) {
int GetArgvRam(IN u8 *pstr, u8** argv) {
int arvc = 0;
u8** argv = ArgvArray;
// u8** argv = ArgvArray;
u8* p = pstr;
u8 t, n = ' ';
int m = 0;
@ -213,7 +211,7 @@ MON_RAM_TEXT_SECTION void RtlConsolTaskRam(void *Data) {
RtlDownSema(&p->Sema);
if (p->ExecuteCmd) {
// UartLogCmdExecute(pUartLogCtl);
int argc = GetArgvRam(p->pTmpLogBuf->UARTLogBuf);
int argc = GetArgvRam(p->pTmpLogBuf->UARTLogBuf, ArgvArray);
if(argc) {
StrUpr(ArgvArray[0]);
PCOMMAND_TABLE pcmd = p->pCmdTbl;
@ -329,8 +327,13 @@ _WEAK void console_help(int argc, char *argv[]) { // Help
}
DiagPrintf(&str_rom_57ch3Dch0A[25]); // DiagPrintf("==============================\n");
}
LOCAL void print_on(int argc, char *argv[])
{
print_off = argv[1][0]!='1';
}
// (!) размещается в специальном сегменте '.mon.tab*' (см. *.ld файл)
MON_RAM_TAB_SECTION COMMAND_TABLE console_commands[] = {
{"PR", 1, print_on, "<1/0>: Printf on/off"}, // Help
{"?", 0, console_help, ": This Help"} // Help
// {"HELP", 0, console_help, ": Help"} // Help
};

6
RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_bios_data.h
View file

@ -92,7 +92,7 @@ typedef struct _FALSE_ALARM_STATISTICS {
u32 Cnt_CCA_all;
u32 Cnt_BW_USC;
u32 Cnt_BW_LSC;
} FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
} FALSE_ALARM_STATISTICS;
extern FALSE_ALARM_STATISTICS FalseAlmCnt; // 100006E0
typedef struct _rom_info {
@ -100,7 +100,7 @@ typedef struct _rom_info {
u8 CrystalCap;
u64 DebugComponents;
u32 DebugLevel;
} ROM_INFO, *PROM_INFO;
} ROM_INFO;
extern ROM_INFO ROMInfo; // 10000720
typedef struct _CFO_TRACKING_ {
@ -118,7 +118,7 @@ typedef struct _CFO_TRACKING_ {
u8 CFO_TH_XTAL_HIGH;
u8 CFO_TH_XTAL_LOW;
u8 CFO_TH_ATC;
} CFO_TRACKING, *PCFO_TRACKING;;
}CFO_TRACKING;
extern CFO_TRACKING DM_CfoTrack; // 10000738
/* in rom_libgloss_retarget.h

19
RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c
View file

@ -4,7 +4,6 @@
#include <string.h>
#include <stdarg.h>
#include "libc/rom/string/rom_libc_string.h"
#include "strproc.h"
#define memchr __rtl_memchr_v1_00
#define memcmp __rtl_memcmp_v1_00
@ -23,6 +22,10 @@
#define strsep __rtl_strsep_v1_00
#define strtok __rtl_strtok_v1_00
static char toupper(char ch) {
return ((ch >= 'a' && ch <= 'z') ? ch - 'a' + 'A' : ch);
};
#define NEWFP 1
#define ENDIAN_LITTLE 1234
#define ENDIAN_BIG 4321
@ -188,13 +191,6 @@ str_fmt(char *p, int size, int fmt)
/*
* strtoupper()
*/
#define strtoupper StrUpr
/*
LOCAL char toupper(char ch) {
return ((ch >= 'a' && ch <= 'z') ? ch - 'a' + 'A' : ch);
};
void
strtoupper(char *p)
{
@ -203,7 +199,7 @@ strtoupper(char *p)
for (; *p; p++)
*p = toupper (*p);
}
*/
/* $Id: atob.c,v 1.1.1.1 2006/08/23 17:03:06 pefo Exp $ */
/*
@ -637,7 +633,7 @@ c_vsprintf (char *d, const char *s, va_list ap)
}
else if (*s == 'o')
base = 8;
else //if (*s == 'b')
else if (*s == 'b')
base = 2;
if (longlong)
llbtoa(d, va_arg (ap, quad_t),
@ -1078,12 +1074,9 @@ int c_printf(const char *fmt, ...)
int puts (const char *s)
{
int i = 0;
while(*s) {
HalSerialPutcRtl8195a(*s++);
i++;
}
return i;
}
void vTaskDelete(void *);

22
RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c
View file

@ -62,7 +62,8 @@ char * rtl_strtok(char *s, const char *delim);
extern struct _reent * _rtl_impure_ptr;
int libc_has_init;
char libc_has_init;
char print_off;
// extern rtl_impure_ptr
// extern impure_ptr
@ -139,14 +140,17 @@ int rtl_printf(const char *fmt, ...) {
if (!libc_has_init) {
rtl_libc_init();
}
#endif
va_list args;
va_start (args, fmt);
int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr,
_rtl_impure_ptr->_stdout, fmt, args);
__rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout);
// va_end (args);
return result;
#endif
if(!print_off) {
va_list args;
va_start (args, fmt);
int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr,
_rtl_impure_ptr->_stdout, fmt, args);
__rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout);
// va_end (args);
return result;
}
else return 0;
}
//----- rtl_vprintf()

59
RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c
View file

@ -6,8 +6,6 @@
#include "rtl_bios_data.h"
#include "va_list.h"
#include "strproc.h"
#include "rt_lib_rom.h"
#define CHECK_LIBC_INIT 0
//-------------------------------------------------------------------------
@ -69,10 +67,8 @@ unsigned long long __aeabi_llsr(unsigned long long val, unsigned int shift);
extern struct _reent * _rtl_impure_ptr;
#if CHECK_LIBC_INIT
extern int libc_has_init;
#endif
// extern impure_ptr
extern char libc_has_init;
extern char print_off;
//-------------------------------------------------------------------------
// Function
@ -142,13 +138,17 @@ int printf(const char *fmt, ...) {
rtl_libc_init();
}
#endif
va_list args;
va_start (args, fmt);
int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr,
_rtl_impure_ptr->_stdout, fmt, args);
__rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout);
// va_end (args);
return result;
if(!print_off) {
va_list args;
va_start (args, fmt);
int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr,
_rtl_impure_ptr->_stdout, fmt, args);
__rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout);
// va_end (args);
return result;
}
else return 0;
}
//----- vprintf()
@ -169,6 +169,7 @@ int vprintf(const char * fmt, __VALIST param) {
int vsnprintf(char *str, size_t size, const char *fmt, __VALIST param) {
int result;
int w;
int v11;
FILE f;
#if CHECK_LIBC_INIT
if (!libc_has_init) {
@ -299,9 +300,9 @@ int sscanf(const char *buf, const char *fmt, ...) {
return i;
}
LOCAL char toupper(char ch) {
char toupper(char ch) {
return ((ch >= 'a' && ch <= 'z') ? ch - 'a' + 'A' : ch);
}
};
int _stricmp (const char *s1, const char *s2)
{
@ -378,15 +379,12 @@ int __aeabi_dtoi(double d)
return __rtl_dtoi_v1_00(d);
}
extern _LONG_CALL_ int __rtl_dtoui_v1_00(double d);
//----- __aeabi_dtoui()
int __aeabi_dtoui(double d)
{
return __rtl_dtoui_v1_00(d);
}
extern _LONG_CALL_ float __rtl_itof_v1_00(int val);
//----- __aeabi_i2f()
float __aeabi_i2f(int val)
{
@ -411,7 +409,6 @@ int __aeabi_ui2d(unsigned int val)
return __rtl_uitod_v1_00(val);
}
extern _LONG_CALL_ char * __rtl_ltoa_v1_00(int value, char *string, int radix);
//----- __aeabi_itoa()
char * __aeabi_itoa(int value, char *string, int radix)
{
@ -424,7 +421,6 @@ char * __aeabi_ltoa(int value, char *string, int radix)
return (char *)__rtl_ltoa_v1_00(value, string, radix);
}
extern _LONG_CALL_ char * __rtl_ultoa_v1_00(unsigned int value, char *string, int radix);
//----- __aeabi_utoa()
char * __aeabi_utoa(unsigned int value, char *string, int radix)
{
@ -437,49 +433,42 @@ char * __aeabi_ultoa(unsigned int value, char *string, int radix)
return (char *)__rtl_ultoa_v1_00(value, string, radix);
}
extern _LONG_CALL_ long long __rtl_ftol_v1_00(float f);
//----- __aeabi_ftol()
long long __aeabi_ftol(float f)
int __aeabi_ftol(float f)
{
return __rtl_ftol_v1_00(f);
}
extern _LONG_CALL_ double __rtl_ftod_v1_00(float f);
//----- __aeabi_ftod()
double __aeabi_ftod(float f)
int __aeabi_ftod(float f)
{
return __rtl_ftod_v1_00(f);
}
extern _LONG_CALL_ float __rtl_dtof_v1_00(double d);
//----- __aeabi_dtof()
float __aeabi_dtof(double d)
{
return __rtl_dtof_v1_00(d);
}
extern _LONG_CALL_ float __rtl_fadd_v1_00(float a, float b);
//----- __aeabi_fadd()
float __aeabi_fadd(float a, float b)
{
return __rtl_fadd_v1_00(a, b);
}
extern _LONG_CALL_ float __rtl_fsub_v1_00(float a, float b);
//----- __aeabi_fsub()
float __aeabi_fsub(float a, float b)
{
return __rtl_fsub_v1_00(a, b);
}
extern _LONG_CALL_ float __rtl_fmul_v1_00(float a, float b);
//----- __aeabi_fmul()
float __aeabi_fmul(float a, float b)
{
return __rtl_fmul_v1_00(a, b);
}
extern _LONG_CALL_ float __rtl_fdiv_v1_00(float a, float b);
//----- __aeabi_fdiv()
float __aeabi_fdiv(float a, float b)
{
@ -487,25 +476,25 @@ float __aeabi_fdiv(float a, float b)
}
//----- __aeabi_dadd()
double __aeabi_dadd(double a, double b)
int __aeabi_dadd(double a, double b)
{
return __rtl_dadd_v1_00(a, b);
}
//----- __aeabi_dsub()
double __aeabi_dsub(double a, double b)
int __aeabi_dsub(double a, double b)
{
return __rtl_dsub_v1_00(a, b);
}
//----- __aeabi_dmul()
double __aeabi_dmul(double a, double b)
int __aeabi_dmul(double a, double b)
{
return __rtl_dmul_v1_00(a, b);
}
//----- __aeabi_ddiv()
double __aeabi_ddiv(double a, double b)
int __aeabi_ddiv(double a, double b)
{
return __rtl_ddiv_v1_00(a, b);
}
@ -522,7 +511,6 @@ int __aeabi_dcmplt(double a, double b)
return __rtl_dcmplt_v1_00(a, b);
}
extern _LONG_CALL_ int __rtl_dcmple_v1_00(double a, double b);
//----- __aeabi_dcmple()
int __aeabi_dcmple(double a, double b)
{
@ -535,13 +523,12 @@ int __aeabi_dcmpgt(double a, double b)
return __rtl_dcmpgt_v1_00(a, b);
}
extern _LONG_CALL_ int __rtl_fcmplt_v1_00(float a, float b);
//----- __aeabi_fcmplt()
int __aeabi_fcmplt(float a, float b)
{
return __rtl_fcmplt_v1_00(a, b);
}
extern _LONG_CALL_ int __rtl_fcmpgt_v1_00(float a, float b);
//----- __aeabi_fcmpgt()
int __aeabi_fcmpgt(float a, float b)
{

15
RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c
View file

@ -4,7 +4,6 @@
*/
#include "basic_types.h"
#include "rt_lib_rom.h"
//-------------------------------------------------------------------------
// Function declarations
@ -72,15 +71,12 @@ int rtl_dtoi(double d)
return __rtl_dtoi_v1_00(d);
}
extern _LONG_CALL_ int __rtl_dtoui_v1_00(double d);
//----- rtl_dtoui()
int rtl_dtoui(double d)
{
return __rtl_dtoui_v1_00(d);
}
extern _LONG_CALL_ float __rtl_itof_v1_00(int val);
//----- rtl_i2f()
float rtl_i2f(int val)
{
@ -105,7 +101,6 @@ int rtl_ui2d(unsigned int val)
return __rtl_uitod_v1_00(val);
}
extern _LONG_CALL_ char * __rtl_ltoa_v1_00(int value, char *string, int radix);
//----- rtl_itoa()
char *rtl_itoa(int value, char *string, int radix)
{
@ -118,7 +113,6 @@ char *rtl_ltoa(int value, char *string, int radix)
return (char *)__rtl_ltoa_v1_00(value, string, radix);
}
extern _LONG_CALL_ char * __rtl_ultoa_v1_00(unsigned int value, char *string, int radix);
//----- rtl_utoa()
char *rtl_utoa(unsigned int value, char *string, int radix)
{
@ -131,7 +125,6 @@ char *rtl_ultoa(unsigned int value, char *string, int radix)
return (char *)__rtl_ultoa_v1_00(value, string, radix);
}
extern _LONG_CALL_ double __rtl_ftod_v1_00(float f);
//----- rtl_ftol()
int rtl_ftol(float f)
{
@ -144,7 +137,6 @@ int rtl_ftod(float f)
return __rtl_ftod_v1_00(f);
}
extern _LONG_CALL_ float __rtl_fsub_v1_00(float a, float b);
//----- rtl_dtof()
float rtl_dtof(double d)
{
@ -163,14 +155,12 @@ float rtl_fsub(float a, float b)
return __rtl_fsub_v1_00(a, b);
}
extern _LONG_CALL_ float __rtl_fmul_v1_00(float a, float b);
//----- rtl_fmul()
float rtl_fmul(float a, float b)
{
return __rtl_fmul_v1_00(a, b);
}
extern _LONG_CALL_ float __rtl_fdiv_v1_00(float a, float b);
//----- rtl_fdiv()
float rtl_fdiv(float a, float b)
{
@ -213,7 +203,6 @@ int rtl_dcmplt(double a, double b)
return __rtl_dcmplt_v1_00(a, b);
}
extern _LONG_CALL_ int __rtl_dcmple_v1_00(double a, double b);
//----- rtl_dcmple()
int rtl_dcmple(double a, double b)
{
@ -225,13 +214,13 @@ int rtl_dcmpgt(double a, double b)
{
return __rtl_dcmpgt_v1_00(a, b);
}
extern _LONG_CALL_ int __rtl_fcmplt_v1_00(float a, float b);
//----- rtl_fcmplt()
int rtl_fcmplt(float a, float b)
{
return __rtl_fcmplt_v1_00(a, b);
}
extern _LONG_CALL_ int __rtl_fcmpgt_v1_00(float a, float b);
//----- rtl_fcmpgt()
int rtl_fcmpgt(float a, float b)
{

5
RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c
View file

@ -20,28 +20,25 @@ float rtl_sin_f32(float a);
// int __rtl_cos_f32_v1_00();
// int __rtl_sin_f32_v1_00();
extern _LONG_CALL_ float __rtl_fabsf_v1_00(float a);
//----- rtl_fabsf()
float rtl_fabsf(float a)
{
return __rtl_fabsf_v1_00(a);
}
extern _LONG_CALL_ double __rtl_fabs_v1_00(double number);
//----- rtl_fabs()
int rtl_fabs(double a)
{
return __rtl_fabs_v1_00(a);
}
extern _LONG_CALL_ float __rtl_cos_f32_v1_00(float a);
//----- rtl_cos_f32()
float rtl_cos_f32(float a)
{
return __rtl_cos_f32_v1_00(a);
}
extern _LONG_CALL_ float __rtl_sin_f32_v1_00(float a);
//----- rtl_sin_f32()
float rtl_sin_f32(float a)
{