j3d1/RTL00MP3
1
0
Fork 0
mirror of https://github.com/pvvx/RTL00MP3.git synced 2025-07-31 12:41:06 +00:00
Code Issues Projects Releases Packages Wiki Activity

delete '!!!'

Browse source
This commit is contained in:
pvvx 2017-02-28 10:40:07 +03:00
parent de57c04fb4
commit ed4c83a935
44 changed files with 206 additions and 187 deletions
Download patch file Download diff file Expand all files Collapse all files

8
RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h
View file

@ -19,16 +19,16 @@
//
#define strlen(str) prvStrLen((const u8*)str)
#define strcmp(str1, str2) prvStrCmp((const u8*)str1, (const u8*)str2)
#define sscanf(src, format...) //TODO
#define sscanf(src, format...) //TODO: Strtoul(src,0,16) / Strtoul(src,0,10)
#define strtok(str, delim) prvStrTok(str, delim)
#define strcpy(dst, src) prvStrCpy((u8 *)dst, (const u8*)src)
#define strcpy(dst, src) prvStrCpy((u8 *)dst, (const u8*)src)
#define atoi(str) prvAtoi(str)
#define strstr(str1, str2) prvStrStr(str1, str2)
#define strstr(str1, str2) prvStrStr(str1, str2)
//
// standard i/o
//
#define snprintf DiagSnPrintf
#define snprintf DiagSnPrintf
#define sprintf prvDiagSPrintf
#define printf prvDiagPrintf

20
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_irqn.h
View file

@ -26,15 +26,15 @@ typedef enum _IRQn_Type_ {
SYSTICK_IRQ = -1,
#else
/****** Cortex-M3 Processor Exceptions Numbers ********/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
#endif
/****** RTL8195A Specific Interrupt Numbers ************/
SYSTEM_ON_IRQ = 0,
@ -87,7 +87,7 @@ typedef enum _IRQn_Type_ {
PTA_TRX_IRQ = 95,// 31+64
RXI300_IRQ = 96,// 0+32 + 64
NFC_IRQ = 97// 1+32+64
NFC_IRQ = 97 // 1+32+64
} IRQn_Type, *PIRQn_Type;

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c
View file

@ -152,7 +152,7 @@ HAL_GPIO_ADAPTER PINMUX_RAM_DATA_SECTION gBoot_Gpio_Adapter;
#if !USE_SRC_ONLY_BOOT
//----- HalNMIHandler_Patch
void HalNMIHandler_Patch(void) {
DBG_8195A_HAL("RTL8195A[HAL]: %s:NMI Error!\n", "HalNMIHandler_Patch");
DBG_8195A_HAL("%s:NMI Error!\n", __func__);
if ( HAL_READ32(VENDOR_REG_BASE, 0) < 0)
HalWdgIntrHandle(); // ROM: HalWdgIntrHandle = 0x3485;
}

4
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gdma.c
View file

@ -190,7 +190,7 @@ HalGdmaChBlockSetingRtl8195a_Patch(
//4 Check 4 Bytes Alignment
if ((u32)(pLliEle) & 0x3) {
DBG_GDMA_WARN("LLi Addr: 0x%x not 4 bytes alignment!!!!\n",
DBG_GDMA_WARN("LLi Addr: 0x%x not 4 bytes alignment!\n",
pHalGdmaAdapter->pLli);
return _FALSE;
}
@ -214,7 +214,7 @@ HalGdmaChBlockSetingRtl8195a_Patch(
pLliEle = pGdmaChLli->pLliEle;
if (NULL == pLliEle) {
DBG_GDMA_ERR("pLliEle Null Point!!!!!\n");
DBG_GDMA_ERR("pLliEle Null Point!\n");
return _FALSE;
}

12
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_mii.c
View file

@ -148,7 +148,7 @@ HalMiiInitIrqRtl8195a(
if(pEthAdapter == NULL)
DBG_MII_ERR("pEthAdapter is NULL !!\n");
DBG_MII_ERR("pEthAdapter is NULL!\n");
pMiiIrqHandle->Data = (u32) pEthAdapter;
pMiiIrqHandle->IrqNum = GMAC_IRQ;
@ -169,7 +169,7 @@ HalMiiDeInitIrqRtl8195a(
if(pEthAdapter == NULL)
DBG_8195A("pEthAdapter is NULL !!\n");
DBG_8195A("pEthAdapter is NULL!\n");
/* Clear all interrupt status */
HAL_MII_WRITE32(REG_MII_ISRIMR, ISR_CLR_ALL);
@ -203,7 +203,7 @@ HalMiiInitRtl8195a(
if((!(pEthAdapter->tx_desc_num)) || (!(pEthAdapter->rx_desc_num)))
{
DBG_MII_ERR("Invalid Tx/Rx descriptor number !!\n");
DBG_MII_ERR("Invalid Tx/Rx descriptor number!\n");
return -1;
}
DBG_MII_INFO("Tx/Rx: %d/%d\n", pEthAdapter->tx_desc_num, pEthAdapter->rx_desc_num);
@ -286,7 +286,7 @@ HalMiiInitRtl8195a(
RxDesc = (PRX_DESC_FMT)(pEthAdapter->RxDescAddr);
if((TxDesc == NULL) || (RxDesc == NULL))
{
DBG_MII_ERR("Invalid Tx/Rx descriptor address !!\n");
DBG_MII_ERR("Invalid Tx/Rx descriptor address!\n");
return -1;
}
@ -327,7 +327,7 @@ HalMiiInitRtl8195a(
pRxDataBuf = pEthAdapter->pRxPktBuf;
if((pTxDataBuf == NULL) || (pRxDataBuf == NULL))
{
DBG_MII_ERR("Invalid Tx/Rx packet buffer address !!\n");
DBG_MII_ERR("Invalid Tx/Rx packet buffer address!\n");
return -1;
}
@ -407,7 +407,7 @@ HalMiiWriteDataRtl8195a(
if((Data == NULL) || (Size == 0) || (Size > MAX_FRAME_SIZE))
{
DBG_MII_ERR("Invalid parameter !!\n");
DBG_MII_ERR("Invalid parameter!\n");
return -1;
}

16
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_nfc.c
View file

@ -1230,7 +1230,7 @@ A2NWriteInQueue(
if ((pNFCAdp->A2NWQWIdx == (pNFCAdp->A2NWQRIdx - 1))||
((pNFCAdp->A2NWQRIdx == 0)&&(pNFCAdp->A2NWQWIdx == N2A_Q_LENGTH - 1))){
DBG_8195A("A2N write Mailbox Queue full !!\n");
DBG_8195A("A2N write Mailbox Queue full!\n");
}
for (Idx = 0; Idx < pA2NWData->Length; Idx++) {
@ -1696,7 +1696,7 @@ HalNFCInit(
NFCTmpSts = xTaskCreate( NFCTaskHandle, (const char *)"NFC_TASK",
((1024*4)/sizeof(portBASE_TYPE)), (void *)pNFCAdp, 1, &(pNFCAdp->NFCTask));
if (pdTRUE != NFCTmpSts ) {
DBG_NFC_ERR("HalNFCInit: Create Task Err(%d)!!\n", NFCTmpSts);
DBG_NFC_ERR("HalNFCInit: Create Task Err(%d)!\n", NFCTmpSts);
}
}
#endif
@ -1760,7 +1760,7 @@ HalNFCRead32(
}
if (Idxtemp > 0x0fffff) {
DBG_8195A("A2N_OCP_MISC_R_IN_WHILE: 0x%x\r\n", HAL_READ32(NFC_INTERFACE_BASE, 0x4));
DBG_8195A("Read FAIL!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!1\r\n");
DBG_8195A("Read FAIL!\r\n");
return 0;
}
}
@ -1799,7 +1799,7 @@ HalNFCWrite32(
}
if (Idxtemp > 0x0fffff) {
DBG_8195A("A2N_OCP_MISC_R_IN_WHILE: 0x%x\r\n", HAL_READ32(NFC_INTERFACE_BASE, 0x4));
DBG_8195A("write FAIL!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!1\r\n");
DBG_8195A("write FAIL!\r\n");
return;
}
}
@ -1914,7 +1914,7 @@ HalNFCFwDownload(
// DBG_8195A("NFC FW Download IMEM SUCCESS \n");
}
else {
DBG_8195A("NFC FW Download IMEM FAIL !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! \n");
DBG_8195A("NFC FW Download IMEM FAIL!\n");
return;
}
@ -1934,7 +1934,7 @@ HalNFCFwDownload(
//DBG_8195A("NFC FW Download DMEM SUCCESS \n");
}
else {
DBG_8195A("NFC FW Download DMEM FAIL !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! \n");
DBG_8195A("NFC FW Download DMEM FAIL!\n");
return;
}
@ -1967,7 +1967,7 @@ HalNFCDbgRead32(
}
if (Idxtemp > 0x0fffff) {
DBG_8195A("A2N_OCP_MISC_R_IN_WHILE: 0x%x\r\n", HAL_READ32(NFC_INTERFACE_BASE, 0x4));
DBG_8195A("Read FAIL!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!1\r\n");
DBG_8195A("Read FAIL!\r\n");
return 0;
}
}
@ -2007,7 +2007,7 @@ HalNFCDbgWrite32(
}
if (Idxtemp > 0x0fffff) {
DBG_8195A("A2N_OCP_MISC_R_IN_WHILE: 0x%x\r\n", HAL_READ32(NFC_INTERFACE_BASE, 0x4));
DBG_8195A("write FAIL!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!1\r\n");
DBG_8195A("write FAIL!\r\n");
return;
}
}

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_pwm.c
View file

@ -90,7 +90,7 @@ HAL_Pwm_SetDuty_8195a(
pwm_id = pPwmAdapt->pwm_id;
// Adjust the tick time to a proper value
if (period < (MIN_GTIMER_TIMEOUT*2)) {
DBG_PWM_ERR ("HAL_Pwm_SetDuty_8195a: Invalid PWM period(%d), too short!!\n", period);
DBG_PWM_ERR ("HAL_Pwm_SetDuty_8195a: Invalid PWM period(%d), too short!\n", period);
tick_time = MIN_GTIMER_TIMEOUT;
period = MIN_GTIMER_TIMEOUT*2;
}

44
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_device.c
View file

@ -318,7 +318,7 @@ BOOL SDIO_Device_Init(
// TODO: initial TX BD
pSDIODev->pTXBDAddr = RtlZmalloc((SDIO_TX_BD_NUM * sizeof(SDIO_TX_BD))+3);
if (NULL == pSDIODev->pTXBDAddr) {
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for TX_BD Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for TX_BD Err!\n");
goto SDIO_INIT_ERR;
}
pSDIODev->pTXBDAddrAligned = (PSDIO_TX_BD)(((((u32)pSDIODev->pTXBDAddr - 1) >> 2) + 1) << 2); // Make it 4-bytes aligned
@ -347,7 +347,7 @@ BOOL SDIO_Device_Init(
pSDIODev->pTXBDHdl = (PSDIO_TX_BD_HANDLE)RtlZmalloc(SDIO_TX_BD_NUM * sizeof(SDIO_TX_BD_HANDLE));
if (NULL == pSDIODev->pTXBDHdl) {
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for TX_BD Handle Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for TX_BD Handle Err!\n");
goto SDIO_INIT_ERR;
}
@ -363,7 +363,7 @@ BOOL SDIO_Device_Init(
if(pTxBdHdl->skb)
pTxBdHdl->pTXBD->Address = (u32)pTxBdHdl->skb->tail;
else
DBG_SDIO_ERR("SDIO_Device_Init: rltk_wlan_alloc_skb (%d) failed!!\n", SDIO_TX_BD_BUF_USIZE*SDIO_TX_BUF_SZ_UNIT);
DBG_SDIO_ERR("SDIO_Device_Init: rltk_wlan_alloc_skb (%d) failed!\n", SDIO_TX_BD_BUF_USIZE*SDIO_TX_BUF_SZ_UNIT);
#else
pTxBdHdl->pTXBD->Address = (u32)(&inic_TX_Buf[i][0]);
#endif
@ -404,7 +404,7 @@ BOOL SDIO_Device_Init(
/* Allocate memory for TX Packets handler */
pSDIODev->pTxPktHandler = (SDIO_TX_PACKET *)(RtlZmalloc(sizeof(SDIO_TX_PACKET)*SDIO_TX_PKT_NUM));
if (NULL == pSDIODev->pTxPktHandler) {
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for TX PKT Handler Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for TX PKT Handler Err!\n");
goto SDIO_INIT_ERR;
}
/* Add all TX packet handler into the Free Queue(list) */
@ -417,7 +417,7 @@ BOOL SDIO_Device_Init(
/* Init RX BD and RX Buffer */
pSDIODev->pRXBDAddr = RtlZmalloc((SDIO_RX_BD_NUM * sizeof(SDIO_RX_BD))+7);
if (NULL == pSDIODev->pRXBDAddr) {
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for RX_BD Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for RX_BD Err!\n");
goto SDIO_INIT_ERR;
}
pSDIODev->pRXBDAddrAligned = (PSDIO_RX_BD)(((((u32)pSDIODev->pRXBDAddr - 1) >> 3) + 1) << 3); // Make it 8-bytes aligned
@ -430,7 +430,7 @@ BOOL SDIO_Device_Init(
pSDIODev->pRXBDHdl = (PSDIO_RX_BD_HANDLE)RtlZmalloc(SDIO_RX_BD_NUM * sizeof(SDIO_RX_BD_HANDLE));
if (NULL == pSDIODev->pRXBDHdl) {
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for RX_BD Handle Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for RX_BD Handle Err!\n");
goto SDIO_INIT_ERR;
}
@ -447,7 +447,7 @@ BOOL SDIO_Device_Init(
/* Allocate memory for RX Packets handler */
pSDIODev->pRxPktHandler = (SDIO_RX_PACKET *)(RtlZmalloc(sizeof(SDIO_RX_PACKET)*SDIO_RX_PKT_NUM));
if (NULL == pSDIODev->pRxPktHandler) {
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for RX PKT Handler Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init: Malloc for RX PKT Handler Err!\n");
goto SDIO_INIT_ERR;
}
/* Add all RX packet handler into the Free Queue(list) */
@ -467,20 +467,20 @@ BOOL SDIO_Device_Init(
#if !TASK_SCHEDULER_DISABLED
RtlInitSema(&(pSDIODev->TxSema), 0);
if (NULL == pSDIODev->TxSema){
DBG_SDIO_ERR("SDIO_Device_Init Create Semaphore Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init Create Semaphore Err!\n");
goto SDIO_INIT_ERR;
}
RtlInitSema(&(pSDIODev->RxSema), 0);
if (NULL == pSDIODev->RxSema){
DBG_SDIO_ERR("SDIO_Device_Init Create RX Semaphore Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init Create RX Semaphore Err!\n");
goto SDIO_INIT_ERR;
}
/* create a Mailbox for other driver module to send message to SDIO driver */
pSDIODev->pMBox = RtlMailboxCreate(MBOX_ID_SDIO, SDIO_MAILBOX_SIZE, &(pSDIODev->RxSema));
if (NULL == pSDIODev->pMBox) {
DBG_SDIO_ERR("SDIO_Device_Init Create Mailbox Err!!\n");
DBG_SDIO_ERR("SDIO_Device_Init Create Mailbox Err!\n");
goto SDIO_INIT_ERR;
}
#if SDIO_MP_MODE
@ -491,14 +491,14 @@ BOOL SDIO_Device_Init(
ret = xTaskCreate( SDIO_TxTask, "SDIO_TX_TASK", ((1024*2)/sizeof(portBASE_TYPE)), (void *)pSDIODev, SDIO_TASK_PRIORITY + PRIORITIE_OFFSET, &pSDIODev->xSDIOTxTaskHandle);
if (pdTRUE != ret )
{
DBG_SDIO_ERR("SDIO_Device_Init: Create Task Err(%d)!!\n", ret);
DBG_SDIO_ERR("SDIO_Device_Init: Create Task Err(%d)!\n", ret);
goto SDIO_INIT_ERR;
}
ret = xTaskCreate( SDIO_RxTask, "SDIO_RX_TASK", ((1024*1)/sizeof(portBASE_TYPE)), (void *)pSDIODev, SDIO_TASK_PRIORITY + PRIORITIE_OFFSET, &pSDIODev->xSDIORxTaskHandle);
if (pdTRUE != ret )
{
DBG_SDIO_ERR("SDIO_Device_Init: Create RX Task Err(%d)!!\n", ret);
DBG_SDIO_ERR("SDIO_Device_Init: Create RX Task Err(%d)!\n", ret);
goto SDIO_INIT_ERR;
}
@ -1355,7 +1355,7 @@ VOID SDIO_TX_FIFO_DataReady(
TxBDWPtr = HAL_SDIO_READ16(REG_SPDIO_TXBD_WPTR);
if (TxBDWPtr == pSDIODev->TXBDRPtr) {
if ((pSDIODev->IntStatus & BIT_TXFIFO_H2C_OVF) == 0) {
DBG_SDIO_WARN("SDIO TX Data Read False Triggered!!, TXBDWPtr=0x%x\n", TxBDWPtr);
DBG_SDIO_WARN("SDIO TX Data Read False Triggered!, TXBDWPtr=0x%x\n", TxBDWPtr);
return;
}
else {
@ -1518,7 +1518,7 @@ PSDIO_RX_PACKET SDIO_Alloc_Rx_Pkt(
RtlMsleepOS(10);
loop_cnt++;
if (loop_cnt > 100) {
DBG_SDIO_ERR("SDIO_Alloc_Rx_Pkt: Err!! Allocate RX PKT Failed!!\n");
DBG_SDIO_ERR("SDIO_Alloc_Rx_Pkt: Err! Allocate RX PKT Failed!\n");
break;
}
}
@ -1741,14 +1741,14 @@ u8 SDIO_Send_C2H_PktMsg(
MsgBuf = RtlZmalloc(MsgLen);
if (NULL == MsgBuf) {
DBG_SDIO_ERR("SDIO_Send_C2H_PktMsg: Malloc Err!!\n");
DBG_SDIO_ERR("SDIO_Send_C2H_PktMsg: Malloc Err!\n");
return FAIL;
}
_memcpy((void *)(MsgBuf), (void *)C2HMsg, MsgLen);
pPkt = SDIO_Alloc_Rx_Pkt(pSDIODev);
if (pPkt == NULL) {
DBG_SDIO_ERR("RX Callback Err!! No Free RX PKT!\n");
DBG_SDIO_ERR("RX Callback Err! No Free RX PKT!\n");
return FAIL;
}
pRxDesc = &pPkt->RxDesc;
@ -2244,7 +2244,7 @@ s8 SDIO_Rx_Callback(
pPkt = SDIO_Alloc_Rx_Pkt(pSDIODev);
if (pPkt == NULL) {
DBG_SDIO_ERR("RX Callback Err!! No Free RX PKT!\n");
DBG_SDIO_ERR("RX Callback Err! No Free RX PKT!\n");
return FAIL;
}
pRxDesc = &pPkt->RxDesc;
@ -2877,7 +2877,7 @@ VOID SDIO_DeviceMPApp(
case SDIO_MP_LOOPBACK:
DBG_SDIO_INFO("MP_App: argv[1]=%s\n", argv[1]);
if (pSDIODev->MP_ModeEn == 0) {
DiagPrintf("Not in MP mode!! Please start MP mode first.\n");
DiagPrintf("Not in MP mode! Please start MP mode first.\n");
break;
}
arg1 = Strtoul((const u8*)(argv[1]), (u8 **)NULL, 10);
@ -2887,14 +2887,14 @@ VOID SDIO_DeviceMPApp(
#if !TASK_SCHEDULER_DISABLED
RtlInitSema(&(pSDIODev->MP_EventSema), 0);
if (NULL == pSDIODev->MP_EventSema){
DBG_SDIO_ERR("SDIO MP_Loopback Create Semaphore Err!!\n");
DBG_SDIO_ERR("SDIO MP_Loopback Create Semaphore Err!\n");
break; // break the switch case
}
/* create a Mailbox for other driver module to send message to SDIO driver */
pSDIODev->pMP_MBox = RtlMailboxCreate(MBOX_ID_SDIO_MP, SDIO_MAILBOX_SIZE, &(pSDIODev->MP_EventSema));
if (NULL == pSDIODev->pMBox) {
DBG_SDIO_ERR("SDIO MP_Loopback Create Mailbox Err!!\n");
DBG_SDIO_ERR("SDIO MP_Loopback Create Mailbox Err!\n");
break; // break the switch case
}
@ -2903,7 +2903,7 @@ VOID SDIO_DeviceMPApp(
ret = xTaskCreate( SDIO_MP_Task, "SDIO_MP_TASK", ((256*4)/sizeof(portBASE_TYPE)), (void *)pSDIODev, SDIO_MP_TASK_PRIORITY, &pSDIODev->MP_TaskHandle);
if (pdTRUE != ret )
{
DBG_SDIO_ERR("SDIO MP Create Task Err(%d)!!\n", ret);
DBG_SDIO_ERR("SDIO MP Create Task Err(%d)!\n", ret);
break;
}
#endif
@ -3101,7 +3101,7 @@ VOID SDIO_DeviceMPApp(
pSDIODev->pMP_CRxBuf = RtlMalloc(pSDIODev->MP_CRxSize+26); // 26: Wlan header
DiagPrintf("SDIO RX Test: pBuf @ 0x%x\n", (u32)pSDIODev->pMP_CRxBuf);
if (((u32)(pSDIODev->pMP_CRxBuf) & 0x03) != 0) {
DiagPrintf("SDIO RX Test: pBuf Not 4-bytes Aligned!!\n");
DiagPrintf("SDIO RX Test: pBuf Not 4-bytes Aligned!\n");
}
#if SDIO_DEBUG
pSDIODev->MemAllocCnt++;

80
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_host.c
View file

@ -179,7 +179,7 @@ HAL_Status SdioHostSdClkCtrl(void *Data, int En, int Divisor) { // SD_CLK_DIVISO
}
}
DBG_SDIO_ERR("Unsupported SDCLK divisor !!\n");
DBG_SDIO_ERR("Unsupported SDCLK divisor!\n");
return 0;
}
return result;
@ -365,7 +365,7 @@ HAL_Status HalSdioHostInitHostRtl8195a(IN VOID *Data) {
int x = 1000;
while (HAL_SDIO_HOST_READ8(REG_SDIO_HOST_SW_RESET) & 1) {
if (x-- == 0) {
DBG_SDIO_ERR("SD host initialization FAIL !!\n");
DBG_SDIO_ERR("SD host initialization FAIL!\n");
return HAL_TIMEOUT;
}
}
@ -380,7 +380,7 @@ HAL_Status HalSdioHostInitHostRtl8195a(IN VOID *Data) {
while (!(HAL_SDIO_HOST_READ16(REG_SDIO_HOST_CLK_CTRL)
& CLK_CTRL_INTERAL_CLK_STABLE)) {
if (x-- == 0) {
DBG_SDIO_ERR("SD host initialization FAIL !!\n");
DBG_SDIO_ERR("SD host initialization FAIL!\n");
return HAL_TIMEOUT;
}
}
@ -457,7 +457,7 @@ signed int SdioHostErrIntRecovery(void *Data, int a2, signed int a3) {
goto LABEL_14;
}
if (v5 == 1000) {
DBG_SDIO_ERR("CMD line reset timeout !!\n");
DBG_SDIO_ERR("CMD line reset timeout!\n");
return 2;
}
}
@ -474,7 +474,7 @@ signed int SdioHostErrIntRecovery(void *Data, int a2, signed int a3) {
goto LABEL_22;
}
if (v8 == 1000) {
DBG_SDIO_ERR("DAT line reset timeout !!\n");
DBG_SDIO_ERR("DAT line reset timeout!\n");
return 2;
}
}
@ -494,13 +494,13 @@ signed int SdioHostErrIntRecovery(void *Data, int a2, signed int a3) {
if (v9 == 1000)
return 2;
LABEL_30: if (v40058032 << 28) {
DBG_SDIO_ERR("Non-recoverable error(1) !!\n");
DBG_SDIO_ERR("Non-recoverable error(1)!\n");
LABEL_33: DiagPrintf(v10);
goto LABEL_34;
}
} else {
if (v40058032 & 0x10) {
DBG_SDIO_ERR("Non-recoverable error(2) !!\n");
DBG_SDIO_ERR("Non-recoverable error(2)!\n");
goto LABEL_34;
}
HalDelayUs(50);
@ -509,7 +509,7 @@ signed int SdioHostErrIntRecovery(void *Data, int a2, signed int a3) {
result = 16;
goto LABEL_44;
}
DBG_SDIO_ERR("Non-recoverable error(3) !!\n");
DBG_SDIO_ERR("Non-recoverable error(3)!\n");
goto LABEL_34;
}
@ -517,7 +517,7 @@ signed int SdioHostErrIntRecovery(void *Data, int a2, signed int a3) {
LABEL_44: v4005803A = 127;
return result;
DBG_SDIO_ERR("Stop transmission error !!\n");
DBG_SDIO_ERR("Stop transmission error!\n");
return 238;
}
// 23D4: using guessed type int DiagPrintf(const char *, ...);
@ -627,7 +627,7 @@ int SdioHostCardSelection(void *Data, int Select, int a3) {
*(u8 *) &Cmd.CmdFmt & 3), v3[24] == 7)) {
result = v9;
} else {
DBG_SDIO_ERR("Command index error !!\n");
DBG_SDIO_ERR("Command index error!\n");
result = 238;
}
}
@ -906,7 +906,7 @@ IN u32 BlockCnt) {
*(u8 *) &Cmd.CmdFmt & 3);
if (*(u32 *) (pSdioHostAdapter + 20) & 0x4000000) {
LABEL_14:
DBG_SDIO_ERR("Write protect violation !!\n");
DBG_SDIO_ERR("Write protect violation!\n");
return HAL_ERR_PARA;
}
result = SdioHostChkXferComplete((void *) pSdioHostAdapter, 0x1388u,
@ -1073,7 +1073,7 @@ HAL_Status HalSdioHostGetCardStatusRtl8195a(IN VOID *Data) {
*((u8 *) v3 + 131) = (v8 >> 9) & 0xF;
return v7;
}
DBG_SDIO_ERR("Command index error !!\n");
DBG_SDIO_ERR("Command index error!\n");
return 238;
}
// 23D4: using guessed type int DiagPrintf(const char *, ...);
@ -1152,7 +1152,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
};
v7 = v4;
if (v4) {
DBG_SDIO_ERR("Reset sd card fail !!\n");
DBG_SDIO_ERR("Reset sd card fail!\n");
goto LABEL_104;
};
goto LABEL_115;
@ -1171,7 +1171,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
SdioHostGetResponse(v3, (u8) v52 & 3);
if (v3[24] != 8) {
if (ConfigDebugErr & 0x400) {
v11 = "\r[SDIO Err]Command index error !!\n"
v11 = "\r[SDIO Err]Command index error!\n"
); // DBG_SDIO_ERR("
LABEL_18: DiagPrintf(v11);
goto LABEL_21;
@ -1191,7 +1191,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
}
LABEL_21: v7 = 238;
LABEL_22: if (ConfigDebugErr & 0x400) {
v8 = "\r[SDIO Err]Voltage check fail !!\n";
v8 = "\r[SDIO Err]Voltage check fail!\n";
goto LABEL_104;
}
goto LABEL_115;
@ -1213,7 +1213,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
if (v3[24] != 55) {
if (ConfigDebugErr & 0x400) // DBG_SDIO_ERR("
{
v17 = "\r[SDIO Err]Command index error !!\n";
v17 = "\r[SDIO Err]Command index error!\n";
LABEL_32: DiagPrintf(v17);
goto LABEL_57;
}
@ -1237,7 +1237,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
if (!v13)
goto LABEL_64;
LABEL_60: if (ConfigDebugErr & 0x400) {
v8 = "\r[SDIO Err]Get OCR fail !!\n";
v8 = "\r[SDIO Err]Get OCR fail!\n";
goto LABEL_104;
}
goto LABEL_115;
@ -1264,7 +1264,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
v25 = SdioHostGetResponse(v3, (u8) v52 & 3);
if (v3[24] != 55) {
if (ConfigDebugErr & 0x400) {
v26 = "\r[SDIO Err]Command index error !!\n";
v26 = "\r[SDIO Err]Command index error!\n";
LABEL_46: DiagPrintf(v26);
goto LABEL_62;
}
@ -1322,7 +1322,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
if (!v31)
goto LABEL_70;
if (ConfigDebugErr & 0x400) {
v8 = "\r[SDIO Err]Get CID fail !!\n";
v8 = "\r[SDIO Err]Get CID fail!\n";
goto LABEL_104;
}
goto LABEL_115;
@ -1341,10 +1341,10 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
SdioHostGetResponse(v3, (u8) v52 & 3);
if (v3[24] != 3) {
if (ConfigDebugErr & 0x400)
DiagPrintf("\r[SDIO Err]Command index error !!\n");
DiagPrintf("\r[SDIO Err]Command index error!\n");
v7 = 238;
LABEL_79: if (ConfigDebugErr & 0x400) {
v8 = "\r[SDIO Err]Get RCA fail !!\n";
v8 = "\r[SDIO Err]Get RCA fail!\n";
goto LABEL_104;
}
goto LABEL_115;
@ -1356,7 +1356,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
if (v39) {
v40 = ConfigDebugErr << 21;
if (ConfigDebugErr & 0x400) {
v41 = "\r[SDIO Err]Get CSD fail !!\n";
v41 = "\r[SDIO Err]Get CSD fail!\n";
goto LABEL_108;
}
LABEL_113: v7 = v39;
@ -1366,7 +1366,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
if (v39) {
if (!(ConfigDebugErr & 0x400))
goto LABEL_113;
v41 = "\r[SDIO Err]Select sd card fail !!\n";
v41 = "\r[SDIO Err]Select sd card fail!\n";
LABEL_108: DiagPrintf(v41, v40);
goto LABEL_113;
}
@ -1406,12 +1406,12 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
v40 = ConfigDebugErr << 21;
if (!(ConfigDebugErr & 0x400))
goto LABEL_113;
v41 = "\r[SDIO Err]Get sd card current state fail !!\n";
v41 = "\r[SDIO Err]Get sd card current state fail!\n";
goto LABEL_108;
}
if (v3[131] != 4) {
DBG_SDIO_ERR(
"The card isn't in TRANSFER state !! (Current state: %d)\n",
"The card isn't in TRANSFER state! (Current state: %d)\n",
v3[131], ConfigDebugErr << 21);
v7 = 238;
goto LABEL_115;
@ -1424,16 +1424,16 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
goto LABEL_105;
}
LABEL_90: if (ConfigDebugErr & 0x400) {
v48 = "\r[SDIO Err]Command index error !!\n";
v48 = "\r[SDIO Err]Command index error!\n";
goto LABEL_95;
}
LABEL_96: v7 = 238;
LABEL_102: if (ConfigDebugErr & 0x400) {
v8 = "\r[SDIO Err]Set bus width fail !!\n";
v8 = "\r[SDIO Err]Set bus width fail!\n";
LABEL_104: DiagPrintf(v8);
}
LABEL_115:
DBG_SDIO_ERR("SD card initialization FAIL !!\n");
DBG_SDIO_ERR("SD card initialization FAIL!\n");
}
return v7;
}
@ -1490,7 +1490,7 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
SdioHostGetResponse(v4, *(u8 *) &Cmd.CmdFmt & 3);
if (v4[24] != 55) {
if (ConfigDebugErr & 0x400) {
v10 = "\r[SDIO Err]Command index error !!\n";
v10 = "\r[SDIO Err]Command index error!\n";
LABEL_20: DiagPrintf(v10);
return 238;
}
@ -1585,7 +1585,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
else if (Frequency == SD_CLK_20_8MHZ) // SD_CLK_20_8MHZ
v20 = BASE_CLK_DIVIDED_BY_2;
else if (Frequency != SD_CLK_5_2MHZ) { // SD_CLK_5_2MHZ
DBG_SDIO_ERR("Unsupported SDCLK frequency !!\n");
DBG_SDIO_ERR("Unsupported SDCLK frequency!\n");
v3 = 3;
goto LABEL_60;
}
@ -1596,7 +1596,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
return 0;
LABEL_60: if (!(ConfigDebugErr & 0x400)) {
return v3;
v19 = "\r[SDIO Err]Host changes clock fail !!\n"; // DBG_SDIO_ERR("
v19 = "\r[SDIO Err]Host changes clock fail!\n"; // DBG_SDIO_ERR("
goto LABEL_62;
}
v4 = *((u32 *) Data + 4);
@ -1627,7 +1627,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
if (v2[24] != 55) {
if (!(ConfigDebugErr & 0x400))
return 238;
v10 = "\r[SDIO Err]Command index error !!\n";
v10 = "\r[SDIO Err]Command index error!\n";
LABEL_15: DiagPrintf(v10);
return 238;
}
@ -1678,7 +1678,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
if ((StatusData[16] & 0xF) != 1) {
if (!(ConfigDebugErr & 0x400))
return 238;
v10 = "\r[SDIO Err]\"High-Speed\" can't be switched !!\n";
v10 = "\r[SDIO Err]\"High-Speed\" can't be switched!\n";
goto LABEL_15;
}
v18 = SdioHostSwitchFunction(v2, 1, 1, (int) StatusData,
@ -1688,14 +1688,14 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
if ((StatusData[16] & 0xF) != 1) {
if (!(ConfigDebugErr & 0x400))
return 238;
v10 = "\r[SDIO Err]Card changes to High-Speed fail !!\n";
v10 = "\r[SDIO Err]Card changes to High-Speed fail!\n";
goto LABEL_15;
}
v3 = SdioHostSdClkCtrl(v2, 1, v18);
if (v3) {
if (!(ConfigDebugErr & 0x400))
return v3;
v19 = "\r[SDIO Err]Host changes to High-Speed fail !!\n";
v19 = "\r[SDIO Err]Host changes to High-Speed fail!\n";
LABEL_62: DiagPrintf(v19);
return v3;
}
@ -1773,7 +1773,7 @@ IN u64 EndAddr) {
v12 = SdioHostGetResponse((void *) v5, *(u8 *) &v16.CmdFmt & 3);
if (*(u8 *) (v5 + 24) != 33) {
LABEL_20:
DBG_SDIO_ERR("Command index error !!\n");
DBG_SDIO_ERR("Command index error!\n");
result = 238;
} else {
result = SdioHostChkCmdInhibitCMD(v12);
@ -1818,7 +1818,7 @@ HAL_Status HalSdioHostGetWriteProtectRtl8195a(IN VOID *Data) {
if (v6) {
if (!(ConfigDebugErr & 0x400))
return v6;
v9 = "\r[SDIO Err]Get card status fail !!\n";
v9 = "\r[SDIO Err]Get card status fail!\n";
LABEL_16: DiagPrintf(v9);
return v6;
}
@ -1830,7 +1830,7 @@ HAL_Status HalSdioHostGetWriteProtectRtl8195a(IN VOID *Data) {
}
if (!(ConfigDebugErr & 0x400))
return v6;
v9 = "\r[SDIO Err]Get CSD fail !!\n";
v9 = "\r[SDIO Err]Get CSD fail!\n";
goto LABEL_16;
}
if (*((u8 *) v3 + 131) == 4 || *((u8 *) v3 + 131) == 5) {
@ -1840,7 +1840,7 @@ HAL_Status HalSdioHostGetWriteProtectRtl8195a(IN VOID *Data) {
goto LABEL_10;
}
if (ConfigDebugErr & 0x400)
DiagPrintf("\r[SDIO Err]Wrong card state !!\n", ConfigDebugErr << 21);
DiagPrintf("\r[SDIO Err]Wrong card state!\n", ConfigDebugErr << 21);
return 238;
}
// 23D4: using guessed type int DiagPrintf(const char *, ...);
@ -1917,7 +1917,7 @@ HAL_Status HalSdioHostSetWriteProtectRtl8195a(IN VOID *Data, IN u8 Setting) {
if (!result) {
SdioHostGetResponse(v3, v16 & 3);
if (*((u32 *) v3 + 5) & 0x4000000) {
DBG_SDIO_ERR("Write protect violation !!\n",
DBG_SDIO_ERR("Write protect violation!\n",
ConfigDebugErr << 21);
return 3;
}

40
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_32k.c
View file

@ -19,9 +19,9 @@ En32KCalibration(
{
u32 Rtemp;
u32 Ttemp = 0;
//DiagPrintf("32K clock source calibration\n");
#if CONFIG_DEBUG_LOG > 5
DiagPrintf("32K clock source calibration\n");
#endif
//set parameter
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 1 = 0x1500
@ -57,16 +57,20 @@ En32KCalibration(
Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL1);
if ((Rtemp & 0x3000) != 0x0){
//DiagPrintf("32.768 Calibration Success\n", Ttemp);
#if CONFIG_DEBUG_LOG > 5
DiagPrintf("32.768 Calibration Success\n", Ttemp);
#endif
break;
}
else {
Ttemp++;
HalDelayUs(30);
//DiagPrintf("Check lock: %d\n", Ttemp);
//DiagPrintf("0x278: %x\n", Rtemp);
#if CONFIG_DEBUG_LOG > 5
DiagPrintf("Check lock: %d\n", Ttemp);
DiagPrintf("0x278: %x\n", Rtemp);
#endif
if (Ttemp > 100000) { /*Delay 100ms*/
DiagPrintf("32K Calibration Fail!!\n", Ttemp);
DiagPrintf("32K Calibration Fail!\n", Ttemp);
break;
}
}
@ -78,6 +82,10 @@ WDG_ADAPTER WDGAdapter;
extern HAL_TIMER_OP HalTimerOp;
#ifdef CONFIG_WDG_NORMAL
/*
* pvvx: if WDT RESET_MODE:
* HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & 0x1FFFFF);
*/
VOID
WDGInitial(
IN u32 Period
@ -93,8 +101,9 @@ WDGInitial(
u32 PeriodTemp = 0;
u32 *Reg = (u32*)&(WDGAdapter.Ctrl);
DBG_8195A(" Period = 0x%08x\n", Period);
#if CONFIG_DEBUG_LOG > 1
DBG_8195A("WdgPeriod = %d ms\n", Period);
#endif
for (CountId = 0; CountId < 12; CountId++) {
CountTemp = ((0x00000001 << (CountId+1))-1);
DivFactor = (u16)((PeriodProcess)/(CountTemp*3));
@ -111,18 +120,20 @@ WDGInitial(
}
}
DBG_8195A("WdgScalar = 0x%08x\n", DivFacProcess);
DBG_8195A("WdgCunLimit = 0x%08x\n", CountProcess);
#if CONFIG_DEBUG_LOG > 4
DBG_8195A("WdgScalar = %p\n", DivFacProcess);
DBG_8195A("WdgCunLimit = %p\n", CountProcess);
#endif
WDGAdapter.Ctrl.WdgScalar = DivFacProcess;
WDGAdapter.Ctrl.WdgEnByte = 0;
WDGAdapter.Ctrl.WdgClear = 1;
WDGAdapter.Ctrl.WdgCunLimit = CountProcess;
WDGAdapter.Ctrl.WdgMode = RESET_MODE;
WDGAdapter.Ctrl.WdgToISR = 0;
#if CONFIG_DEBUG_LOG > 4
DBG_8195A("WdgCtrl = %p\n", (u32)(*Reg));
#endif
HAL_WRITE32(VENDOR_REG_BASE, 0, (*Reg));
}
VOID
@ -160,6 +171,7 @@ WDGIrqInitial(
InterruptRegister(&(WDGAdapter.IrqHandle));
InterruptEn(&(WDGAdapter.IrqHandle));
WDGAdapter.Ctrl.WdgToISR = 1; // clear ISR first
WDGAdapter.Ctrl.WdgMode = INT_MODE;
HAL_WRITE32(VENDOR_REG_BASE, 0, ((*Temp)));

6
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_i2c.c
View file

@ -358,7 +358,7 @@ I2CISRHandle_Patch(
if (pHalI2COP->HalI2CReadReg(pHalI2CInitDat,REG_DW_I2C_IC_INTR_STAT) &
BIT_CTRL_IC_INTR_STAT_R_TX_ABRT(1)) {
I2CStsTmp = pHalI2COP->HalI2CReadReg(pHalI2CInitDat,REG_DW_I2C_IC_TX_ABRT_SOURCE);
DBG_I2C_ERR("!!!I2C%d INTR_TX_ABRT!!!\n",I2CIrqIdx);
DBG_I2C_ERR("!I2C%d INTR_TX_ABRT!\n",I2CIrqIdx);
DBG_I2C_ERR("I2C%d IC_TX_ABRT_SOURCE[%2x]: %x\n", I2CIrqIdx, REG_DW_I2C_IC_TX_ABRT_SOURCE, I2CStsTmp);
DBG_I2C_ERR("Dev Sts:%x\n",pSalI2CHND->DevSts);
DBG_I2C_ERR("rx len:%x\n",pSalI2CHND->pRXBuf->DataLen);
@ -579,7 +579,7 @@ I2CISRHandle_Patch(
if (pHalI2COP->HalI2CReadReg(pHalI2CInitDat,REG_DW_I2C_IC_INTR_STAT) &
BIT_CTRL_IC_INTR_STAT_R_TX_OVER(1)) {
DBG_I2C_ERR("!!!I2C%d INTR_TX_OVER!!!\n",I2CIrqIdx);
DBG_I2C_ERR("!I2C%d INTR_TX_OVER!\n",I2CIrqIdx);
/* Clear I2C interrupt */
pHalI2CInitDat->I2CIntrClr = REG_DW_I2C_IC_CLR_TX_OVER;
@ -778,7 +778,7 @@ I2CISRHandle_Patch(
if (pHalI2COP->HalI2CReadReg(pHalI2CInitDat,REG_DW_I2C_IC_INTR_STAT) &
BIT_CTRL_IC_INTR_STAT_R_RX_UNDER(1)) {
DBG_I2C_ERR("!!!I2C%d INTR_RX_UNDER!!!\n",I2CIrqIdx);
DBG_I2C_ERR("!I2C%d INTR_RX_UNDER!\n",I2CIrqIdx);
pHalI2CInitDat->I2CIntrClr = REG_DW_I2C_IC_CLR_RX_UNDER;
pHalI2COP->HalI2CClrIntr(pHalI2CInitDat);

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
View file

@ -310,7 +310,7 @@ SdrTestApp(
//1 "SdrControllerInit" is located in Image1, so we shouldn't call it in Image2
if (!SdrControllerInit()) {
DBG_8195A("SDR Calibartion Fail!!!!\n");
DBG_8195A("SDR Calibartion Fail!\n");
}
break;
case 2:

6
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
View file

@ -8,6 +8,7 @@
*/
#include "rtl8195a.h"
#include "hal_soc_ps_monitor.h"
#include "rtl_consol.h"
#include "PinNames.h"
#include "gpio_api.h"
@ -135,6 +136,8 @@ PatchHalLogUartInit(
return 0;
}
//_LONG_CALL_ extern VOID UartLogIrqHandle(VOID * Data); // in ROM
extern void UartLogIrqHandleRam(void * data);
VOID
PSHalInitPlatformLogUart(
VOID
@ -443,7 +446,7 @@ CLKCal(
RRTemp = (((2133/Rtemp) >> x) - 1);
}
if ( x == 5 )
DiagPrintf("Using ana to cal is not allowed!!\n");
DiagPrintf("Using ana to cal is not allowed!\n");
return RRTemp;
}
@ -1902,7 +1905,6 @@ DeepSleep(
}
}
VOID
DSleep_GPIO(
VOID

4
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c
View file

@ -369,7 +369,7 @@ SpicFlashInitRtl8195A(
#endif
break;
default:
DBG_8195A("No Support SPI Mode!!!!!!!!\n");
DBG_8195A("No Support SPI Mode!\n");
break;
}
@ -1455,7 +1455,7 @@ SpicNVMCalStore(u8 BitMode, u8 CpuClk)
}
else {
// There is a parameter on the flash memory already
DBG_SPIF_ERR("SpicNVMCalStore: The flash memory(@0x%x = 0x%x) is not able to be write, Erase it first!!\r\n",
DBG_SPIF_ERR("SpicNVMCalStore: The flash memory(@0x%x = 0x%x) is not able to be write, Erase it first!\r\n",
(FLASH_SPIC_PARA_BASE+flash_offset), spci_para);
}
}