This commit is contained in:
pvvx 2017-02-26 03:15:02 +03:00
parent 5615d7ab9c
commit e851661fa4
71 changed files with 2326 additions and 11244 deletions

View file

@ -121,7 +121,7 @@ static enum mad_flow input(struct mad_stream *stream) {
// We both silence the output as well as wait a while by pushing silent samples into the i2s system.
// This waits for about 200mS
#if DEBUG_MAIN_LEVEL > 1
DBG_8195A("FIFO: Buffer Underrun\n");
// DBG_8195A("FIFO: Buffer Underrun\n");
#endif
for (n = 0; n < 441*2; n++) sampToOut(0);
} else {
@ -491,33 +491,39 @@ void connect_start(void) {
*/
void main(void) {
#if DEBUG_MAIN_LEVEL > 2
#if DEBUG_MAIN_LEVEL > 3
ConfigDebugErr = -1;
ConfigDebugInfo = -1;
ConfigDebugInfo = -1; //~_DBG_SPI_FLASH_;
ConfigDebugWarn = -1;
CfgSysDebugErr = -1;
CfgSysDebugInfo = -1;
CfgSysDebugWarn = -1;
#endif
/*
if ( rtl_cryptoEngine_init() != 0 ) DBG_8195A("crypto engine init failed\r\n");
*/
#if defined(CONFIG_CPU_CLK)
#if 1 // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) & (~(1<<17)));
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
#else // 0 - 200000000 Hz, 1 - 10000000 Hz, 2 - 50000000 Hz, 3 - 25000000 Hz, 4 - 12500000 Hz, 5 - 4000000 Hz
HalCpuClkConfig(1);
HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) | (1<<17));
if(HalGetCpuClk() != PLATFORM_CLOCK) {
#if CPU_CLOCK_SEL_DIV5_3
// 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
*((int *)0x40000074) |= (1<<17); // REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3
#else
// 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
*((int *)0x40000074) &= ~(1<<17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
#endif
HAL_LOG_UART_ADAPTER pUartAdapter;
pUartAdapter.BaudRate = RUART_BAUD_RATE_38400;
pUartAdapter.BaudRate = UART_BAUD_RATE_38400;
HalLogUartSetBaudRate(&pUartAdapter);
SystemCoreClockUpdate();
En32KCalibration();
}
#if defined(CONFIG_CRYPTO_STARTUP) && (CONFIG_CRYPTO_STARTUP)
if ( rtl_cryptoEngine_init() != 0 ) {
DBG_8195A("crypto engine init failed\r\n");
}
#endif
#if DEBUG_MAIN_LEVEL > 1
DBG_INFO_MSG_ON(_DBG_TCM_HEAP_); // On Debug TCM MEM
#endif
#if DEBUG_MAIN_LEVEL > 0
vPortFree(pvPortMalloc(4)); // Init RAM heap
vPortFree(pvPortMalloc(4)); // Init RAM heap
fATST(NULL); // RAM/TCM/Heaps info
#endif
/* pre-processor of application example */