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add & fix

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pvvx 2017-02-18 03:27:23 +03:00
parent a75e59b360
commit d60fd166b1
19 changed files with 287 additions and 170 deletions
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30
project/src/user/atcmd_user.c
View file

@ -108,30 +108,12 @@ void fATW2(void *arg){
// Test
void fATST(void *arg){
extern u8 __HeapLimit, __StackTop;
extern struct Heap g_tcm_heap;
//DBG_INFO_MSG_ON(_DBG_TCM_HEAP_); // On Debug TCM MEM
#if DEBUG_AT_USER_LEVEL > 1
printf("ATST: Mem info:\n");
#endif
// vPortFree(pvPortMalloc(4)); // Init RAM heap
printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nRAM free\t%d bytes\nTCM heap\t%d bytes\n",
HalGetCpuClk(), xPortGetFreeHeapSize(), (int)&__StackTop - (int)&__HeapLimit, tcm_heap_freeSpace());
printf("TCM ps_monitor\t%d bytes\n", 0x20000000 - (u32)&tcm_heap - tcm_heap_size);
dump_mem_block_list();
u32 saved = ConfigDebugInfo;
DBG_INFO_MSG_ON(_DBG_TCM_HEAP_); // On Debug TCM MEM
tcm_heap_dump();
ConfigDebugInfo = saved;
printf("\n");
#if (configGENERATE_RUN_TIME_STATS == 1)
char *cBuffer = pvPortMalloc(512);
if(cBuffer != NULL) {
vTaskGetRunTimeStats((char *)cBuffer);
printf("%s", cBuffer);
}
vPortFree(cBuffer);
#endif
AT_PRINTK("[ATS#]: _AT_SYSTEM_TEST_");
DBG_8195A("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n",
HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace());
dump_mem_block_list();
tcm_heap_dump();
DBG_8195A("\n");
}
int mp3_cfg_read(void)

8
project/src/user/main.c
View file

@ -500,7 +500,13 @@ void main(void) {
if ( rtl_cryptoEngine_init() != 0 ) DBG_8195A("crypto engine init failed\r\n");
*/
#if defined(CONFIG_CPU_CLK)
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
#if 1 // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) & (~(1<<17)));
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
#else // 0 - 200000000 Hz, 1 - 10000000 Hz, 2 - 50000000 Hz, 3 - 25000000 Hz, 4 - 12500000 Hz, 5 - 4000000 Hz
HalCpuClkConfig(1);
HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) | (1<<17));
#endif
HAL_LOG_UART_ADAPTER pUartAdapter;
pUartAdapter.BaudRate = RUART_BAUD_RATE_38400;
HalLogUartSetBaudRate(&pUartAdapter);