mirror of
https://github.com/pvvx/RTL00MP3.git
synced 2026-07-09 21:15:40 +00:00
update
This commit is contained in:
parent
629e5fdc28
commit
bd42ffa334
212 changed files with 35447 additions and 223 deletions
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@ -0,0 +1,18 @@
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set libname=lib_platform
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del %libname%_tst.a
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md %libname%.lib
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cd %libname%.lib
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PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
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arm-none-eabi-ar.exe x ..\%libname%.a
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del hal_efuse.o
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del hal_common.o
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del freertos_pmu_8195a.o
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del hal_soc_ps_monitor.o
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del app_start.o
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del hal_log_uart.o
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del hal_pinmux.o
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del hal_misc.o
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del startup.o
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arm-none-eabi-ar.exe ru ..\%libname%_tst.a *.o
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cd ..
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rd /q /s %libname%.lib
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@ -0,0 +1,4 @@
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ram_libc.o
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ram_libgloss_retarget.o
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rtl_eabi_cast_ram.o
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rtl_math_ram.o
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@ -0,0 +1,13 @@
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set libname=lib_rtlstd
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del %libname%_new.a
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md %libname%.lib
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cd %libname%.lib
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PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
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arm-none-eabi-ar.exe x ..\%libname%.a
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del ram_libc.o
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rem del ram_libgloss_retarget.o
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rem del rtl_eabi_cast_ram.o
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rem del rtl_math_ram.o
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arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o
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cd ..
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rem rd /q /s %libname%.lib
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@ -0,0 +1,12 @@
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set libname=lib_sdcard_v2
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del %libname%_new.a
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md %libname%.lib
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cd %libname%.lib
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PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
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arm-none-eabi-ar.exe x ..\%libname%.a
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del sd.o
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del sdio_host.o
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del hal_sdio_host.o
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arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o
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cd ..
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rem rd /q /s %libname%.lib
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@ -0,0 +1,11 @@
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set libname=lib_wlan
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del %libname%_new.a
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md %libname%.lib
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cd %libname%.lib
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PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
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rem arm-none-eabi-ar.exe x ..\%libname%.a
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arm-none-eabi-objcopy.exe --globalize-symbol rtw_flash_map_update.part.12 rtl8195a_hal_init.o
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rem rtw_flash_map_update
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arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o
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cd ..
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rem rd /q /s %libname%.lib
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@ -9,10 +9,8 @@ MEMORY
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{
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TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65536
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ROM_USED_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 21560 /* end 0x10006000 */
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RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 16128 /* end 0x10006000 */
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//RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 16128 /* end 0x10006000 */
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BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 434176
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//RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 7936 /* end 0x10004000 */
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//BD_RAM (rwx) : ORIGIN = 0x10004000, LENGTH = 442368
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SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
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}
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@ -117,10 +115,10 @@ SECTIONS
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__ram_image2_text_start__ = .;
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__image2_entry_func__ = .;
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.image2.start.table1$$Base = .;
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*(SORT(.image2.ram.data*))
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KEEP(*(SORT(.image2.ram.data*)))
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__image2_validate_code__ = .;
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*(.image2.validate.rodata*)
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*(.custom.validate.rodata*)
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KEEP(*(.image2.validate.rodata*))
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KEEP(*(.custom.validate.rodata*))
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} > BD_RAM
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.ram_image2.text :
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@ -0,0 +1,67 @@
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/* ENTRY(Reset_Handler) */
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MEMORY
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{
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ROM (rx) : ORIGIN = 0x00000000, LENGTH = 1M
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SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 448K
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TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65K
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SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
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}
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SECTIONS
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{
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.rom :
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{
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__rom_image_start__ = .;
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KEEP(*(.rom));
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__rom_image_end__ = .;
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} > ROM
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.sram : /* use in rom */
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{
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__ram_image_start__ = .;
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KEEP(*(.ram_dedecated_vector_table)) /* 0x10000000: NewVectorTable */
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KEEP(*(.ram_user_define_irq_table)) /* 0x10000100: UserIrqFunTable */
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KEEP(*(.ram_user_define_data_table)) /* 0x10000200: UserIrqDataTable */
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/* __rom_bss_start__ = .; */
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KEEP(*(.hal.ram.bss)) /* 0x10000300: CfgSysDebugWarn .. _pHAL_Gpio_Adapter */
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KEEP(*(.timer2_7_vector_table.data)) /* 0x10000358: Timer2To7VectorTable */
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KEEP(*(.infra.ram.bss)) /* 0x10000370: first .. z4 */
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KEEP(*(.mon.ram.bss)) /* 0x10000384: pUartLogCtl .. ArgvArray */
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KEEP(*(.wlan_ram_map)) /* 0x100006d4: rom_wlan_ram_map, FalseAlmCnt, ROMInfo, DM_CfoTrack */
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KEEP(*(.ram.rom.wlanmap)) /* align(8) */
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KEEP(*(.libc.ram.bss)) /* 0x10000760: rom_libgloss_ram_map __rtl_malloc_av_ __rtl_errno */
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/* __rom_bss_end__ = .; */
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/* __ram_start_table_start__ = .; */
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/* 0x10000bc8: bootloader */
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KEEP(*(SORT(.start.ram.data*)))
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/* __image1_validate_code__ = .; */
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KEEP(*(.image1.validate.rodata))
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KEEP(*(.infra.ram.data*))
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KEEP(*(.timer.ram.data*))
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KEEP(*(.cutb.ram.data*))
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KEEP(*(.cutc.ram.data*))
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KEEP(*(.data));
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KEEP(*(.hal.ram.data)) /* 0x10001c60: _reent *rtl_impure_ptr */ /* 0x10001c68: _reent impure_data */
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KEEP(*(.libc.reent))
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KEEP(*(.rom.unc.data))
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KEEP(*(.sdr.rand2.data)) /* Sdr_Rand2() y,z,c */
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/* KEEP(*(.hal.flash.data)) */
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/* 0x100020c0: end ram-rom */
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__ram_image_end__ = .;
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} > SRAM
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}
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SECTIONS
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{
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__rom_bss_start__ = 0x10000300; /* use in rom */
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__rom_bss_end__ = 0x10000bc8; /* use in rom */
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__ram_start_table_start__ = 0x10000bc8; /* use in rom */
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__image1_validate_code__ = 0x10000bdc; /* needed by ram code */
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_rtl_impure_ptr = 0x10001c60; /* for standard library */
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}
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@ -0,0 +1,240 @@
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ENTRY(Reset_Handler)
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INCLUDE "export-rom_v04.txt"
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MEMORY
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{
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ROM (rx) : ORIGIN = 0x000000, LENGTH = 1M
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ROM_RAM1 (rwx): ORIGIN = 0x10000000, LENGTH = 0x2100 /* end 0x10002100 */
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BOOT_RAM (rwx): ORIGIN = 0x10000bc8, LENGTH = 13368 /* end 0x10006000 */
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RECY_RAM (rwx): ORIGIN = 0x10002100, LENGTH = 0x3F00 /* end 0x10006000 */
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BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 424K /* end 0x10070000 */
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ROM_RAM3 (rwx): ORIGIN = 0x1006D000, LENGTH = 12K /* end 0x10070000 */
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TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64K /* end 0x20000000 */
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SDRAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M /* end 0x30200000 */
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}
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EXTERN(PreProcessForVendor)
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EXTERN(RtlBootToSram)
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EXTERN(_rtl_impure_ptr)
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EXTERN(impure_data)
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SECTIONS
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{
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/* 0x00000000: ROM */
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.rom :
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{
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__rom_image_start__ = .;
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KEEP(*(.rom));
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__rom_image_end__ = .;
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} > ROM
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/* 0x10000000: SRAM */
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.rom_ram : /* use in rom */
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{
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__ram_image_start__ = .;
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KEEP(*(.ram_dedecated_vector_table)) /* 0x10000000: NewVectorTable */
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KEEP(*(.ram_user_define_irq_table)) /* 0x10000100: UserIrqFunTable */
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KEEP(*(.ram_user_define_data_table)) /* 0x10000200: UserIrqDataTable */
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/* __rom_bss_start__ = .; */
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KEEP(*(.hal.ram.bss)) /* 0x10000300: CfgSysDebugWarn .. _pHAL_Gpio_Adapter */
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KEEP(*(.timer2_7_vector_table.data)) /* 0x10000358: Timer2To7VectorTable */
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KEEP(*(.infra.ram.bss)) /* 0x10000370: first .. z4 */
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KEEP(*(.mon.ram.bss)) /* 0x10000384: pUartLogCtl .. ArgvArray */
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KEEP(*(.wlan_ram_map)) /* 0x100006d4: rom_wlan_ram_map, FalseAlmCnt, ROMInfo, DM_CfoTrack */
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KEEP(*(.ram.rom.wlanmap)) /* align(8) */
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KEEP(*(.libc.ram.bss)) /* 0x10000760: rom_libgloss_ram_map __rtl_malloc_av_ __rtl_errno */
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/* __rom_bss_end__ = .; */
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} > ROM_RAM1
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/* 0x10000bc8: bootloader */
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.ram_image1.text . : /* use in rom & boot */
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{
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/* __ram_start_table_start__ = .; */
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__ram_image1_text_start__ = .;
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KEEP(*(SORT(.start.ram.data*)))
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/* __image1_validate_code__ = .; */
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KEEP(*(.image1.validate.rodata))
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KEEP(*(.infra.ram.data*))
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KEEP(*(.timer.ram.data*))
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KEEP(*(.cutb.ram.data*))
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KEEP(*(.cutc.ram.data*))
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KEEP(*(.data));
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KEEP(*(.hal.ram.data))
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KEEP(*(.libc.reent))
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KEEP(*(.rom.unc.data))
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KEEP(*(.sdr.rand2.data))
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build/obj/project/src/user/rtl_bios_data.o (.rodata*)
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__ram_image_end__ = .;
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/* 0x100020c0: end */
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build/obj/project/src/user/rtl_boot.o (.text* .rodata*)
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__image1_bss_start__ = .;
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__image1_bss_end__ = .;
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__ram_image1_text_end__ = .;
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} > BOOT_RAM
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.tcm :
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{
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__tcm_start__ = .;
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*(.tcm.heap)
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__tcm_end__ = .;
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} > TCM
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.image2.start.table :
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{
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__ram_image2_text_start__ = .;
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__image2_entry_func__ = .;
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.image2.start.table1$$Base = .;
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KEEP(*(SORT(.image2.ram.data*)))
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__image2_validate_code__ = .;
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KEEP(*(.image2.validate.rodata*))
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KEEP(*(.custom.validate.rodata*))
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} > BD_RAM
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.ram_image2.text :
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{
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*(.infra.ram.start*)
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*(.mon.ram.text*)
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*(.hal.flash.text*)
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*(.hal.sdrc.text*)
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*(.hal.gpio.text*)
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*(.fwu.text*)
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*(.text*)
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*(.sdram.text*)
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*(.p2p.text*)
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*(.wps.text*)
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*(.websocket.text*)
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} > BD_RAM
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.ram_image2.rodata :
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{
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*(.rodata*)
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*(.fwu.rodata*)
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*(.sdram.rodata*)
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*(.p2p.rodata*)
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*(.wps.rodata*)
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*(.websocket.rodata*)
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} > BD_RAM
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.ram.data :
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{
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__data_start__ = .;
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*(.data*)
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*(.sdram.data*)
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*(.p2p.data*)
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*(.wps.data*)
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*(.websocket.data*)
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__data_end__ = .;
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__ram_image2_text_end__ = .;
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} > BD_RAM
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.ram.bss :
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{
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__bss_start__ = .;
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.ram.bss$$Base = .;
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*(.hal.flash.data*)
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*(.hal.sdrc.data*)
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*(.hal.gpio.data*)
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*(.fwu.data*)
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*(.bss*)
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*(COMMON)
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*(.bdsram.data*)
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*(.sdram.bss*)
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*(.p2p.bss*)
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*(.wps.bss*)
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*(.websocket.bss*)
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__bss_end__ = .;
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.ram.bss$$Limit = .;
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} > BD_RAM
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.bf_data :
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{
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__buffer_data_start__ = .;
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*(.bfsram.data*)
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__buffer_data_end__ = .;
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} > BD_RAM
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.bf_data2 :
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{
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__buffer_data_start2__ = .;
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__buffer_data_end2__ = .;
|
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} > RECY_RAM
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.sdr_text :
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{
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__sdram_data_start__ = .;
|
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} > SDRAM
|
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.sdr_rodata :
|
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{
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||||
} > SDRAM
|
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.sdr_data :
|
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{
|
||||
__sdram_data_end__ = .;
|
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} > SDRAM
|
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.sdr_bss :
|
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{
|
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__sdram_bss_start__ = .;
|
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__sdram_bss_end__ = .;
|
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} > SDRAM
|
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.heap :
|
||||
{
|
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__end__ = .;
|
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end = __end__;
|
||||
*(.heap*)
|
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__HeapLimit = .;
|
||||
} > BD_RAM
|
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|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
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* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy :
|
||||
{
|
||||
*(.stack)
|
||||
} > BD_RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
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* size of stack_dummy section */
|
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__StackTop = ORIGIN(BD_RAM) + LENGTH(BD_RAM);
|
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
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PROVIDE(__stack = __StackTop);
|
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|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
|
||||
.boot.head :
|
||||
{
|
||||
KEEP(*(.loader.head*))
|
||||
}
|
||||
|
||||
.image1.head :
|
||||
{
|
||||
KEEP(*(SORT(.image1.head*)))
|
||||
}
|
||||
|
||||
.image2.head :
|
||||
{
|
||||
KEEP(*(SORT(.image2.head*)))
|
||||
}
|
||||
|
||||
.image3.head :
|
||||
{
|
||||
KEEP(*(SORT(.image3.head*)))
|
||||
}
|
||||
|
||||
.image4.head :
|
||||
{
|
||||
KEEP(*(SORT(.image4.head*)))
|
||||
}
|
||||
|
||||
}
|
||||
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