This commit is contained in:
pvvx 2017-02-19 22:35:23 +03:00
parent 629e5fdc28
commit bd42ffa334
212 changed files with 35447 additions and 223 deletions

View file

@ -96,24 +96,54 @@ VOID ShowRamBuildInfo(VOID)
*/
}
#ifdef CONFIG_APP_DEMO
#include "device.h"
#include "gpio_api.h" // mbed
#if 1 //def CONFIG_APP_DEMO
#include "rtl8195a.h"
//#include "device.h"
//#include "gpio_api.h" // mbed
typedef struct _UART_LOG_BUF_ {
u8 BufCount; //record the input cmd char number.
u8 UARTLogBuf[127]; //record the input command.
} UART_LOG_BUF, *PUART_LOG_BUF;
//MON_RAM_BSS_SECTION
typedef struct _UART_LOG_CTL_ {
u8 NewIdx; //+0
u8 SeeIdx; //+1
u8 RevdNo; //+2
u8 EscSTS; //+3
u8 ExecuteCmd; //+4
u8 ExecuteEsc; //+5
u8 BootRdy; //+6
u8 Resvd; //+7
PUART_LOG_BUF pTmpLogBuf;
VOID *pfINPUT;
PCOMMAND_TABLE pCmdTbl;
u32 CmdTblSz;
u32 CRSTS;
u8 (*pHistoryBuf)[127];
u32 TaskRdy;
u32 Sema;
} UART_LOG_CTL, *PUART_LOG_CTL;
extern volatile UART_LOG_CTL *pUartLogCtl;
_WEAK int main(void)
{
HalPinCtrlRtl8195A(JTAG, 0, 1);
DiagPrintf("\r\nRTL Console ROM: Start - press key 'Up', Help '?'\r\n");
while(pUartLogCtl[5] != 1);
pUartLogCtl[3] = 0;
pUartLogCtl[6] = 1;
while(pUartLogCtl->ExecuteEsc != 1);
pUartLogCtl->RevdNo = 0;
pUartLogCtl->BootRdy = 1;
DiagPrintf("\r<RTL8710AF>");
while(1) {
while(pUartLogCtl[4] != 1 );
while(pUartLogCtl->ExecuteCmd != 1 );
UartLogCmdExecute(pUartLogCtl);
DiagPrintf("\r<RTL8710AF>");
pUartLogCtl[4] = 0;
pUartLogCtl->ExecuteCmd = 0;
}
return 0;
@ -190,6 +220,7 @@ void _AppStart(void)
xTaskCreate( (TaskFunction_t)main, "MAIN_APP__TASK", (MAIN_APP_DEFAULT_STACK_SIZE/4), (void *)NULL, MAIN_APP_DEFAULT_PRIORITY, NULL);
vTaskStartScheduler();
#endif
#else
__low_level_init();

View file

@ -48,7 +48,6 @@
//#define __SYSTEM_CLOCK (5*__XTAL)
#define __SYSTEM_CLOCK (200000000UL/6*5) // PLATFORM_CLOCK //
extern unsigned int rand_x;
//extern u32 HalGetCpuClk(VOID);
#ifdef CONFIG_CHIP_A_CUT
@ -62,6 +61,8 @@ const u32 SysCpkClkTbl[]= {
};
#endif
unsigned int rand_x = 12345;
u32 Rand2(void)
{
static unsigned int y = 362436;

View file

@ -244,7 +244,7 @@ HAL_GPIO_IP_DeInit(
//extern u16 GPIOState[_PORT_MAX-1]; // побитно 16 бит для каждого порта (A..K), бит=номер задействованного пина в порту на периферию.
extern u16 GPIOState[_PORT_MAX]; // побитно 16 бит для каждого порта (A..K), бит=номер задействованного пина в порту на периферию.
#endif // end of "#define _HAL_GPIO_H_"

View file

@ -16,12 +16,6 @@
#define SYSTEM_CLK PLATFORM_CLOCK
#define SDR_SDRAM_BASE 0x30000000
#define SYSTEM_CTRL_BASE 0x40000000
#define PERI_ON_BASE 0x40000000
#define VENDOR_REG_BASE 0x40002800
#define SPI_FLASH_BASE 0x98000000
#define SDR_CTRL_BASE 0x40005000
#define PERIPHERAL_IRQ_STATUS 0x04
#define PERIPHERAL_IRQ_MODE 0x08
@ -34,13 +28,21 @@
#define TIMER_CLK 32*1000
#define SDR_SDRAM_BASE 0x30000000
#define SYSTEM_CTRL_BASE 0x40000000
#define PERI_ON_BASE 0x40000000
#define SPI_FLASH_BASE 0x98000000
//3 Peripheral IP Base Address
#define GPIO_REG_BASE 0x40001000
#define TIMER_REG_BASE 0x40002000
#define VENDOR_REG_BASE 0x40002800
#define NFC_INTERFACE_BASE 0x40002400
#define LOG_UART_REG_BASE 0x40003000
#define I2C2_REG_BASE 0x40003400
#define I2C3_REG_BASE 0x40003800
#define SDR_CTRL_BASE 0x40005000
#define SPI_FLASH_CTRL_BASE 0x40006000
#define ADC_REG_BASE 0x40010000
#define DAC_REG_BASE 0x40011000

View file

@ -10,7 +10,7 @@
#ifndef _HAL_SDR_CONTROLLER_H_
#define _HAL_SDR_CONTROLLER_H_
#if 1 // def CONFIG_SDR_EN
#if 1 //def CONFIG_SDR_EN
typedef enum _DRAM_TYPE_ {
DRAM_DDR_1 = 1,
@ -187,5 +187,5 @@ typedef struct _DRAM_DEVICE_INFO_ {
#define HAL_SDRAM_READ8(addr) HAL_READ8(SDR_SDRAM_BASE, addr)
#endif // CONFIG_SDR_EN
// extern unsigned int rand_x; // in rtl_bios_data.h
//extern unsigned int rand_x;
#endif // end of "#ifndef _HAL_SDR_CONTROLLER_H_"

View file

@ -68,7 +68,7 @@ enum _SPIC_BIT_MODE_ {
#define FLASH_EON 5
//#define FLASH_MXIC_MX25L4006E 0
//#define FLASH_MXIC_MX25L8073E 0
//#define FLASH_MXIC_MX25L8073E 1
//#define FLASH_MICRON_N25Q512A 1
// The below parts are based on the flash characteristics
//====== Flash Command Definition ======
@ -244,6 +244,7 @@ enum _SPIC_BIT_MODE_ {
//#endif
#if 0
#if FLASH_MXIC_MX25L4006E
#define FLASH_RD_2IO_EN 1

View file

@ -0,0 +1,130 @@
/*
* Routines to access hardware
*
* Copyright (c) 2015 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "rtl8195a.h"
#include "build_info.h"
#include "PinNames.h"
#include "serial_api.h"
extern void serial_init (serial_t *obj, PinName tx, PinName rx);
extern void serial_free (serial_t *obj);
extern void serial_baud (serial_t *obj, int baudrate);
extern void serial_format (serial_t *obj, int data_bits, SerialParity parity, int stop_bits);
extern int main(void);
void iar_data_init_fw_loader(void);
void fw_loader_main(void);// __attribute__ ((weak));
#pragma section=".image2.start.table1"
#pragma section=".fwloader_ram.bss"
FW_LOADER_START_RAM_FUN_SECTION
RAM_START_FUNCTION gFWLoaderEntryFun0 = {fw_loader_main};
u8* __image4_entry_func__;
u8* __image4_validate_code__;
u8* __fwloader_bss_start__;
u8* __fwloader_bss_end__;
FW_LOADER_VALID_PATTEN_SECTION const u8 RAM_FW_LOADER_VALID_PATTEN[20] = {
'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff,
(FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff),
(FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff),
(FW_CHIP_ID&0xff), ((FW_CHIP_ID >> 8)&0xff),
(FW_CHIP_VER),
(FW_BUS_TYPE),
(FW_INFO_RSV1),
(FW_INFO_RSV2),
(FW_INFO_RSV3),
(FW_INFO_RSV4)
};
/**
* @brief Main program.
* @param None
* @retval None
*/
void fw_loader_main(void)
{
#if defined ( __ICCARM__ )
iar_data_init_fw_loader();
#endif
u32 Image2Len, Image2Addr, ImageIndex, SpicBitMode, SpicImageIndex;
u32 Image2LoadAddr = 0x13000;
DBG_8195A("===== Enter FW Loader Image ====\n");
#ifdef BOOTLOADER
main();
#endif
IGMAE4:
PRAM_START_FUNCTION Image4EntryFun=(PRAM_START_FUNCTION)__image4_entry_func__;
Image2Len = HAL_READ32(SPI_FLASH_BASE, Image2LoadAddr);
Image2Addr = HAL_READ32(SPI_FLASH_BASE, (Image2LoadAddr+0x4));
DBG_8195A("Flash FW Loader:Addr 0x%x, Len %d, Load to SRAM 0x%x\n", Image2LoadAddr, Image2Len, Image2Addr);
SpicImageIndex = 0;
for (ImageIndex = 0x10 + Image2LoadAddr; ImageIndex < (Image2Len + Image2LoadAddr + 0x10); ImageIndex = ImageIndex + 4) {
HAL_WRITE32(Image2Addr, SpicImageIndex,
HAL_READ32(SPI_FLASH_BASE, ImageIndex));
SpicImageIndex += 4;
}
#ifdef CONFIG_SDR_EN
u32 Image3LoadAddr;
u32 Image3Len;
u32 Image3Addr;
Image3LoadAddr = Image2LoadAddr + Image2Len+0x10;
Image3Len = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr);
Image3Addr = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr + 0x4);
if( (Image3Len==0xFFFFFFFF) || (Image3Len==0) || (Image3Addr!=0x30000000)){
DBG_8195A("No Image3\n\r");
}else{
DBG_8195A("Image3 length: 0x%x, Image3 Addr: 0x%x\n",Image3Len, Image3Addr);
SpicImageIndex = 0;
for (ImageIndex = 0x10 + Image3LoadAddr;
ImageIndex < (Image3Len + Image3LoadAddr + 0x10);
ImageIndex = ImageIndex + 4) {
HAL_WRITE32(Image3Addr, SpicImageIndex,
HAL_READ32(SPI_FLASH_BASE, ImageIndex));
SpicImageIndex += 4;
}
}
#endif
//3 3) Jump to image 4
DBG_8195A("InfraStart: %p, Img2 Sign %s \n", __image4_entry_func__, (char*)__image4_validate_code__);
if (_strcmp((char *)__image4_validate_code__, "RTKWin")) {
while (1) {
DBG_8195A("Invalid Image4 Signature\n");
RtlConsolRom(1000);//each delay is 100us
}
}
#ifdef BOOTLOADER
deinit_platform_bootloader();
#endif
Image4EntryFun->RamStartFun();
}
void iar_data_init_fw_loader(void)
{
__image4_entry_func__ = (u8*)__section_begin(".image2.start.table1");
__image4_validate_code__ = __image4_entry_func__+4;//(u8*)__section_begin(".image2.start.table2");
__fwloader_bss_start__ = (u8*)__section_begin(".fwloader_ram.bss");
__fwloader_bss_end__ = (u8*)__section_end(".fwloader_ram.bss");
}

View file

@ -0,0 +1,82 @@
/*
decompiled low_level_io.o
*/
#include ......
//-------------------------------------------------------------------------
// Function declarations
void mode_init();
void HalSerialPutcRtl8195a(int c, int a2, char a3);
signed int DiagPrintf(const char *fmt, ...);
void log_uart_enable_printf();
void log_uart_disable_printf();
//-------------------------------------------------------------------------
// Data declarations
uint32_t backupWarn;
uint32_t backupErr;
uint32_t backupInfo;
int disablePrintf;
// extern _UNKNOWN use_mode;
// extern _UNKNOWN ConfigDebugErr;
// extern _UNKNOWN ConfigDebugInfo;
// extern _UNKNOWN ConfigDebugWarn;
//-----
void mode_init()
{
use_mode = 1;
}
//-----
void HalSerialPutcRtl8195a(int c)
{
signed int v3; // r3@2
if ( disablePrintf != 1 )
{
v3 = 6540;
do
{
if ( !--v3 )
break;
a3 = v40003014;
}
while ( !(v40003014 & 0x60) );
if ( c == 10 ) a3 = 13;
v40003000 = c;
if ( c == 10 ) v40003000 = a3;
}
}
//-----
signed int DiagPrintf(const char *fmt, ...)
{
va_list va;
va_start(va, fmt);
if ( disablePrintf != 1 )
VSprintf(0, fmt, va);
return 1;
}
//-----
void log_uart_enable_printf()
{
disablePrintf = 0;
ConfigDebugErr = backupErr;
ConfigDebugInfo = backupInfo;
ConfigDebugWarn = backupWarn;
}
//-----
void log_uart_disable_printf()
{
disablePrintf = 1;
backupErr = ConfigDebugErr;
backupInfo = ConfigDebugInfo;
backupWarn = ConfigDebugWarn;
ConfigDebugErr = 0;
ConfigDebugInfo = 0;
ConfigDebugWarn = 0;
}

View file

@ -911,30 +911,30 @@
#define BIT_CTRL_FLUSH_FIFO(x) (((x) & BIT_MASK_FLUSH_FIFO) << BIT_SHIFT_FLUSH_FIFO)
//=================== Register Address Definition ============================//
#define REG_SPIC_CTRLR0 0x0000//O
#define REG_SPIC_CTRLR1 0x0004//O
#define REG_SPIC_SSIENR 0x0008//O
#define REG_SPIC_MWCR 0x000C
#define REG_SPIC_SER 0x0010//O
#define REG_SPIC_BAUDR 0x0014//O
#define REG_SPIC_TXFTLR 0x0018
#define REG_SPIC_RXFTLR 0x001C//O
#define REG_SPIC_TXFLR 0x0020//O
#define REG_SPIC_RXFLR 0x0024
#define REG_SPIC_SR 0x0028
#define REG_SPIC_IMR 0x002C//O
#define REG_SPIC_ISR 0x0030
#define REG_SPIC_RISR 0x0034
#define REG_SPIC_TXOICR 0x0038
#define REG_SPIC_RXOICR 0x003C
#define REG_SPC_RXUICR 0x0040
#define REG_SPIC_MSTICR 0x0044
#define REG_SPIC_ICR 0x0048
#define REG_SPIC_DMACR 0x004C
#define REG_SPIC_DMATDLR0 0x0050
#define REG_SPIC_DMATDLR1 0x0054
#define REG_SPIC_IDR 0x0058
#define REG_SPIC_VERSION 0x005C
#define REG_SPIC_CTRLR0 0x0000 //O 0x1040300
#define REG_SPIC_CTRLR1 0x0004 //O 0x10
#define REG_SPIC_SSIENR 0x0008 //O 0
#define REG_SPIC_MWCR 0x000C // 0
#define REG_SPIC_SER 0x0010 //O 1
#define REG_SPIC_BAUDR 0x0014 //O 1
#define REG_SPIC_TXFTLR 0x0018 // 0
#define REG_SPIC_RXFTLR 0x001C //O 0x1F
#define REG_SPIC_TXFLR 0x0020 //O 0
#define REG_SPIC_RXFLR 0x0024 // 0
#define REG_SPIC_SR 0x0028 // 6
#define REG_SPIC_IMR 0x002C //O 0x1FF
#define REG_SPIC_ISR 0x0030 // 4
#define REG_SPIC_RISR 0x0034 // 4
#define REG_SPIC_TXOICR 0x0038 // 0
#define REG_SPIC_RXOICR 0x003C // 0
#define REG_SPC_RXUICR 0x0040 // 0
#define REG_SPIC_MSTICR 0x0044 // 0
#define REG_SPIC_ICR 0x0048 // 0
#define REG_SPIC_DMACR 0x004C // 0
#define REG_SPIC_DMATDLR0 0x0050 // 0
#define REG_SPIC_DMATDLR1 0x0054 // 0
#define REG_SPIC_IDR 0x0058 // 0x10001
#define REG_SPIC_VERSION 0x005C // 0x40470603
#define REG_SPIC_DR0 0x0060
#define REG_SPIC_DR1 0x0064
#define REG_SPIC_DR2 0x0068
@ -966,26 +966,26 @@
#define REG_SPIC_DR28 0x00D0
#define REG_SPIC_DR29 0x00D4
#define REG_SPIC_DR30 0x00D8
#define REG_SPIC_DR31 0x00DC
#define REG_SPIC_READ_FAST_SINGLE 0x00E0//O
#define REG_SPIC_READ_DUAL_DATA 0x00E4//O
#define REG_SPIC_READ_DUAL_ADDR_DATA 0x00E8//O
#define REG_SPIC_READ_QUAD_DATA 0x00EC//O
#define REG_SPIC_READ_QUAD_ADDR_DATA 0x00F0//O
#define REG_SPIC_WRITE_SIGNLE 0x00F4//O
#define REG_SPIC_WRITE_DUAL_DATA 0x00F8//O
#define REG_SPIC_WRITE_DUAL_ADDR_DATA 0x00FC//O
#define REG_SPIC_WRITE_QUAD_DATA 0x0100//O
#define REG_SPIC_WRITE_QUAD_ADDR_DATA 0x0104//O
#define REG_SPIC_WRITE_ENABLE 0x0108//O
#define REG_SPIC_READ_STATUS 0x010C//O
#define REG_SPIC_CTRLR2 0x0110//O
#define REG_SPIC_FBAUDR 0x0114//O
#define REG_SPIC_ADDR_LENGTH 0x0118//O
#define REG_SPIC_AUTO_LENGTH 0x011C//O
#define REG_SPIC_VALID_CMD 0x0120//O
#define REG_SPIC_FLASE_SIZE 0x0124//O
#define REG_SPIC_FLUSH_FIFO 0x0128//O
#define REG_SPIC_DR31 0x00DC // MXIC (DeviceID: FC, Flash Size: 1048576 bytes, FlashID: C22014/1, SpicMode: DIO)
#define REG_SPIC_READ_FAST_SINGLE 0x00E0 //O 0x0B
#define REG_SPIC_READ_DUAL_DATA 0x00E4 //O 0x3B
#define REG_SPIC_READ_DUAL_ADDR_DATA 0x00E8 //O 0x3B
#define REG_SPIC_READ_QUAD_DATA 0x00EC //O 0x6B
#define REG_SPIC_READ_QUAD_ADDR_DATA 0x00F0 //O 0xEB
#define REG_SPIC_WRITE_SIGNLE 0x00F4 //O 0x02
#define REG_SPIC_WRITE_DUAL_DATA 0x00F8 //O 0xA2
#define REG_SPIC_WRITE_DUAL_ADDR_DATA 0x00FC//O 0xA2
#define REG_SPIC_WRITE_QUAD_DATA 0x0100 //O 0x32
#define REG_SPIC_WRITE_QUAD_ADDR_DATA 0x0104//O 0x38
#define REG_SPIC_WRITE_ENABLE 0x0108 //O 0x06
#define REG_SPIC_READ_STATUS 0x010C //O 0x05
#define REG_SPIC_CTRLR2 0x0110 //O 0x51
#define REG_SPIC_FBAUDR 0x0114 //O 0x1
#define REG_SPIC_ADDR_LENGTH 0x0118 //O 0x3
#define REG_SPIC_AUTO_LENGTH 0x011C //O 0x20030011/0x20030021
#define REG_SPIC_VALID_CMD 0x0120 //O 0x202
#define REG_SPIC_FLASE_SIZE 0x0124 //O 0x0E
#define REG_SPIC_FLUSH_FIFO 0x0128 //O 0
VOID SpicInitRtl8195A(u8 InitBaudRate, u8 SpicBitMode); // spi-flash controller initialization
VOID SpicRxCmdRtl8195A(u8 cmd); // recieve command

View file

@ -7,13 +7,21 @@
* possession or use of this module requires written permission of RealTek.
*/
#include "rtl8195a.h"
#include "platform_opts.h"
#include "hal_sdr_controller.h"
#include "rtl8195a_sdr.h"
#include "flash_api.h"
#ifdef CONFIG_SDR_EN
#ifndef USE_SRC_ONLY_BOOT
#define USE_SRC_ONLY_BOOT 0
#endif
#if !USE_SRC_ONLY_BOOT
#define SDRAM_INIT_USE_TCM_HEAP
#define SDRAM_INIT_USE_FLASH_API
#endif
#if 0
@ -122,9 +130,11 @@ u32 SdrCalibration(VOID);
//#define Sdr_Rand2 Rand
#ifndef SDRAM_INIT_USE_TCM_HEAP
#if !USE_SRC_ONLY_BOOT
//3 Note: stack overfloat if the arrary is declared in the task
HAL_CUT_B_RAM_DATA_SECTION
u32 AvaWds[2][REC_NUM];
#endif
#else
typedef struct {
u32 m[2][REC_NUM];
@ -138,6 +148,12 @@ unsigned int rand_x = 123456789;
*/
#ifdef CONFIG_SDR_EN
//#pragma arm section code = ".hal.sdrc.text"
#pragma arm section rodata = ".rodata.hal.sdrc"
//, rwdata = ".hal.sdrc.data"
//, zidata = ".hal.sdrc.bss"
//#pragma arm section bss = ".hal.sdrc.bss"
#ifdef CONFIG_SDR_VERIFY
enum{
LLT,
@ -744,8 +760,10 @@ SdrCalibration(
u32 valid;
union { u8 b[4]; u32 l;} value;
////
#ifdef SDRAM_INIT_USE_FLASH_API
flash_turnon();
if(fspic_isinit == 0) flash_init(&flashobj);
#endif
////
u32 CpuType = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
@ -776,11 +794,16 @@ SdrCalibration(
}
#endif
#if !USE_SRC_ONLY_BOOT
#ifdef SDRAM_INIT_USE_TCM_HEAP
pAvaWds AvaWds = (pAvaWds) tcm_heap_calloc(sizeof(u32)*REC_NUM*2);
#else
_memset((u8*)AvaWds, 0, sizeof(u32)*REC_NUM*2);
#endif
#else
u32 AvaWds[2][REC_NUM];
_memset((u8*)AvaWds, 0, sizeof(u32)*REC_NUM*2);
#endif
volatile struct ms_rxi310_portmap *ms_ctrl_0_map;
ms_ctrl_0_map = (struct ms_rxi310_portmap*) SDR_CTRL_BASE;
@ -981,7 +1004,7 @@ SdrCalibration(
return Result;
} // SdrCalibration
HAL_RAM_DATA_SECTION
/*
HAL_SDRC_TEXT_SECTION
@ -1062,7 +1085,7 @@ u8 IsSdrPowerOn(
#else // ifndef CONFIG_SDR_EN
VOID SdrPowerOff(
HAL_SDRC_TEXT_SECTION VOID SdrPowerOff(
VOID
)
{
@ -1072,7 +1095,6 @@ VOID SdrPowerOff(
}
HAL_SDRC_TEXT_SECTION VOID SdrCtrlInit(VOID)
{
DBG_SDR_ERR("No SDRAM!\n");

View file

@ -12,8 +12,9 @@
#include "rtl8195a_spi_flash.h"
#pragma arm section code = ".hal.flash.text", rodata = ".hal.flash.rodata", rwdata = ".hal.flash.data", zidata = ".hal.flash.bss"
#define SPI_CTRL_BASE 0x1FFEF000
//#define SPI_CTRL_BASE 0x1FFEF000
#define SPI_DLY_CTRL_ADDR 0x40000300 // [7:0]
#define MIN_BAUDRATE 0x01
#define MAX_BAUDRATE 0x04
@ -633,7 +634,6 @@ SpicReadIDRtl8195A(
}
/* Disable SPI_FLASH User Mode */
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
}
HAL_FLASH_TEXT_SECTION
@ -645,7 +645,7 @@ SpicCalibrationRtl8195A
)
{
u32 rd_data, /*id_no,*/ baudr, autolen, dly_line;
u32 rd_data, baudr, autolen, dly_line;
u32 total_ava_wds=0;
u32 tmp_str_pt, tmp_end_pt, pass, last_pass;
struct ava_window max_wd;
@ -841,9 +841,7 @@ SpicConfigAutoModeRtl8195A
BIT_RD_DUAL_IO |
BIT_RD_DUAL_I))));//Disable all the four and two bit commands.
}
if (SpicDualBitMode == SpicBitMode) {
else if (SpicDualBitMode == SpicBitMode) {
#if FLASH_RD_2IO_EN
HAL_SPI_WRITE32(REG_SPIC_READ_DUAL_ADDR_DATA, FLASH_CMD_2READ);
#endif
@ -856,8 +854,7 @@ SpicConfigAutoModeRtl8195A
(HAL_SPI_READ32(REG_SPIC_VALID_CMD)|(FLASH_VLD_DUAL_CMDS)));
}
if (SpicQuadBitMode == SpicBitMode) {
else if (SpicQuadBitMode == SpicBitMode) {
#if FLASH_WR_4IO_EN
HAL_SPI_WRITE32(REG_SPIC_WRITE_QUAD_ADDR_DATA, FLASH_CMD_4PP);
#endif

View file

@ -0,0 +1,18 @@
set libname=lib_platform
del %libname%_tst.a
md %libname%.lib
cd %libname%.lib
PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
arm-none-eabi-ar.exe x ..\%libname%.a
del hal_efuse.o
del hal_common.o
del freertos_pmu_8195a.o
del hal_soc_ps_monitor.o
del app_start.o
del hal_log_uart.o
del hal_pinmux.o
del hal_misc.o
del startup.o
arm-none-eabi-ar.exe ru ..\%libname%_tst.a *.o
cd ..
rd /q /s %libname%.lib

View file

@ -0,0 +1,4 @@
ram_libc.o
ram_libgloss_retarget.o
rtl_eabi_cast_ram.o
rtl_math_ram.o

View file

@ -0,0 +1,13 @@
set libname=lib_rtlstd
del %libname%_new.a
md %libname%.lib
cd %libname%.lib
PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
arm-none-eabi-ar.exe x ..\%libname%.a
del ram_libc.o
rem del ram_libgloss_retarget.o
rem del rtl_eabi_cast_ram.o
rem del rtl_math_ram.o
arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o
cd ..
rem rd /q /s %libname%.lib

View file

@ -0,0 +1,12 @@
set libname=lib_sdcard_v2
del %libname%_new.a
md %libname%.lib
cd %libname%.lib
PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
arm-none-eabi-ar.exe x ..\%libname%.a
del sd.o
del sdio_host.o
del hal_sdio_host.o
arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o
cd ..
rem rd /q /s %libname%.lib

View file

@ -0,0 +1,11 @@
set libname=lib_wlan
del %libname%_new.a
md %libname%.lib
cd %libname%.lib
PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH%
rem arm-none-eabi-ar.exe x ..\%libname%.a
arm-none-eabi-objcopy.exe --globalize-symbol rtw_flash_map_update.part.12 rtl8195a_hal_init.o
rem rtw_flash_map_update
arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o
cd ..
rem rd /q /s %libname%.lib

View file

@ -9,10 +9,8 @@ MEMORY
{
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65536
ROM_USED_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 21560 /* end 0x10006000 */
RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 16128 /* end 0x10006000 */
//RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 16128 /* end 0x10006000 */
BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 434176
//RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 7936 /* end 0x10004000 */
//BD_RAM (rwx) : ORIGIN = 0x10004000, LENGTH = 442368
SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
}
@ -117,10 +115,10 @@ SECTIONS
__ram_image2_text_start__ = .;
__image2_entry_func__ = .;
.image2.start.table1$$Base = .;
*(SORT(.image2.ram.data*))
KEEP(*(SORT(.image2.ram.data*)))
__image2_validate_code__ = .;
*(.image2.validate.rodata*)
*(.custom.validate.rodata*)
KEEP(*(.image2.validate.rodata*))
KEEP(*(.custom.validate.rodata*))
} > BD_RAM
.ram_image2.text :

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@ -0,0 +1,67 @@
/* ENTRY(Reset_Handler) */
MEMORY
{
ROM (rx) : ORIGIN = 0x00000000, LENGTH = 1M
SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 448K
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65K
SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
}
SECTIONS
{
.rom :
{
__rom_image_start__ = .;
KEEP(*(.rom));
__rom_image_end__ = .;
} > ROM
.sram : /* use in rom */
{
__ram_image_start__ = .;
KEEP(*(.ram_dedecated_vector_table)) /* 0x10000000: NewVectorTable */
KEEP(*(.ram_user_define_irq_table)) /* 0x10000100: UserIrqFunTable */
KEEP(*(.ram_user_define_data_table)) /* 0x10000200: UserIrqDataTable */
/* __rom_bss_start__ = .; */
KEEP(*(.hal.ram.bss)) /* 0x10000300: CfgSysDebugWarn .. _pHAL_Gpio_Adapter */
KEEP(*(.timer2_7_vector_table.data)) /* 0x10000358: Timer2To7VectorTable */
KEEP(*(.infra.ram.bss)) /* 0x10000370: first .. z4 */
KEEP(*(.mon.ram.bss)) /* 0x10000384: pUartLogCtl .. ArgvArray */
KEEP(*(.wlan_ram_map)) /* 0x100006d4: rom_wlan_ram_map, FalseAlmCnt, ROMInfo, DM_CfoTrack */
KEEP(*(.ram.rom.wlanmap)) /* align(8) */
KEEP(*(.libc.ram.bss)) /* 0x10000760: rom_libgloss_ram_map __rtl_malloc_av_ __rtl_errno */
/* __rom_bss_end__ = .; */
/* __ram_start_table_start__ = .; */
/* 0x10000bc8: bootloader */
KEEP(*(SORT(.start.ram.data*)))
/* __image1_validate_code__ = .; */
KEEP(*(.image1.validate.rodata))
KEEP(*(.infra.ram.data*))
KEEP(*(.timer.ram.data*))
KEEP(*(.cutb.ram.data*))
KEEP(*(.cutc.ram.data*))
KEEP(*(.data));
KEEP(*(.hal.ram.data)) /* 0x10001c60: _reent *rtl_impure_ptr */ /* 0x10001c68: _reent impure_data */
KEEP(*(.libc.reent))
KEEP(*(.rom.unc.data))
KEEP(*(.sdr.rand2.data)) /* Sdr_Rand2() y,z,c */
/* KEEP(*(.hal.flash.data)) */
/* 0x100020c0: end ram-rom */
__ram_image_end__ = .;
} > SRAM
}
SECTIONS
{
__rom_bss_start__ = 0x10000300; /* use in rom */
__rom_bss_end__ = 0x10000bc8; /* use in rom */
__ram_start_table_start__ = 0x10000bc8; /* use in rom */
__image1_validate_code__ = 0x10000bdc; /* needed by ram code */
_rtl_impure_ptr = 0x10001c60; /* for standard library */
}

View file

@ -0,0 +1,240 @@
ENTRY(Reset_Handler)
INCLUDE "export-rom_v04.txt"
MEMORY
{
ROM (rx) : ORIGIN = 0x000000, LENGTH = 1M
ROM_RAM1 (rwx): ORIGIN = 0x10000000, LENGTH = 0x2100 /* end 0x10002100 */
BOOT_RAM (rwx): ORIGIN = 0x10000bc8, LENGTH = 13368 /* end 0x10006000 */
RECY_RAM (rwx): ORIGIN = 0x10002100, LENGTH = 0x3F00 /* end 0x10006000 */
BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 424K /* end 0x10070000 */
ROM_RAM3 (rwx): ORIGIN = 0x1006D000, LENGTH = 12K /* end 0x10070000 */
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64K /* end 0x20000000 */
SDRAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M /* end 0x30200000 */
}
EXTERN(PreProcessForVendor)
EXTERN(RtlBootToSram)
EXTERN(_rtl_impure_ptr)
EXTERN(impure_data)
SECTIONS
{
/* 0x00000000: ROM */
.rom :
{
__rom_image_start__ = .;
KEEP(*(.rom));
__rom_image_end__ = .;
} > ROM
/* 0x10000000: SRAM */
.rom_ram : /* use in rom */
{
__ram_image_start__ = .;
KEEP(*(.ram_dedecated_vector_table)) /* 0x10000000: NewVectorTable */
KEEP(*(.ram_user_define_irq_table)) /* 0x10000100: UserIrqFunTable */
KEEP(*(.ram_user_define_data_table)) /* 0x10000200: UserIrqDataTable */
/* __rom_bss_start__ = .; */
KEEP(*(.hal.ram.bss)) /* 0x10000300: CfgSysDebugWarn .. _pHAL_Gpio_Adapter */
KEEP(*(.timer2_7_vector_table.data)) /* 0x10000358: Timer2To7VectorTable */
KEEP(*(.infra.ram.bss)) /* 0x10000370: first .. z4 */
KEEP(*(.mon.ram.bss)) /* 0x10000384: pUartLogCtl .. ArgvArray */
KEEP(*(.wlan_ram_map)) /* 0x100006d4: rom_wlan_ram_map, FalseAlmCnt, ROMInfo, DM_CfoTrack */
KEEP(*(.ram.rom.wlanmap)) /* align(8) */
KEEP(*(.libc.ram.bss)) /* 0x10000760: rom_libgloss_ram_map __rtl_malloc_av_ __rtl_errno */
/* __rom_bss_end__ = .; */
} > ROM_RAM1
/* 0x10000bc8: bootloader */
.ram_image1.text . : /* use in rom & boot */
{
/* __ram_start_table_start__ = .; */
__ram_image1_text_start__ = .;
KEEP(*(SORT(.start.ram.data*)))
/* __image1_validate_code__ = .; */
KEEP(*(.image1.validate.rodata))
KEEP(*(.infra.ram.data*))
KEEP(*(.timer.ram.data*))
KEEP(*(.cutb.ram.data*))
KEEP(*(.cutc.ram.data*))
KEEP(*(.data));
KEEP(*(.hal.ram.data))
KEEP(*(.libc.reent))
KEEP(*(.rom.unc.data))
KEEP(*(.sdr.rand2.data))
build/obj/project/src/user/rtl_bios_data.o (.rodata*)
__ram_image_end__ = .;
/* 0x100020c0: end */
build/obj/project/src/user/rtl_boot.o (.text* .rodata*)
__image1_bss_start__ = .;
__image1_bss_end__ = .;
__ram_image1_text_end__ = .;
} > BOOT_RAM
.tcm :
{
__tcm_start__ = .;
*(.tcm.heap)
__tcm_end__ = .;
} > TCM
.image2.start.table :
{
__ram_image2_text_start__ = .;
__image2_entry_func__ = .;
.image2.start.table1$$Base = .;
KEEP(*(SORT(.image2.ram.data*)))
__image2_validate_code__ = .;
KEEP(*(.image2.validate.rodata*))
KEEP(*(.custom.validate.rodata*))
} > BD_RAM
.ram_image2.text :
{
*(.infra.ram.start*)
*(.mon.ram.text*)
*(.hal.flash.text*)
*(.hal.sdrc.text*)
*(.hal.gpio.text*)
*(.fwu.text*)
*(.text*)
*(.sdram.text*)
*(.p2p.text*)
*(.wps.text*)
*(.websocket.text*)
} > BD_RAM
.ram_image2.rodata :
{
*(.rodata*)
*(.fwu.rodata*)
*(.sdram.rodata*)
*(.p2p.rodata*)
*(.wps.rodata*)
*(.websocket.rodata*)
} > BD_RAM
.ram.data :
{
__data_start__ = .;
*(.data*)
*(.sdram.data*)
*(.p2p.data*)
*(.wps.data*)
*(.websocket.data*)
__data_end__ = .;
__ram_image2_text_end__ = .;
} > BD_RAM
.ram.bss :
{
__bss_start__ = .;
.ram.bss$$Base = .;
*(.hal.flash.data*)
*(.hal.sdrc.data*)
*(.hal.gpio.data*)
*(.fwu.data*)
*(.bss*)
*(COMMON)
*(.bdsram.data*)
*(.sdram.bss*)
*(.p2p.bss*)
*(.wps.bss*)
*(.websocket.bss*)
__bss_end__ = .;
.ram.bss$$Limit = .;
} > BD_RAM
.bf_data :
{
__buffer_data_start__ = .;
*(.bfsram.data*)
__buffer_data_end__ = .;
} > BD_RAM
.bf_data2 :
{
__buffer_data_start2__ = .;
__buffer_data_end2__ = .;
} > RECY_RAM
.sdr_text :
{
__sdram_data_start__ = .;
} > SDRAM
.sdr_rodata :
{
} > SDRAM
.sdr_data :
{
__sdram_data_end__ = .;
} > SDRAM
.sdr_bss :
{
__sdram_bss_start__ = .;
__sdram_bss_end__ = .;
} > SDRAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > BD_RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > BD_RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(BD_RAM) + LENGTH(BD_RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
.boot.head :
{
KEEP(*(.loader.head*))
}
.image1.head :
{
KEEP(*(SORT(.image1.head*)))
}
.image2.head :
{
KEEP(*(SORT(.image2.head*)))
}
.image3.head :
{
KEEP(*(SORT(.image3.head*)))
}
.image4.head :
{
KEEP(*(SORT(.image4.head*)))
}
}

View file

@ -0,0 +1,77 @@
#!/bin/sh
#===============================================================================
CURRENT_UTILITY_DIR=$(pwd)
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
#===============================================================================
RLXSTS=$(ps -W | grep "rlx_probe_driver.exe" | grep -v "grep" | wc -l)
echo $RLXSTS
JLKSTS=$(ps -W | grep "JLinkGDBServer.exe" | grep -v "grep" | wc -l)
echo $JLKSTS
echo $CURRENT_UTILITY_DIR
#===============================================================================
#make the new string for being written
if [ $RLXSTS = 1 ]
then
echo "probe get"
#-------------------------------------------
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="#monitor reset 1"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
#===========================================
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="#monitor sleep 20"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
else
if [ $JLKSTS = 1 ]
then
echo "jlink get"
#-------------------------------------------
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="monitor reset 1"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
#===========================================
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="monitor sleep 20"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
fi
fi
#===============================================================================

View file

@ -0,0 +1,20 @@
#!/bin/sh
#===============================================================================
CURRENT_UTILITY_DIR=$(pwd)
echo "..."
echo $CURRENT_UTILITY_DIR
RAMFILENAME="./application/Debug/bin/ram_all.bin"
echo $RAMFILENAME
#RAMFILENAME="ram_2.bin"
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
#===============================================================================
#get file size
RAM_FILE_SIZE=$(stat -c %s $RAMFILENAME)
RAM_FILE_SIZE_HEX=`echo "obase=16; $RAM_FILE_SIZE"|bc`
echo "size "$RAM_FILE_SIZE" --> 0x"$RAM_FILE_SIZE_HEX
echo "set \$RamFileSize = 0x$RAM_FILE_SIZE_HEX" > fwsize.gdb
exit

View file

@ -0,0 +1,124 @@
# Main file for Ameba1 series Cortex-M3 parts
#
# !!!!!!
#
set CHIPNAME rtl8195a
set CHIPSERIES ameba1
# Adapt based on what transport is active.
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
error "CHIPNAME not set. Please do not include ameba1.cfg directly."
}
if { [info exists CHIPSERIES] } {
# Validate chip series is supported
if { $CHIPSERIES != "ameba1" } {
error "Unsupported chip series specified."
}
set _CHIPSERIES $CHIPSERIES
} else {
error "CHIPSERIES not set. Please do not include ameba1.cfg directly."
}
if { [info exists CPUTAPID] } {
# Allow user override
set _CPUTAPID $CPUTAPID
} else {
# Ameba1 use a Cortex M3 core.
if { $_CHIPSERIES == "ameba1" } {
if { [using_jtag] } {
set _CPUTAPID 0x4ba00477
} {
set _CPUTAPID 0x2ba01477
}
}
}
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
# Run with *real slow* clock by default since the
# boot rom could have been playing with the PLL, so
# we have no idea what clock the target is running at.
adapter_khz 1000
# delays on reset lines
adapter_nsrst_delay 200
if {[using_jtag]} {
jtag_ntrst_delay 200
}
# Ameba1 (Cortex M3 core) support SYSRESETREQ
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
$_TARGETNAME configure -event reset-init {ameba1_init}
# Ameba1 SDRAM enable
proc ameba1_init { } {
# init System
mww 0x40000014 0x00000021
sleep 10
mww 0x40000304 0x1fc00002
sleep 10
mww 0x40000250 0x00000400
sleep 10
mww 0x40000340 0x00000000
sleep 10
mww 0x40000230 0x0000dcc4
sleep 10
mww 0x40000210 0x00011117
sleep 10
mww 0x40000210 0x00011157
sleep 10
mww 0x400002c0 0x00110011
sleep 10
mww 0x40000320 0xffffffff
sleep 10
# init SDRAM
mww 0x40000040 0x00fcc702
sleep 10
mdw 0x40000040
mww 0x40005224 0x00000001
sleep 10
mww 0x40005004 0x00000208
sleep 10
mww 0x40005008 0xffffd000
sleep 13
mww 0x40005020 0x00000022
sleep 13
mww 0x40005010 0x09006201
sleep 13
mww 0x40005014 0x00002611
sleep 13
mww 0x40005018 0x00068413
sleep 13
mww 0x4000501c 0x00000042
sleep 13
mww 0x4000500c 0x700 ;# set Idle
sleep 20
mww 0x40005000 0x1 ;# start init
sleep 100
mdw 0x40005000
mww 0x4000500c 0x600 ;# enter memory mode
sleep 30
mww 0x40005008 0x00000000 ;# 0xf00
;# mww 0x40005008 0x00000f00
sleep 3
mww 0x40000300 0x0006005e ;# 0x5e
;# mww 0x40000300 0x0000005e
sleep 3
}

View file

@ -0,0 +1,57 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

View file

@ -0,0 +1,57 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

View file

@ -0,0 +1,57 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset init
monitor sleep 20
monitor halt
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

View file

@ -0,0 +1,199 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

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@ -0,0 +1,199 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

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@ -0,0 +1,198 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset init
monitor halt
monitor sleep 20
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

View file

@ -0,0 +1,112 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Init SDRAM here
# init System
monitor MemU32 0x40000014=0x00000021
monitor sleep 10
monitor MemU32 0x40000304=0x1fc00002
monitor sleep 10
monitor MemU32 0x40000250=0x00000400
monitor sleep 10
monitor MemU32 0x40000340=0x00000000
monitor sleep 10
monitor MemU32 0x40000230=0x0000dcc4
monitor sleep 10
monitor MemU32 0x40000210=0x00011117
monitor sleep 10
monitor MemU32 0x40000210=0x00011157
monitor sleep 10
monitor MemU32 0x400002c0=0x00110011
monitor sleep 10
monitor MemU32 0x40000320=0xffffffff
monitor sleep 10
# init SDRAM
monitor MemU32 0x40000040=0x00fcc702
monitor sleep 10
monitor MemU32 0x40000040
monitor MemU32 0x40005224=0x00000001
monitor sleep 10
monitor MemU32 0x40005004=0x00000208
monitor sleep 10
monitor MemU32 0x40005008=0xffffd000
monitor sleep 13
monitor MemU32 0x40005020=0x00000022
monitor sleep 13
monitor MemU32 0x40005010=0x09006201
monitor sleep 13
monitor MemU32 0x40005014=0x00002611
monitor sleep 13
monitor MemU32 0x40005018=0x00068413
monitor sleep 13
monitor MemU32 0x4000501c=0x00000042
monitor sleep 13
monitor MemU32 0x4000500c=0x700
monitor sleep 20
monitor MemU32 0x40005000=0x1
monitor sleep 100
monitor MemU32 0x40005000
monitor MemU32 0x4000500c=0x600
monitor sleep 30
monitor MemU32 0x40005008=0x00000000
monitor sleep 3
monitor MemU32 0x40000300=0x0006005e
monitor sleep 3
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
monitor MemU32 0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

View file

@ -0,0 +1,112 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Init SDRAM here
# init System
monitor MemU32 0x40000014=0x00000021
monitor sleep 10
monitor MemU32 0x40000304=0x1fc00002
monitor sleep 10
monitor MemU32 0x40000250=0x00000400
monitor sleep 10
monitor MemU32 0x40000340=0x00000000
monitor sleep 10
monitor MemU32 0x40000230=0x0000dcc4
monitor sleep 10
monitor MemU32 0x40000210=0x00011117
monitor sleep 10
monitor MemU32 0x40000210=0x00011157
monitor sleep 10
monitor MemU32 0x400002c0=0x00110011
monitor sleep 10
monitor MemU32 0x40000320=0xffffffff
monitor sleep 10
# init SDRAM
monitor MemU32 0x40000040=0x00fcc702
monitor sleep 10
monitor MemU32 0x40000040
monitor MemU32 0x40005224=0x00000001
monitor sleep 10
monitor MemU32 0x40005004=0x00000208
monitor sleep 10
monitor MemU32 0x40005008=0xffffd000
monitor sleep 13
monitor MemU32 0x40005020=0x00000022
monitor sleep 13
monitor MemU32 0x40005010=0x09006201
monitor sleep 13
monitor MemU32 0x40005014=0x00002611
monitor sleep 13
monitor MemU32 0x40005018=0x00068413
monitor sleep 13
monitor MemU32 0x4000501c=0x00000042
monitor sleep 13
monitor MemU32 0x4000500c=0x700
monitor sleep 20
monitor MemU32 0x40005000=0x1
monitor sleep 100
monitor MemU32 0x40005000
monitor MemU32 0x4000500c=0x600
monitor sleep 30
monitor MemU32 0x40005008=0x00000000
monitor sleep 3
monitor MemU32 0x40000300=0x0006005e
monitor sleep 3
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
monitor MemU32 0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

View file

@ -0,0 +1,59 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset init
monitor sleep 20
monitor halt
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
set {int}0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

View file

@ -0,0 +1,23 @@
;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Used to define address zones within the ARM address space (Memory).
;;
;; Name may be almost anything
;; AdrSpace must be Memory
;; StartAdr start of memory block
;; EndAdr end of memory block
;; AccType type of access, read-only (R), read-write (RW) or SFR (W)
[Memory]
;; Name AdrSpace StartAdr EndAdr AccType Width
Memory = ROM Memory 0x00000000 0x003FFFFF RW
Memory = SRAM Memory 0x10000000 0x1FFFFFFF RW
Memory = DRAM Memory 0x30000000 0x30FFFFFF RW
Memory = SFR Memory 0x40000000 0x41FFFFFF RW
Memory = SFR_Bitband Memory 0x42000000 0x43FFFFFF RW
Memory = PPB Memory 0xE0000000 0xFFFFFFFF RW
TrustedRanges = true
UseSfrFilter = true
[SfrInclude]

View file

@ -0,0 +1,281 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>2</fileVersion>
<fileChecksum>4138292931</fileChecksum>
<configuration>
<name>Debug</name>
<outputs>
<file>$PROJ_DIR$\Debug\Obj\FlashLoader.pbd</file>
<file>$PROJ_DIR$\framework2\flash_loader.c</file>
<file>$PROJ_DIR$\framework2\flash_loader_asm.s</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader.o</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Threads.h</file>
<file>$TOOLKIT_DIR$\inc\c\yvals.h</file>
<file>$TOOLKIT_DIR$\inc\c\stdint.h</file>
<file>$PROJ_DIR$\framework2\flash_loader.h</file>
<file>$PROJ_DIR$\framework2\flash_config.h</file>
<file>$PROJ_DIR$\framework2\flash_loader_extra.h</file>
<file>$TOOLKIT_DIR$\inc\c\ycheck.h</file>
<file>$PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.o</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Defaults.h</file>
<file>$TOOLKIT_DIR$\inc\c\xencoding_limits.h</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Product.h</file>
<file>$PROJ_DIR$\..\FlashRTL8195aMP.out</file>
<file>$PROJ_DIR$\Debug\Obj\hal_misc.pbi</file>
<file>$PROJ_DIR$\Debug\Obj\flash_MX25L8008.o</file>
<file>$TOOLKIT_DIR$\inc\c\stddef.h</file>
<file>$PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.pbi</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader.pbi</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader_asm.o</file>
<file>$PROJ_DIR$\Debug\Obj\flash_MX25L8008.pbi</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_timer.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_util.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_diag.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_irqn.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_peri_on.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\..\common\bsp\basic_types.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_peri_on.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_spi_flash.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_common.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\..\common\bsp\section_config.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_timer.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\core_cmFunc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\core_cm3.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_sys_on.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_pinmux.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_soc_ps_monitor.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\device\diag.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_platform.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_api.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_misc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_vector_table.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_spi_flash.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_efuse.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\core_cmInstr.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_log_uart.h</file>
<file>$PROJ_DIR$\flash_MX25L8008.c</file>
<file>$PROJ_DIR$\rtl8195a\hal_misc.c</file>
<file>$PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c</file>
<file>$TOOLKIT_DIR$\inc\c\ysizet.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a.h</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Product_string.h</file>
<file>$TOOLKIT_DIR$\lib\rt7M_tl.a</file>
<file>$PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.__cstat.et</file>
<file>$TOOLKIT_DIR$\inc\c\string.h</file>
<file>$TOOLKIT_DIR$\inc\c\stdlib.h</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader.__cstat.et</file>
<file>$PROJ_DIR$\Debug\Obj\hal_misc.__cstat.et</file>
<file>$PROJ_DIR$\Debug\Obj\flash_MX25L8008.__cstat.et</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_usb.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_dac.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_i2s.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_i2s.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_pwm.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_pwm.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_wdt.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_i2c.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_adc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_nfc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_i2c.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_dac.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_nfc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_adc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_usb.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_mii.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a_usb.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_mii.h</file>
<file>$TOOLKIT_DIR$\lib\m7M_tl.a</file>
<file>$TOOLKIT_DIR$\lib\dl7M_tln.a</file>
<file>$PROJ_DIR$\platform_autoconf.h</file>
<file>$PROJ_DIR$\..\FlashLoader.bin</file>
<file>$PROJ_DIR$\mx25l8008_flashloader_mp.icf</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_ssi.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_gdma.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_ssi.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_uart.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_gpio.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_gpio.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_gdma.h</file>
<file>$PROJ_DIR$\Debug\List\FlashRTL8195aMP.map</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_uart.h</file>
<file>$PROJ_DIR$\Debug\Obj\hal_misc.o</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c</file>
</outputs>
<file>
<name>$PROJ_DIR$\framework2\flash_loader.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 21</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 3</file>
</tool>
<tool>
<name>__cstat</name>
<file> 59</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 9 6 5 10 4 7 8 12 13 14 15</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 7 8 6 10 5 12 14 15 13 4 9</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\framework2\flash_loader_asm.s</name>
<outputs>
<tool>
<name>AARM</name>
<file> 22</file>
</tool>
</outputs>
</file>
<file>
<name>[ROOT_NODE]</name>
<outputs>
<tool>
<name>ILINK</name>
<file> 16 92</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\FlashRTL8195aMP.out</name>
<outputs>
<tool>
<name>ILINK</name>
<file> 92</file>
</tool>
<tool>
<name>OBJCOPY</name>
<file> 83</file>
</tool>
</outputs>
<inputs>
<tool>
<name>ILINK</name>
<file> 84 3 22 18 94 11 55 80 81</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\flash_MX25L8008.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 23</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 18</file>
</tool>
<tool>
<name>__cstat</name>
<file> 61</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 42 26 89 69 4 43 87 78 53 10 5 29 46 65 62 41 74 7 52 6 45 39 66 79 27 58 9 54 12 13 14 15 37 44 24 40 91 93 73 70 71 82 19 35 86 57 8 33 30 38 28 31 25 32 36 90 85 88 72 67 64 63 75 68 76 48 77 34 47</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 57 10 5 12 14 15 13 4 52 54 58 7 8 6 9 53 82 29 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\rtl8195a\hal_misc.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 17</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 94</file>
</tool>
<tool>
<name>__cstat</name>
<file> 60</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 42 24 10 26 91 89 69 93 70 13 15 87 78 37 44 40 73 71 29 53 74 41 43 45 46 39 66 65 62 79 12 14 82 6 33 30 38 28 27 31 25 32 36 86 90 85 88 72 67 64 63 75 68 76 48 77 5 4 34 35 19 52 47</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 20</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 11</file>
</tool>
<tool>
<name>__cstat</name>
<file> 56</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 27 72 36 26 33 39 90 48 29 6 65 38 31 86 67 75 68 89 87 69 42 53 82 30 28 25 32 24 85 88 64 63 74 76 77 5 10 4 34 35 79 45 37 41 43 44 46 40 91 93 66 73 70 71 62 12 13 14 15 19 52 47 78</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 20</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 11</file>
</tool>
<tool>
<name>__cstat</name>
<file> 56</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 27 72 36 26 33 39 90 48 29 6 65 38 31 86 67 75 68 89 87 69 42 53 82 30 28 25 32 24 85 88 64 63 74 76 77 5 10 4 34 35 79 45 37 41 43 44 46 40 91 93 66 73 70 71 62 12 13 14 15 19 52 47 78</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
</configuration>
</project>

View file

@ -12,7 +12,7 @@
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>27</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -89,7 +89,7 @@
</option>
<option>
<name>OCLastSavedByProductVersion</name>
<state>7.20.2.7418</state>
<state>7.50.2.10499</state>
</option>
<option>
<name>OCDownloadAttachToProgram</name>
@ -207,6 +207,10 @@
<name>OCMulticoreSlaveConfiguration</name>
<state></state>
</option>
<option>
<name>OCDownloadExtraImage</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -520,7 +524,7 @@
<name>IJET_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>3</version>
<version>6</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -718,6 +722,24 @@
<name>OCJetEmuParams</name>
<state>1</state>
</option>
<option>
<name>IjetPreferETB</name>
<state>1</state>
</option>
<option>
<name>IjetTraceSettingsList</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>IjetTraceSizeList</name>
<version>0</version>
<state>2</state>
</option>
<option>
<name>FlashBoardPathSlave</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1046,7 +1068,7 @@
<name>PEMICRO_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<version>2</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -1057,19 +1079,6 @@
<name>OCPEMicroAttachSlave</name>
<state>1</state>
</option>
<option>
<name>CCPEMicroInterfaceList</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CCPEMicroResetDelay</name>
<state></state>
</option>
<option>
<name>CCPEMicroJtagSpeed</name>
<state>#UNINITIALIZED#</state>
</option>
<option>
<name>CCJPEMicroShowSettings</name>
<state>0</state>
@ -1082,36 +1091,6 @@
<name>LogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCPEMicroUSBDevice</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CCPEMicroSerialPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CCJPEMicroTCPIPAutoScanNetwork</name>
<state>1</state>
</option>
<option>
<name>CCPEMicroTCPIP</name>
<state>10.0.0.1</state>
</option>
<option>
<name>CCPEMicroCommCmdLineProducer</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkInterfaceRadio</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkInterfaceCmdLine</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1175,7 +1154,7 @@
<name>STLINK_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<version>3</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -1207,6 +1186,71 @@
<name>CCSwoClockEdit</name>
<state>2000</state>
</option>
<option>
<name>DoLogfile</name>
<state>0</state>
</option>
<option>
<name>LogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCSTLinkDoUpdateBreakpoints</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkUpdateBreakpoints</name>
<state>_call_main</state>
</option>
<option>
<name>CCSTLinkCatchCORERESET</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchMMERR</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchNOCPERR</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchCHRERR</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchSTATERR</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchBUSERR</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchINTERR</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchHARDERR</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkCatchDummy</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkUsbSerialNo</name>
<state></state>
</option>
<option>
<name>CCSTLinkUsbSerialNoSelect</name>
<state>0</state>
</option>
<option>
<name>CCSTLinkJtagSpeedList</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1238,7 +1282,7 @@
<name>XDS100_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<version>4</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -1257,11 +1301,6 @@
<name>TIPackage</name>
<state></state>
</option>
<option>
<name>CCXds100InterfaceList</name>
<version>2</version>
<state>0</state>
</option>
<option>
<name>BoardFile</name>
<state></state>
@ -1274,6 +1313,129 @@
<name>LogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCXds100BreakpointRadio</name>
<state>0</state>
</option>
<option>
<name>CCXds100DoUpdateBreakpoints</name>
<state>0</state>
</option>
<option>
<name>CCXds100UpdateBreakpoints</name>
<state>_call_main</state>
</option>
<option>
<name>CCXds100CatchReset</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchUndef</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchSWI</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchData</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchPrefetch</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchIRQ</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchFIQ</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchCORERESET</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchMMERR</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchNOCPERR</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchCHRERR</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchSTATERR</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchBUSERR</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchINTERR</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchHARDERR</name>
<state>0</state>
</option>
<option>
<name>CCXds100CatchDummy</name>
<state>0</state>
</option>
<option>
<name>CCXds100CpuClockEdit</name>
<state>72.0</state>
</option>
<option>
<name>CCXds100SwoClockAuto</name>
<state>0</state>
</option>
<option>
<name>CCXds100SwoClockEdit</name>
<state>1000</state>
</option>
<option>
<name>CCXds100HWResetDelay</name>
<state>0</state>
</option>
<option>
<name>CCXds100ResetList</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CCXds100UsbSerialNo</name>
<state></state>
</option>
<option>
<name>CCXds100UsbSerialNoSelect</name>
<state>0</state>
</option>
<option>
<name>CCXds100JtagSpeedList</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CCXds100InterfaceRadio</name>
<state>0</state>
</option>
<option>
<name>CCXds100InterfaceCmdLine</name>
<state>0</state>
</option>
<option>
<name>CCXds100ProbeList</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<debuggerPlugins>
@ -1281,6 +1443,10 @@
<file>$TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\middleware\PercepioTraceExporter\PercepioTraceExportPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
@ -1305,6 +1471,10 @@
<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>

View file

@ -12,7 +12,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>22</version>
<version>24</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -27,11 +27,6 @@
<name>ListPath</name>
<state>Debug\List</state>
</option>
<option>
<name>Variant</name>
<version>21</version>
<state>38</state>
</option>
<option>
<name>GEndianMode</name>
<state>0</state>
@ -58,11 +53,6 @@
<name>GOutputBinary</name>
<state>0</state>
</option>
<option>
<name>FPU</name>
<version>3</version>
<state>0</state>
</option>
<option>
<name>OGCoreOrChip</name>
<state>0</state>
@ -87,7 +77,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>7.30.3.8061</state>
<state>7.50.2.10499</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -135,14 +125,9 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>21</version>
<state>38</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>21</version>
<version>22</version>
<state>38</state>
</option>
<option>
@ -157,6 +142,34 @@
<name>GRuntimeLibThreads</name>
<state>0</state>
</option>
<option>
<name>CoreVariant</name>
<version>22</version>
<state>38</state>
</option>
<option>
<name>GFPUDeviceSlave</name>
<state>LPC1850 NXP LPC1850</state>
</option>
<option>
<name>FPU2</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>NrRegs</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>NEON</name>
<state>0</state>
</option>
<option>
<name>GFPUCoreSlave2</name>
<version>22</version>
<state>38</state>
</option>
</data>
</settings>
<settings>
@ -596,16 +609,16 @@
<debug>1</debug>
<option>
<name>OOCOutputFormat</name>
<version>2</version>
<state>0</state>
<version>3</version>
<state>3</state>
</option>
<option>
<name>OCOutputOverride</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>OOCOutputFile</name>
<state>FlashLoader.srec</state>
<state>FlashLoader.bin</state>
</option>
<option>
<name>OOCCommandLineProducer</name>
@ -613,7 +626,7 @@
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>0</state>
<state>1</state>
</option>
</data>
</settings>
@ -736,7 +749,7 @@
</option>
<option>
<name>IlinkSuppressDiags</name>
<state></state>
<state>Lp048, Lp049</state>
</option>
<option>
<name>IlinkTreatAsRem</name>
@ -971,7 +984,7 @@
<name>$PROJ_DIR$\rtl8195a\hal_misc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c</name>
<name>$PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c</name>
</file>
</group>
<file>

View file

@ -22,6 +22,23 @@ HalReInitPlatformLogUart(
VOID
);
extern VOID
PatchHalInitPlatformTimer(
VOID
);
extern VOID
PatchHalInitPlatformLogUart(
VOID
);
extern VOID
PatchSpicInitRtl8195A
(
IN u8 InitBaudRate,
IN u8 SpicBitMode
);
extern VOID
SpicLoadInitParaFromClockRtl8195A
(
@ -70,7 +87,9 @@ SPIC_INIT_PARA SpicInitPara;
#define PATTERN_4 0x6231DCE5
#define DBGPRINT(fmt, arg...) do{ if( is_dbgmsg ) DiagPrintf(fmt, ##arg);}while(0)
#define DBGPRINT(fmt, arg...) do \
{ if( is_dbgmsg ) DiagPrintf(fmt, ##arg); }\
while(0)
//unsigned int fw_head[4] = {PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4};
unsigned int seg_head[4] = {0,0,0,0};
@ -123,7 +142,7 @@ FlashDownloadHalInitialROMCodeGlobalVar(VOID)
ConfigDebugInfo= 0x0;
ConfigDebugWarn= 0x0;
}
/*
static VOID
FlashDownloadHalCleanROMCodeGlobalVar(VOID)
{
@ -131,7 +150,7 @@ FlashDownloadHalCleanROMCodeGlobalVar(VOID)
ConfigDebugInfo= 0x0;
ConfigDebugWarn= 0x0;
}
*/
// Please clean this Array
extern SPIC_INIT_PARA SpicInitParaAllClk[3][CPU_CLK_TYPE_NO];
@ -178,7 +197,7 @@ uint32_t FlashInit(void *base_of_flash, uint32_t image_size, uint32_t link_addre
is_dbgmsg = 0;
if( (addr = (char*)find_option( "--img2_addr", 1, argc, argv))){
img2_addr = strtod(addr, NULL)/1024;
img2_addr = atol(addr)/1024; // strtod(addr, NULL)/1024; //
DBG_8195A(" image2 start address = %s, offset = %x\n\r", addr, img2_addr);
}else
img2_addr = 0;

View file

@ -21,6 +21,7 @@ define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
//do not initialize {readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };

View file

@ -0,0 +1,210 @@
/*
* Automatically generated by make menuconfig: don't edit
*/
#define AUTOCONF_INCLUDED
/*
* Target Platform Selection
*/
#define CONFIG_WITHOUT_MONITOR 1
#define CONFIG_RTL8195A 1
#undef CONFIG_FPGA
#undef CONFIG_RTL_SIM
#undef CONFIG_POST_SIM
/*
* < Mass Production Option
*/
#undef CONFIG_MP
#undef CONFIG_CP
#undef CONFIG_FT
#define RTL8195A 1
#define CONFIG_CPU_CLK 1
#define CONFIG_CPU_166_6MHZ 1
#undef CONFIG_CPU_83_3MHZ
#undef CONFIG_CPU_41_6MHZ
#undef CONFIG_CPU_20_8MHZ
#undef CONFIG_CPU_10_4MHZ
#undef CONFIG_CPU_4MHZ
#undef CONFIG_FPGA_CLK
#define PLATFORM_CLOCK (166666666)
#define CPU_CLOCK_SEL_VALUE (0)
#define CONFIG_SDR_CLK 1
#define CONFIG_SDR_100MHZ 1
#undef CONFIG_SDR_50MHZ
#undef CONFIG_SDR_25MHZ
#undef CONFIG_SDR_12_5MHZ
#define SDR_CLOCK_SEL_VALUE (0)
#define CONFIG_BOOT_PROCEDURE 1
#define CONFIG_IMAGE_PAGE_LOAD 1
#undef CONFIG_IMAGE_AUTO_LOAD
#define CONFIG_BOOT_TO_UPGRADE_IMG2 1
#undef CONFIG_PERI_UPDATE_IMG
#define CONFIG_BOOT_FROM_JTAG 1
#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE
#define CONFIG_KERNEL 1
#define PLATFORM_FREERTOS 1
#undef PLATFORM_UCOSII
#undef PLATFORM_ECOS
#undef CONFIG_TASK_SCHEDUL_DIS
#define TASK_SCHEDULER_DISABLED (0)
#define CONFIG_NORMALL_MODE 1
#undef CONFIG_MEMORY_VERIFY_MODE
#define CONFIG_TIMER_EN 1
#define CONFIG_TIMER_NORMAL 1
#undef CONFIG_TIMER_TEST
#define CONFIG_TIMER_MODULE 1
#define CONFIG_WDG 1
#undef CONFIG_WDG_NON
#define CONFIG_WDG_NORMAL 1
#define CONFIG_GDMA_EN 1
#define CONFIG_GDMA_NORMAL 1
#undef CONFIG_GDMA_TEST
#define CONFIG_GDMA_MODULE 1
#define CONFIG_WIFI_EN 1
#define CONFIG_WIFI_NORMAL 1
#undef CONFIG_WIFI_TEST
#define CONFIG_WIFI_MODULE 1
#define CONFIG_GPIO_EN 1
#define CONFIG_GPIO_NORMAL 1
#undef CONFIG_GPIO_TEST
#define CONFIG_GPIO_MODULE 1
#if defined(CONFIG_INIC) || (CONFIG_SDIOD)
#define CONFIG_SDIO_DEVICE_EN 1
#define CONFIG_SDIO_DEVICE_NORMAL 1
#undef CONFIG_SDIO_DEVICE_TEST
#define CONFIG_SDIO_DEVICE_MODULE 1
#else
#undef CONFIG_SDIO_DEVICE_EN
#endif
#define CONFIG_SDIO_HOST_EN 1
#define CONFIG_USB_EN 1
#undef CONFIG_USB_NORMAL
#define CONFIG_USB_TEST 1
#define CONFIG_USB_MODULE 1
#define CONFIG_USB_VERIFY 1
#undef CONFIG_USB_ROM_LIB
//#define CONFIG_USB_DBGINFO_EN 1
#ifdef CONFIG_INIC//defined(CONFIG_INIC)
#define DWC_DEVICE_ONLY 1
#else
#define DWC_HOST_ONLY 1
#define CONFIG_USB_HOST_ONLY 1
#endif
#define CONFIG_SPI_COM_EN 1
#define CONFIG_SPI_COM_NORMAL 1
#undef CONFIG_SPI_COM_TEST
#define CONFIG_SPI_COM_MODULE 1
#define CONFIG_UART_EN 1
#define CONFIG_UART_NORMAL 1
#undef CONFIG_UART_TEST
#define CONFIG_UART_MODULE 1
#define CONFIG_I2C_EN 1
#define CONFIG_I2C_NORMAL 1
#undef CONFIG_I2C_TEST
#define CONFIG_I2C_MODULE 1
#undef CONFIG_DEBUG_LOG_I2C_HAL
#undef CONFIG_PCM_EN
#define CONFIG_I2S_EN 1
#define CONFIG_I2S_NORMAL 1
#undef CONFIG_I2S_TEST
#define CONFIG_I2S_MODULE 1
#undef CONFIG_DEBUG_LOG_I2S_HAL
#define CONFIG_NFC_EN 1
#define CONFIG_NFC_NORMAL 1
#undef CONFIG_NFC_TEST
#define CONFIG_NFC_MODULE 1
#define CONFIG_SOC_PS_EN 1
#define CONFIG_SOC_PS_NORMAL 1
#undef CONFIG_SOC_PS_TEST
#define CONFIG_SOC_PS_MODULE 1
#define CONFIG_CRYPTO_EN 1
#define CONFIG_CRYPTO_NORMAL 1
#undef CONFIG_CRYPTO_TEST
#define CONFIG_CRYPTO_MODULE 1
#define CONFIG_MII_EN 1
#define CONFIG_PWM_EN 1
#define CONFIG_PWM_NORMAL 1
#undef CONFIG_PWM_TEST
#define CONFIG_PWM_MODULE 1
#define CONFIG_EFUSE_EN 1
#define CONFIG_EFUSE_NORMAL 1
#undef CONFIG_EFUSE_TEST
#define CONFIG_EFUSE_MODULE 1
#define CONFIG_SDR_EN 1
#define CONFIG_SDR_NORMAL 1
#undef CONFIG_SDR_TEST
#define CONFIG_SDR_MODULE 1
#define CONFIG_SPIC_EN 1
#define CONFIG_SPIC_NORMAL 1
#undef CONFIG_SPIC_TEST
#define CONFIG_SPIC_MODULE 1
#define CONFIG_ADC_EN 1
#define CONFIG_DAC_EN 1
#define CONFIG_NOR_FLASH 1
#undef CONFIG_SPI_FLASH
#undef CONFIG_NAND_FLASH
#undef CONFIG_NONE_FLASH
#undef CONFIG_BTBX_EN
/*
* < Engineer Mode Config
*/
#undef CONFIG_JTAG
#undef CONFIG_COMPILE_FLASH_DOWNLOAD_CODE
#undef CONIFG_COMPILE_EXTERNAL_SRAM_CALIBRATE
#undef CONFIG_CMSIS_MATH_LIB_EN
/*
* < Application Config
*/
#define CONFIG_NETWORK 1
#define CONFIG_RTLIB_EN 1
#define CONFIG_RTLIB_NORMAL 1
#undef CONFIG_RTLIB_TEST
#define CONFIG_RTLIB_MODULE 1
/*
* < System Debug Message Config
*/
#define CONFIG_UART_LOG_HISTORY 1
#undef CONFIG_CONSOLE_NORMALL_MODE
#define CONFIG_CONSOLE_VERIFY_MODE 1
#define CONFIG_DEBUG_LOG 1
#define CONFIG_DEBUG_ERR_MSG 1
#undef CONFIG_DEBUG_WARN_MSG
#undef CONFIG_DEBUG_INFO_MSG
/*
* < SDK Option Config
*/
#undef CONFIG_MBED_ENABLED
#undef CONFIG_APP_DEMO
/*
* < Select Chip Version
*/
#undef CONFIG_CHIP_A_CUT
#define CONFIG_CHIP_B_CUT 1
#undef CONFIG_CHIP_C_CUT
#undef CONFIG_CHIP_E_CUT
/*
* < Select toolchain
*/
#undef CONFIG_TOOLCHAIN_ASDK
#undef CONFIG_TOOLCHAIN_ARM_GCC
/*
* < Build Option
*/
#define CONFIG_LINK_ROM_LIB 1
#undef CONFIG_LINK_ROM_SYMB
#undef CONFIG_NORMAL_BUILD
#undef CONFIG_RELEASE_BUILD
#undef CONFIG_RELEASE_BUILD_LIBRARIES
#undef CONFIG_LIB_BUILD_RAM
#define CONFIG_RELEASE_BUILD_RAM_ALL 1
#undef CONFIG_IMAGE_ALL
#define CONFIG_IMAGE_SEPARATE 1

View file

@ -1,3 +1,4 @@
#include "rtl8195a.h"
typedef struct _UART_LOG_BUF_ {

View file

@ -0,0 +1,40 @@
@REM This batch file has been generated by the IAR Embedded Workbench
@REM C-SPY Debugger, as an aid to preparing a command line for running
@REM the cspybat command line utility using the appropriate settings.
@REM
@REM Note that this file is generated every time a new debug session
@REM is initialized, so you may want to move or rename the file before
@REM making changes.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
@echo off
if not "%~1" == "" goto debugFile
@echo on
"D:\MCU\IAR Systems\Embedded Workbench 7.3\common\bin\cspybat" -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.general.xcl" --backend -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.driver.xcl"
@echo off
goto end
:debugFile
@echo on
"D:\MCU\IAR Systems\Embedded Workbench 7.3\common\bin\cspybat" -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.general.xcl" "--debug_file=%~1" --backend -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.driver.xcl"
@echo off
:end

View file

@ -0,0 +1,23 @@
"--endian=little"
"--cpu=Cortex-M3"
"--fpu=None"
"--semihosting=none"
"--drv_communication=USB0"
"--drv_interface_speed=auto"
"--jlink_initial_speed=1000"
"--jlink_reset_strategy=0,0"
"--drv_catch_exceptions=0x000"
"--drv_swo_clock_setup=72000000,0,2000000"

View file

@ -0,0 +1,13 @@
"D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armproc.dll"
"D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armjlink2.dll"
"E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out"
--plugin "D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armbat.dll"
--macro "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\..\FlashRTL8195aMP.mac"

View file

@ -0,0 +1,16 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<crun>
<version>1</version>
<filter_entries>
<filter index="0" type="default">
<type>*</type>
<start_file>*</start_file>
<end_file>*</end_file>
<action_debugger>0</action_debugger>
<action_log>1</action_log>
</filter>
</filter_entries>
</crun>

View file

@ -0,0 +1,5 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Project/>

View file

@ -0,0 +1,22 @@
[SfrWindow]
Show=1 1
Sort=4 0
[Stack]
FillEnabled=0
OverflowWarningsEnabled=1
WarningThreshold=90
SpWarningsEnabled=1
WarnLogOnly=1
UseTrigger=1
TriggerName=main
LimitSize=0
ByteLimit=50
[JLinkDriver]
CStepIntDis=_ 0
[Disassemble mode]
mode=0
[Breakpoints2]
Count=0
[Aliases]
Count=0
SuppressDialog=0

View file

@ -0,0 +1,155 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>FlashLoader/Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
<Column0>282</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
</Workspace>
<Build>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows>
<Window>
<Factory>Select-Ambiguous-Definitions</Factory>
</Window>
</Windows>
</PreferedWindows>
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1392</ColumnWidth1><ColumnWidth2>371</ColumnWidth2><ColumnWidth3>92</ColumnWidth3></Build>
<PROJECT_GUI_CSTAT>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows/>
</PreferedWindows>
<col-names>
<item>Check</item>
<item>File</item>
<item>Line</item>
<item>Message</item>
<item>Severity</item>
</col-names>
<col-widths>
<item>200</item>
<item>200</item>
<item>100</item>
<item>662</item>
<item>100</item>
</col-widths>
</PROJECT_GUI_CSTAT>
<DRIVER_CUSTOM_SFR>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows/>
</PreferedWindows>
<col-names>
<item>Access</item>
<item>Address</item>
<item>Name</item>
<item>Size</item>
<item>Zone</item>
<item>_I0</item>
</col-names>
<col-widths>
<item>120</item>
<item>150</item>
<item>150</item>
<item>50</item>
<item>120</item>
<item>20</item>
</col-widths>
</DRIVER_CUSTOM_SFR>
<PROJECT_GUI_CALL_GRAPH>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows/>
</PreferedWindows>
<col-names>
<item>File</item>
<item>Function</item>
<item>Line</item>
</col-names>
<col-widths>
<item>200</item>
<item>700</item>
<item>100</item>
</col-widths>
</PROJECT_GUI_CALL_GRAPH>
<Select-Ambiguous-Definitions>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows>
<Window>
<Factory>Build</Factory>
</Window>
</Windows>
</PreferedWindows>
<ColumnWidth0>660</ColumnWidth0>
<ColumnWidth1>94</ColumnWidth1>
<ColumnWidth2>1132</ColumnWidth2>
</Select-Ambiguous-Definitions>
</Static>
<Windows>
<Wnd1>
<Tabs>
<Tab>
<Identity>TabID-6666-21578</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>FlashLoader</ExpandedNode><ExpandedNode>FlashLoader/Framework</ExpandedNode><ExpandedNode>FlashLoader/Output</ExpandedNode><ExpandedNode>FlashLoader/rtl8195a</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd1><Wnd2>
<Tabs>
<Tab>
<Identity>TabID-3028-28606</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd2></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\flash_MX25L8008.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>351</YPos2><SelStart2>10147</SelStart2><SelEnd2>10147</SelEnd2></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0096FCB8><key>iaridepm.enu1</key></Toolbar-0096FCB8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>768</Bottom><Right>356</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>104712</sizeHorzCX><sizeHorzCY>197824</sizeHorzCY><sizeVertCX>187435</sizeVertCX><sizeVertCY>761622</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1912</Right><x>-2</x><y>-2</y><xscreen>1914</xscreen><yscreen>200</yscreen><sizeHorzCX>1002094</sizeHorzCX><sizeHorzCY>197824</sizeHorzCY><sizeVertCX>104712</sizeVertCX><sizeVertCY>197824</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

View file

@ -0,0 +1,2 @@
[MainWindow]
WindowPlacement=_ 341 233 2261 1294 1

View file

@ -0,0 +1,53 @@
@set /a tmp = %1-1
@call :toHex %tmp% end1
@set /a tmp2 = %2-1
@call :toHex %tmp2% end2
@set /a tmp3 = %3-1
@call :toHex %tmp3% end0
@echo echo image 2 start %1
@echo echo image 1 end 0x%end1%
@echo off
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
@echo. >> tmp.board
@echo ^<flash_board^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %3 0x%end1%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--head^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x30000000 0x301FFFFF^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x10000000 0x%end0%^</ignore^> >> tmp.board
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
@echo ^</flash_board^> >> tmp.board >> tmp.board
exit
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
@echo off
SETLOCAL ENABLEDELAYEDEXPANSION
set /a dec=%~1
set "hex="
set "map=0123456789ABCDEF"
for /L %%N in (1,1,8) do (
set /a "d=dec&15,dec>>=4"
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
)
( ENDLOCAL & REM RETURN VALUES
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
)
EXIT /b

View file

@ -0,0 +1,69 @@
@set /a tmp = %1-1
@call :toHex %tmp% end1
@set /a tmp2 = %2-1
@call :toHex %tmp2% end2
@set /a tmp3 = %3-1
@call :toHex %tmp3% end3
@set /a tmp4 = %4
@call :toHex %tmp4% flash_run_start
@set /a tmp4 = %5-1
@call :toHex %tmp4% flash_run_end
@echo echo image 2 start %1
@echo echo image 1 end 0x%end1%
@echo off
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
@echo. >> tmp.board
@echo ^<flash_board^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x10000bc8 0x%end1%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--head >> tmp.board
@echo --img2_addr >> tmp.board
@echo 0xB000^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0xB000^</abs_offset^> >> tmp.board
@echo ^</pass^> >> tmp.board
if NOT "%3"=="0xFFFFFFFF" (
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x30000000 0x%end3%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x0000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
)
if NOT "%4"=="0xFFFFFFFF" (
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x%flash_run_start% 0x%flash_run_end%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0xA4000^</abs_offset^> >> tmp.board
@echo ^</pass^> >> tmp.board
)
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x10000000 0x10000bc7^</ignore^> >> tmp.board
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x1FFF0000 0x1FFFFFFF^</ignore^> >> tmp.board
@echo ^</flash_board^> >> tmp.board >> tmp.board
exit
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
@echo off
SETLOCAL ENABLEDELAYEDEXPANSION
set /a dec=%~1
set "hex="
set "map=0123456789ABCDEF"
for /L %%N in (1,1,8) do (
set /a "d=dec&15,dec>>=4"
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
)
( ENDLOCAL & REM RETURN VALUES
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
)
EXIT /b

View file

@ -0,0 +1,47 @@
cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
del Debug/Exe/target.map Debug/Exe/target.asm *.bin
cmd /c "%tooldir%\nm Debug/Exe/target.axf | %tooldir%\sort > Debug/Exe/target.map"
cmd /c "%tooldir%\objdump -d Debug/Exe/target.axf > Debug/Exe/target.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram4_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram4_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/target.axf Debug/Exe/ram_1.bin
%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/target.axf Debug/Exe/sdram.bin
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head
%tooldir%\pick %ram2_start% %ram2_end% Debug\Exe\ram_1.bin Debug\Exe\ram_2.p.bin body
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% Debug\Exe\sdram.bin Debug\Exe\ram_3.p.bin body
)
:: SDRAM case
if defined %ram3_start (
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin+Debug\Exe\ram_3.p.bin Debug\Exe\ram_all.bin
)
:: NO SDRAM case
if not defined %ram3_start (
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin Debug\Exe\ram_all.bin
)
:: board generator
%tooldir%\..\gen_board.bat %ram2_start% %ram2_end% %ram1_start%
exit

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Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0

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set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set alinkdir=%1\..\..\..\component\common\application\alink
::echo %tooldir% > %alinkdir%\test.txt
::echo %alinkdir% >> %alinkdir%\test.txt
cd /D %tooldir%
::echo "%tooldir%\iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a" >> %alinkdir%\test.txt
echo cmd /c iarchive.exe --create lib_alink.a >out.bat
cmd /c "iarchive.exe -t %alinkdir%\lib_porting.a" >>out.bat
cmd /c "iarchive.exe -t %alinkdir%\cloud\lib\libalink.a" >>out.bat
cmd /c "iarchive.exe -t %alinkdir%\zconfig\lib\libaws.a" >>out.bat
cmd /c sed ':a;N;$ s/\n/ /g;ba' out.bat > out1.bat
cmd /c "iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a"
cmd /c "iarchive.exe --extract %alinkdir%\zconfig\lib\libaws.a"
cmd /c "iarchive.exe --extract %alinkdir%\lib_porting.a"
cmd /c "out1.bat"
del %alinkdir%\lib_porting.a
cmd /c copy lib_alink.a %alinkdir%
del *.o
del *.bat
del *.a
exit

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Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c "+WScript.Arguments.Item(0)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_alink.bat "+WScript.Arguments.Item(0), 0

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cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
del Debug/Exe/bootloader.map Debug/Exe/bootloader.asm *.bin
cmd /c "%tooldir%\nm Debug/Exe/bootloader.axf | %tooldir%\sort > Debug/Exe/bootloader.map"
cmd /c "%tooldir%\objdump -d Debug/Exe/bootloader.axf > Debug/Exe/bootloader.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/ram_1.bin
::%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/sdram.bin
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head 0xb000
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.r.bin raw
:: update ram_1.p.bin, raw file for application
copy Debug\Exe\ram_1.p.bin %libdir%\image\ram_1.p.bin
copy Debug\Exe\ram_1.r.bin %libdir%\image\ram_1.r.bin
:: delete hal_spi_flash_ram.o object after image built
del Debug\Obj\hal_spi_flash_ram.*
exit

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Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img1.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0

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cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
set cfgdir=%3
echo config %3
del %cfgdir%/Exe/target.map %cfgdir%/Exe/application.asm *.bin
cmd /c "%tooldir%\nm %cfgdir%/Exe/application.axf | %tooldir%\sort > %cfgdir%/Exe/application.map"
cmd /c "%tooldir%\objdump -d %cfgdir%/Exe/application.axf > %cfgdir%/Exe/application.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set flash_run_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set flash_run_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A3 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/ram_2.bin
if defined %ram3_start (
%tooldir%\objcopy -j "A5 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/sdram.bin
)
if defined %flash_run_start (
%tooldir%\objcopy -j "A7 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/flash_run.bin
) else (
set flash_run_start=0xFFFFFFFF
set flash_run_end=0xFFFFFFFF
)
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.p.bin body+reset_offset+sig
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.ns.bin body+reset_offset
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% %cfgdir%\Exe\sdram.bin %cfgdir%\Exe\ram_3.p.bin body+reset_offset
)
:: force update ram_1.p.bin
del %cfgdir%\Exe\ram_1.p.bin
:: check ram_1.p.bin exist, copy default
if not exist %cfgdir%\Exe\ram_1.p.bin (
copy %libdir%\image\ram_1.p.bin %cfgdir%\Exe\ram_1.p.bin
)
::if not exist %cfgdir%\Exe\data.p.bin (
:: copy %tooldir%\..\image\data.p.bin %cfgdir%\Exe\data.p.bin
::)
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
%tooldir%\padding 44k 0xFF %cfgdir%\Exe\ram_1.p.bin
:: SDRAM case
if defined %ram3_start (
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ram_all.bin
copy /b %cfgdir%\Exe\ram_2.ns.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ota.bin
)
:: NO SDRAM case
if not defined %ram3_start (
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin %cfgdir%\Exe\ram_all.bin
copy /b %cfgdir%\Exe\ram_2.ns.bin %cfgdir%\Exe\ota.bin
set ram3_end=0xFFFFFFFF
)
%tooldir%\checksum %cfgdir%\Exe\ota.bin
:: board generator
%tooldir%\..\gen_board_img2.bat %ram2_start% %ram2_end% %ram3_end% %flash_run_start% %flash_run_end%
exit

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Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img2.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+""" """+WScript.Arguments.Item(2)+"""""", 0

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cd /D %2
set bindir=application/Debug/bin
set bindirw=application\Debug\bin
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
echo %tooldir%
echo %libdir%
::del Debug/Exe/target.map Debug/Exe/application.asm *.bin
cmd /c "%tooldir%\nm %bindir%/application.elf | %tooldir%\sort > %bindir%/application.nm.map"
cmd /c "%tooldir%\objdump -d %bindir%/application.elf > %bindir%/application.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
::echo %ram1_start% > tmp.txt
echo %ram2_start%
echo %ram3_start%
::echo %ram1_end% >> tmp.txt
echo %ram2_end%
echo %ram3_end%
%tooldir%\objcopy -j .image2.start.table -j .ram_image2.text -j .ram.data -Obinary %bindir%/application.elf %bindir%/ram_2.bin
if NOT %ram3_start% == %ram3_end% (
%tooldir%\objcopy -j .sdr_data -Obinary %bindir%/application.elf %bindir%/sdram.bin
)
%tooldir%\pick %ram2_start% %ram2_end% %bindirw%\ram_2.bin %bindirw%\ram_2.p.bin body+reset_offset+sig
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% %bindirw%\sdram.bin %bindirw%\ram_3.p.bin body+reset_offset
)
:: check ram_1.p.bin exist, copy default
if not exist %bindirw%\ram_1.p.bin (
copy %libdir%\image\ram_1.p.bin %bindirw%\ram_1.p.bin
)
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
%tooldir%\padding 44k 0xFF %bindirw%\ram_1.p.bin
:: SDRAM case
if defined %ram3_start (
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ram_all.bin
copy /b %bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ota.bin
)
%tooldir%\checksum Debug\Exe\ota.bin
:: NO SDRAM case
if not defined %ram3_start (
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin %bindirw%\ram_all.bin
copy /b %bindirw%\ram_2.p.bin %bindirw%\ota.bin
)
exit

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cd /D %1
set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%1\..\..\..\component\soc\realtek\8195a\misc\bsp
:: Generate build_info.h
echo off
::echo %date:~0,10%-%time:~0,8%
::echo %USERNAME%
for /f "usebackq" %%i in (`hostname`) do set hostname=%%i
::echo %hostname%
echo #define UTS_VERSION "%date:~0,10%-%time:~0,8%" > ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_TIME "%date:~0,10%-%time:~0,8%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_DATE "%date:~0,4%%date:~5,2%%date:~8,2%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_BY "%USERNAME%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_HOST "%hostname%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_DOMAIN >> ..\inc\build_info.h
echo #define RTL195AFW_COMPILER "IAR compiler" >> ..\inc\build_info.h
echo. > main.icf
for /f "delims=" %%i in ('cmd /c "%tooldir%\coan defs -g e ../src/main.c | %tooldir%\grep "#define" | %tooldir%\grep __ICFEDIT_region_BD_RAM_start__ | %tooldir%\gawk '{print $3}'"') do set BD_RAM_start=%%i
if defined %BD_RAM_start (
echo define symbol __ICFEDIT_region_BD_RAM_start__ = %BD_RAM_start%; >> main.icf
echo define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006CFFF; >> main.icf
)
exit

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Option Explicit
DIM fso
Dim WshShell
Set fso = CreateObject("Scripting.FileSystemObject")
If (fso.FileExists("""" & WScript.Arguments(0) & """\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat")) Then
MsgBox "script not exist " & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat" , vbinformation
WScript.Quit()
End If
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """"" & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat"" """ & WScript.Arguments(0) & """""", 0, true

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//DRAM_INFO
__var DeviceType;
__var Page;
__var Bank;
__var DqWidth;
//DRAM_MODE_REG_INFO
__var BstLen;
__var BstType;
__var Mode0Cas;
__var Mode0Wr;
__var Mode1DllEnN;
__var Mode1AllLat;
__var Mode2Cwl;
//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
__var DramTimingTref;
__var DramRowNum;
__var Tck;
//DRAM_TIMING_INFO
__var TrfcPs;
__var TrefiPs;
__var WrMaxTck;
__var TrcdPs;
__var TrpPs;
__var TrasPs;
__var TrrdTck;
__var TwrPs;
__var TwtrTck;
__var TmrdTck;
__var TrtpTck;
__var TccdTck;
__var TrcPs;
//DRAM_DEVICE_INFO
__var DdrPeriodPs;
__var DfiRate;
__config_dram_param(){
__var CsBstLen;
__var CasWr;
__var CasRd;
__var CasRdT;
__var ClrSrt;
__var AddLat;
__var DramEmr2;
__var DramMr0;
__var CrTwr;
__var DramMaxWr;
__var DramWr;
__var CrTrtw;
__var CrTrtwT;
__var DramPeriod;
__var DdrType;
//__var paDqWidth;
//__var paPage;
//__var paDfiRate
__var tmp;
// Register dram common.mac
//__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__load_dram_common();
// Load parameter
__load_dram_param();
DfiRate = 1<<DfiRate;
DramPeriod = DdrPeriodPs*DfiRate;
DramMaxWr= (WrMaxTck)/(DfiRate) +1;
DramWr = ((TwrPs) / DramPeriod)+1;
CrTwr = ((TwrPs) / DramPeriod) + 3;
if (CrTwr < DramMaxWr) {
CrTwr = CrTwr;
}else {
CrTwr = DramMaxWr;
}
if(DeviceType==2){ // Case DDR2
DdrType = 2;
if (BstLen == 0){
CsBstLen = 0;
CrTrtwT = 4;
DramMr0 = 2;
}else{
CsBstLen = 1;
CrTrtwT = 6;
DramMr0 = 3;
}
CasRd = Mode0Cas;
AddLat = Mode1AllLat;
CasWr = CasRd + AddLat -1;
DramEmr2 = 0;
DramMr0 =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
}
if(DeviceType==3){ // Case DDR3
DdrType = 3;
if (BstLen==0){
CsBstLen = 0; //bst_4
DramMr0 = 2;
}else{
CsBstLen = 1; // bst_8
DramMr0 = 0;
}
CrlSrt = (Mode0Cas >> 1);
if (((Mode0Cas) & 0x1) ) {
CasRdT = CrlSrt+ 12;
}else{
CasRdT = CrlSrt+ 4;
}
AddLat = 0;
if (Mode1AllLat == 1) { // CL-1
AddLat = CasRd -1;
}
if (Mode1AllLat == 2){ // CL-2
AddLat = CasRd -2;
}
CasRd = CasRdT + AddLat;
CasWr = Mode2Cwl + 5 + AddLat;
DramEmr2 = Mode2Cwl << 3;
DramWr = (DramWr + 1) / 2;
if (DramWr == 16) {
DramWr = 0;
}
if (DramWr <= 9) { // 5< wr <= 9
DramWr = DramWr - 4;
}
DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
CrTrtwT = (CasRdT + 6) - CasWr;
}
if (DeviceType == 8){
DdrType = 8;
if (BstLen == 0) {
DramMr0 = 2; // bst_4
CsBstLen = 0; //bst_4
CasRd = 0x2;
} else {
DramMr0 = 3; // bst_8
CsBstLen = 1; // bst_8
CasRd = 0x3;
}
CasWr = 0;
DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
}
// countting tRTW
if ((CrTrtwT & 0x1)) {
CrTrtw = (CrTrtwT+1) /(DfiRate);
} else {
CrTrtw = CrTrtwT /(DfiRate);
}
DqWidth = DqWidth;
Page = Page +1; // DQ16 -> memory:byte_unit *2
if (DqWidth == 1) { // paralle dq_16 => Page + 1
Page = Page +1;
}
// REG_SDR_MISC
tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
__writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
// REG_SDR_DCR
tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
__writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
// REG_SDR_IOCR
tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
__writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
if(DeviceType != 8){
tmp =DramEmr2;
__writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
__writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
}
tmp =DramMr0;
__writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
tmp =(CrTrtw << 20) |
((((TwtrTck)/DfiRate)+3) << 17) |
((((TccdTck)/DfiRate)+1) << 14) |
((((TrcdPs)/DramPeriod)+1) << 10) |
((((TrcPs)/DramPeriod)+1) << 4 ) |
(((TrrdTck/DfiRate)+1) << 0);
__writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
__writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
// Set Idle
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
// start init
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
// enter memory mode
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
}
__config_dram_param_fixed(){
__var tmp;
// Dram Attribute
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
__mem_test(){
__var i;
__var vaddr;
__var tmp;
i=0;
while(i<10){
vaddr = 0x30000000+((i*23)&0x1FFFFC);
__writeMemory32(0x55AA55AA, vaddr, "Memory");
tmp = __readMemory32(vaddr,"Memory");
if(tmp!=0x55AA55AA)
return 1;
i=i+1;
}
return 0;
}
__var ok_pipe_id0;
__var ok_pipe_id1;
__var ok_tpc_min0;
__var ok_tpc_max0;
__var ok_tpc_min1;
__var ok_tpc_max1;
__var tpc0_cnt;
__var tpc1_cnt;
// calibration result
__var isCalibrationDone;
__dram_calibration(){
__var rdp;
__var tpc;
__var rdp_reg;
__var tpc_reg;
__var err_cnt;
__var ok_cnt;
ok_cnt=0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
err_cnt=0;
// try pipe
__writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
// try tpc
__writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
if(__mem_test()==0){
if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
}else{
err_cnt++;
}
}
if(ok_pipe_id0!=15){
ok_pipe_id1 = ok_pipe_id0;
ok_tpc_min1 = ok_tpc_min0;
ok_tpc_max1 = ok_tpc_max0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
}
}
tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
if(tpc0_cnt<0) tpc0_cnt = 0;
tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
if(tpc1_cnt<0) tpc1_cnt = 0;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}
__setup_system()
{
__var tmp;
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__config_dram_param();
if(isCalibrationDone){
__var rdp_reg;
__var tpc_reg;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}else{
// Calibration
__dram_calibration();
isCalibrationDone = 1;
}
}
execUserPreload()
{
// Register dram common.mac
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__message "User Preload....";
//isCalibrationDone = 0;
__setup_system();
}
execUserSetup()
{
__var tmp;
__message "User Setup....";
// if use normal reset, please unmark those 2 lines
//execUserPreload();
__setup_system();
//__loadImage("$TARGET_PATH$", 0, 0);
// DISABLE DRAM init
tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
__writeMemory32(tmp, 0x40000210, "Memory");
}

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