mirror of
https://github.com/pvvx/RTL00MP3.git
synced 2025-07-31 12:41:06 +00:00
up freertos v9.0.0
This commit is contained in:
parent
abb51466bd
commit
b882fe7efb
132 changed files with 50587 additions and 2707 deletions
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@ -168,7 +168,7 @@
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#define BIT_PESOC_SPI1_SCLK_SEL BIT(18)
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#define BIT_SHIFT_PESOC_PERI_SCLK_SEL 16
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#define BIT_MASK_PESOC_PERI_SCLK_SEL 0x3
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#define BIT_MASK_PESOC_PERI_SCLK_SEL 0x3 // 0 - CLK, 1 - CLK/2, 2 - CLK/4, 3 - CLK/8
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#define BIT_PESOC_PERI_SCLK_SEL(x) (((x) & BIT_MASK_PESOC_PERI_SCLK_SEL) << BIT_SHIFT_PESOC_PERI_SCLK_SEL)
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@ -2630,14 +2630,14 @@ SoCPWRIdleTaskHandleTest(
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DiagPrintf("0x2009F408 : 0x%x\n", HAL_READ32(0x2009F400,8));
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DiagPrintf("\n");
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HAL_WRITE32(0x40000000,0x330,0x55559555);//0x55552a2a
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HAL_WRITE32(PERI_ON_BASE,0x330,0x55559555);//0x55552a2a
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//slp pg GPIOD GPIOE
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HAL_WRITE32(0x40000000,0x334,0x55555555);
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HAL_WRITE32(0x40000000,0x338,0x05555555);
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HAL_WRITE32(0x40000000,0x33c,0x55555555);
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HAL_WRITE32(0x40000000,0x340,0x55555555);
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HAL_WRITE32(0x40000000,0x344,0x55555555);
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HAL_WRITE32(0x40000000,0x320,0x0);
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HAL_WRITE32(PERI_ON_BASE,0x334,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x338,0x05555555);
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HAL_WRITE32(PERI_ON_BASE,0x33c,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x340,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x344,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x320,0x0);
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HAL_WRITE32(0x20080000, 0, (HAL_READ32(0x20080000,0)+1));
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HAL_WRITE32(0x20080000, 4, (HAL_READ32(0x20080000,4)+1));
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@ -2648,22 +2648,22 @@ SoCPWRIdleTaskHandleTest(
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}
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}
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//mem test
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if (HAL_READ8(0x40000000,0xf1) == 0xaa) {
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if (HAL_READ8(SYSTEM_CTRL_BASE,0xf1) == 0xaa) {
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CMDTemp[0] = 8;
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SOCPSTestApp((VOID*)CMDTemp);
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Rtemp = HAL_READ32(0x40080000,0x824);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x824);
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Rtemp2 = Rtemp;
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Rtemp2 = ((Rtemp2 & 0x807fffff) | 0x80000000);
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HAL_WRITE32(0x40080000,0x824,Rtemp&0x7fffffff);
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HAL_WRITE32(0x40080000,0x824,Rtemp2);
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HAL_WRITE32(0x40080000,0x824,(Rtemp|0x80000000));
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Rtemp1 = HAL_READ32(0x40080000,0x820)&BIT8;
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HAL_WRITE32(WIFI_REG_BASE,0x824,Rtemp&0x7fffffff);
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HAL_WRITE32(WIFI_REG_BASE,0x824,Rtemp2);
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HAL_WRITE32(WIFI_REG_BASE,0x824,(Rtemp|0x80000000));
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Rtemp1 = HAL_READ32(WIFI_REG_BASE,0x820)&BIT8;
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if (Rtemp1) {
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Rtemp = HAL_READ32(0x40080000,0x8b8)&0xfffff;
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x8b8)&0xfffff;
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}
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else {
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Rtemp = HAL_READ32(0x40080000,0x8a0)&0xfffff;
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x8a0)&0xfffff;
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}
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if(Rtemp== 0x00045678){
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Chktemp = 1;
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@ -2673,16 +2673,16 @@ SoCPWRIdleTaskHandleTest(
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&SoCPSMEMTestChk(0x1FFF4000,0x5000,0x12345678);
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if (Chktemp) {
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HAL_WRITE32(0x40080000,0x4,(HAL_READ32(0x40080000,0x4)&0xFFFFFFF0));
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HAL_WRITE32(0x40000000,0xfc,(HAL_READ32(0x40000000,0xfc)+1));
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DiagPrintf("run %d times\n", HAL_READ32(0x40000000,0xfc));
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HAL_WRITE32(WIFI_REG_BASE,0x4,(HAL_READ32(WIFI_REG_BASE,0x4)&0xFFFFFFF0));
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HAL_WRITE32(SYSTEM_CTRL_BASE,0xfc,(HAL_READ32(SYSTEM_CTRL_BASE,0xfc)+1));
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DiagPrintf("run %d times\n", HAL_READ32(SYSTEM_CTRL_BASE,0xfc));
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CMDTemp[0] = 1;
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CMDTemp[1] = 5;
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CMDTemp[2] = 0xff;
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SOCPSTestApp((VOID*)CMDTemp);
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}
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else {
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HAL_WRITE32(0x40000000,0xf0,0);
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HAL_WRITE32(SYSTEM_CTRL_BASE,0xf0,0);
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}
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}
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@ -2973,14 +2973,14 @@ SOCPSTestApp(
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case 0:
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DiagPrintf("SoC PWR Init wlan\n");
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Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,0x214)|BIT16;
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HAL_WRITE32(SYSTEM_CTRL_BASE,0x214,Rtemp);
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Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,REG_SOC_HCI_COM_FUNC_EN)|BIT_SOC_HCI_WL_MACON_EN;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_SOC_HCI_COM_FUNC_EN,Rtemp);
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Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,0x244)|BIT0;
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HAL_WRITE32(SYSTEM_CTRL_BASE,0x244,Rtemp);
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Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,REG_PESOC_COM_CLK_CTRL1)|BIT_SOC_ACTCK_WL_EN;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_PESOC_COM_CLK_CTRL1,Rtemp);
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Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,0x210)|BIT2;
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HAL_WRITE32(SYSTEM_CTRL_BASE,0x210,Rtemp);
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Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,REG_SOC_FUNC_EN)|BIT_SOC_LXBUS_EN;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_SOC_FUNC_EN,Rtemp);
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HalDelayUs(100);
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@ -2989,10 +2989,10 @@ SOCPSTestApp(
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#if 0
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DiagPrintf("SoC PWR debug setting\n");
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Rtemp = 0;
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HAL_WRITE32(SYSTEM_CTRL_BASE,0x33c,Rtemp);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_GPIO_PULL_CTRL3,Rtemp);
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Rtemp = 0;
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HAL_WRITE32(SYSTEM_CTRL_BASE,0x334,Rtemp);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_GPIO_PULL_CTRL1,Rtemp);
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#if 0
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//en debug
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@ -3027,8 +3027,8 @@ SOCPSTestApp(
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//HAL_WRITE32(0x40001000,0x4,0x4000000);
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//SIC EN
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//HAL_WRITE32(0x40000000,0x8,0x81000010);
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//HAL_WRITE32(0x40000000,0xA4,0x00000001);
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//HAL_WRITE32(SYSTEM_CTRL_BASE,0x8,0x81000010);
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//HAL_WRITE32(SYSTEM_CTRL_BASE,0xA4,0x00000001);
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//Wait for LogUart print out
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while(1) {
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@ -3040,14 +3040,14 @@ SOCPSTestApp(
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#if 0
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HAL_WRITE32(0x40000000,0x330,0x55559555);//0x55552a2a
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL0,0x55559555);//0x55552a2a
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//slp pg GPIOD GPIOE
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HAL_WRITE32(0x40000000,0x334,0x55555555);
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HAL_WRITE32(0x40000000,0x338,0x05555555);
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HAL_WRITE32(0x40000000,0x33c,0x55555555);
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HAL_WRITE32(0x40000000,0x340,0x55555555);
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HAL_WRITE32(0x40000000,0x344,0x55555555);
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HAL_WRITE32(0x40000000,0x320,0x0);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL1,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL2,0x05555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL3,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL4,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL5,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_SHTDN_CTRL,0x0);
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#endif
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ChangeSoCPwrState(TestParameter[1], TestParameter[2]);
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@ -3062,27 +3062,27 @@ SOCPSTestApp(
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case 2:
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#if 1
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HAL_WRITE32(0x40000000,0x320,0x7ff);
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HAL_WRITE32(0x40000000,0x330,0x5565A555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_SHTDN_CTRL,0x7ff);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL0,0x5565A555);
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//slp pg GPIOD GPIOE
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HAL_WRITE32(0x40000000,0x334,0x55555555);
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HAL_WRITE32(0x40000000,0x338,0x05555555);
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HAL_WRITE32(0x40000000,0x33c,0x55555555);
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HAL_WRITE32(0x40000000,0x340,0x55555555);
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HAL_WRITE32(0x40000000,0x344,0x55555555);
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HAL_WRITE32(0x40000000,0x348,0x55555555);
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HAL_WRITE32(0x40000000,0x320,0x0);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL1,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL2,0x05555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL3,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL4,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL5,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_PULL_CTRL6,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_SHTDN_CTRL,0x0);
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HAL_WRITE32(0x40000000,0x8,0x80000011);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_SYS_FUNC_EN,0x80000011);
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#endif
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HAL_WRITE32(SYSTEM_CTRL_BASE, 0X120, TestParameter[1]);
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HAL_WRITE32(SYSTEM_CTRL_BASE, 0X124, TestParameter[2]);
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_OPTION, TestParameter[1]);
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_OPTION_EXT, TestParameter[2]);
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if (TestParameter[4] == 0xff) {
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//SIC EN
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HAL_WRITE32(0x40000000,0x320,0x4);
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HAL_WRITE32(0x40000000,0x8,0xC1000010);
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HAL_WRITE32(0x40000000,0xA4,0x00000001);
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HAL_WRITE32(PERI_ON_BASE,REG_GPIO_SHTDN_CTRL,0x4);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_SYS_FUNC_EN,0xC1000010);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_SYS_PINMUX_CTRL,0x00000001);
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}
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, TestParameter[3]);
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@ -3097,8 +3097,8 @@ SOCPSTestApp(
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break;
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case 3:
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HAL_WRITE32(SYSTEM_CTRL_BASE, 0X120, 0x74000e00);
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HAL_WRITE32(SYSTEM_CTRL_BASE, 0X124, 2);
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_OPTION, 0x74000e00);
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_OPTION_EXT, 2);
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, TestParameter[1]);
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#if 0
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{
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@ -3182,27 +3182,27 @@ SOCPSTestApp(
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Rtemp = 0x00000001;
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_SLP_WAKE_EVENT_MSK0, Rtemp);
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#if 0
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HAL_WRITE32(0x40000000,0x330,0x55559555);//0x55552a2a
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HAL_WRITE32(0x40000000,0x2C0,0x100001);
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HAL_WRITE32(PERI_ON_BASE,0x330,0x55559555);//0x55552a2a
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HAL_WRITE32(PERI_ON_BASE,0x2C0,0x100001);
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//slp pg GPIOD GPIOE
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HAL_WRITE32(0x40000000,0x334,0x55555555);
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HAL_WRITE32(0x40000000,0x338,0x05555555);
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HAL_WRITE32(0x40000000,0x33c,0x55555555);
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HAL_WRITE32(0x40000000,0x340,0x55555555);
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HAL_WRITE32(0x40000000,0x344,0x55555555);
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HAL_WRITE32(0x40000000,0x320,0x0);
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HAL_WRITE32(PERI_ON_BASE,0x334,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x338,0x05555555);
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HAL_WRITE32(PERI_ON_BASE,0x33c,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x340,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x344,0x55555555);
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HAL_WRITE32(PERI_ON_BASE,0x320,0x0);
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#endif
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HAL_WRITE32(SYSTEM_CTRL_BASE, 0X120, TestParameter[1]);
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HAL_WRITE32(SYSTEM_CTRL_BASE, 0X124, TestParameter[2]);
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if (HAL_READ32(0x40000000,0xf4) == 0x11) {
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HAL_WRITE32(0x40000000,0x8,0x80000011);
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if (HAL_READ32(SYSTEM_CTRL_BASE,0xf4) == 0x11) {
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HAL_WRITE32(SYSTEM_CTRL_BASE,0x8,0x80000011);
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}
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if (TestParameter[4] == 0xff) {
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//SIC EN
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HAL_WRITE32(0x40000000,0x8,0x81000010);
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HAL_WRITE32(0x40000000,0xA4,0x00000001);
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HAL_WRITE32(SYSTEM_CTRL_BASE,0x8,0x81000010);
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HAL_WRITE32(SYSTEM_CTRL_BASE,0xA4,0x00000001);
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}
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HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, TestParameter[3]);
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@ -3267,27 +3267,27 @@ SOCPSTestApp(
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case 8:
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DiagPrintf("enable wifi\n");
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Rtemp = HAL_READ32(0x40000000,0x214)|0x10000;
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HAL_WRITE32(0x40000000,0x214,Rtemp);
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Rtemp = HAL_READ32(0x40000000,0x244)|0x1;
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HAL_WRITE32(0x40000000,0x244,Rtemp);
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Rtemp = HAL_READ32(0x40000000,0x210)|0x4;
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HAL_WRITE32(0x40000000,0x210,Rtemp);
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Rtemp = HAL_READ32(PERI_ON_BASE,REG_SOC_HCI_COM_FUNC_EN)|BIT_SOC_HCI_WL_MACON_EN;
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HAL_WRITE32PERI_ON_BASE,REG_SOC_HCI_COM_FUNC_EN,Rtemp);
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Rtemp = HAL_READ32(PERI_ON_BASE,REG_PESOC_COM_CLK_CTRL1)|BIT_SOC_ACTCK_WL_EN;
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HAL_WRITE32(PERI_ON_BASE,REG_PESOC_COM_CLK_CTRL1,Rtemp);
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Rtemp = HAL_READ32(PERI_ON_BASE,REG_SOC_FUNC_EN)|BIT_SOC_LXBUS_EN;
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HAL_WRITE32(PERI_ON_BASE,REG_SOC_FUNC_EN,Rtemp);
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Rtemp = HAL_READ32(0x40080000,0x0)&0xFFFFFFDF;
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HAL_WRITE32(0x40080000,0x0,Rtemp);
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Rtemp = HAL_READ32(0x40080000,0x4)|0x1;
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HAL_WRITE32(0x40080000,0x4,Rtemp);
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Rtemp = HAL_READ32(0x40080000,0x20)|0x1;
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HAL_WRITE32(0x40080000,0x20,Rtemp);
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while( (HAL_READ32(0x40080000,0x20)&BIT0)!=0);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x0)&0xFFFFFFDF;
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HAL_WRITE32(WIFI_REG_BASE,0x0,Rtemp);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x4)|0x1;
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HAL_WRITE32(WIFI_REG_BASE,0x4,Rtemp);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x20)|0x1;
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HAL_WRITE32(WIFI_REG_BASE,0x20,Rtemp);
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while( (HAL_READ32(WIFI_REG_BASE,0x20)&BIT0)!=0);
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Rtemp = HAL_READ32(0x40080000,0x4)|0x30000;
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HAL_WRITE32(0x40080000,0x4,Rtemp);
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Rtemp = HAL_READ32(0x40080000,0x4)|0x7000000;
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HAL_WRITE32(0x40080000,0x4,Rtemp);
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Rtemp = HAL_READ32(0x40080000,0x50)&0xFFFFFF00;
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HAL_WRITE32(0x40080000,0x50,Rtemp);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x4)|0x30000;
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HAL_WRITE32(WIFI_REG_BASE,0x4,Rtemp);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x4)|0x7000000;
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HAL_WRITE32(WIFI_REG_BASE,0x4,Rtemp);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x50)&0xFFFFFF00;
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HAL_WRITE32(WIFI_REG_BASE,0x50,Rtemp);
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break;
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case 9:
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@ -3315,18 +3315,18 @@ SOCPSTestApp(
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break;
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case 10:
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Rtemp = HAL_READ32(0x40080000,0x824);
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x824);
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Rtemp2 = Rtemp;
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Rtemp2 = Rtemp2 & 0x807fffff | (TestParameter[1]<<23) | 0x80000000;
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HAL_WRITE32(0x40080000,0x824,Rtemp&0x7fffffff);
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HAL_WRITE32(0x40080000,0x824,Rtemp2);
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HAL_WRITE32(0x40080000,0x824,Rtemp|0x80000000);
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Rtemp1 = HAL_READ32(0x40080000,0x820)&BIT8;
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HAL_WRITE32(WIFI_REG_BASE,0x824,Rtemp&0x7fffffff);
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HAL_WRITE32(WIFI_REG_BASE,0x824,Rtemp2);
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HAL_WRITE32(WIFI_REG_BASE,0x824,Rtemp|0x80000000);
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Rtemp1 = HAL_READ32(WIFI_REG_BASE,0x820)&BIT8;
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if (Rtemp1) {
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Rtemp = HAL_READ32(0x40080000,0x8b8)&0xfffff;
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x8b8)&0xfffff;
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}
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else {
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Rtemp = HAL_READ32(0x40080000,0x8a0)&0xfffff;
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Rtemp = HAL_READ32(WIFI_REG_BASE,0x8a0)&0xfffff;
|
||||
}
|
||||
DiagPrintf("rf offset: 0x%x, 0x%x\n", TestParameter[1], Rtemp);
|
||||
break;
|
||||
|
|
@ -3334,7 +3334,7 @@ SOCPSTestApp(
|
|||
case 11://addr [1]; date [2]
|
||||
TestParameter[1] &= 0x3f;
|
||||
Rtemp = (TestParameter[1]<<20)|(TestParameter[2]&0x000fffff)&0x0fffffff;
|
||||
HAL_WRITE32(0x40080000,0x840,Rtemp);
|
||||
HAL_WRITE32(WIFI_REG_BASE,0x840,Rtemp);
|
||||
|
||||
//SoCPWRIdleTaskHandle();
|
||||
break;
|
||||
|
|
@ -3348,19 +3348,19 @@ SOCPSTestApp(
|
|||
break;
|
||||
|
||||
case 14:
|
||||
HAL_WRITE32(0x40000000,TestParameter[1],0x12345678);
|
||||
DiagPrintf("w32: 0x%x\n", HAL_READ32(0x40000000,TestParameter[1]));
|
||||
HAL_WRITE32(0x40000000,TestParameter[1],0);
|
||||
HAL_WRITE16(0x40000000,TestParameter[1],0x1234);
|
||||
DiagPrintf("w16: 0x%x\n", HAL_READ32(0x40000000,TestParameter[1]));
|
||||
HAL_WRITE32(0x40000000,TestParameter[1],0);
|
||||
HAL_WRITE8(0x40000000,TestParameter[1],0x12);
|
||||
DiagPrintf("w8: 0x%x\n", HAL_READ32(0x40000000,TestParameter[1]));
|
||||
HAL_WRITE32(0x40000000,TestParameter[1],0x12345678);
|
||||
DiagPrintf("R32: 0x%x\n", HAL_READ32(0x40000000,TestParameter[1]));
|
||||
DiagPrintf("R16: 0x%x\n", HAL_READ16(0x40000000,TestParameter[1]));
|
||||
DiagPrintf("R8: 0x%x\n", HAL_READ8(0x40000000,TestParameter[1]));
|
||||
Rtemp = ((HAL_READ32(0x40000000,0xf4))?1:0);
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE,TestParameter[1],0x12345678);
|
||||
DiagPrintf("w32: 0x%x\n", HAL_READ32(SYSTEM_CTRL_BASE,TestParameter[1]));
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE,TestParameter[1],0);
|
||||
HAL_WRITE16(SYSTEM_CTRL_BASE,TestParameter[1],0x1234);
|
||||
DiagPrintf("w16: 0x%x\n", HAL_READ32(SYSTEM_CTRL_BASE,TestParameter[1]));
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE,TestParameter[1],0);
|
||||
HAL_WRITE8(SYSTEM_CTRL_BASE,TestParameter[1],0x12);
|
||||
DiagPrintf("w8: 0x%x\n", HAL_READ32(SYSTEM_CTRL_BASE,TestParameter[1]));
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE,TestParameter[1],0x12345678);
|
||||
DiagPrintf("R32: 0x%x\n", HAL_READ32(SYSTEM_CTRL_BASE,TestParameter[1]));
|
||||
DiagPrintf("R16: 0x%x\n", HAL_READ16(SYSTEM_CTRL_BASE,TestParameter[1]));
|
||||
DiagPrintf("R8: 0x%x\n", HAL_READ8(SYSTEM_CTRL_BASE,TestParameter[1]));
|
||||
Rtemp = ((HAL_READ32(SYSTEM_CTRL_BASE,0xf4))?1:0);
|
||||
DiagPrintf("R: 0x%x\n", Rtemp);
|
||||
break;
|
||||
|
||||
|
|
@ -3463,7 +3463,7 @@ SOCPSTestApp(
|
|||
break;
|
||||
}
|
||||
}
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE, 0X2c0, 0x0);
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_CPU_PERIPHERAL_CTRL, 0x0);
|
||||
|
||||
GpioPsPullCtrl();
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue