diff --git a/RTL00_SDKV35a/component/common/api/at_cmd/log_service.c b/RTL00_SDKV35a/component/common/api/at_cmd/log_service.c index f49b355..2a9c025 100644 --- a/RTL00_SDKV35a/component/common/api/at_cmd/log_service.c +++ b/RTL00_SDKV35a/component/common/api/at_cmd/log_service.c @@ -415,6 +415,7 @@ void log_service(void *param) #if CONFIG_INIC_EN inic_cmd_ioctl = 0; #endif + extern int tcm_heap_freeSpace(void); _AT_DBG_MSG(AT_FLAG_COMMON, AT_DBG_ALWAYS, "\n\r[MEM] After do cmd, available heap %d+%d\n\r", xPortGetFreeHeapSize(), tcm_heap_freeSpace()); _AT_DBG_MSG(AT_FLAG_COMMON, AT_DBG_ALWAYS, "\r\n\n# "); //"#" is needed for mp tool #if CONFIG_EXAMPLE_UART_ATCMD @@ -493,5 +494,5 @@ void at_log_init(void) { log_service_add_table(at_log_items, sizeof(at_log_items)/sizeof(at_log_items[0])); } -log_module_init(at_log_init); +//log_module_init(at_log_init); #endif diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c index 6f76970..d8421f3 100644 --- a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c +++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c @@ -634,12 +634,39 @@ int wifi_is_ready_to_transceive(rtw_interface_t interface) { } return RTW_ERROR; } - //----------------------------------------------------------------------------// -int wifi_set_mac_address(char * mac) { - char buf[13 + 17 + 1]; - rtw_memset(buf, 0, sizeof(buf)); - snprintf(buf, 13 + 17, "write_mac %s", mac); +int mactostr(char * s, unsigned char *mac, bool fmt) +{ + char *ptrb = s; + unsigned char *ptrm = mac; + int i = 6; + while(i--) { + unsigned char x = ptrm[0] >> 4; + if (x <= 9) ptrb[0] = x + '0'; + else ptrb[0] = x - 10 + 'a'; + ptrb++; + x = ptrm[0] & 0x0f; + if (x <= 9) ptrb[0] = x + '0'; + else ptrb[0] = x - 10 + 'a'; + ptrb++; + ptrm++; + if(fmt && i) { + ptrb[0] = ':'; + ptrb++; + } + }; + *ptrb = '\0'; + if (fmt) return 12+5; + return 12; +} +//----------------------------------------------------------------------------// +int wifi_set_mac_address(char * new_mac) { +// char buf[13 + 17 + 1]; + char buf[10 + 12 + 1]; + memcpy(buf,"write_mac ", 10); +// snprintf(buf, 13 + 17, "write_mac %s", mac); +//BAG NotWork! rtl_sprintf(buf, "write_mac %02x%02x%02x%02x%02x%02x", new_mac[0], new_mac[1], new_mac[2], new_mac[3], new_mac[4], new_mac[5]); + mactostr(&buf[10], new_mac, false); return wext_private_command(WLAN0_NAME, buf, SHOW_PRIVATE_OUT); } @@ -656,6 +683,7 @@ int wifi_get_mac_address(char * mac) { return ret; } + //----------------------------------------------------------------------------// int wifi_enable_powersave(void) { return wext_enable_powersave(WLAN0_NAME, 1, 1); diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.h b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.h index 99ff05d..040299d 100644 --- a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.h +++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.h @@ -703,6 +703,8 @@ int wifi_disable_packet_filter(unsigned char filter_id); int wifi_remove_packet_filter(unsigned char filter_id); #endif +int mactostr(char * s, unsigned char *mac, bool fmt); + #ifdef __cplusplus } #endif diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_simple_config.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_simple_config.c index 924bb2a..fa22cce 100644 --- a/RTL00_SDKV35a/component/common/api/wifi/wifi_simple_config.c +++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_simple_config.c @@ -280,8 +280,9 @@ int SC_send_simple_config_ack(u8 round) #endif } } - +#if LEAVE_ACK_EARLY leave_ack: +#endif close(ack_socket); #endif @@ -296,7 +297,6 @@ leave_ack: static int SC_check_and_show_connection_info(void) { - rtw_wifi_setting_t setting; int ret = -1; #if CONFIG_LWIP_LAYER @@ -308,6 +308,7 @@ static int SC_check_and_show_connection_info(void) #endif #if CONFIG_EXAMPLE_UART_ATCMD == 0 + rtw_wifi_setting_t setting; wifi_get_setting(WLAN0_NAME, &setting); wifi_show_setting(WLAN0_NAME, &setting); #endif @@ -614,7 +615,7 @@ int SC_connect_to_candidate_AP (rtw_network_info_t *wifi){ } /* call wifi scan to scan */ - if(scan_cnt = (wifi_scan(RTW_SCAN_TYPE_ACTIVE, RTW_BSS_TYPE_ANY, &scan_buf)) < 0){ + if((scan_cnt = (wifi_scan(RTW_SCAN_TYPE_ACTIVE, RTW_BSS_TYPE_ANY, &scan_buf))) < 0){ printf("ERROR: wifi scan failed\n"); ret = RTW_ERROR; }else{ @@ -696,7 +697,7 @@ enum sc_result SC_connect_to_AP(void) goto wifi_connect_fail; } rtw_join_status = 0;//clear simple config status - ret = wifi_connect(g_bssid, + ret = wifi_connect(g_bssid, 1, (char*)wifi.ssid.val, wifi.security_type, @@ -704,7 +705,7 @@ enum sc_result SC_connect_to_AP(void) wifi.key_id, NULL); - if (ret == RTW_SUCCESS) + if (ret == 0) goto wifi_connect_success; if (retry == max_retry) { @@ -718,7 +719,7 @@ enum sc_result SC_connect_to_AP(void) #if 1 /* when optimization fail: if connect with bssid fail because of we have connect to the wrong AP */ ret = SC_connect_to_candidate_AP(&wifi); - if (RTW_SUCCESS == ret) { + if (ret == 0) { goto wifi_connect_success; } else { ret = SC_JOIN_BSS_FAIL; @@ -769,15 +770,15 @@ extern void rtk_sc_deinit(void); void init_simple_config_lib_config(struct simple_config_lib_config* config) { - config->free = rtw_mfree; - config->malloc = rtw_malloc; + config->free = (simple_config_free_fn) rtw_mfree; + config->malloc = (simple_config_malloc_fn) rtw_malloc; config->memcmp = memcmp; config->memcpy = memcpy; - config->memset = memset; + config->memset = (simple_config_memset_fn) memset; config->printf = printf; config->strcpy = strcpy; config->strlen = strlen; - config->zmalloc = rtw_zmalloc; + config->zmalloc = (simple_config_zmalloc_fn) rtw_zmalloc; #if CONFIG_LWIP_LAYER config->_ntohl = lwip_ntohl; #else diff --git a/RTL00_SDKV35a/component/common/application/uart_adapter/uart_adapter.c b/RTL00_SDKV35a/component/common/application/uart_adapter/uart_adapter.c index db44023..4e4171c 100644 --- a/RTL00_SDKV35a/component/common/application/uart_adapter/uart_adapter.c +++ b/RTL00_SDKV35a/component/common/application/uart_adapter/uart_adapter.c @@ -280,14 +280,14 @@ int uartadapter_uart_open(ua_socket_t *ua_socket, ua_uart_set_str *puartpara) serial_rx_fifo_level(&ua_socket->uart.uart_sobj, FifoLvHalf); //---------------------------- add Flow - #define rxflow UA_UART_RTS_PIN - #define txflow UA_UART_CTS_PIN +// #define rxflow UA_UART_RTS_PIN +// #define txflow UA_UART_CTS_PIN if(puartpara->FlowControl){ pin_mode(txflow, PullDown); // init CTS in low - serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlRTSCTS, rxflow, txflow); + serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlRTSCTS);//, rxflow, txflow); } else - serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlNone, rxflow, txflow); + serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlNone);//, rxflow, txflow); //---------------------------- add Flow /*uart irq handle*/ diff --git a/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.c b/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.c index 2305952..7763b3d 100644 --- a/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.c +++ b/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.c @@ -269,10 +269,9 @@ int reset_uart_atcmd_setting(){ return 0; } -#if ATCMD_RX_GPIO_WAKEUP +#ifdef UART_AT_RX_WAKE // UART_RX #if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1) #include "gpio_irq_api.h" -#define UART_AT_RX_WAKE UART_RX void gpio_uart_at_rx_irq_callback (uint32_t id, gpio_irq_event event) { /* PMU_LOGUART_DEVICE is also handled in log service. @@ -289,7 +288,6 @@ void uart_at_rx_wakeup() gpio_irq_enable(&gpio_rx_wake); } #endif -#endif void uart_atcmd_reinit(UART_LOG_CONF* uartconf){ serial_baud(&at_cmd_sobj,uartconf->BaudRate); @@ -297,14 +295,12 @@ void uart_atcmd_reinit(UART_LOG_CONF* uartconf){ // set flow control, only support RTS and CTS concurrent mode // rxflow and tx flow is fixed by hardware -#define rxflow UART_RTS -#define txflow UART_CTS if(uartconf->FlowControl){ pin_mode(txflow, PullDown); //init CTS in low - serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS, rxflow, txflow); + serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS); // , rxflow, txflow); } else - serial_set_flow_control(&at_cmd_sobj, FlowControlNone, rxflow, txflow); + serial_set_flow_control(&at_cmd_sobj, FlowControlNone); // , rxflow, txflow); } void uart_at_send_string(char *str) @@ -532,10 +528,10 @@ void uart_atcmd_main(void) #define txflow UART_CTS if(uartconf.FlowControl){ pin_mode(txflow, PullDown); //init CTS in low - serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS, rxflow, txflow); + serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS); //, rxflow, txflow); } else - serial_set_flow_control(&at_cmd_sobj, FlowControlNone, rxflow, txflow); + serial_set_flow_control(&at_cmd_sobj, FlowControlNone); //, rxflow, txflow); /*uart_at_lock_init();*/ @@ -550,7 +546,7 @@ void uart_atcmd_main(void) serial_irq_handler(&at_cmd_sobj, uart_irq, (uint32_t)&at_cmd_sobj); serial_irq_set(&at_cmd_sobj, RxIrq, 1); -#if ATCMD_RX_GPIO_WAKEUP +#ifdef UART_AT_RX_WAKE #if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1) uart_at_rx_wakeup(); #endif diff --git a/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.h b/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.h index 9f31f9d..c52f0a0 100644 --- a/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.h +++ b/RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.h @@ -12,20 +12,48 @@ #include "semphr.h" /*UART Pinmux*/ -#define CONFIG_AMEBA1 1 -#if CONFIG_AMEBA1 -#define UART_TX PA_4 -#define UART_RX PA_0 -#define UART_RTS PA_2 -#define UART_CTS PA_1 -#else -#define UART_TX PA_23 -#define UART_RX PA_18 -#define UART_RTS PA_22 -#define UART_CTS PA_19 +#if defined(RTL8710AF) && defined(RTL8711AM) +#if 1 +// RTL8711AM + RTL8710AF + RTL8195AM +#define UART_TX PE_0 +#define UART_RX PE_3 +#define UART_AT_RX_WAKE PE_3 +#define UART_RTS PE_1 +#define UART_CTS PE_2 +#elif 0 +// RTL8711AM + RTL8710AF +#define UART_TX PC_3 +#define UART_RX PC_0 // no Interrupt! +//#define UART_AT_RX_WAKE PE_3 +#define UART_RTS PC_2 +#define UART_CTS PC_1 +#elif 0 +// RTL8711AM - RAK473 +#define UART_TX PA_7 +#define UART_RX PA_6 // no Interrupt! +//#define UART_RX_INT PE_3 +#define UART_RTS PA_3 +#define UART_CTS PA_5 +#endif + +#elif defined(RTL8710AF) +// RTL8710AF +#define UART_TX PA_4 +#define UART_RX PA_0 +#define UART_AT_RX_WAKE PA_0 +#define UART_RTS PA_2 +#define UART_CTS PA_1 + +#elif defined(RTL8711AM) +// RTL8711AM - RAK473 +#define UART_TX PA_7 +#define UART_RX PA_6 // no Interrupt! +//#define UART_AT_RX_WAKE PE_3 +#define UART_RTS PA_3 +#define UART_CTS PA_5 + #endif -#define ATCMD_RX_GPIO_WAKEUP 0 #define KEY_NL 0xa // '\n' #define KEY_ENTER 0xd // '\r' #define KEY_BS 0x8 diff --git a/RTL00_SDKV35a/component/common/mbed/hal/serial_api.h b/RTL00_SDKV35a/component/common/mbed/hal/serial_api.h index 2b0f0c4..f61bb55 100644 --- a/RTL00_SDKV35a/component/common/mbed/hal/serial_api.h +++ b/RTL00_SDKV35a/component/common/mbed/hal/serial_api.h @@ -67,7 +67,7 @@ void serial_break_clear(serial_t *obj); void serial_pinout_tx(PinName tx); -void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow); +void serial_set_flow_control(serial_t *obj, FlowControl type); // , PinName rxflow, PinName txflow); #ifdef __cplusplus } diff --git a/RTL00_SDKV35a/component/common/mbed/hal_ext/flash_api.h b/RTL00_SDKV35a/component/common/mbed/hal_ext/flash_api.h index 00ab5d2..95aaf69 100644 --- a/RTL00_SDKV35a/component/common/mbed/hal_ext/flash_api.h +++ b/RTL00_SDKV35a/component/common/mbed/hal_ext/flash_api.h @@ -47,6 +47,7 @@ int flash_set_extend_addr (flash_t * obj, uint32_t data); int flash_get_extend_addr (flash_t * obj); unsigned int flash_get_size (flash_t *obj); int flash_otp_read (flash_t *obj, uint32_t address, uint32_t Length, uint8_t * data); +unsigned int flash_read_id (flash_t *obj); #ifdef __cplusplus } diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c index 86978a6..09484e0 100644 --- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c +++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c @@ -589,6 +589,27 @@ unsigned int flash_get_size(flash_t *obj) { return flashchip_size; } +unsigned int flash_read_id(flash_t *obj) +{ + flash_turnon(); + /* Disable SPI_FLASH User Mode */ + HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); + + /* Set Ctrlr1; 1 byte data frames */ + HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(3)); + + /* Send flash RX command and read the data */ + SpicRxCmdRefinedRtl8195A(FLASH_CMD_RDID, obj->SpicInitPara); + unsigned int ret = HAL_SPI_READ32(REG_SPIC_DR0); + + /* Disable SPI_FLASH User Mode */ + HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); + + SpicDisableRtl8195A(); + return ret; +} + + /* * Read Flash OTP data */ @@ -604,6 +625,7 @@ int flash_otp_read(flash_t *obj, uint32_t address, uint32_t Length, switch (flashobj.SpicInitPara.flashtype) { case FLASH_MXIC_4IO: case FLASH_MXIC: // Only 512 bits + case FLASH_OTHERS: #if CONFIG_DEBUG_LOG > 4 DBG_SPIF_INFO("MXIC: Only 512 bits!\n"); #endif @@ -629,9 +651,10 @@ int flash_otp_read(flash_t *obj, uint32_t address, uint32_t Length, ret = 0; break; default: - DBG_8195A("Flash type?"); + DBG_8195A("Flash type [%06x]?\n", flash_read_id(&flashobj)); ret = 0; } SpicDisableRtl8195A(); return ret; } + diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c index 0f495b6..b3afb49 100644 --- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c +++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c @@ -438,7 +438,7 @@ void serial_recv_comp_handler(serial_t *obj, void *handler, uint32_t id) pHalRuartAdapter->RxCompCbPara = (void*)id; } -void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) +void serial_set_flow_control(serial_t *obj, FlowControl type) // , PinName rxflow, PinName txflow) { PHAL_RUART_ADAPTER pHalRuartAdapter; diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c index e30679c..6b43b35 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c @@ -611,7 +611,7 @@ SpicReadIDRtl8195A( SpicInitPara.flashtype = FLASH_MICRON; else if(SpicInitPara.id[0] == 0xC2) SpicInitPara.flashtype = FLASH_MXIC; - else if(SpicInitPara.id[0] == 0xEF) + else if(SpicInitPara.id[0] == 0xEF || SpicInitPara.id[0] == 0xC8) // + GigaDevice SpicInitPara.flashtype = FLASH_WINBOND; else SpicInitPara.flashtype = FLASH_OTHERS; diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c index 6ab2366..26dadfa 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c @@ -16,6 +16,7 @@ #include "freertos_pmu.h" #endif #include "tcm_heap.h" +//#include "log_service.h" //MON_RAM_BSS_SECTION UART_LOG_CTL UartLogCtl; //MON_RAM_BSS_SECTION UART_LOG_CTL *pUartLogCtl; @@ -274,7 +275,7 @@ extern xSemaphoreHandle log_rx_interrupt_sema; //====================================================== void console_cmd_exec(PUART_LOG_CTL pUartLogCtlExe) { - u8 CmdCnt = 0; +// u8 CmdCnt = 0; u8 argc = 0; u8 **argv; //u32 CmdNum; @@ -311,6 +312,7 @@ RtlConsolTaskRam( ) { #if SUPPORT_LOG_SERVICE + extern void log_service_init(void); log_service_init(); #else #ifdef CONFIG_AT_USR diff --git a/RTL00_SDKV35a/flasher.mk b/RTL00_SDKV35a/flasher.mk index 93a1b3e..4d9136f 100644 --- a/RTL00_SDKV35a/flasher.mk +++ b/RTL00_SDKV35a/flasher.mk @@ -178,53 +178,66 @@ flash_OTA: #@taskkill /F /IM $(JLINK_GDBSRV) else - -flashburn: - @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ - -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ - -c "rtl8710_flash_write $(RAM1P_IMAGE) 0" \ - -c "rtl8710_flash_write $(RAM2P_IMAGE) 0xb000" \ - -c "rtl8710_reboot" -c "reset run" -c shutdown - -flashimage2p: - @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ - -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ - -c "rtl8710_flash_write $(RAM2P_IMAGE) 0xb000" \ - -c "rtl8710_reboot" -c "reset run" -c shutdown - -flashwebfs: - @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ - -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ - -c "rtl8710_flash_write $(BIN_DIR)/WEBFiles.bin 0xd0000" \ - -c "rtl8710_reboot" -c "reset run" -c shutdown +ifeq ($(FLASHER_TYPE),cmsis-dap) +FLASHER:=cmsis-dap flashboot: - @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ - -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ - -c "rtl8710_flash_write $(RAM1P_IMAGE) 0" \ - -c "rtl8710_reboot" -c "reset run" -c shutdown + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \ + -c 'rtl8710_flash_write $(RAM1P_IMAGE) 0' \ + -c 'rtl8710_reboot' -c 'reset run' -c shutdown +flashburn: + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \ + -c 'rtl8710_flash_write $(RAM1P_IMAGE) 0' \ + -c 'rtl8710_flash_write $(RAM2P_IMAGE) 0xb000' \ + -c 'rtl8710_reboot' -c 'reset run' -c shutdown + +flashimage2p: + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \ + -c 'rtl8710_flash_write $(RAM2P_IMAGE) 0xb000' \ + -c 'rtl8710_reboot' -c 'reset run' -c shutdown + +flash_OTA: + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \ + -c 'rtl8710_flash_write $(RAM2P_IMAGE) 0x80000' \ + -c 'rtl8710_reboot' -c 'reset run' -c shutdown + flashespfs: - @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ - -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ - -c "rtl8710_flash_write $(BIN_DIR)/webpages.espfs 0xd0000" \ - -c "rtl8710_reboot" -c "reset run" -c shutdown + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \ + -c 'rtl8710_flash_write $(BIN_DIR)/webpages.espfs 0xd0000' \ + -c 'rtl8710_reboot' -c 'reset run' -c shutdown reset: -# @$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) flasher/RTLreset.JLinkScript - @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ - -c "rtl8710_reboot" -c shutdown + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'mww 0x40000210 0x111157' -c 'rtl8710_reboot' -c shutdown runram: -# @$(JLINK_PATH)$(JLINK_GDB) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED) -# @$(GDB) -x flasher/gdb_run_ram.jlink -# @taskkill.exe -F -IM $(JLINK_GDB) - @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ - -c "load_image $(RAM1R_IMAGE) 0x10000bc8 bin" \ - -c "load_image $(RAM2_IMAGE) 0x10006000 bin" \ - -c "mww 0x40000210 0x20200113" \ - -c "reset run" -c shutdown + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'load_image $(RAM1R_IMAGE) 0x10000bc8 bin' \ + -c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \ + -c 'mww 0x40000210 0x20111157' -c 'rtl8710_reboot' -c shutdown +runsdram: + @$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \ + -f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \ + -c 'load_image $(RAM1R_IMAGE) 0x10000bc8 bin' \ + -c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \ + -c 'boot_load_srdam $(RAM3_IMAGE) 0x30000000' \ + -c shutdown + +endif endif $(NMAPFILE): $(ELFFILE) diff --git a/RTL00_SDKV35a/flasher/rtl8710.ocd b/RTL00_SDKV35a/flasher/rtl8710.ocd index 2f2b102..dffd423 100644 --- a/RTL00_SDKV35a/flasher/rtl8710.ocd +++ b/RTL00_SDKV35a/flasher/rtl8710.ocd @@ -338,3 +338,18 @@ proc rtl8710_reboot {} { mww 0xE000ED0C 0x05FA0007 } +proc boot_load_srdam {local_filename loc} { + echo "# Set flag WISDRAM" + mww 0x1FFF0000 0x12345678 + mww 0x40000210 0x20011113 + resume + echo "# Wait Init SDRAM..." +# sleep 1000 + while {[rtl8710_flasher_mrw 0x1FFF0000] == 0x12345678 } { sleep 10 } + halt + echo "# Load SDRAM image..." + load_image $local_filename $loc + resume +# echo "# Go" + mww 0x1FFF0000 1 +} diff --git a/build/bin/ota.bin b/build/bin/ota.bin index 23fd19b..a64596d 100644 Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ diff --git a/build/bin/ram_1.p.bin b/build/bin/ram_1.p.bin index 5d0d745..62b1cd0 100644 Binary files a/build/bin/ram_1.p.bin and b/build/bin/ram_1.p.bin differ diff --git a/build/bin/ram_2.bin b/build/bin/ram_2.bin index bc2aec9..81f0255 100644 Binary files a/build/bin/ram_2.bin and b/build/bin/ram_2.bin differ diff --git a/build/bin/ram_2.ns.bin b/build/bin/ram_2.ns.bin index 6b86165..8f727e5 100644 Binary files a/build/bin/ram_2.ns.bin and b/build/bin/ram_2.ns.bin differ diff --git a/build/bin/ram_2.p.bin b/build/bin/ram_2.p.bin index a2cffef..f699226 100644 Binary files a/build/bin/ram_2.p.bin and b/build/bin/ram_2.p.bin differ diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin index 6c631e3..d81153b 100644 Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ diff --git a/build/obj/build.nmap b/build/obj/build.nmap index 361a7b3..5dfed86 100644 --- a/build/obj/build.nmap +++ b/build/obj/build.nmap @@ -779,25 +779,25 @@ 100020c0 T gBoot_Gpio_Adapter 100020c0 t __ram_image_end__ 100021ec T SpicInitParaAllClk +100023d4 t tab_seg_def 10002400 B __rom_heap_start__ 10002400 B end -10002430 t tab_seg_def -10002468 t txt_tab_seg -10002488 t flashcpy -10002528 t get_seg_id -10002558 t RtlConsolRam -1000257c T InitSpicFlashType -100025bc t EnterImage15 -10002c8c t RtlBoot4ToSram -10002c92 t RtlBoot3ToSram -10002c98 t RtlBoot2ToSram -10002c9e t RtlBoot1ToSram -10002ca4 t RtlBootToFlash -10002cac t InitTabParaAllClk -10002cf4 T spic_table_flash -10002d10 T __image1_bss_end__ -10002d10 T __image1_bss_start__ -10002d10 T __ram_image1_text_end__ +1000240c t txt_tab_seg +1000242c t flashcpy +100024cc t get_seg_id +100024fc t RtlConsolRam +10002520 T InitSpicFlashType +10002560 t EnterImage15 +10002a80 t RtlBoot4ToSram +10002a86 t RtlBoot3ToSram +10002a8c t RtlBoot2ToSram +10002a92 t RtlBoot1ToSram +10002a98 t RtlBootToFlash +10002aa0 t InitTabParaAllClk +10002ae8 T spic_table_flash +10002b04 T __image1_bss_end__ +10002b04 T __image1_bss_start__ +10002b04 T __ram_image1_text_end__ 10003000 B __ram_heap1_start__ 10003000 B __rom_heap_end__ 10006000 D .image2.start.table1$$Base @@ -811,2381 +811,2365 @@ 10006040 T SDIO_Device_Off 10006064 T SYSPlatformInit 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_rtw_init_sta_recv_priv -10025334 T _rtw_init_recv_priv -100253dc T rtw_mfree_recv_priv_lock -10025410 T _rtw_alloc_recvframe -10025442 T rtw_alloc_recvframe -10025468 T rtw_free_recvframe -10025504 T _rtw_enqueue_recvframe -10025530 T rtw_enqueue_recvframe -1002555a T rtw_free_recvframe_queue -10025592 T rtw_free_uc_swdec_pending_queue -100255ba T _rtw_free_recv_priv -100255ea T rtw_free_buf_pending_queue -100255ee T recvframe_chkmic -100256ec T decryptor -10025788 T portctrl -100257fe T recv_decache -1002582c T process_pwrbit_data -1002586c T process_wmmps_data -100258f4 T count_rx_stats -10025968 T sta2sta_data_frame -10025aa4 T ap2sta_data_frame -10025bd0 T sta2ap_data_frame -10025c58 T validate_recv_ctrl_frame -10025df2 T validate_recv_data_frame -1002604c T wlanhdr_to_ethhdr -10026188 T recvframe_defrag -10026232 T recvframe_chk_defrag -100262e8 T validate_recv_mgnt_frame -10026324 T validate_recv_frame -100263ec T recv_indicatepkt_reorder -1002640e T process_recv_indicatepkts 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ratetbl_val_2wifirate -10026fd8 T is_basicrate -10027004 T ratetbl2rateset -10027048 T get_rate_set -10027072 T UpdateBrateTbl -100270a4 T UpdateBrateTblForSoftAP -100270d8 T Save_DM_Func_Flag -100270ee T Restore_DM_Func_Flag -10027104 T Switch_DM_Func -10027120 T Set_MSR -10027144 T set_opmode -10027188 T SelectChannel -100271bc T SetBWMode -100271f8 T set_channel_bwmode -1002724e T get_my_bssid -10027252 T get_beacon_interval -10027270 T is_client_associated_to_ap -10027288 T is_client_associated_to_ibss -100272a4 T is_IBSS_empty -100272c6 T decide_wait_for_beacon_timeout -100272e2 T invalidate_cam_all -100272ea T write_cam -10027360 T clear_cam_entry -1002738e T flush_all_cam_entry -100273ec T WMM_param_handler -10027412 T WMMOnAssocRsp -100274e0 T HT_caps_handler -10027580 T HT_info_handler -100275a4 T HTOnAssocRsp -100275dc T ERP_IE_handler -100275f8 T VCS_update -1002764a T rtw_check_bcn_info -1002785a T update_beacon_info -100278b0 T is_ap_in_tkip -10027928 T wifirate2_ratetbl_inx -10027994 T update_basic_rate -100279c2 T update_supported_rate -100279ec T update_MCS_rate -100279f8 T support_short_GI -10027a26 T get_highest_rate_idx -10027a40 T Update_RA_Entry -10027a48 T set_sta_rate -10027a50 T update_tx_basic_rate -10027aa8 T check_assoc_AP -10027b9c T update_IOT_info -10027bfa T update_capinfo -10027c78 T update_wireless_mode -10027d18 T update_bmc_sta_support_rate -10027d40 T update_TSF -10027d52 T correct_TSF -10027d5a t _init_txservq -10027d70 t set_qos -10027dc0 T _rtw_init_sta_xmit_priv -10027e06 T rtw_mfree_xmit_priv_lock -10027e52 T qos_acm -10027e8c T xmitframe_addmic -10027fea T xmitframe_swencrypt -10028016 T rtw_make_wlanhdr -100281f6 T rtw_txframes_pending -10028232 T rtw_txframes_sta_ac_pending -10028268 T rtw_txframes_update_attrib_vcs_info -10028308 T rtw_put_snap -1002834c T rtw_update_protection -10028392 T rtw_count_tx_stats -100283e2 T rtw_free_xmitbuf_ext -10028424 T rtw_alloc_xmitframe -1002847c T rtw_free_xmitframe -100284ce T rtw_free_xmitframe_queue -1002850c T rtw_get_sta_pending -1002854c T rtw_xmit_classifier -100285b2 T rtw_xmitframe_enqueue -100285c0 T rtw_alloc_hwxmits -1002861a T rtw_free_hwxmits -10028630 T _rtw_free_xmit_priv -100286fc T rtw_init_hwxmits -10028714 T _rtw_init_xmit_priv -100288cc T rtw_get_ff_hwaddr -100288e0 T xmitframe_enqueue_for_sleeping_sta -10028aa0 t dequeue_xmitframes_to_sleeping_queue -10028af6 T stop_sta_xmit -10028bde T wakeup_sta_to_xmit -10028df4 T xmit_delivery_enabled_frames -10028f10 T rtw_xmit_tasklet -10028f68 T rtw_xmit_mgnt -10028f6c T rtw_xmit -10029296 T rtw_sctx_done_err -100292a2 T rtw_alloc_xmitbuf -100292fc T rtw_free_xmitbuf -1002936e T rtw_alloc_xmitbuf_ext -100293f4 T rtw_sctx_done -100293fa t rtl8195a_free_rx_ring -10029408 t bus_write32 -10029464 t bus_write16 -100294c0 t bus_write8 -1002951c t bus_read32 -10029576 t bus_read16 -100295d2 t bus_read8 -1002962e t rtl8195a_free_tx_ring -100296bc T rtl8195a_init_desc_ring -100297fc T rtl8195a_free_desc_ring -10029818 T rtl8195a_reset_desc_ring -100298ae T InitLxDmaRtl8195a -10029a10 T rtl8195a_check_txdesc_closed -10029a88 t rtl8195a_tx_isr -10029b6c T InterruptRecognized8195a -10029bfc T InitInterrupt8195a -10029c1c T EnableDMA8195a -10029c44 T EnableInterrupt8195a -10029c84 T DisableDMA8195a -10029c90 T DisableInterrupt8195a -10029ca8 T UpdateInterruptMask8195a -10029d0a T CheckRxTgRtl8195a -10029d44 T rtl8192ee_check_rxdesc_remain -10029d74 T rtl8195a_recv_tasklet -1002a088 T rtl8195a_tx_int_handler -1002a0b4 T InterruptHandle8195a -1002a328 T rtl8195a_xmit_tasklet -1002a350 T lxbus_set_intf_ops -1002a390 t GetTxBufDesc -1002a3da t UpdateFirstTxbdtoXmitBuf.isra.3 -1002a40c t check_nic_enough_desc.isra.4 -1002a45c T rtl8195ab_init_xmit_priv -1002a46a T rtl8195ab_free_xmit_priv -1002a472 T GetDmaTxbdIdx -1002a48e T rtl8195a_enqueue_xmitbuf -1002a4b2 T rtl8195a_dequeue_xmitbuf -1002a4d6 T SetTxbdForLxDMARtl8195ab -1002a556 T UpdateTxbdHostIndex -1002a594 T rtw_dump_xframe -1002a766 T check_tx_desc_resource -1002a7a0 T rtw_dequeue_xframe -1002a834 T rtw_xmitframe_coalesce -1002aae8 T rtl8195ab_xmitframe_resume -1002abde T rtl8195ab_mgnt_xmit -1002ac1a T rtl8195ab_hal_xmit -1002ad28 t Hal_GetEfuseDefinition -1002ad58 t ResumeTxBeacon -1002ad9c T UpdateHalRAMask8195A -1002af34 T HalLittleWifiMCUThreadRtl8195a -1002af88 T HalCheckInReqStateThreadRtl8195a -1002afd4 T HalTDMAChangeStateThreadRtl8195a -1002b020 t rtl8195a_read_chip_version -1002b094 t Hal_EfuseWordEnableDataWrite -1002b2d8 t Hal_EfusePowerSwitch -1002b2ec t rtl8195a_free_hal_data -1002b306 t StopTxBeacon -1002b350 T SetHalODMVar8195A -1002b408 T rtl8195a_start_thread -1002b470 T rtl8195a_stop_thread -1002b494 t Hal_ReadEFuse -1002b604 T GetHalODMVar8195A -1002b618 t rtw_flash_map_update.part.12 -1002b6b8 t rtw_flash_map_erase -1002b6fc t Hal_EfusePgPacketWrite -1002b978 t Hal_EfuseGetCurrentSize -1002ba58 t rtw_flash_map_write -1002bc26 T rtl8195a_InitBeaconParameters -1002bc96 T _InitBurstPktLen_8195AB -1002bca0 T rtl8195a_set_hal_ops -1002bd80 T rtl8195a_init_default_value -1002bd82 T rtl8195a_InitLLTTable -1002bdcc T Hal_GetChnlGroup8195A -1002be08 T rtw_config_map_read -1002bef4 T rtw_config_map_write -1002bfa0 T Hal_InitPGData -1002bffe T Hal_EfuseParseIDCode -1002c016 T Hal_ReadPowerValueFromPROM_8195A -1002c0b4 T Hal_EfuseParseTxPowerInfo_8195A -1002c14c T Hal_EfuseParseEEPROMVer_8195A -1002c162 T Hal_EfuseParsePackageType_8195A -1002c1cc T Hal_EfuseParseChnlPlan_8195A -1002c1fc T Hal_EfuseParseCustomerID_8195A -1002c212 T Hal_EfuseParseXtal_8195A -1002c22a T Hal_EfuseParseThermalMeter_8195A -1002c252 T Hal_ReadRFGainOffset -1002c2a2 T BWMapping_8195A -1002c2c2 T SCMapping_8195A -1002c2ea T rtl8195a_update_txdesc -1002c5ba T rtl8195a_fill_fake_txdesc -1002c678 T SetHwReg8195A -1002d338 T GetHwReg8195A -1002d3cc T SetHalDefVar8195A -1002d4ac T GetHalDefVar8195A -1002d4d0 T PHY_QueryBBReg_8195A_Safe -1002d4fc T PHY_SetBBReg_8195A_Safe -1002d528 t phy_RFSerialRead_8195A -1002d5dc T PHY_QueryRFReg_8195A -1002d5f4 T PHY_SetRFReg_8195A -1002d64c T PHY_MACConfig8195A -1002d666 T PHY_BBConfig8195A -1002d776 T PHY_RFConfig8195A -1002d77a T PHY_SetTxPowerIndex_8195A -1002d884 T phy_TxPwrAdjInPercentage -1002d8c4 T PHY_GetTxPowerIndex_8195A -1002d9b4 T PHY_SetTxPowerLevel8195A -1002d9ba T phy_SpurCalibration_8195A -1002dc72 T phy_SetRegBW_8195A -1002dcb0 T phy_PostSetBwMode8195A -1002de0c T phy_SwChnl8195A -1002deb4 T phy_SwChnlAndSetBwMode8195A -1002df04 T PHY_HandleSwChnlAndSetBW8195A -1002dfb4 T PHY_SetBWMode8195A -1002dfd6 T PHY_SwChnl8195A -1002dff0 T PHY_SetSwChnlBWMode8195A -1002e00e t HalTimerEnable -1002e020 T InitTDMATimer -1002e048 T ChangeStateByTDMA -1002e058 T GetMinRateInRRSR -1002e08c T CheckInReqState -1002e09c T InitCheckStateTimer -1002e0cc T InitGTimer1ms -1002e118 T DeInitGTimer1ms -1002e160 T ChangeTransmiteRate -1002e19c T PowerBitSetting -1002e218 T ChkandChangePS -1002e27c T IssueRsvdPagePacketSetting -1002e2f0 T IssuePSPoll -1002e31c T WaitTxStateMachineOk -1002e370 T IssueNullData -1002e400 T PsCloseRF -1002e434 T PsOpenRF -1002e464 T ChkTxQueueIsEmpty -1002e47c T InitPS -1002e4ec T ConfigListenBeaconPeriod -1002e510 T PS_S2_Condition_Match -1002e544 T PS_S4_Condition_Match -1002e5c0 T PS_32K_Condition_Match -1002e5fc T PS_S2ToS3ToS0State -1002e664 T PS_S2ToS0State -1002e680 T PS_S3ToS2orS0State -1002e6b0 T PS_S0ToS1ToS2State -1002e70c T PS_S1ToS0orS2State -1002e73c T PS_S2ToS4State -1002e788 T PS_S0ToS6State -1002e7a8 T PS_S6ToS0State -1002e7c0 T CheckTSFIsStable -1002e810 T WaitHWStateReady -1002e820 T SysClkDown -1002e890 T SysClkUp -1002e8dc T ResetPSParm -1002e950 T PS_S4ToS2State -1002e974 T SleepTo32K -1002e9d4 T Change_PS_State -1002eb80 T Legacy_PS_Setting -1002ebf4 T PSModeSetting -1002ec98 T ChangePSStateByRPWM -1002ecdc T ChangeTDMAState -1002edfc T TDMAChangeStateTask -1002ee26 T EnterPS -1002ee48 T SetSmartPSTimer -1002ee84 T GTimer7Handle -1002eee0 T SmartPS2InitTimerAndToGetRxPkt -1002ef1c T PS_OnBeacon -1002efcc T PSBcnEarlyProcess -1002f088 T PSMtiBcnEarlyProcess -1002f134 T PSRxBcnProcess -1002f284 T TxPktInPSOn -1002f2c2 T PsBcnToProcess -1002f37c T GTimer6Handle -1002f3c8 T RPWMProcess -1002f404 T PSSetMode -1002f47c T SpeRPT -1002f59c T ISR_BcnEarly -1002f608 T ISR_MtiBcnEarly -1002f63c T ISR_RxBcn -1002f658 T ISR_RxBCMD1 -1002f688 T ISR_RxBCMD0 -1002f6dc T ISR_RxUCMD1 -1002f71a T ISR_RxUCMD0 -1002f756 T ISR_TxPktIn -1002f768 T ISR_TXCCX -1002f76c T H2CHDL_SetPwrMode -1002f894 T CheckInReqStateTask -1002f8da T HalGetNullTxRpt -1002f8f8 T ISR_TBTT -1002f970 T H2CHDL_BcnIgnoreEDCCA -1002f980 T PMUInitial -1002f9d0 T PMUTask -1002fadc T PHY_RF6052SetBandwidth8195A -1002fb20 T PHY_RF6052_Config8195A -1002fbd8 t process_rssi -1002fc0e T rtl8195a_query_rx_desc_status -1002fcbe T rtl8195a_query_rx_phy_status -1002fe16 T hal_com_get_channel_plan -1002fe4a T HAL_IsLegalChannel -1002fe68 T MRateToHwRate -1002fe7c T HwRateToMRate -1002fe90 T HalSetBrateCfg -1002ff3c T Hal_MappingOutPipe -1002ff58 T hal_init_macaddr -1002ff84 T hw_var_port_switch -1003020c T SetHwReg -10030216 T GetHwReg -10030218 T switch_power_saving_mode -1003025c T rtw_bb_rf_gain_offset -100302a4 T PHY_GetRateValuesOfTxPowerByRate -1003043c T PHY_StoreTxPowerByRateNew -100304d8 T PHY_InitTxPowerByRate -100304f0 T PHY_StoreTxPowerByRate -10030508 T PHY_GetTxPowerIndexBase -100305a8 T PHY_GetTxPowerTrackingOffset -100305d4 T PHY_GetRateIndexOfTxPowerByRate -100305e8 T PHY_GetTxPowerByRate -10030648 T phy_StoreTxPowerByRateBase -10030694 T PHY_SetTxPowerByRate -100306d0 T phy_ConvertTxPowerByRateInDbmToRelativeValues -100307d0 T PHY_TxPowerByRateConfiguration -100307e2 T PHY_SetTxPowerIndexByRateArray -10030820 T PHY_SetTxPowerIndexByRateSection -10030884 T PHY_SetTxPowerLevelByPath -100308ba T phy_GetWorldWideLimit -100308e6 T PHY_GetTxPowerLimit -10030a10 T PHY_ConvertTxPowerLimitToPowerIndex -10030b60 T PHY_InitTxPowerLimit -10030ba8 T PHY_SetTxPowerLimit -10030c24 T PHY_GetTxPowerIndex -10030c34 T rtw_hal_chip_configure -10030c4a T rtw_hal_read_chip_info -10030c60 T rtw_hal_read_chip_version -10030c76 T rtw_hal_def_value_init -10030c8c T rtw_hal_free_data -10030ca2 T rtw_hal_dm_init -10030cb8 T rtw_hal_dm_deinit -10030cce T rtw_hal_init -10030cf8 T rtw_hal_deinit -10030d12 T rtw_hal_set_hwreg -10030d20 T rtw_hal_get_hwreg -10030d2e T rtw_hal_set_def_var -10030d40 T rtw_hal_get_def_var -10030d52 T rtw_hal_set_odm_var -10030d60 T rtw_hal_get_odm_var -10030d6e T rtw_hal_enable_interrupt -10030d90 T rtw_hal_disable_interrupt -10030db2 T rtw_hal_inirp_init -10030dc4 T rtw_hal_inirp_deinit -10030dd6 T rtw_hal_irp_reset -10030de4 T rtw_hal_xmit -10030df6 T rtw_hal_mgnt_xmit -10030e08 T rtw_hal_init_xmit_priv -10030e1a T rtw_hal_free_xmit_priv -10030e28 T rtw_hal_update_ra_mask -10030e56 T rtw_hal_add_ra_tid -10030e64 T rtw_hal_clone_data -10030e72 T rtw_hal_start_thread -10030e80 T rtw_hal_stop_thread -10030e8e T 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init_rom_wlan_ram_map +10038cd8 T ODM_ReadAndConfig_MP_8195A_MAC_REG +10038e34 t CheckPositive.isra.0 +10038f18 T ODM_ReadAndConfig_MP_8195A_RadioA +10038f90 T ODM_ReadAndConfig_MP_8195A_TxPowerTrack_QFN48 +10038fe0 T ODM_ReadAndConfig_MP_8195A_TxPowerTrack_QFN56 +10039030 T ODM_ReadAndConfig_MP_8195A_TxPowerTrack_TFBGA96 +10039080 T ODM_ReadAndConfig_MP_8195A_TXPWR_LMT +100390b8 T ODM_ReadAndConfig_MP_8195A_TxXtalTrack +100390e4 T GetDeltaSwingTable_8195A +10039114 T GetDeltaSwingXtalTable_8195A +10039124 T ODM_TxXtalTrackSetXtal_8195A +10039144 T Hal_MPT_CCKTxPowerAdjust +10039214 T ODM_TxPwrTrackSetPwr_8195A +10039324 T ConfigureTxpowerTrack_8195A +10039370 T phy_PathA_IQK_8195A +10039524 T phy_PathA_RxIQK8195A +100398b8 T _PHY_PathAFillIQKMatrix8195A +10039a4e T _PHY_PathBFillIQKMatrix8195A +10039bca T _PHY_SaveADDARegisters8195A +10039bfe T _PHY_SaveMACRegisters8195A +10039c2c T _PHY_ReloadADDARegisters8195A +10039c60 T _PHY_ReloadMACRegisters8195A +10039c90 T _PHY_PathADDAOn8195A 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+10052288 d select_cb_ctr +1005228c d select_cb_list +10052290 d sockets +10052350 d mbox +10052354 d tcpip_init_done +10052358 d tcpip_init_done_arg +1005235c d allrouters +10052360 d allsystems +10052364 d igmp_group_list +10052368 D current_header +1005236c D current_iphdr_dest +10052370 D current_iphdr_src +10052374 D current_netif +10052378 d ip_id +1005237a d str.6845 +1005238a d ip_reass_pbufcount +1005238c d reassdatagrams +10052390 D dhcp_rx_options_given +1005239c D dhcp_rx_options_val +100523c4 d xid.7865 +100523c8 d dns_payload +100523cc d dns_payload_buffer +100525d0 d dns_pcb +100525d4 d dns_seqno +100525d8 d dns_servers +100525e0 d dns_table +10052a40 d next_timeout +10052a44 d tcpip_tcp_timer_active +10052a48 D netif_default +10052a4c D netif_list +10052a50 d netif_num +10052a51 D pbuf_free_ooseq_pending +10052a54 d raw_pcbs +10052a58 D tcp_active_pcbs +10052a5c D tcp_active_pcbs_changed +10052a60 D tcp_bound_pcbs +10052a64 D tcp_listen_pcbs +10052a68 D tcp_ticks +10052a6c d tcp_timer +10052a6d d tcp_timer_ctr +10052a70 D tcp_tmp_pcb +10052a74 D tcp_tw_pcbs +10052a78 d ackno +10052a7c d flags +10052a80 d inseg +10052a94 d recv_data +10052a98 d recv_flags +10052a9c d seqno +10052aa0 D tcp_input_pcb +10052aa4 d tcphdr +10052aa8 d tcplen +10052aac D udp_pcbs +10052ab0 d arp_table +10052b78 d etharp_cached_entry +10052b7c D lwip_tickless_used +10052b80 d s_nextthread +10052b84 d s_timeoutlist +10052bb4 d ext_free +10052bb8 D ext_lower +10052bbc D ext_upper +10052bc0 d pxEnd +10052bc4 d xFreeBytesRemaining +10052bc8 d xMinimumEverFreeBytesRemaining +10052bcc d xStart +10052bd4 d ulStoppedTimerCompensation +10052bd8 d ulTimerCountsForOneTick +10052bdc d xMaximumPossibleSuppressedTicks +10052be0 D pxCurrentTCB +10052be4 d pxDelayedTaskList +10052be8 d pxOverflowDelayedTaskList +10052bec d pxReadyTasksLists +10052cc8 d ulTaskSwitchedInTime +10052ccc d uxCurrentNumberOfTasks +10052cd0 d uxDeletedTasksWaitingCleanUp +10052cd4 d uxPendedTicks +10052cd8 d uxSchedulerSuspended +10052cdc d uxTaskNumber +10052ce0 d uxTopReadyPriority +10052ce4 d xDelayedTaskList1 +10052cf8 d xDelayedTaskList2 +10052d0c d xIdleTaskHandle +10052d10 d xNextTaskUnblockTime +10052d14 d xNumOfOverflows +10052d18 d xPendingReadyList +10052d2c d xSchedulerRunning +10052d30 d xSuspendedTaskList +10052d44 d xTasksWaitingTermination +10052d58 d xTickCount +10052d5c d xYieldPending +10052d60 d pxCurrentTimerList +10052d64 d pxOverflowTimerList +10052d68 d xActiveTimerList1 +10052d7c d xActiveTimerList2 +10052d90 d xLastTime.5386 +10052d94 d xTimerQueue +10052d98 d xTimerTaskHandle +10052d9c d device_mutex +10052da8 d mutex_init +10052dac d uxSavedInterruptStatus +10052db0 D min_free_heap_size +10052db4 d g_heap_inited +10052db8 D g_tcm_heap +10052dbc d tcm_lock +10052dc0 D flashobj +10052dcc D fspic_isinit +10052dd0 D WDGAdapter +10052e0c d hold_wakelock_time +10052e8c d last_acquire_wakelock_time +10052f0c D missing_tick +10052f10 D post_sleep_callback +10052f90 D pre_sleep_callback +10053010 D reserve_pll +10053014 d sys_sleep_time +10053018 D Timer2To7HandlerData +10053030 D PwrAdapter +100532bc D SYSAdapte +100532bd D libc_has_init +100532be D print_off +100532c0 d rheap_end +100532e0 d g_rtl_cipherEngine +100537e0 d init_status.9288 +100537e4 D auto_reconnect_running +100537e8 D p_wlan_autoreconnect_hdl +100537ec D mac_monitor_callback +100537f0 D mf_list_head +100537f4 d pscan_retry_cnt.21430 +100537f8 D promisc_callback_all +100537fc D promisc_sema +10053800 D promisc_callback +10053804 D psk_essid +1005384c D psk_passphrase +100538ce D psk_passphrase64 +1005390f D wpa_global_PSK +1005395f d RFC1042_OUI +10053964 d rx_ring_pool +10055a44 d stop_report_count.20629 +10055a45 D bCheckStateTIMER +10055a48 d WifiMcuCmdBitMap.20974 +10055a4c D p_wlan_init_done_callback +10055a50 D rtw_power_percentage_idx +10055a54 D p_wlan_uart_adapter_callback +10055a58 D rtw_adaptivity_en +10055a5c D p_wlan_mgmt_filter +10055a60 D rtw_initmac +10055a64 D rtw_adaptivity_th_l2h_ini +10055a68 d drvpriv +10055a7c D skbbuf_used_num +10055a80 V skb_pool +10055c38 D skbdata_used_num +10055c3c d wrapper_skbbuf_list +10055c44 D max_skbdata_used_num +10055c48 D max_skbbuf_used_num +10055c4c d skb_fail_count +10055c50 D timer_table +10055c58 D rltk_wlan_info +10055c88 d timer_used_num +10055c8c D max_timer_used_num +10055c90 D Noisy_State +10055c94 D pExportWlanIrqSemaphore +10055c98 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A +10055cb8 D wifi_autoreconnect +10055cc0 D wifi_run_mode +10055cc1 D wifi_st_status +10055cc2 D wlan_st_netifn +10055cc4 D web_scan_handler_ptr +10055cd0 d bound_client_ethernet_address +10055ce0 d client_request_ip +10055ce4 d dhcp_client_ethernet_address +10055cf4 d dhcp_message_repository +10055cf8 d dhcp_message_total_options_lenth +10055cfc d dhcps_allocated_client_address +10055d00 D dhcps_ip4addr_pool_end +10055d01 D dhcps_ip4addr_pool_start +10055d04 d dhcps_ip_table_semaphore +10055d08 d dhcps_local_address +10055d0c d dhcps_local_gateway +10055d10 d dhcps_local_mask +10055d14 d dhcps_netif +10055d18 d dhcps_network_id +10055d1c d dhcps_pcb +10055d20 d dhcps_send_broadcast_address +10055d24 d dhcps_subnet_broadcast +10055d28 d ip_table +10055d48 ? __ram_heap2_start__ +10055d48 D .ram.bss$$Limit +10055d48 D __bss_end__ 10070000 A __ram_heap2_end__ 1fff0000 D __ram_tcm_start__ 1fff0000 D __tcm_heap_start__ diff --git a/flasher/rtl8710.ocd b/flasher/rtl8710.ocd index 2f2b102..dffd423 100644 --- a/flasher/rtl8710.ocd +++ b/flasher/rtl8710.ocd @@ -338,3 +338,18 @@ proc rtl8710_reboot {} { mww 0xE000ED0C 0x05FA0007 } +proc boot_load_srdam {local_filename loc} { + echo "# Set flag WISDRAM" + mww 0x1FFF0000 0x12345678 + mww 0x40000210 0x20011113 + resume + echo "# Wait Init SDRAM..." +# sleep 1000 + while {[rtl8710_flasher_mrw 0x1FFF0000] == 0x12345678 } { sleep 10 } + halt + echo "# Load SDRAM image..." + load_image $local_filename $loc + resume +# echo "# Go" + mww 0x1FFF0000 1 +} diff --git a/userset.mk b/userset.mk index 74b87f9..752c677 100644 --- a/userset.mk +++ b/userset.mk @@ -1,14 +1,14 @@ #============================================= # User defined #============================================= -#SDK_PATH = ../RTL00_WEB/USDK/ +#SDK_PATH = ../RTL00MP3/RTL00_SDKV35a/ SDK_PATH = RTL00_SDKV35a/ #GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/6.2017-q1-update/bin/# + or set in PATH -#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/5.2_2015q4/bin/# + or set in PATH -#OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH +#OPENOCD_PATH = D:/MCU/OpenOCD/bin/# + or set in PATH TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/ -FLASHER_TYPE ?= Jlink -#FLASHER_TYPE ?= OCD -FLASHER_PATH ?= $(SDK_PATH)flasher/ +#FLASHER_TYPE = Jlink +FLASHER_TYPE = cmsis-dap +FLASHER_SPEED = 3500 +FLASHER_PATH = flasher/ JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/ JLINK_GDBSRV ?= JLinkGDBServer.exe