diff --git a/README.md b/README.md
index c13ecdd..e284345 100644
--- a/README.md
+++ b/README.md
@@ -6,7 +6,8 @@ Module RTL00(RTL8710AF), [F11AMIM13](http://fn-link.en.made-in-china.com/product
[PADI](https://www.pine64.org/?page_id=946) (RTL8710AF), [F10AFIM13-B1](http://en.ofeixin.com/products_detail/productId=65.html) (RTL8710AF), [TinyCon2005-A-BE](http://www.ralinwi.com/product.aspx?info_lb=54&flag=1) (RTL8711AF),
[WFM-400](http://www.rayson.com/rayson/en/?pros=product&pros=product&b_cat_id=A03&m_cat_id=A0304&s_cat_id=A030401&prod_id=P0113&level=3) (RTL8711AM), [WFM-410](http://www.rayson.com/rayson/en/?pros=product&pros=product&b_cat_id=A03&m_cat_id=A0304&s_cat_id=A030401&prod_id=P0114&level=3) (RTL8711AF), [WFM-250](http://www.rayson.com/rayson/en/?pros=product&pros=product&b_cat_id=A03&m_cat_id=A0304&s_cat_id=A030401&prod_id=P0112&level=3) (RTL8195AM),
[AW-CU238, AW-CU239](https://www.buyiot.net/pd-1) (RTL8711AM), [AW-CU245, AW-CU245, AW-CU245](https://www.buyiot.net/home-1) (RTL8711AM/RTL8195AM/RTL8711AF),
-[WG6611](http://www.jorjin.com/product.php?id=98) (RTL8711AM), [RAK473](http://www.rakwireless.com/en/download/RAK473/Firmware%20Upgrade) (RTL8711AM), [RAK474, RAK476](http://www.rakwireless.com/en/download/RAK473/Firmware%20Upgrade) (RTL8711AF), ...
+[WG6611](http://www.jorjin.com/product.php?id=98) (RTL8711AM), [RAK473](http://www.rakwireless.com/en/download/RAK473/Firmware%20Upgrade) (RTL8711AM), [RAK474, RAK476](http://www.rakwireless.com/en/download/RAK473/Firmware%20Upgrade) (RTL8711AF), [6110R-IF](http://en.ofeixin.com/products_detail/productId=65.html) (RTL8710AF),
+[MJIOT-AMB-01](http://www.nb-iot-tech.com/mjiot-amb-01-en.html) (RTL8710AF), [MJIOT-AMB-02](http://www.nb-iot-tech.com/mjiot-amb-02-en.html) (RTL8195AM), ...
RTL00 module (RTL8710AF)
diff --git a/RTL00_SDKV35a/component/common/api/lwip_netconf.c b/RTL00_SDKV35a/component/common/api/lwip_netconf.c
index 903bd59..627603c 100644
--- a/RTL00_SDKV35a/component/common/api/lwip_netconf.c
+++ b/RTL00_SDKV35a/component/common/api/lwip_netconf.c
@@ -184,7 +184,9 @@ uint8_t LwIP_DHCP(uint8_t idx, uint8_t dhcp_state) {
struct ip_addr netmask;
struct ip_addr gw;
uint32_t IPaddress;
+#if CONFIG_DEBUG_LOG > 2
uint8_t iptab[4];
+#endif
uint8_t DHCP_state;
int mscnt = 0;
struct netif *pnetif = NULL;
@@ -228,12 +230,14 @@ uint8_t LwIP_DHCP(uint8_t idx, uint8_t dhcp_state) {
/* Stop DHCP */
// dhcp_stop(pnetif); /* can not stop, need to renew, Robbie*/
+#if CONFIG_DEBUG_LOG > 2
iptab[0] = (uint8_t) (IPaddress >> 24);
iptab[1] = (uint8_t) (IPaddress >> 16);
iptab[2] = (uint8_t) (IPaddress >> 8);
iptab[3] = (uint8_t) (IPaddress);
info_printf("Interface %d IP address: %d.%d.%d.%d\n", idx, iptab[3],
iptab[2], iptab[1], iptab[0]);
+#endif
#if CONFIG_WLAN
error_flag = RTW_NO_ERROR;
#endif
@@ -251,6 +255,7 @@ uint8_t LwIP_DHCP(uint8_t idx, uint8_t dhcp_state) {
IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
netif_set_addr(pnetif, &ipaddr, &netmask, &gw);
+#if CONFIG_DEBUG_LOG > 2
iptab[0] = IP_ADDR3;
iptab[1] = IP_ADDR2;
@@ -258,6 +263,7 @@ uint8_t LwIP_DHCP(uint8_t idx, uint8_t dhcp_state) {
iptab[3] = IP_ADDR0;
info_printf("Interface %d DHCP timeout\n", idx);
info_printf("Static IP address: %d.%d.%d.%d\n", iptab[3], iptab[2], iptab[1], iptab[0]);
+#endif
#if CONFIG_WLAN
error_flag = RTW_DHCP_FAIL;
#endif
diff --git a/RTL00_SDKV35a/component/common/api/platform/esp_comp.h b/RTL00_SDKV35a/component/common/api/platform/esp_comp.h
index e89795c..fbb1263 100644
--- a/RTL00_SDKV35a/component/common/api/platform/esp_comp.h
+++ b/RTL00_SDKV35a/component/common/api/platform/esp_comp.h
@@ -9,22 +9,30 @@
#define DATA_IRAM_ATTR
#define ICACHE_RAM_ATTR
-#define os_printf(...) rtl_printf(__VA_ARGS__)
-#define os_printf_plus(...) rtl_printf(__VA_ARGS__)
-#define os_sprintf_fd(...) rtl_sprintf(__VA_ARGS__)
-#define ets_sprintf(...) rtl_sprintf(__VA_ARGS__)
-#ifndef os_malloc
-#define os_malloc pvPortMalloc
-#define os_zalloc pvPortZalloc
-#define os_calloc pvPortCalloc
-#define os_realloc pvPortRealloc
-#endif
-#undef os_free
-#define os_free vPortFree
-#define system_get_free_heap_size xPortGetFreeHeapSize
-#undef os_realloc
-#define os_realloc pvPortReAlloc
+#define os_printf rtl_printf
+#define os_printf_plus rtl_printf
+#define os_sprintf_fd rtl_sprintf
+#define ets_sprintf rtl_sprintf
+
+//#ifndef os_malloc
+#undef os_malloc
+extern void *pvPortMalloc(size_t xWantedSize);
+#define os_malloc pvPortMalloc
+#undef os_zalloc
+extern void *pvPortZalloc(size_t xWantedSize);
+#define os_zalloc pvPortZalloc
+//#undef os_calloc
+//#define os_calloc pvPortCalloc
+#undef os_realloc
+extern void *pvPortReAlloc(void *pv, size_t xWantedSize);
+#define os_realloc pvPortReAlloc
+#undef os_free
+extern void vPortFree(void *pv);
+#define os_free vPortFree
+//#endif
+extern size_t xPortGetFreeHeapSize(void);
+#define system_get_free_heap_size xPortGetFreeHeapSize
#define os_bzero rtl_bzero
#define os_delay_us wait_us // HalDelayUs
@@ -104,22 +112,28 @@ extern SpiFlashChip * flashchip; // in RAM-BIOS: 0x3fffc714
#define spi_flash_read(faddr, pbuf, size) flash_stream_read(&flashobj, faddr, size, (uint8_t *)pbuf)
#define spi_flash_erase_block(blk) flash_erase_block(&flashobj, (blk)<<16);
+#ifndef ip4_addr1
#define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0])
#define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1])
#define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2])
#define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3])
+#endif
/* These are cast to u16_t, with the intent that they are often arguments
* to printf using the U16_F format from cc.h. */
+#ifndef ip4_addr1_16
#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr))
#define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr))
#define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr))
#define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr))
+#endif
+#undef IP2STR
#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \
ip4_addr2_16(ipaddr), \
ip4_addr3_16(ipaddr), \
ip4_addr4_16(ipaddr)
+#undef IPSTR
#define IPSTR "%d.%d.%d.%d"
#ifndef MAC2STR
diff --git a/RTL00_SDKV35a/component/common/api/platform/platform_stdlib.h b/RTL00_SDKV35a/component/common/api/platform/platform_stdlib.h
index f115524..7a7f0fd 100644
--- a/RTL00_SDKV35a/component/common/api/platform/platform_stdlib.h
+++ b/RTL00_SDKV35a/component/common/api/platform/platform_stdlib.h
@@ -95,11 +95,11 @@
#define memset rtl_memset
#define strcat rtl_strcat
#define strchr rtl_strchr
- #define strcmp(s1, s2) rtl_strcmp((const char *)s1, (const char *)s2)
+ #define strcmp rtl_strcmp
#define strcpy rtl_strcpy
- #define strlen(str) rtl_strlen((const char *)str)
+ #define strlen rtl_strlen
#define strncat rtl_strncat
- #define strncmp(s1, s2, n) rtl_strncmp((const char *)s1, (const char *)s2, n)
+ #define strncmp rtl_strncmp
#define strncpy rtl_strncpy
#define strstr rtl_strstr
#define strsep rtl_strsep
@@ -157,13 +157,22 @@
//
// memory management
//
-#ifndef CONFIG_MBED_ENABLED
-extern void *pvPortMalloc( size_t xWantedSize );
-extern void vPortFree( void *pv );
-#define malloc pvPortMalloc
-#define zalloc pvPortZalloc
-#define free vPortFree
-#endif
+#undef malloc
+extern void *pvPortMalloc(size_t xWantedSize);
+#define malloc pvPortMalloc
+
+#undef zalloc
+extern void *pvPortZalloc(size_t xWantedSize);
+#define zalloc pvPortZalloc
+
+#undef realloc
+extern void *pvPortReAlloc(void *pv, size_t xWantedSize);
+#define realloc pvPortReAlloc
+
+#undef free
+extern void vPortFree(void *pv);
+#define free vPortFree
+
#elif defined (CONFIG_PLATFORM_8711B)
#if defined (__IARSTDLIB__)
diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c
index f28327f..6f76970 100644
--- a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c
+++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c
@@ -16,6 +16,8 @@
#endif
#include
#include
+#include "dhcp.h"
+#include "dhcp/dhcps.h"
#if CONFIG_EXAMPLE_WLAN_FAST_CONNECT
#include "wlan_fast_connect/example_wlan_fast_connect.h"
@@ -157,6 +159,9 @@ extern unsigned char dhcp_mode_sta;
#include "freertos/wrapper.h"
#include "skbuff.h"
+extern int is_promisc_enabled();
+extern int promisc_set(rtw_rcr_level_t enabled, void (*callback)(u8 *, unsigned int, void *), int len_used);
+
//------------------------------------------------------------------------end-patch//
static int wifi_connect_local(rtw_network_info_t *pWifi) {
int ret = 0;
@@ -278,8 +283,8 @@ static void wifi_disconn_hdl(char* buf, int buf_len, int flags, void* userdata)
else if (rtw_join_status == 0)
error_flag = RTW_CONNECT_FAIL;
- else if (rtw_join_status == JOIN_COMPLETE | JOIN_SECURITY_COMPLETE
- | JOIN_ASSOCIATED | JOIN_AUTHENTICATED | JOIN_LINK_READY)
+ else if (rtw_join_status == (JOIN_COMPLETE | JOIN_SECURITY_COMPLETE
+ | JOIN_ASSOCIATED | JOIN_AUTHENTICATED | JOIN_LINK_READY))
error_flag = RTW_WRONG_PASSWORD;
}
@@ -368,6 +373,7 @@ void restore_wifi_info_to_flash() {
#endif
+extern int wext_set_bssid(const char *ifname, const __u8 *bssid);
//----------------------------------------------------------------------------//
int wifi_connect(
unsigned char bssid[ETH_ALEN],
@@ -380,7 +386,7 @@ int wifi_connect(
int ssid_len = 0;
int password_len = 0;
- int bssid_len = 6;
+// int bssid_len = 6;
xSemaphoreHandle join_semaphore;
rtw_result_t result = RTW_SUCCESS;
u8 wep_hex = 0;
@@ -440,7 +446,7 @@ int wifi_connect(
if (password_len == 10) {
- u32 g[5] = { 0 };
+ unsigned int g[5] = { 0 };
u8 i = 0;
sscanf((const char*) password, "%02x%02x%02x%02x%02x", &g[0],
&g[1], &g[2], &g[3], &g[4]);
@@ -450,7 +456,7 @@ int wifi_connect(
password_len = 5;
wep_hex = 1;
} else if (password_len == 26) {
- u32 g[13] = { 0 };
+ unsigned int g[13] = { 0 };
u8 i = 0;
sscanf((const char*) password, "%02x%02x%02x%02x%02x%02x%02x"
"%02x%02x%02x%02x%02x%02x", &g[0], &g[1], &g[2], &g[3],
@@ -731,6 +737,8 @@ int wifi_get_ap_info(rtw_bss_info_t * ap_info, rtw_security_t* security) {
return ret;
}
+extern int wext_get_drv_ability(const char *ifname, uint32_t *ability);
+
int wifi_get_drv_ability(uint32_t *ability) {
return wext_get_drv_ability(WLAN0_NAME, ability);
}
@@ -948,6 +956,8 @@ int wifi_get_last_error(void) {
int wpas_wps_init(const char* ifname);
#endif
+extern int set_hidden_ssid(const char *ifname, uint8_t value);
+
int wifi_start_ap(char *ssid, rtw_security_t security_type, char *password, int channel, char ssid_hidden) {
const char *ifname = WLAN0_NAME;
int ssid_len = 0;
@@ -1543,10 +1553,8 @@ int wifi_restart_ap(unsigned char *ssid, rtw_security_t security_type,
printf("AP: security_type=%d\n", setting.security_type);
printf("AP: password=%s\n", (char* )setting.password);
printf("AP: key_idx =%d\n", setting.key_idx);
- ret = wifi_connect((char*) setting.ssid, setting.security_type,
- (char*) setting.password, strlen((char* )setting.ssid),
- strlen((char* )setting.password), setting.key_idx,
- NULL);
+ ret = wifi_connect(NULL, 0 , (char*) setting.ssid, setting.security_type,
+ (char*) setting.password, setting.key_idx, NULL);
if (ret == RTW_SUCCESS) {
#if CONFIG_DHCP_CLIENT
/* Start DHCPClient */
@@ -1726,6 +1734,9 @@ int wifi_remove_packet_filter(unsigned char filter_id) {
#endif
#ifdef CONFIG_AP_MODE
+extern int wext_enable_forwarding(const char *ifname);
+extern int wext_disable_forwarding(const char *ifname);
+
int wifi_enable_forwarding(void) {
return wext_enable_forwarding(WLAN0_NAME);
}
@@ -1739,6 +1750,8 @@ int wifi_disable_forwarding(void) {
* usage: wifi_set_ch_deauth(0) -> wlan0 wifi_connect -> wifi_set_ch_deauth(1)
*/
#ifdef CONFIG_CONCURRENT_MODE
+extern int wext_set_ch_deauth(const char *ifname, __u8 enable);
+
int wifi_set_ch_deauth(__u8 enable) {
return wext_set_ch_deauth(WLAN1_NAME, enable);
}
diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_ind.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_ind.c
index 791ea38..97b6d9c 100644
--- a/RTL00_SDKV35a/component/common/api/wifi/wifi_ind.c
+++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_ind.c
@@ -102,7 +102,7 @@ void wifi_indication(WIFI_EVENT_INDICATE event, unsigned char *buf, int buf_len,
// , and tries not to share the same stack with wlan driver if remaining stack space is
// not available for the following operations.
// ex: using semaphore to notice another thread.
- switch (event) {
+ switch ((int)event) {
case WIFI_EVENT_DISCONNECT:
#if(WIFI_INDICATE_MSG>0)
info_printf("%s(%d): Disconnection indication received\n", __func__, event);
diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_promisc.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_promisc.c
index 38d858d..b803e61 100644
--- a/RTL00_SDKV35a/component/common/api/wifi/wifi_promisc.c
+++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_promisc.c
@@ -19,9 +19,8 @@
extern void _promisc_deinit(_adapter *padapter);
extern int _promisc_recv_func(_adapter *padapter, recv_frame *rframe);
extern int _promisc_set(rtw_rcr_level_t enabled, void (*callback)(unsigned char *, unsigned int, void *), unsigned char len_used);
-extern unsigned char is_promisc_enabled(void);
-extern int promisc_get_fixed_channel(void *fixed_bssid, unsigned char *ssid, int *ssid_length);
-extern unsigned char is_promisc_enabled(void);
+extern unsigned char _is_promisc_enabled(void);
+extern int _promisc_get_fixed_channel(void *fixed_bssid, unsigned char *ssid, int *ssid_length);
#endif
@@ -111,7 +110,7 @@ static struct eth_buffer eth_buffer;
#ifdef CONFIG_PROMISC
#define MAX_PACKET_FILTER_INFO 5
#define FILTER_ID_INIT_VALUE 10
-rtw_packet_filter_info_t paff_array[MAX_PACKET_FILTER_INFO]={0, 0, 0, 0, 0};
+rtw_packet_filter_info_t paff_array[MAX_PACKET_FILTER_INFO]; // ={0, 0, 0, 0, 0};
static u8 packet_filter_enable_num = 0;
void promisc_init_packet_filter()
diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_util.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_util.c
index 00b860a..e5b72a7 100644
--- a/RTL00_SDKV35a/component/common/api/wifi/wifi_util.c
+++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_util.c
@@ -209,7 +209,7 @@ int wext_get_passphrase(const char *ifname, __u8 *passphrase) {
rtw_result_t ret = RTW_ERROR;
if(pdev) {
uint16 len[4];
- ret = rtw_wx_get_passphrase(pdev, 0, &len, passphrase);
+ ret = rtw_wx_get_passphrase(pdev, 0,(union iwreq_data *) &len, passphrase);
if(ret == RTW_SUCCESS) passphrase[len[2]] = '\0';
debug_printf("pas[%d]-<%s>\n", len[2], passphrase);
}
@@ -404,7 +404,6 @@ int wext_get_lps_dtim(const char *ifname, __u8 *lps_dtim) {
int wext_set_tos_value(const char *ifname, __u8 *tos_value) {
struct iwreq iwr;
- int ret = -1;
__u8 para[sizeof("set_tos_value") + 4];
int cmd_len = sizeof("set_tos_value");
memset(&iwr, 0, sizeof(iwr));
@@ -562,6 +561,8 @@ int wext_get_mode(const char *ifname, int *mode) {
#endif
}
+extern int rtw_wx_set_ap_essid(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra);
+
int wext_set_ap_ssid(const char *ifname, const __u8 *ssid, __u16 ssid_len) {
#ifdef USE_WIFI_ADAPTER
struct net_device * pdev = rltk_wlan_info[0].dev;
@@ -572,7 +573,7 @@ int wext_set_ap_ssid(const char *ifname, const __u8 *ssid, __u16 ssid_len) {
uint16 len[2];
len[0] = ssid_len;
len[1] = (ssid_len != 0);
- ret = rtw_wx_set_ap_essid(pdev, 0, &len, ssid);
+ ret = rtw_wx_set_ap_essid(pdev, 0, (union iwreq_data *) &len, (char *)ssid);
}
return ret;
#else
@@ -751,7 +752,7 @@ int wext_private_command_with_retval(const char *ifname, char *cmd,
iwr.u.data.length = buf_size;
iwr.u.data.flags = 0;
ret = iw_ioctl(ifname, SIOCDEVPRIVATE, &iwr);
- if (ret >= 0 & ret_buf != NULL) {
+ if (ret >= 0 && ret_buf != NULL) {
if (ret_len > iwr.u.data.length)
ret_len = iwr.u.data.length;
memcpy(ret_buf, (char *) iwr.u.data.pointer, ret_len);
@@ -923,7 +924,6 @@ int wext_set_gen_ie(const char *ifname, char *buf, __u16 buf_len, __u16 flags) {
int wext_set_autoreconnect(const char *ifname, __u8 mode, __u8 retyr_times,
__u16 timeout) {
struct iwreq iwr;
- int ret = 0;
__u8 para[sizeof("SetAutoRecnt") + 4];
int cmd_len = sizeof("SetAutoRecnt");
memset(&iwr, 0, sizeof(iwr));
@@ -1017,7 +1017,7 @@ int wext_update_custom_ie(const char *ifname, void * cus_ie, int ie_index) {
#endif
} else {
memset(&iwr, 0, sizeof(iwr));
- cmd_len = para = pvPortMalloc((4) * 2 + cmd_len); //size:addr len+cmd_len
+ para = pvPortMalloc((4) * 2 + cmd_len); //size:addr len+cmd_len
if (para != NULL) {
//Cmd
snprintf(para, cmd_len, "UpdateIE");
diff --git a/RTL00_SDKV35a/component/common/api/wifi_api.c b/RTL00_SDKV35a/component/common/api/wifi_api.c
index dbcbba7..40afa5f 100644
--- a/RTL00_SDKV35a/component/common/api/wifi_api.c
+++ b/RTL00_SDKV35a/component/common/api/wifi_api.c
@@ -91,7 +91,7 @@ STATION_CONFIG wifi_st_cfg = {
.ssid = DEF_ST_SSID,
.password = DEF_ST_PASSWORD,
.bssid = DEF_ST_BSSID,
- .flg = DEF_ST_BSSID,
+ .flg = DEF_ST_USE_BSSID,
.security = DEF_ST_SECURITY,
.autoreconnect = DEF_ST_AUTORECONNECT,
.reconnect_pause = DEF_ST_RECONNECT_PAUSE,
@@ -204,8 +204,8 @@ LOCAL int wlan_init_done_callback(void) {
//char wlan_st_name[] = WLAN0_NAME;
char wlan_st_name[] = WLAN0_NAME;
char wlan_ap_name[] = WLAN1_NAME;
-char wlan_st_netifn = 0;
-char wlan_ap_netifn = 1;
+unsigned char wlan_st_netifn = 0;
+unsigned char wlan_ap_netifn = 1;
uint32 get_new_ip(void)
@@ -256,7 +256,7 @@ extern Rltk_wlan_t rltk_wlan_info[2]; // in wrapper.h
};*/
#define get_padapter(num) (*(_adapter **)((rltk_wlan_info[num].dev)->priv));
-LOCAL rtw_result_t _wext_set_lps_dtim(int adapter_num, uint8 lps_dtim ) {
+rtw_result_t _wext_set_lps_dtim(int adapter_num, uint8 lps_dtim ) {
_adapter * pad = get_padapter(adapter_num);
rtw_result_t ret = RTW_ERROR;
if(pad) {
@@ -265,7 +265,7 @@ LOCAL rtw_result_t _wext_set_lps_dtim(int adapter_num, uint8 lps_dtim ) {
return ret;
}
-LOCAL rtw_result_t _wext_enable_powersave(int adapter_num, uint8 ips_mode, uint8 lps_mode) {
+rtw_result_t _wext_enable_powersave(int adapter_num, uint8 ips_mode, uint8 lps_mode) {
_adapter * pad = get_padapter(adapter_num);
rtw_result_t ret = RTW_ERROR;
if(pad) {
@@ -278,7 +278,7 @@ LOCAL rtw_result_t _wext_enable_powersave(int adapter_num, uint8 ips_mode, uint8
return ret;
}
-LOCAL int _wext_cmp_ssid(int adapter_num, uint8 *ssid)
+LOCAL int _wext_cmp_ssid(int adapter_num, unsigned char *ssid)
{
_adapter * pad = get_padapter(adapter_num);
int ret = 0;
@@ -357,7 +357,7 @@ LOCAL rtw_result_t wifi_run_ap(void) {
int timeout = wifi_test_timeout_ms / wifi_test_timeout_step_ms;
while (1) {
#if 1
- if (_wext_cmp_ssid(WLAN_AP_NETIF_NUM, &wifi_ap_cfg.ssid )) {
+ if (_wext_cmp_ssid(WLAN_AP_NETIF_NUM, wifi_ap_cfg.ssid )) {
#else
char essid[33];
if ((wext_get_ssid(wlan_ap_name, (unsigned char *) essid) > 0)
@@ -404,7 +404,7 @@ LOCAL rtw_result_t StartStDHCPClient(void)
debug_printf("Start DHCPClient...\n");
int ret = RTW_SUCCESS;
struct netif * pnetif = &xnetif[WLAN_ST_NETIF_NUM];
- DHCP_CONFIG *p = (dhcp_cfg *)&wifi_st_dhcp;
+ DHCP_CONFIG *p = (DHCP_CONFIG *)&wifi_st_dhcp;
unsigned char mode = p->mode;
if(mode == 2 && p->ip != IP4ADDR(255,255,255,255) && p->ip != IP4ADDR(0,0,0,0)) { // fixed ip
netif_set_addr(pnetif, (ip_addr_t *)&p->ip, (ip_addr_t *)&p->mask, (ip_addr_t *)&p->gw);
@@ -597,8 +597,8 @@ LOCAL void _LwIP_Init(void)
xnetif[idx].name[0] = 'r';
xnetif[idx].name[1] = '0' + idx;
}
- netif_add(&xnetif[WLAN_ST_NETIF_NUM], (struct netif *)&wifi_st_dhcp.ip, (struct netif *)&wifi_st_dhcp.mask, (struct netif *)&wifi_st_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
- netif_add(&xnetif[WLAN_AP_NETIF_NUM], (struct netif *)&wifi_ap_dhcp.ip, (struct netif *)&wifi_ap_dhcp.mask, (struct netif *)&wifi_ap_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
+ netif_add(&xnetif[WLAN_ST_NETIF_NUM], (ip_addr_t *)&wifi_st_dhcp.ip, (ip_addr_t *)&wifi_st_dhcp.mask, (ip_addr_t *)&wifi_st_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
+ netif_add(&xnetif[WLAN_AP_NETIF_NUM], (ip_addr_t *)&wifi_ap_dhcp.ip, (ip_addr_t *)&wifi_ap_dhcp.mask, (ip_addr_t *)&wifi_ap_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
#if CONFIG_ETHERNET // && NET_IF_NUM > 2
{
struct ip_addr ipaddr;
@@ -623,6 +623,9 @@ LOCAL void _LwIP_Init(void)
}
}
+extern int rltk_set_tx_power_percentage(rtw_tx_pwr_percentage_t power_percentage_idx);
+
+
int wifi_run(rtw_mode_t mode) {
int ret = 0;
#if CONFIG_DEBUG_LOG > 4
@@ -663,8 +666,8 @@ int wifi_run(rtw_mode_t mode) {
netbios_set_name(WLAN_ST_NETIF_NUM, lwip_host_name[0]);
#endif
#endif
- netif_set_addr(&xnetif[WLAN_ST_NETIF_NUM], &wifi_st_dhcp.ip,
- &wifi_st_dhcp.mask, &wifi_st_dhcp.gw);
+ netif_set_addr(&xnetif[WLAN_ST_NETIF_NUM], (ip_addr_t *) &wifi_st_dhcp.ip,
+ (ip_addr_t *) &wifi_st_dhcp.mask, (ip_addr_t *) &wifi_st_dhcp.gw);
pnif = &xnetif[WLAN_AP_NETIF_NUM];
#if LWIP_NETIF_HOSTNAME
// @todo ethernetif_init()...
@@ -673,8 +676,8 @@ int wifi_run(rtw_mode_t mode) {
netbios_set_name(WLAN_AP_NETIF_NUM, lwip_host_name[1]);
#endif
#endif
- netif_set_addr(&xnetif[WLAN_AP_NETIF_NUM], &wifi_ap_dhcp.ip,
- &wifi_ap_dhcp.mask, &wifi_ap_dhcp.gw);
+ netif_set_addr(&xnetif[WLAN_AP_NETIF_NUM], (ip_addr_t *) &wifi_ap_dhcp.ip,
+ (ip_addr_t *) &wifi_ap_dhcp.mask, (ip_addr_t *) &wifi_ap_dhcp.gw);
}
switch(mode) {
@@ -856,3 +859,32 @@ void show_wifi_cfg(void) {
printf("\tSave flags: %p\n", wifi_cfg.save_flg);
}
+#if SDK_VER_NUM >= 0x4000
+extern int wext_get_associated_client_list(const char *ifname, void * client_list_buffer, __u16 buffer_length);
+
+int show_wifi_ap_clients(void) {
+ if((wifi_mode == RTW_MODE_AP) || (wifi_mode == RTW_MODE_STA_AP)) {
+ struct {
+ int count;
+ rtw_mac_t mac_list[AP_STA_NUM];
+ } client_info;
+ client_info.count = AP_STA_NUM;
+ if(wext_get_associated_client_list(wlan_ap_name, &client_info, sizeof(client_info)) >= 0) {
+ if(client_info.count) {
+ printf("\tAP %u clients:\n", client_info.count);
+ int client_idx = 0;
+ while(client_idx++ < client_info.count) {
+ unsigned char *pmac = client_info.mac_list[client_idx].octet;
+ printf("\tsta[%u]: %02x:%02x:%02x:%02x:%02x:%02x\n", client_idx,
+ pmac[0],pmac[1],pmac[2],pmac[3],pmac[4],pmac[5]);
+ }
+ } else {
+ printf("\tAP clients none\n");
+ }
+ return client_info.count;
+ };
+ };
+ printf("Get AP clients error!\n");
+ return -1;
+}
+#endif
diff --git a/RTL00_SDKV35a/component/common/api/wifi_api.h b/RTL00_SDKV35a/component/common/api/wifi_api.h
index 156ac93..64e69e4 100644
--- a/RTL00_SDKV35a/component/common/api/wifi_api.h
+++ b/RTL00_SDKV35a/component/common/api/wifi_api.h
@@ -10,10 +10,12 @@
#include "wifi_constants.h"
#include "queue.h"
+#ifndef ip4_addr1
#define ip4_addr1(ipaddr) (((uint8_t*)(ipaddr))[0])
#define ip4_addr2(ipaddr) (((uint8_t*)(ipaddr))[1])
#define ip4_addr3(ipaddr) (((uint8_t*)(ipaddr))[2])
#define ip4_addr4(ipaddr) (((uint8_t*)(ipaddr))[3])
+#endif
#define IPSTR "%d.%d.%d.%d"
@@ -118,8 +120,8 @@ extern unsigned char wifi_mode; // rtw_mode_t
extern unsigned char wifi_st_status; // WIFI_STA_ENUM
extern char wlan_st_name[];
extern char wlan_ap_name[];
-extern char wlan_st_netifn;
-extern char wlan_ap_netifn;
+extern unsigned char wlan_st_netifn;
+extern unsigned char wlan_ap_netifn;
/* WiFi Station & scan security */
typedef enum {
@@ -152,6 +154,9 @@ void show_wifi_st_ip(void);
void show_wifi_cfg(void);
void show_wifi_st_cfg(void);
void show_wifi_ap_cfg(void);
+#if SDK_VER_NUM >= 0x4000
+int show_wifi_ap_clients(void);
+#endif
uint32 read_wifi_cfg(uint32 flg);
uint32 write_wifi_cfg(uint32 flg);
int wifi_run(rtw_mode_t mode);
@@ -185,4 +190,9 @@ rtw_result_t api_wifi_scan(api_scan_result_handler_t scan_result_cb);
void wifi_close_scan(void);
+rtw_result_t _wext_set_lps_dtim(int adapter_num, uint8 lps_dtim);
+int _wext_get_lps_dtim(int adapter_num);
+rtw_result_t _wext_enable_powersave(int adapter_num, uint8 ips_mode, uint8 lps_mode);
+
+
#endif // _WIFI_API_H_
diff --git a/RTL00_SDKV35a/component/common/api/wifi_api_scan.c b/RTL00_SDKV35a/component/common/api/wifi_api_scan.c
index 556668e..999cf58 100644
--- a/RTL00_SDKV35a/component/common/api/wifi_api_scan.c
+++ b/RTL00_SDKV35a/component/common/api/wifi_api_scan.c
@@ -90,7 +90,7 @@ LOCAL void _wifi_scan_done_hdl(char* buf, int buf_len, int flags, void* userdata
web_scan_handler_t * pwscn_rec = &web_scan_handler_ptr;
if(pscan_rec->gscan_result_handler) {
// сторонний вывод
- (*pscan_rec->gscan_result_handler)(pscan_rec);
+ (*pscan_rec->gscan_result_handler)((rtw_scan_handler_result_t *) pscan_rec);
}
else {
// оставить структуру pscan_rec->pap_details[i] для вывода в web scan на 5 сек
@@ -136,6 +136,7 @@ LOCAL int _wifi_scan_networks(rtw_scan_result_handler_t results_handler) {
}
/* -------- wext_set_pscan_channels ----------------- */
+extern int iw_ioctl(const char * ifname, unsigned long request, struct iwreq * pwrq);
LOCAL int wext_set_pscan_channels(void) {
struct iwreq iwr;
@@ -183,7 +184,7 @@ rtw_result_t api_wifi_scan(api_scan_result_handler_t scan_result_cb)
// error_printf("Error xTimerStart\n");
} else if(wext_set_pscan_channels() < 0) {
// error_printf("ERROR: wifi set partial scan channel fail\n");
- } else if(_wifi_scan_networks(scan_result_cb) != RTW_SUCCESS) {
+ } else if(_wifi_scan_networks((rtw_scan_result_handler_t) scan_result_cb) != RTW_SUCCESS) {
// error_printf("ERROR: wifi scan failed\n");
} else if(scan_result_cb) {
int i = 300;
diff --git a/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sd.c b/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sd.c
index dd81f93..659a3af 100644
--- a/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sd.c
+++ b/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sd.c
@@ -18,7 +18,7 @@ void sd_xfer_done_callback(void *obj) {
}
void sd_xfer_err_callback(void *obj) {
- DBG_SDIO_ERR("sd_xfer_err_callback \r\n");
+ DBG_SDIO_ERR("sd_xfer_err_callback\r\n");
}
//----- SD_WaitReady
diff --git a/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c b/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c
index 1d4c8a9..4b90808 100644
--- a/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c
+++ b/RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c
@@ -259,7 +259,7 @@ s8 sdio_sd_setClock(SD_CLK_FREQUENCY SDCLK) {
DBG_SDIO_ERR("Malloc ADMA2 table fail.\n");
return -1;
}
- DBG_SDIO_INFO("SD card set CLK %d Hz\n", PLATFORM_CLOCK/(4<<(8-SDCLK)));
+ DBG_SDIO_INFO("SD card set CLK %d Hz\n", PLATFORM_CLOCK/(2 << (SD_CLK_41_6MHZ - SDCLK)));
sta = HalSdioHostOp.HalSdioHostChangeSdClock(&SdioHostAdapter, SDCLK);
rtw_mfree(padma, sizeof(ADMA2_DESC_FMT));
if (sta)
diff --git a/RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/hal_com_reg.h b/RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/hal_com_reg.h
index 4e176f4..5766d47 100644
--- a/RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/hal_com_reg.h
+++ b/RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/hal_com_reg.h
@@ -39,8 +39,8 @@
// 0x0000h ~ 0x00FFh System Configuration
//
//-----------------------------------------------------
-#define REG_SYS_ISO_CTRL 0x0000
-#define REG_SYS_FUNC_EN 0x0002
+#define REG_SYS_ISO_CTRL_ 0x0000
+#define REG_SYS_FUNC_EN_ 0x0002
#define REG_APS_FSMCO 0x0004
#define REG_SYS_CLKR 0x0008
#define REG_9346CR 0x000A
@@ -515,7 +515,7 @@
#define REG_BSSID1 0x0708
/* port0 & port1 enable */
-#define REG_PORT_CTRL 0x76D
+//#define REG_PORT_CTRL 0x76D
//-----------------------------------------------------
//
@@ -872,7 +872,7 @@ Default: 00b.
#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt
#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0
#define IMR_RXFOVW BIT12 // Receive FIFO Overflow
-#define IMR_RDU BIT11 // Receive Descriptor Unavailable
+#define IMR_RDU_ BIT11 // Receive Descriptor Unavailable
#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt. For 8723 and later ICs, it also means P2P CTWin End interrupt.
#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup
#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt
diff --git a/RTL00_SDKV35a/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c b/RTL00_SDKV35a/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c
index 249b007..1e3d544 100644
--- a/RTL00_SDKV35a/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c
+++ b/RTL00_SDKV35a/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c
@@ -133,13 +133,13 @@ void rltk_wlan_recv(int idx, struct eth_drv_sg *sg_list, int sg_len)
DBG_TRACE("%s is called", __FUNCTION__);
- if (!rltk_wlan_check_isup(idx))
- return;
-
if(idx == -1){
DBG_ERR("skb is NULL");
return;
}
+
+ if (!rltk_wlan_check_isup(idx))
+ return;
skb = rltk_wlan_get_recv_skb(idx);
DBG_ASSERT(skb, "No pending rx skb");
diff --git a/RTL00_SDKV35a/component/common/file_system/fatfs/disk_if/inc/sdcard.h b/RTL00_SDKV35a/component/common/file_system/fatfs/disk_if/inc/sdcard.h
index a9ed1d8..e4340f9 100644
--- a/RTL00_SDKV35a/component/common/file_system/fatfs/disk_if/inc/sdcard.h
+++ b/RTL00_SDKV35a/component/common/file_system/fatfs/disk_if/inc/sdcard.h
@@ -1,6 +1,6 @@
#ifndef _SDCARD_H_
#define _SDCARD_H_
-#include "fatfs_ext/inc/ff_driver.h"
+#include "ff_driver.h"
extern ll_diskio_drv SD_disk_Driver;
#endif
diff --git a/RTL00_SDKV35a/component/common/mbed/common/wait_api.c b/RTL00_SDKV35a/component/common/mbed/common/wait_api.c
index b89e548..b4ee6cb 100644
--- a/RTL00_SDKV35a/component/common/mbed/common/wait_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/common/wait_api.c
@@ -17,6 +17,8 @@
#include "us_ticker_api.h"
#include "platform_autoconf.h"
+#include "FreeRTOS.h"
+#include "task.h"
#define WAIT_US_USE_CYCCNT
diff --git a/RTL00_SDKV35a/component/common/mbed/hal/gpio_irq_api.h b/RTL00_SDKV35a/component/common/mbed/hal/gpio_irq_api.h
index ccdb30c..10f5775 100644
--- a/RTL00_SDKV35a/component/common/mbed/hal/gpio_irq_api.h
+++ b/RTL00_SDKV35a/component/common/mbed/hal/gpio_irq_api.h
@@ -27,7 +27,9 @@ extern "C" {
typedef enum {
IRQ_NONE,
IRQ_RISE,
- IRQ_FALL
+ IRQ_FALL,
+ IRQ_LOW,
+ IRQ_HIGH
} gpio_irq_event;
typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
diff --git a/RTL00_SDKV35a/component/common/mbed/hal_ext/dma_api.h b/RTL00_SDKV35a/component/common/mbed/hal_ext/dma_api.h
index 1bf3a0e..a753c42 100644
--- a/RTL00_SDKV35a/component/common/mbed/hal_ext/dma_api.h
+++ b/RTL00_SDKV35a/component/common/mbed/hal_ext/dma_api.h
@@ -34,8 +34,8 @@ typedef void (*dma_irq_handler)(uint32_t id);
void dma_memcpy_init(gdma_t *dma_obj, dma_irq_handler handler, uint32_t id);
void dma_memcpy_deinit(gdma_t *dma_obj);
void dma_memcpy(gdma_t *dma_obj, void *dst, void* src, uint32_t len);
-void dma_memcpy_aggr_init(gdma_t * dma_obj, dma_irq_handler handler, uint32_t id);
-void dma_memcpy_aggr(gdma_t * dma_obj, PHAL_GDMA_BLOCK block_info);
+void dma_memcpy_aggr_init(gdma_t *dma_obj, dma_irq_handler handler, uint32_t id);
+void dma_memcpy_aggr(gdma_t *dma_obj, PHAL_GDMA_BLOCK block_info);
#ifdef __cplusplus
}
diff --git a/RTL00_SDKV35a/component/common/mbed/hal_ext/gpio_irq_ex_api.h b/RTL00_SDKV35a/component/common/mbed/hal_ext/gpio_irq_ex_api.h
index 2fcee20..949ea6a 100644
--- a/RTL00_SDKV35a/component/common/mbed/hal_ext/gpio_irq_ex_api.h
+++ b/RTL00_SDKV35a/component/common/mbed/hal_ext/gpio_irq_ex_api.h
@@ -24,10 +24,12 @@
extern "C" {
#endif
+/*
typedef enum {
IRQ_LOW = 3,
IRQ_HIGH =4
} gpio_irq_event_ex;
+*/
void gpio_irq_deinit(gpio_irq_t *obj);
void gpio_irq_pull_ctrl(gpio_irq_t *obj, PinMode pull_type);
@@ -37,4 +39,4 @@ void gpio_irq_pull_ctrl(gpio_irq_t *obj, PinMode pull_type);
#endif // end of "#if DEVICE_INTERRUPTIN"
-#endif // end of #ifndef MBED_GPIO_IRQ_EX_API_H
\ No newline at end of file
+#endif // end of #ifndef MBED_GPIO_IRQ_EX_API_H
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/analogin_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/analogin_api.c
index 09b6cf6..18c5d14 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/analogin_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/analogin_api.c
@@ -118,13 +118,13 @@ void analogin_init (analogin_t *obj, PinName pin){
}
float analogin_read(analogin_t *obj){
- float value;
+// float value;
union {
unsigned int ui[2];
unsigned short us[4];
} adata;
PSAL_ADC_HND p = &((&(obj->SalADCMngtAdpt))->pSalHndPriv->SalADCHndPriv);
- RtkADCReceiveBuf(p, &adata.ui);
+ RtkADCReceiveBuf(p, (u32 *) &adata.ui);
return (float)(adata.us[p->DevNum]) / (float)(0xCE80);
/*
uint32_t AnaloginTmp[2] = {0,0};
@@ -161,7 +161,7 @@ uint16_t analogin_read_u16(analogin_t *obj){
unsigned short us[4];
} adata;
PSAL_ADC_HND p = &((&(obj->SalADCMngtAdpt))->pSalHndPriv->SalADCHndPriv);
- RtkADCRxManualRotate(p, &adata.ui);
+ RtkADCRxManualRotate(p, (u32 *) &adata.ui);
return adata.us[p->DevNum];
/*
uint32_t AnaloginTmp[2] = {0,0};
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c
index 6a8d455..86978a6 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_api.c
@@ -592,6 +592,8 @@ unsigned int flash_get_size(flash_t *obj) {
/*
* Read Flash OTP data
*/
+extern void SpicTxCmdWithDataRtl8195A(u8 cmd, u8 DataPhaseLen, u8* pData, SPIC_INIT_PARA SpicInitPara);
+
int flash_otp_read(flash_t *obj, uint32_t address, uint32_t Length,
uint8_t * data) {
int ret = 1;
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_eep.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_eep.c
index 2342fd1..82ce6c9 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_eep.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/flash_eep.c
@@ -350,7 +350,7 @@ LOCAL FLASH_EEP_ATTR unsigned int pack_cfg_fmem(fobj_head obj)
#if 0
copy_align4_to_align1((uint8 *)pbuf, rdaddr, len);
#else
- SpicUserReadFourByteRtl8195A(len, rdaddr, (unsigned int *)pbuf, flashobj.SpicInitPara.Mode.BitMode);
+ SpicUserReadFourByteRtl8195A(len, rdaddr, (u32 *)pbuf, flashobj.SpicInitPara.Mode.BitMode);
#endif
int i = 0;
int size4b = len >> 2;
@@ -376,7 +376,7 @@ LOCAL signed short FLASH_EEP_ATTR _flash_write_cfg(void *ptr, unsigned short id,
fobj_head fobj;
fobj.n.id = id;
fobj.n.size = size;
- bool retb = false;
+// bool retb = false;
unsigned int faddr = get_addr_bscfg(false);
if(faddr >= FMEM_ERROR_MAX) {
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/i2c_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/i2c_api.c
index 6d1ed3e..457f700 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/i2c_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/i2c_api.c
@@ -573,6 +573,7 @@ int i2c_enable_control(i2c_t *obj, int enable) {
pSalI2CHND->pInitDat->I2CEn = enable;
pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat);
+ return 1;
}
#if DEVICE_I2CSLAVE
@@ -719,14 +720,14 @@ int i2c_slave_write(i2c_t *obj, const char *data, int length) {
* \return result
*/
int i2c_slave_set_for_rd_req(i2c_t *obj, int set) {
- PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
- PSAL_I2C_HND pSalI2CHND = NULL;
- PHAL_I2C_INIT_DAT pHalI2CInitDat = NULL;
- PHAL_I2C_OP pHalI2COP = NULL;
+ PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt;
+// PSAL_I2C_HND pSalI2CHND = NULL;
+ PHAL_I2C_INIT_DAT pHalI2CInitDat;
+ PHAL_I2C_OP pHalI2COP;
u32 I2CLocalTemp;
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
- pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
+// pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
pHalI2CInitDat = pSalI2CMngtAdpt->pHalInitDat;
pHalI2COP = pSalI2CMngtAdpt->pHalOp;
@@ -772,6 +773,7 @@ int i2c_slave_set_for_data_nak(i2c_t *obj, int set_nak) {
//}
HAL_I2C_WRITE32(pSalI2CHND->DevNum, REG_DW_I2C_IC_SLV_DATA_NACK_ONLY, set_nak);
+ return 1;
}
#endif // CONFIG_I2C_SLAVE_EN
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/log_uart_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/log_uart_api.c
index fc284a7..cb0f60c 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/log_uart_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/log_uart_api.c
@@ -253,7 +253,7 @@ void log_uart_irq_set(log_uart_t *obj, LOG_UART_INT_ID irq, uint32_t enable)
char log_uart_getc(log_uart_t *obj)
{
- HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
+// HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
while (!log_uart_readable(obj));
return (char)(HAL_UART_READ32(UART_REV_BUF_OFF) & 0xFF);
@@ -261,7 +261,7 @@ char log_uart_getc(log_uart_t *obj)
void log_uart_putc(log_uart_t *obj, char c)
{
- HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
+// HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
while (!log_uart_writable(obj));
HAL_UART_WRITE8(UART_TRAN_HOLD_OFF, c);
@@ -269,7 +269,7 @@ void log_uart_putc(log_uart_t *obj, char c)
int log_uart_readable(log_uart_t *obj)
{
- HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
+// HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
volatile u8 line_status;
line_status = HAL_UART_READ8(UART_LINE_STATUS_REG_OFF);
@@ -283,7 +283,7 @@ int log_uart_readable(log_uart_t *obj)
int log_uart_writable(log_uart_t *obj)
{
- HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
+// HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
volatile u8 line_status;
line_status = HAL_UART_READ8(UART_LINE_STATUS_REG_OFF);
@@ -321,7 +321,7 @@ void log_uart_clear_rx(log_uart_t *obj)
void log_uart_break_set(log_uart_t *obj)
{
- HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
+// HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
u32 RegValue;
RegValue = HAL_UART_READ32(UART_LINE_CTL_REG_OFF);
@@ -331,7 +331,7 @@ void log_uart_break_set(log_uart_t *obj)
void log_uart_break_clear(log_uart_t *obj)
{
- HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
+// HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
u32 RegValue;
RegValue = HAL_UART_READ32(UART_LINE_CTL_REG_OFF);
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/pwmout_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/pwmout_api.c
index d2d7d31..184286d 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/pwmout_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/pwmout_api.c
@@ -44,6 +44,8 @@ const PinMap PinMap_PWM[] = {
{NC, NC, 0}
};
+extern void * rtl_memset(void *m, int c, size_t n);
+
int pwmout_init(pwmout_t* obj, PinName pin)
{
uint32_t peripheral;
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c
index af21347..0f495b6 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/serial_api.c
@@ -536,12 +536,12 @@ int32_t serial_send_stream (serial_t *obj, char *ptxbuf, uint32_t len)
int32_t serial_recv_stream_dma (serial_t *obj, char *prxbuf, uint32_t len)
{
- PHAL_RUART_OP pHalRuartOp;
+// PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
u8 uart_idx = pHalRuartAdapter->UartIndex;
int32_t ret;
- pHalRuartOp = &(obj->hal_uart_op);
+// pHalRuartOp = &(obj->hal_uart_op);
if ((serial_dma_en[uart_idx] & SERIAL_RX_DMA_EN)==0) {
PUART_DMA_CONFIG pHalRuartDmaCfg;
@@ -563,12 +563,12 @@ int32_t serial_recv_stream_dma (serial_t *obj, char *prxbuf, uint32_t len)
int32_t serial_send_stream_dma (serial_t *obj, char *ptxbuf, uint32_t len)
{
- PHAL_RUART_OP pHalRuartOp;
+// PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
u8 uart_idx = pHalRuartAdapter->UartIndex;
int32_t ret;
- pHalRuartOp = &(obj->hal_uart_op);
+// pHalRuartOp = &(obj->hal_uart_op);
if ((serial_dma_en[uart_idx] & SERIAL_TX_DMA_EN)==0) {
PUART_DMA_CONFIG pHalRuartDmaCfg;
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/spi_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/spi_api.c
index 85471cd..4086b7a 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/spi_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/spi_api.c
@@ -58,13 +58,11 @@ void spi_init (spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName sse
_memset((void*)obj, 0, sizeof(spi_t));
obj->state = 0;
- uint32_t SystemClock = SystemGetCpuClk();
- uint32_t MaxSsiFreq = (SystemClock >> 2) >> 1;
/* SsiClockDivider doesn't support odd number */
- DBG_SSI_INFO("SystemClock: %d\n", SystemClock);
- DBG_SSI_INFO("MaxSsiFreq : %d\n", MaxSsiFreq);
+ DBG_SSI_INFO("SystemClock: %d\n", SystemGetCpuClk());
+ DBG_SSI_INFO("MaxSsiFreq : %d\n", (SystemClock >> 2) >> 1);
ssi_mosi = pinmap_peripheral(mosi, PinMap_SSI_MOSI);
ssi_miso = pinmap_peripheral(miso, PinMap_SSI_MISO);
diff --git a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/sys_api.c b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/sys_api.c
index a9416b3..2742f4c 100644
--- a/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/sys_api.c
+++ b/RTL00_SDKV35a/component/common/mbed/targets/hal/rtl8195a/sys_api.c
@@ -41,7 +41,7 @@ extern void HalDeinitLogUart(void);
#ifdef CONFIG_SDR_EN
//#if defined ( __ICCARM__ )
-extern u8 IsSdrPowerOn();
+extern u8 IsSdrPowerOn(void);
//#endif
#endif
/**
@@ -204,11 +204,16 @@ void sys_reset(void)
}
#ifdef CONFIG_SDR_EN
+
+extern u8 IsSdrPowerOn(void);
+
u8 sys_is_sdram_power_on(void)
{
return IsSdrPowerOn();
}
+extern void SdrPowerOff(void);
+
void sys_sdram_off(void)
{
if (IsSdrPowerOn()) {
diff --git a/RTL00_SDKV35a/component/common/network/dhcp/dhcps.h b/RTL00_SDKV35a/component/common/network/dhcp/dhcps.h
index a1c7d60..ab1d308 100644
--- a/RTL00_SDKV35a/component/common/network/dhcp/dhcps.h
+++ b/RTL00_SDKV35a/component/common/network/dhcp/dhcps.h
@@ -30,8 +30,8 @@
#define DHCP_MESSAGE_HTYPE (1)
#define DHCP_MESSAGE_HLEN (6)
-#define DHCP_SERVER_PORT (67)
-#define DHCP_CLIENT_PORT (68)
+//#define DHCP_SERVER_PORT (67)
+//#define DHCP_CLIENT_PORT (68)
#define DHCP_MESSAGE_TYPE_DISCOVER (1)
#define DHCP_MESSAGE_TYPE_OFFER (2)
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/ethernetif.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/ethernetif.c
index 50d883d..c539567 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/ethernetif.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/ethernetif.c
@@ -91,9 +91,12 @@ static void arp_timer(void *arg);
#if LWIP_NETIF_HOSTNAME
char lwip_host_name[NET_IF_NUM][LWIP_NETIF_HOSTNAME_SIZE] = {
- DEF_HOSTNAME"0",
- DEF_HOSTNAME"1",
- DEF_HOSTNAME"2"
+ { DEF_HOSTNAME"0" },
+ { DEF_HOSTNAME"1" }
+#if NET_IF_NUM > 2
+ ,{ DEF_HOSTNAME "2" }
+#endif
+
};
#endif
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/err.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/err.c
index 51b32ea..2183b0d 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/err.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/err.c
@@ -38,7 +38,7 @@
#include "lwip/err.h"
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
static const char *err_strerr[] = {
"Ok", /* ERR_OK 0 */
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/sockets.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/sockets.c
index 5669497..e8dfd8c 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/sockets.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/sockets.c
@@ -105,7 +105,7 @@ struct lwip_select_cb {
struct lwip_setgetsockopt_data {
/** socket struct for which to change options */
struct lwip_sock *sock;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
/** socket index for which to change options */
int s;
#endif /* LWIP_DEBUG */
@@ -1641,7 +1641,7 @@ lwip_getsockopt(int s, int level, int optname, void *optval, socklen_t *optlen)
/* Now do the actual option processing */
data.sock = sock;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
data.s = s;
#endif /* LWIP_DEBUG */
data.level = level;
@@ -1662,7 +1662,7 @@ static void
lwip_getsockopt_internal(void *arg)
{
struct lwip_sock *sock;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
int s;
#endif /* LWIP_DEBUG */
int level, optname;
@@ -1673,7 +1673,7 @@ lwip_getsockopt_internal(void *arg)
data = (struct lwip_setgetsockopt_data*)arg;
sock = data->sock;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
s = data->s;
#endif /* LWIP_DEBUG */
level = data->level;
@@ -2059,7 +2059,7 @@ lwip_setsockopt(int s, int level, int optname, const void *optval, socklen_t opt
/* Now do the actual option processing */
data.sock = sock;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
data.s = s;
#endif /* LWIP_DEBUG */
data.level = level;
@@ -2080,7 +2080,7 @@ static void
lwip_setsockopt_internal(void *arg)
{
struct lwip_sock *sock;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
int s;
#endif /* LWIP_DEBUG */
int level, optname;
@@ -2091,7 +2091,7 @@ lwip_setsockopt_internal(void *arg)
data = (struct lwip_setgetsockopt_data*)arg;
sock = data->sock;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
s = data->s;
#endif /* LWIP_DEBUG */
level = data->level;
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/tcpip.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/tcpip.c
index 1cc4224..7dda5b4 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/tcpip.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/api/tcpip.c
@@ -308,7 +308,7 @@ err_t
tcpip_apimsg(struct api_msg *apimsg)
{
struct tcpip_msg msg;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
/* catch functions that don't set err */
apimsg->msg.err = ERR_VAL;
#endif
@@ -339,7 +339,7 @@ tcpip_apimsg(struct api_msg *apimsg)
err_t
tcpip_apimsg_lock(struct api_msg *apimsg)
{
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
/* catch functions that don't set err */
apimsg->msg.err = ERR_VAL;
#endif
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/dhcp.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/dhcp.c
index fcecff1..8b62123 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/dhcp.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/dhcp.c
@@ -1008,7 +1008,7 @@ dhcp_bind(struct netif *netif)
ip_addr_copy(gw_addr, dhcp->offered_gw_addr);
/* gateway address not given? */
- if (ip_addr_isany(&gw_addr)) {
+ if (gw_addr.addr == IPADDR_ANY) {
/* copy network address */
ip_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
/* use first host address on network as gateway */
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/icmp.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/icmp.c
index 47ba857..3a34a5e 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/icmp.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/icmp.c
@@ -77,7 +77,7 @@ void
icmp_input(struct pbuf *p, struct netif *inp)
{
u8_t type;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
u8_t code;
#endif /* LWIP_DEBUG */
struct icmp_echo_hdr *iecho;
@@ -96,7 +96,7 @@ icmp_input(struct pbuf *p, struct netif *inp)
}
type = *((u8_t *)p->payload);
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
code = *(((u8_t *)p->payload)+1);
#endif /* LWIP_DEBUG */
switch (type) {
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/igmp.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/igmp.c
index 45bb5d9..94e9ffc 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/igmp.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/igmp.c
@@ -161,7 +161,7 @@ igmp_init(void)
IP4_ADDR(&allrouters, 224, 0, 0, 2);
}
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
/**
* Dump global IGMP groups list
*/
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip.c
index b529e27..8af0496 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip.c
@@ -128,8 +128,9 @@ struct netif *
ip_route(ip_addr_t *dest)
{
struct netif *netif;
+#if CONFIG_ETHERNET
struct netif *last_netif = NULL;
-
+#endif
#ifdef LWIP_HOOK_IP4_ROUTE
netif = LWIP_HOOK_IP4_ROUTE(dest);
if (netif != NULL) {
@@ -498,7 +499,7 @@ ip_input(struct pbuf *p, struct netif *inp)
/* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if IP_ACCEPT_LINK_LAYER_ADDRESSING
/* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
- if (check_ip_src && !ip_addr_isany(¤t_iphdr_src))
+ if (check_ip_src && current_iphdr_src.addr != IPADDR_ANY)
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
{ if ((ip_addr_isbroadcast(¤t_iphdr_src, inp)) ||
(ip_addr_ismulticast(¤t_iphdr_src))) {
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/memp.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/memp.c
index 24a12b1..534d4a7 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/memp.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/memp.c
@@ -140,7 +140,7 @@ static const u16_t memp_num[MEMP_MAX] = {
};
/** This array holds a textual description of each pool. */
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
static const char *memp_desc[MEMP_MAX] = {
#define LWIP_MEMPOOL(name,num,size,desc) (desc),
#include "lwip/memp_std.h"
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/stats.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/stats.c
index 8ea8249..0422b83 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/stats.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/core/stats.c
@@ -50,7 +50,7 @@ struct stats_ lwip_stats;
void stats_init(void)
{
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
#if MEMP_STATS
const char * memp_names[] = {
#define LWIP_MEMPOOL(name,num,size,desc) desc,
diff --git a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/netif/etharp.c b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/netif/etharp.c
index a0d3d8e..7f88da4 100644
--- a/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/netif/etharp.c
+++ b/RTL00_SDKV35a/component/common/network/lwip/lwip_v1.4.1/src/netif/etharp.c
@@ -187,7 +187,7 @@ etharp_free_entry(int i)
}
/* recycle entry for re-use */
arp_table[i].state = ETHARP_STATE_EMPTY;
-#ifdef LWIP_DEBUG
+#if defined(LWIP_DEBUG) && (LWIP_DEBUG != 0)
/* for debugging, clean out the complete entry */
arp_table[i].ctime = 0;
arp_table[i].netif = NULL;
diff --git a/RTL00_SDKV35a/component/common/network/netbios/netbios.c b/RTL00_SDKV35a/component/common/network/netbios/netbios.c
index cb0db96..50cf04d 100644
--- a/RTL00_SDKV35a/component/common/network/netbios/netbios.c
+++ b/RTL00_SDKV35a/component/common/network/netbios/netbios.c
@@ -163,8 +163,7 @@ PACK_STRUCT_END
# include "arch/epstruct.h"
#endif
-//#define toupper(CH) \
-// (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH))
+#define toupper(CH) (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH))
/** NetBIOS decoding name */
@@ -226,7 +225,7 @@ netbios_recv(void *arg, struct udp_pcb *upcb, struct pbuf *p, ip_addr_t *addr,
if (current_netif != NULL && current_netif->num < NET_IF_NUM) {
uint32 ip = current_netif->ip_addr.addr;
char *curbiosname = netbios_name[current_netif->num];
- if (curbiosname[0] != '\0' && ip != NULL
+ if (curbiosname[0] != '\0' && ip != 0
/* we only answer if we got a default interface */
&& (((ip ^ addr->addr) & current_netif->netmask.addr) == 0)) { // запрет ответа другой подсети
#if DEBUGSOO > 3
diff --git a/RTL00_SDKV35a/component/common/network/netbios/netbios.h b/RTL00_SDKV35a/component/common/network/netbios/netbios.h
index a843cc1..d472e1b 100644
--- a/RTL00_SDKV35a/component/common/network/netbios/netbios.h
+++ b/RTL00_SDKV35a/component/common/network/netbios/netbios.h
@@ -1,6 +1,7 @@
#ifndef __NETBIOS_H__
#define __NETBIOS_H__
+#include "autoconf.h"
#include "lwip/opt.h"
/** default port number for "NetBIOS Name service */
@@ -9,9 +10,9 @@
/** size of a NetBIOS name */
#define NETBIOS_NAME_LEN 16
-#ifndef NET_IF_NUM
-#define NET_IF_NUM 2
-#endif
+//#ifndef NET_IF_NUM
+//#define NET_IF_NUM 2
+//#endif
#ifdef __cplusplus
extern "C" {
diff --git a/RTL00_SDKV35a/component/common/network/sntp/sntp.c b/RTL00_SDKV35a/component/common/network/sntp/sntp.c
index 8289a58..0a914b3 100644
--- a/RTL00_SDKV35a/component/common/network/sntp/sntp.c
+++ b/RTL00_SDKV35a/component/common/network/sntp/sntp.c
@@ -159,7 +159,7 @@ void sntp_get_lasttime(long *sec, long *usec, unsigned int *tick)
time_t sntp_gen_system_time(int timezone)
{
- struct tm current_tm;
+// struct tm current_tm;
unsigned int update_tick;
long update_sec, update_usec, current_sec = 0;
diff --git a/RTL00_SDKV35a/component/os/freertos/cmsis_os.c b/RTL00_SDKV35a/component/os/freertos/cmsis_os.c
index f89830a..7225c96 100644
--- a/RTL00_SDKV35a/component/os/freertos/cmsis_os.c
+++ b/RTL00_SDKV35a/component/os/freertos/cmsis_os.c
@@ -74,7 +74,7 @@ static int inHandlerMode (void)
#if configSignalManagementSupport // the older FreeRTOS version didn't support Signal Management functions
static void add_thread_signal_map (osThreadId thread_id, EventGroupHandle_t signals)
{
- int dummy;
+ int dummy = 0;
// uint32_t i;
ThreadSignalRec *prec_entity;
@@ -135,7 +135,7 @@ static EventGroupHandle_t find_signal_by_thread (osThreadId thread_id)
{
EventGroupHandle_t signals_hdl=NULL;
// uint32_t i;
- int dummy;
+ int dummy = 0;
ThreadSignalRec *prec_entity;
if (inHandlerMode()) {
@@ -185,7 +185,7 @@ static EventGroupHandle_t remove_thread_signal_map (osThreadId thread_id)
{
EventGroupHandle_t signals_hdl=NULL;
// uint32_t i;
- int dummy;
+ int dummy = 0;
ThreadSignalRec *prec_entity;
ThreadSignalRec *pprev_entity;
@@ -989,7 +989,7 @@ osPoolId osPoolCreate (const osPoolDef_t *pool_def)
/// \note MUST REMAIN UNCHANGED: \b osPoolAlloc shall be consistent in every CMSIS-RTOS.
void *osPoolAlloc (osPoolId pool_id)
{
- int dummy;
+ int dummy = 0;
void *p = NULL;
uint32_t i;
uint32_t index;
@@ -1047,7 +1047,7 @@ void *osPoolCAlloc (osPoolId pool_id)
/// \note MUST REMAIN UNCHANGED: \b osPoolFree shall be consistent in every CMSIS-RTOS.
osStatus osPoolFree (osPoolId pool_id, void *block)
{
- int dummy;
+ int dummy = 0;
uint32_t index;
if (pool_id == NULL) {
diff --git a/RTL00_SDKV35a/component/os/freertos/freertos_pmu.c b/RTL00_SDKV35a/component/os/freertos/freertos_pmu.c
index d662075..9f8fc70 100644
--- a/RTL00_SDKV35a/component/os/freertos/freertos_pmu.c
+++ b/RTL00_SDKV35a/component/os/freertos/freertos_pmu.c
@@ -58,6 +58,7 @@ int freertos_ready_to_sleep() {
return wakelock == 0;
}
+extern uint32_t osKernelSysTick (void);
/*
* It is called when freertos is going to sleep.
* At this moment, all sleep conditons are satisfied. All freertos' sleep pre-processing are done.
@@ -65,7 +66,7 @@ int freertos_ready_to_sleep() {
* @param expected_idle_time : The time that FreeRTOS expect to sleep.
* If we set this value to 0 then FreeRTOS will do nothing in its sleep function.
**/
-void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
+void freertos_pre_sleep_processing(uint32_t *expected_idle_time) {
#ifdef CONFIG_SOC_PS_MODULE
@@ -176,7 +177,7 @@ void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
#endif
}
-void freertos_post_sleep_processing(unsigned int *expected_idle_time) {
+void freertos_post_sleep_processing(uint32_t *expected_idle_time) {
#ifndef configSYSTICK_CLOCK_HZ
*expected_idle_time = 1 + ( portNVIC_SYSTICK_CURRENT_VALUE_REG / ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) );
#else
@@ -257,8 +258,12 @@ uint32_t get_wakelock_status() {
}
#if (configGENERATE_RUN_TIME_STATS == 1)
+
+extern int sprintf(char* str, const char* fmt, ...);
+extern size_t strlen(const char *str);
+
void get_wakelock_hold_stats( char *pcWriteBuffer ) {
- u32 i;
+ int i;
u32 current_timestamp = osKernelSysTick();
*pcWriteBuffer = 0x00;
@@ -269,15 +274,15 @@ void get_wakelock_hold_stats( char *pcWriteBuffer ) {
for (i=0; i<32; i++) {
if (last_wakelock_state[i] == 1) {
- sprintf(pcWriteBuffer, "%x\t\t%d\r\n", i, hold_wakelock_time[i] + (current_timestamp - last_acquire_wakelock_time[i]));
+ sprintf(pcWriteBuffer, "%x\t\t%u\r\n", i, (unsigned int)( hold_wakelock_time[i] + (current_timestamp - last_acquire_wakelock_time[i])));
} else {
if (hold_wakelock_time[i] > 0) {
- sprintf(pcWriteBuffer, "%x\t\t%d\r\n", i, hold_wakelock_time[i]);
+ sprintf(pcWriteBuffer, "%x\t\t%u\r\n", i, (unsigned int)hold_wakelock_time[i]);
}
}
pcWriteBuffer += strlen( pcWriteBuffer );
}
- sprintf(pcWriteBuffer, "time passed: %d ms, system sleep %d ms\r\n", current_timestamp - base_sys_time, sys_sleep_time);
+ sprintf(pcWriteBuffer, "time passed: %u ms, system sleep %u ms\r\n", (unsigned int)(current_timestamp - base_sys_time), (unsigned int)sys_sleep_time);
}
void clean_wakelock_stat() {
diff --git a/RTL00_SDKV35a/component/os/freertos/freertos_service.h b/RTL00_SDKV35a/component/os/freertos/freertos_service.h
index 39aba66..666a0b0 100644
--- a/RTL00_SDKV35a/component/os/freertos/freertos_service.h
+++ b/RTL00_SDKV35a/component/os/freertos/freertos_service.h
@@ -174,7 +174,7 @@ void cli(void);
#endif
#define HALT() do { cli(); for(;;);} while(0)
-//#undef ASSERT
+#undef ASSERT
#define ASSERT(x) do { \
if((x) == 0) \
printf("\n\rAssert(" #x ") failed on line %d in file %s", __LINE__, __FILE__); \
diff --git a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/include/portable.h b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/include/portable.h
index 376b13e..979dcdc 100644
--- a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/include/portable.h
+++ b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/include/portable.h
@@ -162,7 +162,7 @@ typedef struct HeapRegion
* terminated by a HeapRegions_t structure that has a size of 0. The region
* with the lowest start address must appear first in the array.
*/
-static void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
+//static void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
/*
diff --git a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/GCC/ARM_CM3/port.c b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/GCC/ARM_CM3/port.c
index 7389102..651e19d 100644
--- a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/GCC/ARM_CM3/port.c
+++ b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/GCC/ARM_CM3/port.c
@@ -689,6 +689,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
#endif /* configASSERT_DEFINED */
/*-----------------------------------------------------------*/
#if configUSE_IDLE_HOOK
+extern void WDGRefresh(void);
void vApplicationIdleHook( void )
{
/* Use the idle task to place the CPU into a low power mode. Greater power
diff --git a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/MemMang/heap_5.c b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/MemMang/heap_5.c
index ce94c50..b2e9f57 100644
--- a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/MemMang/heap_5.c
+++ b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/portable/MemMang/heap_5.c
@@ -202,6 +202,7 @@ HeapRegion_t xHeapRegions[] =
#endif
#endif
+static void vPortDefineHeapRegions(const HeapRegion_t * const pxHeapRegions);
/*-----------------------------------------------------------*/
/*
Dump xBlock list
@@ -501,7 +502,7 @@ static void vPortDefineHeapRegions(const HeapRegion_t * const pxHeapRegions) {
uint8 chip_id = HalGetChipId();
while (pxHeapRegion->xSizeInBytes > 0) {
- if (pxHeapRegion->pucStartAddress
+ if ((uint32_t)pxHeapRegion->pucStartAddress
> 0x20000000 && chip_id >= CHIP_ID_8711AN && chip_id <= CHIP_ID_8711AF) {
// pxHeapRegion->pucStartAddress = 0;
// pxHeapRegion->xSizeInBytes = 0;
@@ -584,6 +585,8 @@ static void vPortDefineHeapRegions(const HeapRegion_t * const pxHeapRegions) {
}
+extern void * rtl_memcpy(void *dst0, const void *src0, size_t len0);
+
void* pvPortReAlloc(void *pv, size_t xWantedSize) {
BlockLink_t *pxLink;
diff --git a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/tasks.c b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/tasks.c
index 7f21f6a..4fb189c 100644
--- a/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/tasks.c
+++ b/RTL00_SDKV35a/component/os/freertos/freertos_v9.0.0/Source/tasks.c
@@ -82,6 +82,7 @@ task.h is included from an application file. */
#include "task.h"
#include "timers.h"
#include "StackMacros.h"
+#include "tcm_heap.h"
/* Lint e961 and e750 are suppressed as a MISRA exception justified because the
MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
diff --git a/RTL00_SDKV35a/component/os/os_dep/device_lock.c b/RTL00_SDKV35a/component/os/os_dep/device_lock.c
index b76516d..2986c34 100644
--- a/RTL00_SDKV35a/component/os/os_dep/device_lock.c
+++ b/RTL00_SDKV35a/component/os/os_dep/device_lock.c
@@ -34,6 +34,7 @@ static void device_mutex_init(RT_DEV_LOCK_E device)
}
//======================================================
+#if 0 // unused-function
static void device_mutex_free(RT_DEV_LOCK_E device)
{
if(DEVICE_MUTEX_IS_INIT(device)){
@@ -47,7 +48,7 @@ static void device_mutex_free(RT_DEV_LOCK_E device)
rtw_exit_critical(&lock, &irqL);
}
}
-
+#endif
//======================================================
void device_mutex_lock(RT_DEV_LOCK_E device)
{
diff --git a/RTL00_SDKV35a/component/os/os_dep/include/os_support.h b/RTL00_SDKV35a/component/os/os_dep/include/os_support.h
index 9625342..58db97d 100644
--- a/RTL00_SDKV35a/component/os/os_dep/include/os_support.h
+++ b/RTL00_SDKV35a/component/os/os_dep/include/os_support.h
@@ -49,11 +49,12 @@
//#define RtlKmalloc(size, flag) pvPortMallocAligned(size, 0)
#define RtlKmalloc(size, flag) pvPortMalloc(size)
-#define RtlKfree(pv) vPortFreeAligned(pv)
+#define RtlKfree(pv) vPortFree(pv)
#ifdef CONFIG_TIMER_MODULE
+extern _LONG_CALL_ unsigned int HalDelayUs(unsigned int us);
#define __Delay(t) HalDelayUs(t)
#else
static __inline__ u32 __Delay(u32 us)
@@ -66,7 +67,7 @@ static __inline__ u32 __Delay(u32 us)
#define Mdelay(t) __Delay(t*1000)
#define Udelay(t) __Delay(t)
-
+#undef ASSERT
#define ASSERT(_bool_) do { } while (0)
//#define panic_printk DiagPrintf
diff --git a/RTL00_SDKV35a/component/os/os_dep/tcm_heap.c b/RTL00_SDKV35a/component/os/os_dep/tcm_heap.c
index d51556d..ac91d08 100644
--- a/RTL00_SDKV35a/component/os/os_dep/tcm_heap.c
+++ b/RTL00_SDKV35a/component/os/os_dep/tcm_heap.c
@@ -57,10 +57,9 @@ void tcm_heap_dump(void)
{
#if CONFIG_DEBUG_LOG > 1
if(!g_heap_inited) tcm_heap_init();
- MemChunk *chunk, *prev;
+ MemChunk *chunk;
struct Heap* h = &g_tcm_heap;
int count = 0;
- int free_mem;
DBG_8195A("TCM Free Heap Memory List:\n");
for (chunk = h->FreeList; chunk; chunk = chunk->next) {
@@ -68,6 +67,7 @@ void tcm_heap_dump(void)
}
/*
+ MemChunk *prev;
for (prev = (MemChunk *)&h->FreeList, chunk = h->FreeList;
chunk;
prev = chunk, chunk = chunk->next)
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/bitband_io.h b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/bitband_io.h
index bca7984..45d75c3 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/bitband_io.h
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/bitband_io.h
@@ -1,6 +1,7 @@
#ifndef _BITBAND_IO_H_
#define _BITBAND_IO_H_
+#include "PinNames.h"
#include "hal_platform.h"
#include "hal_api.h"
#include "hal_gpio.h"
@@ -10,12 +11,34 @@
#define BITBAND_SRAM_BASE 0x12000000
#define BITBAND_SRAM(a,b) (BITBAND_SRAM_BASE + (a-BITBAND_SRAM_REF)*32 + (b*4)) // Convert SRAM address
-#define BITBAND_ADDR(a,b) (0x02000000 + (a & 0xF0000000) + (a - (a & 0xF0000000)) * 32 + ((b) * 4)) // Convert address ?
+/*
+ * in hal_platform.h
+#define BITBAND_REG_BASE 0x40001000
+ */
+
+/*
+ * in rtl8195a_gpio.h
+ *
+#define BITBAND_PORTA_DR 0x00 // data register
+#define BITBAND_PORTA_DDR 0x04 // data direction
+#define BITBAND_PORTA_CTRL 0x08 // data source control, we should keep it as default: data source from software
+
+#define BITBAND_PORTB_DR 0x0c // data register
+#define BITBAND_PORTB_DDR 0x10 // data direction
+#define BITBAND_PORTB_CTRL 0x14 // data source control, we should keep it as default: data source from software
+
+#define BITBAND_PORTC_DR 0x18 // data register
+#define BITBAND_PORTC_DDR 0x1c // data direction
+#define BITBAND_PORTC_CTRL 0x20 // data source control, we should keep it as default: data source from software
+
+#define BITBAND_EXT_PORTA 0x50 // GPIO IN read or OUT read back
+#define BITBAND_EXT_PORTB 0x54 // GPIO IN read or OUT read back
+#define BITBAND_EXT_PORTC 0x58 // GPIO IN read or OUT read back
+*/
#define BITBAND_PERI_REF 0x40000000
#define BITBAND_PERI_BASE 0x42000000
-#define BITBAND_PERI(a,b) (BITBAND_PERI_BASE + (a - BITBAND_PERI_REF) * 32 + ((b) * 4)) // Convert PERI address
-
+#define BITBAND_PERI(a,b) (BITBAND_PERI_BASE + (a-BITBAND_PERI_REF)*32 + (b*4)) // Convert PERI address
#define ucBITBAND_PERI(a,b) *((volatile unsigned char *)BITBAND_PERI(a,b))
#define uiBITBAND_PERI(a,b) *((volatile unsigned int *)BITBAND_PERI(a,b))
@@ -121,10 +144,10 @@
#define BITBAND_K5 ucBITBAND_PERI(GPIO_REG_BASE+GPIO_PORTC_DR,25) //Port = 2, bit = 25, K5
#define BITBAND_K6 ucBITBAND_PERI(GPIO_REG_BASE+GPIO_PORTC_DR,26) //Port = 2, bit = 26, K6
-volatile u8 * BitBandAddr(void *addr, u8 bit);
-volatile u8 * BitBandPeriAddr(void *addr, u8 bit);
-volatile u8 * GetOutPinBitBandAddr(PinName pin);
-volatile u8 * GetInpPinBitBandAddr(PinName pin);
-volatile u8 * HardSetPin(PinName pin, PinDirection pdir, PinMode pmode, u8 val);
+volatile uint8_t * BitBandAddr(void *addr, uint8_t bit);
+volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit);
+volatile uint8_t * GetOutPinBitBandAddr(PinName pin);
+volatile uint8_t * GetInPinBitBandAddr(PinName pin);
+volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val);
#endif // _BITBAND_IO_H_
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_diag.h b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_diag.h
index 3594b89..bfb8c07 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_diag.h
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_diag.h
@@ -74,9 +74,9 @@ typedef struct _LOG_UART_ADAPTER_ {
typedef struct _COMMAND_TABLE_ {
const u8* cmd;
u16 ArgvCnt;
- u32 (*func)(u16 argc, u8* argv[]);
+ void (*func)(int argc, char * argv[]); // u32 (*func)(u16 argc, u8* argv[]);
const u8* msg;
-}COMMAND_TABLE, *PCOMMAND_TABLE;
+} COMMAND_TABLE, *PCOMMAND_TABLE;
//VOID
//HalLogUartHandle(void);
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c
index e9bb21b..665352b 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c
@@ -116,7 +116,7 @@ HAL_CUT_B_RAM_DATA_SECTION u32 rand_x = 123456789; // 10000be4
0, \
"", \
0, \
- 0x0437DC, \
+ (void *)0x0437DC, \
0, \
_NULL, \
_NULL, \
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
index 1fcfab6..d07c17a 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
@@ -257,12 +257,12 @@ LOCAL int BOOT_RAM_TEXT_SECTION SetSpicBitMode(uint8 BitMode) {
}
void BOOT_RAM_TEXT_SECTION InitSpicFlashType(struct spic_table_flash_type *ptable_flash) {
- u8 * ptrb = &ptable_flash->cmd;
- volatile u32 * ptrreg = (volatile u32 *)(SPI_FLASH_CTRL_BASE + REG_SPIC_READ_FAST_SINGLE);// 0x400060E0
+ uint8 * ptrb = (uint8 *)&ptable_flash->cmd;
+ volatile uint32 * ptrreg = (volatile uint32 *)(SPI_FLASH_CTRL_BASE + REG_SPIC_READ_FAST_SINGLE);// 0x400060E0
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); // Disable SPI_FLASH User Mode
do {
*ptrreg++ = *ptrb++;
- } while(ptrb < (u8 *)(&ptable_flash->fsize));
+ } while(ptrb < (uint8 *)(&ptable_flash->fsize));
ptrreg[0] = ptable_flash->contrl;
ptrreg[1] = ptable_flash->validcmd[SpicOneBitMode];
ptrreg[2] = ptable_flash->fsize;
@@ -387,6 +387,7 @@ typedef enum {
SEG_ID_MAX
} _SEG_ID;
+#if CONFIG_DEBUG_LOG > 1
LOCAL const char * const txt_tab_seg[] = {
"UNK", // 0
"SRAM", // 1
@@ -397,6 +398,7 @@ LOCAL const char * const txt_tab_seg[] = {
"CPU", // 6
"ROM" // 7
};
+#endif
LOCAL const uint32 tab_seg_def[] = { 0x10000000, 0x10070000, 0x1fff0000,
0x20000000, 0x30000000, 0x30200000, 0x40000000, 0x40800000, 0x98000000,
@@ -404,7 +406,7 @@ LOCAL const uint32 tab_seg_def[] = { 0x10000000, 0x10070000, 0x1fff0000,
LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) {
uint32 ret = SEG_ID_ERR;
- uint32 * ptr = &tab_seg_def;
+ uint32 * ptr = (uint32 *) &tab_seg_def;
if (size > 0) {
do {
ret++;
@@ -447,7 +449,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION load_segs(uint32 faddr, PIMG2HEAD hdr,
segnum, faddr, txt_tab_seg[seg_id], hdr->seg.ldaddr,
hdr->seg.size);
#endif
- fnextaddr += flashcpy(fnextaddr, hdr->seg.ldaddr, hdr->seg.size);
+ fnextaddr += flashcpy(fnextaddr, (void *)hdr->seg.ldaddr, hdr->seg.size);
} else if (seg_id) {
#if CONFIG_DEBUG_LOG > 2
DBG_8195A("Skip Flash seg%d: 0x%08x -> %s: 0x%08x, size: %d\n", segnum,
@@ -457,7 +459,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION load_segs(uint32 faddr, PIMG2HEAD hdr,
} else {
break;
}
- fnextaddr += flashcpy(fnextaddr, &hdr->seg, sizeof(IMGSEGHEAD));
+ fnextaddr += flashcpy(fnextaddr, (void *) &hdr->seg, sizeof(IMGSEGHEAD));
segnum++;
}
return fnextaddr;
@@ -476,7 +478,7 @@ LOCAL int BOOT_RAM_TEXT_SECTION loadUserImges(int imgnum) {
faddr = (faddr + FLASH_SECTOR_SIZE - 1) & (~(FLASH_SECTOR_SIZE - 1));
uint32 img_id = load_img2_head(faddr, &hdr);
if ((img_id >> 8) > 4 || (uint8) img_id != 0) {
- faddr = load_segs(faddr + 0x10, &hdr.seg, imagenum == imgnum);
+ faddr = load_segs(faddr + 0x10, &hdr, imagenum == imgnum);
if (imagenum == imgnum) {
// DBG_8195A("Image%d: %s\n", imgnum, hdr.name);
break;
@@ -544,7 +546,7 @@ LOCAL void BOOT_RAM_TEXT_SECTION RtlConsolRam(void) {
pUartLogCtl->pTmpLogBuf->UARTLogBuf[0] = '?';
pUartLogCtl->pTmpLogBuf->BufCount = 1;
pUartLogCtl->ExecuteCmd = 1;
- RtlConsolTaskRom(pUartLogCtl);
+ RtlConsolTaskRom((void *)pUartLogCtl);
}
/* Enter Image 1.5 */
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c
index 209310d..c09b301 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c
@@ -26,6 +26,15 @@ extern void xPortPendSVHandler(void);
extern void xPortSysTickHandler(void);
extern void vPortSVCHandler(void);
extern void rtl_libc_init(void);
+extern _LONG_CALL_ void HalCpuClkConfig(unsigned char CpuType);
+extern void PSHalInitPlatformLogUart(void);
+extern _LONG_CALL_ void UartLogCmdExecute(PUART_LOG_CTL pUartLogCtlExe);
+extern void HalReInitPlatformTimer(void);
+extern void SystemCoreClockUpdate (void);
+extern void En32KCalibration(void);
+extern void SdrCtrlInit(void);
+extern void InitSoCPM(void);
+extern u32 SdrControllerInit(void);
//extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID)
//void HalNMIHandler_Patch(void);
void SDIO_Device_Off(void);
@@ -97,7 +106,7 @@ __weak int main(void) {
DiagPrintf("\r");
while (1) {
while (pUartLogCtl->ExecuteCmd != 1);
- UartLogCmdExecute(pUartLogCtl);
+ UartLogCmdExecute((PUART_LOG_CTL) pUartLogCtl);
DiagPrintf("\r");
pUartLogCtl->ExecuteCmd = 0;
}
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_host.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_host.c
index 56e5d2b..31b22a0 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_host.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_host.c
@@ -1,6 +1,7 @@
/*
*/
#include "rtl8195a.h"
+#include "hal_sdio_host.h"
#include "rtl8195a_sdio_host.h"
//-------------------------------------------------------------------------
// Function declarations
@@ -11,7 +12,7 @@
void SdioHostSdBusPwrCtrl(uint8_t En, int a2);
int SdioHostSdClkCtrl(void *Data, int En, int Divisor);
int SdioHostChkDataLineActive(uint32_t Timeout);
- int SdioHostChkCmdInhibitCMD(uint32_t Timeout);
+ int SdioHostChkCmdInhibitCMD(void); //uint32_t Timeout);
int SdioHostChkCmdInhibitDAT(uint32_t Timeout);
uint32_t SdioHostIsrHandle(void *Data);
int HalSdioHostDeInitRtl8195a(void *Data);
@@ -46,6 +47,11 @@
//-------------------------------------------------------------------------
// Data declarations
//-------------------------------------------------------------------------
+#define HAL_SDIOH_REG32(a) (*(volatile unsigned int *)(SDIO_HOST_REG_BASE+a))
+#define HAL_SDIOH_REG16(a) (*(volatile unsigned short *)(SDIO_HOST_REG_BASE+a))
+#define HAL_SDIOH_REG8(a) (*(volatile unsigned char *)(SDIO_HOST_REG_BASE+a))
+
+
//-----SdioHostIsTimeout(StartCount, TimeoutCnt)
HAL_Status SdioHostIsTimeout(u32 StartCount, u32 TimeoutCnt) {
u32 t1, t2;
@@ -64,22 +70,21 @@ HAL_Status SdioHostIsTimeout(u32 StartCount, u32 TimeoutCnt) {
//----- SdioHostSendCmd(PSDIO_HOST_CMD)
void SdioHostSendCmd(PSDIO_HOST_CMD Cmd) {
- u16 reg_cmd = ((*(u8 *) &Cmd->CmdFmt & 0x3B) | (*(u8 *) &Cmd->CmdFmt & 0xC0)
- | ((*((u8 *) &Cmd->CmdFmt + 1) & 0x3F) << 8));
- HAL_SDIO_HOST_WRITE32(REG_SDIO_HOST_ARG, Cmd->Arg); // 40058008 = Cmd->Arg
- HAL_SDIO_HOST_WRITE16(REG_SDIO_HOST_CMD, reg_cmd); // 4005800E = reg_cmd
+ HAL_SDIOH_REG32(REG_SDIO_HOST_ARG) = Cmd->Arg; // 40058008 = Cmd->Arg
+ HAL_SDIOH_REG16(REG_SDIO_HOST_CMD) = *(u16 *) &Cmd->CmdFmt; // & 0x3FFB;
}
//-----
HAL_Status SdioHostGetResponse(void *Data, int RspType) {
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
HAL_Status result;
- if (Data) {
- *((u32 *) Data + 5) = HAL_SDIO_HOST_READ32(REG_SDIO_HOST_RSP0); // 40058010;
- *((u32 *) Data + 6) = HAL_SDIO_HOST_READ32(REG_SDIO_HOST_RSP2);
+ if (psha) {
+ psha->Response[0] = HAL_SDIOH_REG32(REG_SDIO_HOST_RSP0); // 40058010;
+ psha->Response[1] = HAL_SDIOH_REG32(REG_SDIO_HOST_RSP2);
if (RspType == 1) {
- *((u32 *) Data + 7) = HAL_SDIO_HOST_READ32(REG_SDIO_HOST_RSP4);
- *((u32 *) Data + 8) = HAL_SDIO_HOST_READ32(REG_SDIO_HOST_RSP6);
+ psha->Response[2] = HAL_SDIOH_REG32(REG_SDIO_HOST_RSP4);
+ psha->Response[3] = HAL_SDIOH_REG32(REG_SDIO_HOST_RSP6);
}
result = HAL_OK;
} else
@@ -88,236 +93,161 @@ HAL_Status SdioHostGetResponse(void *Data, int RspType) {
}
//-----
-void SdioHostSdBusPwrCtrl(uint8_t En) {
- u8 reg_pwr;
-
- HAL_SDIO_HOST_WRITE8(REG_SDIO_HOST_PWR_CTRL,
- HAL_SDIO_HOST_READ8(REG_SDIO_HOST_PWR_CTRL) & (~ PWR_CTRL_SD_BUS_PWR));
- if (HAL_SDIO_HOST_READ32(REG_SDIO_HOST_CAPABILITIES) & CAPA_VOLT_SUPPORT_33V) {
- DBG_SDIO_WARN("Supply SD bus voltage: 3.3V\n");
- reg_pwr = VOLT_30V << 1;
- goto set_pwr;
- }
- if (HAL_SDIO_HOST_READ32(REG_SDIO_HOST_CAPABILITIES) & CAPA_VOLT_SUPPORT_30V) {
- DBG_SDIO_WARN("Supply SD bus voltage: 3.0V\n");
- reg_pwr = VOLT_30V << 1;
- goto set_pwr;
- }
- if (HAL_SDIO_HOST_READ32(REG_SDIO_HOST_CAPABILITIES) & CAPA_VOLT_SUPPORT_18V) {
+//void SdioHostSdBusPwrCtrl(uint8_t En) {
+void SdioHostSdBusPwrCtrl(void) {
+ HAL_SDIOH_REG8(REG_SDIO_HOST_PWR_CTRL) &= ~ PWR_CTRL_SD_BUS_PWR;
+ if (HAL_SDIOH_REG32(REG_SDIO_HOST_CAPABILITIES) & CAPA_VOLT_SUPPORT_18V) {
DBG_SDIO_WARN("Supply SD bus voltage: 1.8V\n");
- reg_pwr = VOLT_18V << 1;
- goto set_pwr;
+ HAL_SDIOH_REG8(REG_SDIO_HOST_PWR_CTRL) = VOLT_18V << 1;
}
- DBG_SDIO_ERR("No supported voltage\n");
- goto exit_;
- set_pwr:
- HAL_SDIO_HOST_WRITE8(REG_SDIO_HOST_PWR_CTRL, reg_pwr);
- exit_:
- HAL_SDIO_HOST_WRITE8(REG_SDIO_HOST_PWR_CTRL,
- HAL_SDIO_HOST_READ8(REG_SDIO_HOST_PWR_CTRL) | PWR_CTRL_SD_BUS_PWR);
+ else if (HAL_SDIOH_REG32(REG_SDIO_HOST_CAPABILITIES) & CAPA_VOLT_SUPPORT_30V) {
+ DBG_SDIO_WARN("Supply SD bus voltage: 3.0V\n");
+ HAL_SDIOH_REG8(REG_SDIO_HOST_PWR_CTRL) = VOLT_30V << 1;
+ }
+ else if (HAL_SDIOH_REG32(REG_SDIO_HOST_CAPABILITIES) & CAPA_VOLT_SUPPORT_33V) {
+ DBG_SDIO_WARN("Supply SD bus voltage: 3.3V\n");
+ HAL_SDIOH_REG8(REG_SDIO_HOST_PWR_CTRL) = VOLT_33V << 1;
+ }
+ else DBG_SDIO_ERR("No supported voltage\n");
+ HAL_SDIOH_REG8(REG_SDIO_HOST_PWR_CTRL) |= PWR_CTRL_SD_BUS_PWR;
}
//-----
-HAL_Status SdioHostSdClkCtrl(void *Data, int En, int Divisor) { // SD_CLK_DIVISOR
- u8 *v3; // r3@1
- HAL_Status result;
- char v5; // r2@7
-
- v3 = Data;
- result = HAL_SDIO_HOST_READ32(REG_SDIO_HOST_PRESENT_STATE)
- & (PRES_STATE_CMD_INHIBIT_CMD | PRES_STATE_CMD_INHIBIT_DAT); // v40058024 & 3;
- if (HAL_SDIO_HOST_READ32(REG_SDIO_HOST_PRESENT_STATE)
- & (PRES_STATE_CMD_INHIBIT_CMD | PRES_STATE_CMD_INHIBIT_DAT) != 0) {
- result = HAL_BUSY;
+HAL_Status SdioHostSdClkCtrl(void *Data, int En, u8 Divisor) { // SD_CLK_DIVISOR
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ if (HAL_SDIOH_REG32(REG_SDIO_HOST_PRESENT_STATE)
+ & (PRES_STATE_CMD_INHIBIT_CMD | PRES_STATE_CMD_INHIBIT_DAT)) {
+ return HAL_BUSY;
} else {
if (!En) {
- v4005802C &= 0xFFFBu;
- return 0;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL) &= ~CLK_CTRL_SD_CLK_EN;
}
- v4005802C &= 0xFFFBu;
- v4005802C = v4005802C | (u16) ((u16) Divisor << 8);
- v4005802C |= 4u;
- if (Divisor == 8) { // BASE_CLK_DIVIDED_BY_16
- v5 = 4;
- goto LABEL_23;
- }
- if ((unsigned int) Divisor > 8) {
- if (Divisor == 32) { // BASE_CLK_DIVIDED_BY_64
- v5 = 2;
- goto LABEL_23;
- }
- if ((unsigned int) Divisor > 0x20) { // BASE_CLK_DIVIDED_BY_64
- if (Divisor == 64) { // BASE_CLK_DIVIDED_BY_128
- v5 = 1;
- goto LABEL_23;
- }
- if (Divisor == 128) { // BASE_CLK_DIVIDED_BY_256
- v3[133] = 0;
- return result;
- }
- } else if (Divisor == 16) {
- v5 = 3;
- goto LABEL_23;
- }
- } else {
- if (Divisor == 1) { // BASE_CLK_DIVIDED_BY_2
- v5 = 7;
- goto LABEL_23;
- }
- if ((unsigned int) Divisor < 1) { // BASE_CLK < BASE_CLK_DIVIDED_BY_2
- v5 = 8;
- LABEL_23: v3[133] = v5;
- return result;
- }
- if (Divisor == 2) { // BASE_CLK_DIVIDED_BY_4
- v5 = 6;
- goto LABEL_23;
- }
- if (Divisor == 4) { // BASE_CLK_DIVIDED_BY_8
- v5 = 5;
- goto LABEL_23;
+ else {
+ switch(Divisor) {
+ case BASE_CLK:
+ psha->CurrSdClk = SD_CLK_41_6MHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_2:
+ psha->CurrSdClk = SD_CLK_20_8MHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_4:
+ psha->CurrSdClk = SD_CLK_10_4MHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_8:
+ psha->CurrSdClk = SD_CLK_5_2MHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_16:
+ psha->CurrSdClk = SD_CLK_2_6MHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_32:
+ psha->CurrSdClk = SD_CLK_1_3MHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_64:
+ psha->CurrSdClk = SD_CLK_650KHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_128:
+ psha->CurrSdClk = SD_CLK_325KHZ;
+ break;
+ case BASE_CLK_DIVIDED_BY_256:
+ psha->CurrSdClk = SD_CLK_162KHZ;
+ break;
+ default:
+ DBG_SDIO_ERR("Unsupported SDCLK divisor!\n");
+ Divisor = 0;
+ psha->CurrSdClk = SD_CLK_41_6MHZ;
}
}
-
- DBG_SDIO_ERR("Unsupported SDCLK divisor!\n");
- return 0;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL) = (Divisor << 8) | CLK_CTRL_SD_CLK_EN | CLK_CTRL_INTERAL_CLK_EN;
}
- return result;
+ return HAL_OK;
}
-//----- SdioHostChkDataLineActive(uint32_t Timeout)
-HAL_Status SdioHostChkDataLineActive(uint32_t Timeout) {
+#define SD_CHK_TIMEOUT 3225
+
+//----- SdioHostChkDataLineActive
+HAL_Status SdioHostChkDataLineActive(void) {
HAL_Status result;
u32 t1 = HalTimerOp.HalTimerReadCount(1);
do {
- if ((HAL_SDIO_HOST_READ32(REG_SDIO_HOST_PRESENT_STATE)
+ if ((HAL_SDIOH_REG32(REG_SDIO_HOST_PRESENT_STATE)
& PRES_STATE_DAT_LINE_ACTIVE) == 0)
break;
- result = SdioHostIsTimeout(t1, 3225);
+ result = SdioHostIsTimeout(t1, SD_CHK_TIMEOUT);
} while (result != HAL_TIMEOUT);
return result;
}
-//----- SdioHostChkCmdInhibitCMD(uint32_t Timeout)
-HAL_Status SdioHostChkCmdInhibitCMD(uint32_t Timeout) {
+//----- SdioHostChkCmdInhibitCMD
+HAL_Status SdioHostChkCmdInhibitCMD(void) {
HAL_Status result;
u32 t1 = HalTimerOp.HalTimerReadCount(1);
do {
- if ((HAL_SDIO_HOST_READ32(REG_SDIO_HOST_PRESENT_STATE)
+ if ((HAL_SDIOH_REG32(REG_SDIO_HOST_PRESENT_STATE)
& PRES_STATE_CMD_INHIBIT_CMD) == 0)
break;
- result = SdioHostIsTimeout(t1, 3225);
+ result = SdioHostIsTimeout(t1, SD_CHK_TIMEOUT);
} while (result != HAL_TIMEOUT);
return result;
}
-//----- SdioHostChkCmdInhibitDAT(uint32_t Timeout)
-int SdioHostChkCmdInhibitDAT(uint32_t Timeout) {
+//----- SdioHostChkCmdInhibitDAT
+int SdioHostChkCmdInhibitDAT(void) {
HAL_Status result;
u32 t1 = HalTimerOp.HalTimerReadCount(1);
do {
- if ((HAL_SDIO_HOST_READ32(REG_SDIO_HOST_PRESENT_STATE)
+ if ((HAL_SDIOH_REG32(REG_SDIO_HOST_PRESENT_STATE)
& PRES_STATE_CMD_INHIBIT_DAT) == 0)
break;
- result = SdioHostIsTimeout(t1, 3225);
+ result = SdioHostIsTimeout(t1, SD_CHK_TIMEOUT);
} while (result != HAL_TIMEOUT);
return result;
}
-//----- (0000028C) --------------------------------------------------------
-void SdioHostIsrHandle(void *Data) {
- int v1; // r5@1
- u32 *v2; // r4@1
- uint8_t v3; // r0@7
- int v4; // r1@7
- void (*v5)(u32); // r3@7
- void (*v6)(u32); // r3@10
-// uint32_t result; // r0@14
-
- v1 = v40058030;
- v40058038 = 0;
- v2 = Data;
- if (v1) {
- if (v1 << 31 < 0)
- *((u8 *) Data + 128) = 1;
- if (v1 << 30 < 0)
- *((u8 *) Data + 129) = 1;
- if (v1 & NOR_INT_STAT_CARD_INSERT) // 0x40
- {
- v3 = SdioHostSdClkCtrl(Data, 1, BASE_CLK_DIVIDED_BY_128); // BASE_CLK_DIVIDED_BY_128
- SdioHostSdBusPwrCtrl(v3, v4);
- v5 = (void (*)(u32)) v2[35];
- if (v5)
- v5(v2[37]);
- }
- if (v1 & NOR_INT_STAT_CARD_REMOVAL) // 0x80
- {
- v40058029 &= 0xFEu;
- SdioHostSdClkCtrl(v2, 0, BASE_CLK); // BASE_CLK
- v6 = (void (*)(u32)) v2[36];
- if (v6)
- v6(v2[38]);
- }
- if (v1 & NOR_INT_STAT_ERR_INT) // 0x8000 )
- {
- v4005803A = 0;
- *((u8 *) v2 + 130) = 1;
- }
- }
- v40058034 = 195;
-// result = 0;
- v40058038 = 195;
-// return 0;
-}
-
-//----- (00000328) --------------------------------------------------------
+//----- HalSdioHostDeInitRtl8195a
HAL_Status HalSdioHostDeInitRtl8195a(IN VOID *Data) {
- void *v1; // r5@1
- int v2; // r4@1
+ HAL_Status ret; // r4@1
- PHAL_SDIO_HOST_ADAPTER v1 = Data;
- v40058029 &= 0xFEu;
- v2 = SdioHostSdClkCtrl(Data, 0, BASE_CLK);
- if (!v2) {
- if (v1) {
- VectorIrqDisRtl8195A(v1);
- VectorIrqUnRegisterRtl8195A(v1);
- v4005802C &= 0xFFFEu;
- v40059000 &= 0xFFFFFBFF;
- v40000214 &= 0xFFFFFFFB;
- HalPinCtrlRtl8195A(65, 0, 0);
- v40000240 &= 0xFFFFFFF7;
- v40000240 &= 0xFFFFFFFB;
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ HAL_SDIOH_REG8(REG_SDIO_HOST_PWR_CTRL) &= ~PWR_CTRL_SD_BUS_PWR;
+ ret = SdioHostSdClkCtrl(psha, 0, BASE_CLK);
+ if (ret == HAL_OK) {
+ if (psha) {
+ VectorIrqDisRtl8195A(&psha->IrqHandle);
+ VectorIrqUnRegisterRtl8195A(psha);
+ HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL) &= ~CLK_CTRL_INTERAL_CLK_EN;
+ HAL_SDIOH_REG32(0x1000) &= 0xFFFFFBFF; // v40059000
+ HAL_WRITE32(PERI_ON_BASE, REG_SOC_HCI_COM_FUNC_EN,
+ HAL_READ32(PERI_ON_BASE, REG_SOC_HCI_COM_FUNC_EN) & (~BIT_SOC_HCI_SDIOH_EN));
+ HalPinCtrlRtl8195A(SDIOH, 0, 0);
+ ACTCK_SDIOH_CCTRL(OFF);
+ SLPCK_SDIOH_CCTRL(OFF);
} else {
- v2 = 3;
+ ret = HAL_ERR_PARA;
}
}
- return v2;
+ return ret;
}
-// 23DC: using guessed type int VectorIrqDisRtl8195A(u32);
-// 23E0: using guessed type int VectorIrqUnRegisterRtl8195A(u32);
-// 23E4: using guessed type int HalPinCtrlRtl8195A(u32, u32, u32);
-//----- (000003C0) --------------------------------------------------------
+//----- HalSdioHostEnableRtl8195a
HAL_Status HalSdioHostEnableRtl8195a(IN VOID *Data) // // PHAL_SDIO_HOST_ADAPTER Data
{
- v40000240 |= 4u;
- v40000240 |= 8u;
- v4005802C |= 1u;
- while (!(v4005802C & 2))
- ;
+// PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ ACTCK_SDIOH_CCTRL(ON);
+ SLPCK_SDIOH_CCTRL(ON);
+ HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL) |= CLK_CTRL_INTERAL_CLK_EN;
+ while (!(HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL) & CLK_CTRL_INTERAL_CLK_STABLE));
return SdioHostSdClkCtrl(Data, 1, BASE_CLK_DIVIDED_BY_2);
}
-//----- (000003F8) --------------------------------------------------------
+//----- HalSdioHostDisableRtl8195a
HAL_Status HalSdioHostDisableRtl8195a(IN VOID *Data) {
int result; // r0@1
result = SdioHostSdClkCtrl(Data, 0, BASE_CLK);
- if (!result) {
- v4005802C &= 0xFFFEu;
- v40000240 &= 0xFFFFFFF7;
- v40000240 &= 0xFFFFFFFB;
+ if (result == HAL_OK) {
+ HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL) &= ~CLK_CTRL_INTERAL_CLK_EN;
+ ACTCK_SDIOH_CCTRL(OFF);
+ SLPCK_SDIOH_CCTRL(OFF);
}
return result;
}
@@ -326,14 +256,14 @@ HAL_Status HalSdioHostDisableRtl8195a(IN VOID *Data) {
HAL_Status HalSdioHostIrqInitRtl8195a(IN VOID *Data) // PIRQ_HANDLE Data
{
HAL_Status result;
- PIRQ_HANDLE v1 = Data;
- if (v1) {
- v1->Data = Data;
- v1->IrqNum = SDIO_HOST_IRQ;
- v1->IrqFun = SdioHostIsrHandle;
- v1->Priority = 6;
- VectorIrqRegisterRtl8195A((PIRQ_HANDLE) v1);
- VectorIrqEnRtl8195A((PIRQ_HANDLE) v1);
+ PIRQ_HANDLE pih = Data;
+ if (pih) {
+ pih->Data = Data;
+ pih->IrqNum = SDIO_HOST_IRQ;
+ pih->IrqFun = SdioHostIsrHandle;
+ pih->Priority = 6;
+ VectorIrqRegisterRtl8195A((PIRQ_HANDLE) pih);
+ VectorIrqEnRtl8195A((PIRQ_HANDLE) pih);
result = HAL_OK;
} else
result = HAL_ERR_PARA;
@@ -342,6 +272,8 @@ HAL_Status HalSdioHostIrqInitRtl8195a(IN VOID *Data) // PIRQ_HANDLE Data
//----- HalSdioHostInitHostRtl8195a
HAL_Status HalSdioHostInitHostRtl8195a(IN VOID *Data) {
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+
HAL_WRITE32(PERI_ON_BASE, REG_PESOC_HCI_CLK_CTRL0,
HAL_READ32(PERI_ON_BASE, REG_PESOC_HCI_CLK_CTRL0) & (~BIT_SOC_ACTCK_SDIO_DEV_EN));
HAL_WRITE32(PERI_ON_BASE, REG_SOC_HCI_COM_FUNC_EN,
@@ -360,360 +292,507 @@ HAL_Status HalSdioHostInitHostRtl8195a(IN VOID *Data) {
HalPinCtrlRtl8195A(SDIOH, 0, 1);
HAL_WRITE32(PERI_ON_BASE, REG_SOC_HCI_COM_FUNC_EN,
HAL_READ32(PERI_ON_BASE, REG_SOC_HCI_COM_FUNC_EN) | BIT_SOC_HCI_SDIOH_EN);
- HAL_SDIO_HOST_WRITE8(REG_SDIO_HOST_SW_RESET,
- HAL_SDIO_HOST_READ8(REG_SDIO_HOST_SW_RESET) | 1); //4005802F |= 1;
+ HAL_SDIOH_REG8(REG_SDIO_HOST_SW_RESET) |= SW_RESET_FOR_ALL; //4005802F |= 1;
int x = 1000;
- while (HAL_SDIO_HOST_READ8(REG_SDIO_HOST_SW_RESET) & 1) {
+ while (HAL_SDIOH_REG8(REG_SDIO_HOST_SW_RESET) & SW_RESET_FOR_ALL) {
if (x-- == 0) {
DBG_SDIO_ERR("SD host initialization FAIL!\n");
return HAL_TIMEOUT;
}
}
- HalSdioHostIrqInitRtl8195a(Data);
- HAL_SDIO_HOST_WRITE16(REG_SDIO_HOST_ERROR_INT_STATUS_EN, 195); // 40058034 = 195;
- HAL_SDIO_HOST_WRITE16(REG_SDIO_HOST_NORMAL_INT_SIG_EN, 195); // 40058038 = 195;
- HAL_SDIO_HOST_WRITE16(REG_SDIO_HOST_ERROR_INT_STATUS_EN, 127); // 40058036 = 127;
- HAL_SDIO_HOST_WRITE16(REG_SDIO_HOST_ERROR_INT_SIG_EN, 127); // 4005803A = 127;
- HAL_SDIO_HOST_WRITE16(REG_SDIO_HOST_CLK_CTRL,
- HAL_SDIO_HOST_READ16(REG_SDIO_HOST_CLK_CTRL) | CLK_CTRL_INTERAL_CLK_EN); // 4005802C |= 1;
+ HalSdioHostIrqInitRtl8195a(&psha->IrqHandle);
+ HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_STATUS_EN)
+ = NOR_INT_STAT_EN_CMD_COMP
+ | NOR_INT_STAT_EN_XFER_COMP
+ | NOR_INT_STAT_EN_CARD_REMOVAL
+ | NOR_INT_STAT_EN_CARD_INT; // 0xC3;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_SIG_EN)
+ = NOR_INT_SIG_EN_CMD_COMP
+ | NOR_INT_SIG_EN_XFER_COMP
+ | NOR_INT_SIG_EN_CARD_REMOVAL
+ | NOR_INT_SIG_EN_CARD_INT; // 195;
+
+
+ HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS_EN) = 0x17F;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_SIG_EN) = 0x17F;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL) |= CLK_CTRL_INTERAL_CLK_EN;
x = 1000;
- while (!(HAL_SDIO_HOST_READ16(REG_SDIO_HOST_CLK_CTRL)
+ while (!(HAL_SDIOH_REG16(REG_SDIO_HOST_CLK_CTRL)
& CLK_CTRL_INTERAL_CLK_STABLE)) {
if (x-- == 0) {
DBG_SDIO_ERR("SD host initialization FAIL!\n");
return HAL_TIMEOUT;
}
}
- HAL_WRITE32(SYSTEM_CTRL_BASE, 0x59000,
- HAL_READ32(SYSTEM_CTRL_BASE, 0x59000) | 0x400); // 40059000 |= 0x400;
- if (HAL_SDIO_HOST_READ32(REG_SDIO_HOST_CAPABILITIES) & 0x80000)
- HAL_SDIO_HOST_WRITE16(REG_SDIO_HOST_HOST_CTRL, 16); //40058028 = 16;
- HAL_SDIO_HOST_WRITE8(REG_SDIO_HOST_TIMEOUT_CTRL, 14); //4005802E = 14;
- return 0;
+ HAL_SDIOH_REG32(0x1000) |= 0x400; // 40059000 |= 0x400;
+ if (HAL_SDIOH_REG32(REG_SDIO_HOST_CAPABILITIES) & CAPA_ADMA2_SUPPORT)
+ HAL_SDIOH_REG16(REG_SDIO_HOST_HOST_CTRL) = 0x10; // 32-bit Address ADMA2 is selected
+ HAL_SDIOH_REG8(REG_SDIO_HOST_TIMEOUT_CTRL) = 0x0E; // TMCLK x 2^27
+ return HAL_OK;
}
-//----- (00000578) --------------------------------------------------------
+//----- HalSdioHostStopTransferRtl8195a
HAL_Status HalSdioHostStopTransferRtl8195a(IN VOID *Data) {
- u8 *v2; // r4@1
- int result; // r0@2
- char v4; // r2@4
- uint32_t v5; // r1@4
- signed int v6; // r2@4
- SDIO_HOST_CMD Cmd; // [sp+0h] [bp-10h]@1
+ HAL_Status result;
+ SDIO_HOST_CMD Cmd;
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
- *(u32 *) &Cmd.CmdFmt = Data;
- Cmd.Arg = a2;
- v2 = Data;
- if (Data) {
- result = SdioHostChkCmdInhibitCMD((uint32_t) Data);
- if (!result) {
- result = SdioHostChkCmdInhibitDAT(0);
- if (!result) {
- Cmd.CmdFmt = (SDIO_HOST_CMD_FMT) ((*(u8 *) &Cmd.CmdFmt | 0x1B)
- & 0xDF | 0xC0);
- v4 = *((u8 *) &Cmd.CmdFmt + 1);
- v2[128] = 0;
- v2[129] = 0;
+ if (psha) {
+ result = SdioHostChkCmdInhibitCMD(); //(uint32_t) Data);
+ if (result == HAL_OK) {
+ result = SdioHostChkCmdInhibitDAT();
+ if (result == HAL_OK) {
+
+ psha->CmdCompleteFlg = 0;
+ psha->XferType = SDIO_XFER_NOR;
+ psha->XferCompleteFlg = 0;
+
+ Cmd.CmdFmt.RespType = RSP_LEN_48_CHK_BUSY;
+ Cmd.CmdFmt.Rsvd0 = 0;
+ Cmd.CmdFmt.CmdCrcChkEn = 1;
+ Cmd.CmdFmt.CmdIdxChkEn = 0;
+ Cmd.CmdFmt.DataPresent = NO_DATA;
+ Cmd.CmdFmt.CmdType = ABORT;
+ Cmd.CmdFmt.CmdIdx = CMD_STOP_TRANSMISSION;
+ Cmd.CmdFmt.Rsvd1 = 0;
Cmd.Arg = 0;
- *((u8 *) &Cmd.CmdFmt + 1) = v4 & 0xC0 | 0xC;
+
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete(v2, v5);
- if (!result)
- result = SdioHostChkXferComplete(v2, 0x1388u, v6);
}
}
} else {
- result = 3;
+ result = HAL_ERR_PARA;
}
return result;
}
-//----- (000005D8) --------------------------------------------------------
-signed int SdioHostErrIntRecovery(void *Data, int a2, signed int a3) {
- u8 *v3; // r6@1
- __int16 v4; // r5@4
- int v5; // r3@5
- const char *v6; // r0@11
- signed int result; // r0@13
- int v8; // r3@15
- int v9; // r0@24
- const char *v10; // r0@32
+//----- SdioHostErrIntRecovery
+HAL_Status SdioHostErrIntRecovery(void *Data) {
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ int t;
- v3 = Data;
- if (!Data)
- return 3;
- DBG_SDIO_ERR("Recovering error interrupt...\n", a2, a3);
- v4 = v40058032;
- if (v40058032 << 28) {
- v4005802F |= 2u;
- v5 = 0;
- while (1) {
- ++v5;
- a2 = v4005802F << 30;
- if (!(v4005802F & 2))
- break;
- a2 = 1001;
- if (v5 == 1001)
- goto LABEL_14;
- }
- if (v5 == 1000) {
- DBG_SDIO_ERR("CMD line reset timeout!\n");
- return 2;
+ if (!psha) return HAL_ERR_PARA;
+ DBG_SDIO_ERR("Recovering error interrupt...\n");
+ u16 ierr = HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS); // v40058032;
+
+ if (HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS)
+ & ( ERR_INT_STAT_CMD_TIMEOUT
+ | ERR_INT_STAT_CMD_CRC
+ | ERR_INT_STAT_CMD_END_BIT
+ | ERR_INT_STAT_CMD_IDX)) {
+ HAL_SDIOH_REG8(REG_SDIO_HOST_SW_RESET) |= SW_RESET_FOR_CMD;
+ int t = 0;
+ while((HAL_SDIOH_REG8(REG_SDIO_HOST_SW_RESET) & SW_RESET_FOR_CMD)) {
+ if(++t > 1000) {
+ DBG_SDIO_ERR("CMD line reset timeout!\n");
+ return HAL_TIMEOUT;
+ }
}
}
- LABEL_14: if (v40058032 & 0x70) {
- v4005802F |= 4u;
- v8 = 0;
- while (1) {
- ++v8;
- a2 = v4005802F << 29;
- if (!(v4005802F & 4))
- break;
- a2 = 1001;
- if (v8 == 1001)
- goto LABEL_22;
- }
- if (v8 == 1000) {
- DBG_SDIO_ERR("DAT line reset timeout!\n");
- return 2;
+ if (HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS)
+ & ( ERR_INT_STAT_DATA_TIMEOUT
+ | ERR_INT_STAT_DATA_CRC
+ | ERR_INT_STAT_DATA_END_BIT)) {
+ HAL_SDIOH_REG8(REG_SDIO_HOST_SW_RESET) |= SW_RESET_FOR_DAT;
+ t = 0;
+ while((HAL_SDIOH_REG8(REG_SDIO_HOST_SW_RESET) & SW_RESET_FOR_DAT)) {
+ if(++t > 1000) {
+ DBG_SDIO_ERR("DAT line reset timeout!\n");
+ return HAL_TIMEOUT;
+ }
}
}
- LABEL_22:
- DBG_SDIO_ERR("Error interrupt status: 0x%04X\n", v40058032);
- v40058032 = v4;
- v3[130] = 0;
- v9 = HalSdioHostStopTransferRtl8195a(v3, a2);
- if (!v9) {
- while (1) {
- ++v9;
- if (!(v40058024 & 3))
- break;
- if (v9 == 1001)
- goto LABEL_30;
+
+ DBG_SDIO_ERR("Error interrupt status: 0x%04X\n", HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS));
+
+ HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS) = ierr;
+ psha->ErrIntFlg = 0;
+ int result = HalSdioHostStopTransferRtl8195a(psha);
+ if (result == HAL_OK) {
+ t = 0;
+ while(HAL_SDIOH_REG32(REG_SDIO_HOST_PRESENT_STATE)
+ & (PRES_STATE_CMD_INHIBIT_CMD | PRES_STATE_CMD_INHIBIT_DAT)) {
+ if(++t > 1000) break;
}
- if (v9 == 1000)
- return 2;
- LABEL_30: if (v40058032 << 28) {
+ if(HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS)
+ & ( ERR_INT_STAT_CMD_TIMEOUT
+ | ERR_INT_STAT_CMD_CRC
+ | ERR_INT_STAT_CMD_END_BIT
+ | ERR_INT_STAT_CMD_IDX)) {
DBG_SDIO_ERR("Non-recoverable error(1)!\n");
- LABEL_33: DiagPrintf(v10);
- goto LABEL_34;
+ return HAL_ERR_UNKNOWN;
}
- } else {
- if (v40058032 & 0x10) {
+ if(HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS)
+ & ERR_INT_STAT_DATA_TIMEOUT) {
DBG_SDIO_ERR("Non-recoverable error(2)!\n");
- goto LABEL_34;
+ return HAL_ERR_UNKNOWN;
}
- HalDelayUs(50);
- if ((v40058024 & 0xF00000) == 15728640) {
- DBG_SDIO_ERR("Recoverable error...\n");
- result = 16;
- goto LABEL_44;
- }
- DBG_SDIO_ERR("Non-recoverable error(3)!\n");
- goto LABEL_34;
+ HalDelayUs(50);
+ if((HAL_SDIOH_REG32(REG_SDIO_HOST_PRESENT_STATE) & 0xF00000) != 0xF00000) {
+ DBG_SDIO_ERR("Non-recoverable error(3)!\n");
+ return HAL_ERR_UNKNOWN;
+ }
+ DBG_SDIO_ERR("Recoverable error...\n");
+ HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_SIG_EN) = 0x17F;
+ return 16;
}
-
- LABEL_34: result = 238;
- LABEL_44: v4005803A = 127;
- return result;
-
DBG_SDIO_ERR("Stop transmission error!\n");
- return 238;
+ return HAL_ERR_UNKNOWN;
}
-// 23D4: using guessed type int DiagPrintf(const char *, ...);
-// 23F0: using guessed type int HalDelayUs(u32);
-//----- (00000748) --------------------------------------------------------
-signed int SdioHostChkXferComplete(void *Data, uint32_t Timeout, signed int a3) {
- uint32_t v3; // r6@1
- u8 *v4; // r4@1
- uint32_t v5; // r5@3
- uint32_t v6; // r7@3
- signed int result; // r0@9
+//----- (0000028C) --------------------------------------------------------
+void SdioHostIsrHandle(void *Data) {
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ u16 status = HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_STATUS);// v40058030;
- v3 = Timeout;
- v4 = Data;
- if (Data) {
- if (Timeout - 1 > 0xFFFFFFFD) {
- v6 = 0;
- v5 = 0;
- } else {
- v5 = 1000 * Timeout / 0x1F;
- v6 = (*((int (**)(u32)) &HalTimerOp + 2))(1);
- }
- do {
- while (1) {
- if (v4[129] && v40058024 & 0x100000)
- return 0;
- if (v4[130])
- return SdioHostErrIntRecovery(v4, Timeout, a3);
- if (!v5)
- break;
- result = SdioHostIsTimeout(v6, v5);
- if (result == 2)
- return result;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_SIG_EN) = 0;
+ if (status) {
+ if (status & NOR_INT_STAT_CMD_COMP)
+ psha->CmdCompleteFlg = 1;
+ if (status & NOR_INT_STAT_XFER_COMP) {
+ psha->XferCompleteFlg = 1;
+ if ((status & NOR_INT_STAT_ERR_INT) == 0) {
+ if (psha->XferCompCallback)
+ psha->XferCompCallback(psha->XferCompCbPara);
+
+ } else if (HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS) &
+ ( ERR_INT_STAT_DATA_TIMEOUT
+ | ERR_INT_STAT_DATA_CRC
+ | ERR_INT_STAT_DATA_END_BIT)) {
+ DBG_SDIO_ERR("\r[SDIO Err]XFER CP with ErrIntVal: 0x%04X /0x%04X -- TYPE 0x%02X\n",
+ status,
+ HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS),
+ psha->XferType);
+ psha->errType = SDIO_ERR_DAT_CRC;
+ if (psha->ErrorCallback)
+ psha->ErrorCallback(psha->ErrorCbPara);
}
- } while (v3);
- result = 1;
- } else {
- result = 3;
+
+ }
+ if (status & NOR_INT_STAT_CARD_INSERT) // 0x40
+ {
+ SdioHostSdClkCtrl(psha, 1, BASE_CLK_DIVIDED_BY_128); // BASE_CLK_DIVIDED_BY_128
+ SdioHostSdBusPwrCtrl();
+ if (psha->CardInsertCallBack)
+ psha->CardInsertCallBack(psha->CardInsertCbPara);
+ }
+ if (status & NOR_INT_STAT_CARD_REMOVAL) // 0x80
+ {
+ HAL_SDIOH_REG8(REG_SDIO_HOST_PWR_CTRL) &= ~PWR_CTRL_SD_BUS_PWR;
+ SdioHostSdClkCtrl(psha, 0, BASE_CLK); // BASE_CLK
+ if (psha->CardRemoveCallBack)
+ psha->CardRemoveCallBack(psha->CardRemoveCbPara);
+ }
+ if (status & NOR_INT_STAT_CARD_INT) // 0x100 )
+ {
+ u16 val = HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_STATUS_EN);
+ HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_STATUS_EN) = val & (~NOR_INT_STAT_EN_CARD_INT);
+ DBG_SDIO_ERR("CARD INT: 0x%04X\n", status);
+ HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_STATUS_EN) = val;
+
+ }
+ if (status & NOR_INT_STAT_ERR_INT) // 0x8000 )
+ {
+ HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_SIG_EN) = 0;
+ u16 err = HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS);
+
+ DBG_SDIO_ERR("\r[SDIO Err]XFER CP with ErrIntVal: 0x%04X /0x%04X -- TYPE 0x%02X\n",
+ status,
+ err,
+ psha->CmdCompleteFlg);
+
+ if (psha->CmdCompleteFlg) {
+ SdioHostErrIntRecovery(psha);
+ goto ir_end;
+ }
+ DiagPrintf("\r[SDIO Err]Read/Write command Error\n");
+
+ psha->ErrIntFlg = 1;
+ }
}
+ir_end:
+ HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_SIG_EN)
+ = NOR_INT_SIG_EN_CMD_COMP
+ | NOR_INT_SIG_EN_XFER_COMP
+ | NOR_INT_SIG_EN_CARD_REMOVAL
+ | NOR_INT_SIG_EN_CARD_INT; // 195;
+}
+
+//----- SdioHostChkCmdComplete
+HAL_Status SdioHostChkCmdComplete(void *Data, uint32_t Timeout) {
+{
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ uint32_t TimeoutCnt;
+ uint32_t StartCount;
+ HAL_Status result;
+
+
+ if (psha) {
+ if (Timeout == SDIO_HOST_WAIT_FOREVER) {
+ StartCount = 0;
+ TimeoutCnt = 0;
+ } else {
+ TimeoutCnt = 1000 * Timeout / 31;
+ StartCount = HalTimerOp.HalTimerReadCount(1); // v6 = (*((int (**)(u32)) &HalTimerOp + 2))(1);
+ }
+ while(psha->CmdCompleteFlg == 0) {
+ if(psha->ErrIntFlg)
+ return SdioHostErrIntRecovery(psha);
+ if(TimeoutCnt) {
+ result = SdioHostIsTimeout(StartCount, TimeoutCnt);
+ if (result == HAL_TIMEOUT)
+ return result;
+ } else if(Timeout == 0) {
+ result = HAL_BUSY;
+ return result;
+ }
+ }
+ result = HAL_OK;
+ } else
+ result = HAL_ERR_PARA;
return result;
}
-//----- (000007C4) --------------------------------------------------------
-signed int SdioHostChkCmdComplete(void *Data, uint32_t Timeout) {
- void *v2; // r4@1
- int v3; // r1@2
- signed int v4; // r2@2
- uint32_t v5; // r5@2
- signed int result; // r0@5
+//----- SdioHostGetCSD
+HAL_Status SdioHostGetCSD(void *Data)
+{
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ HAL_Status result;
+ SDIO_HOST_CMD Cmd;
- v2 = Data;
- if (Data) {
- v5 = (*((int (**)(u32, u32)) &HalTimerOp + 2))(1, Timeout);
- while (!*((u8 *) v2 + 128)) {
- if (*((u8 *) v2 + 130))
- return SdioHostErrIntRecovery(v2, v3, v4);
- result = SdioHostIsTimeout(v5, 1612);
- if (result == 2)
+ if (psha) {
+ result = SdioHostChkCmdInhibitCMD();
+ if (result == HAL_OK) {
+
+ Cmd.CmdFmt.RespType = RSP_LEN_136;
+ Cmd.CmdFmt.Rsvd0 = 0;
+ Cmd.CmdFmt.CmdCrcChkEn = 1;
+ Cmd.CmdFmt.CmdIdxChkEn = 0;
+ Cmd.CmdFmt.DataPresent = NO_DATA;
+ Cmd.CmdFmt.CmdType = NORMAL;
+ Cmd.CmdFmt.CmdIdx = CMD_SEND_CSD;
+ Cmd.CmdFmt.Rsvd1 = 0;
+ Cmd.Arg = psha->RCA << 16;
+
+ psha->CmdCompleteFlg = 0;
+ psha->XferType = 0;
+
+ SdioHostSendCmd(&Cmd);
+ result = SdioHostChkCmdComplete(psha, 50);
+ if(result == HAL_OK) {
+ SdioHostGetResponse(psha, Cmd.CmdFmt.RespType);
+ psha->Csd[15] = 1;
+ uint32 x = psha->Response[3];
+ psha->Csd[0] = x >> 16;
+ psha->Csd[1] = x >> 8;
+ psha->Csd[2] = x;
+ x = psha->Response[2];
+ psha->Csd[3] = x >> 24;
+ psha->Csd[4] = x >> 16;
+ psha->Csd[5] = x >> 8;
+ psha->Csd[6] = x;
+ x = psha->Response[1];
+ psha->Csd[7] = x >> 24;
+ psha->Csd[8] = x >> 16;
+ psha->Csd[9] = x >> 8;
+ psha->Csd[10] = x;
+ x = psha->Response[0];
+ psha->Csd[11] = x >> 24;
+ psha->Csd[12] = x >> 16;
+ psha->Csd[13] = x >> 8;
+ psha->Csd[14] = x;
+ }
+ }
+ } else
+ result = HAL_ERR_PARA;
+ return result;
+}
+
+//----- SdioHostChkXferComplete
+HAL_Status SdioHostChkXferComplete(void *Data)
+{
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ uint32_t StartCount;
+ HAL_Status result;
+ if (psha) {
+ StartCount = HalTimerOp.HalTimerReadCount(1);
+ while(psha->XferCompleteFlg == 0
+ && (HAL_SDIOH_REG32(REG_SDIO_HOST_PRESENT_STATE)
+ & PRES_STATE_DAT0_SIGNAL_LEVEL) == 0) {
+ if(psha->ErrIntFlg)
+ return SdioHostErrIntRecovery(psha);
+ result = SdioHostIsTimeout(StartCount, 161290);
+ if (result == HAL_TIMEOUT)
return result;
}
- result = 0;
- } else
- result = 3;
-
+ result = HAL_OK;
+ } else {
+ result = HAL_ERR_PARA;
+ }
return result;
}
-//----- (0000080C) --------------------------------------------------------
-int SdioHostCardSelection(void *Data, int Select, int a3) {
- u8 *v3; // r4@1
- int result; // r0@3
- char v5; // r3@5
- int v6; // r3@5
- uint32_t v7; // r1@5
- signed int v8; // r2@5
- signed int v9; // r5@6
- char v10; // r3@11
- uint32_t v11; // r1@11
+//----- SdioHostCardSelection
+HAL_Status SdioHostCardSelection(void *Data, int Select) {
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ HAL_Status result;
SDIO_HOST_CMD Cmd; // [sp+0h] [bp-18h]@1
- int v13; // [sp+8h] [bp-10h]@1
- *(u32 *) &Cmd.CmdFmt = Data;
- Cmd.Arg = Select;
- v13 = a3;
- v3 = Data;
- if (Data) {
- if (Select == 1) {
- result = SdioHostChkCmdInhibitCMD((uint32_t) Data);
- if (!result) {
+ if (psha) {
+ result = SdioHostChkCmdInhibitCMD();
+ if (result == HAL_OK) {
+ psha->CmdCompleteFlg = 0;
+ psha->XferType = SDIO_XFER_NOR;
+ psha->XferCompleteFlg = 0;
+
+ if (Select == 1) {
result = SdioHostChkCmdInhibitDAT(0);
- if (!result) {
- Cmd.CmdFmt = (SDIO_HOST_CMD_FMT) ((*(u8 *) &Cmd.CmdFmt
- | 0x1B) & 0x1F);
- v5 = *((u8 *) &Cmd.CmdFmt + 1);
- v3[128] = 0;
- *((u8 *) &Cmd.CmdFmt + 1) = v5 & 0xC0 | 7;
- v6 = *((u16 *) v3 + 67);
- v3[129] = 0;
- Cmd.Arg = v6 << 16;
+ if (result == HAL_OK) {
+
+ Cmd.CmdFmt.RespType = RSP_LEN_48_CHK_BUSY;
+ Cmd.CmdFmt.Rsvd0 = 0;
+ Cmd.CmdFmt.CmdCrcChkEn = 1;
+ Cmd.CmdFmt.CmdIdxChkEn = 1;
+ Cmd.CmdFmt.DataPresent = NO_DATA;
+ Cmd.CmdFmt.CmdType = NORMAL;
+ Cmd.CmdFmt.CmdIdx = CMD_SELECT_DESELECT_CARD;
+ Cmd.CmdFmt.Rsvd1 = 0;
+ Cmd.Arg = psha->RCA << 16;
+
+
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete(v3, v7);
- if (!result) {
- v9 = SdioHostChkXferComplete(v3, 0x1388u, v8);
- if (v9
- || (SdioHostGetResponse(v3,
- *(u8 *) &Cmd.CmdFmt & 3), v3[24] == 7)) {
- result = v9;
- } else {
+ result = SdioHostChkCmdComplete(psha, 50);
+ if(result == HAL_OK) {
+ result = SdioHostChkXferComplete(psha);
+ if(result != HAL_OK) return result;
+ result = SdioHostGetResponse(psha, Cmd.CmdFmt.RespType);
+ if(result != HAL_OK) return result;
+ if((uint8)psha->Response[1] != 7) return result;
+ else {
DBG_SDIO_ERR("Command index error!\n");
- result = 238;
+ result = HAL_ERR_UNKNOWN;
}
}
}
- }
- } else {
- result = SdioHostChkCmdInhibitCMD((uint32_t) Data);
- if (!result) {
- *(u8 *) &Cmd.CmdFmt &= 4u;
- v10 = *((u8 *) &Cmd.CmdFmt + 1);
- v3[128] = 0;
- Cmd.Arg = 0;
- *((u8 *) &Cmd.CmdFmt + 1) = v10 & 0xC0 | 7;
+ } else {
+
+ Cmd.CmdFmt.RespType = NO_RSP;
+ Cmd.CmdFmt.Rsvd0 = 0;
+ Cmd.CmdFmt.CmdCrcChkEn = 0;
+ Cmd.CmdFmt.CmdIdxChkEn = 0;
+ Cmd.CmdFmt.DataPresent = NO_DATA;
+ Cmd.CmdFmt.CmdType = NORMAL;
+ Cmd.CmdFmt.CmdIdx = CMD_SELECT_DESELECT_CARD;
+ Cmd.CmdFmt.Rsvd1 = 0;
+ Cmd.Arg = psha->RCA << 16;
+
+
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete(v3, v11);
+ result = SdioHostChkCmdComplete(psha, 50);
}
}
- } else {
+ } else result = HAL_ERR_PARA;
+ return result;
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+//----- (00000D34) --------------------------------------------------------
+HAL_Status SdioHostSwitchFunction(void *Data, int Mode, int Fn2Sel, int Fn1Sel,
+ uint8_t *StatusBuf)
+{
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ HAL_Status result; // r0@3
+ SDIO_HOST_CMD Cmd; // [sp+0h] [bp-20h]@1
+
+ u8 *v5; // r4@1
+ uint32_t v6; // r0@1
+ int v7; // r5@1
+ int v8; // r6@1
+ char v9; // r7@3
+ char v11; // r3@5
+ uint32_t v12; // r1@5
+ signed int v13; // r2@6
+ uint32_t v14; // r1@6
+
+
+ int v16; // [sp+8h] [bp-18h]@1
+
+ *(u32 *) &Cmd.CmdFmt = Data;
+ Cmd.Arg = Mode;
+ v16 = Fn2Sel;
+ v5 = Data;
+ v6 = *((u32 *) Data + 4);
+ v7 = Mode;
+ v8 = Fn2Sel;
+ if (!v6 || ((u8) Fn1Sel | (u8) v6) & 3) {
result = 3;
+ } else {
+ HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = (uint32)psha->AdmaDescTbl; // v40058058 = v6;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_SIZE) = 64; // v40058004 = 64;
+ HAL_SDIOH_REG32(REG_SDIO_HOST_XFER_MODE) = XFER_MODE_DATA_XFER_DIR | XFER_MODE_DMA_EN; // v4005800C = 17;
+
+ v9 = *(u8 *) v6;
+ *(u16 *) (v6 + 2) = 64;
+ *(u8 *) v6 = ((v9 | 3) & 0xFB | 4 * ((Fn1Sel | v6) & 1)) & 0xEF
+ | 16 * ((Fn1Sel | v6) & 1) | 0x20;
+ *(u32 *) (v6 + 4) = Fn1Sel;
+ result = SdioHostChkCmdInhibitCMD();//v6);
+ if (!result) {
+ result = SdioHostChkDataLineActive();
+ if (result == HAL_OK) {
+ Cmd.CmdFmt = (SDIO_HOST_CMD_FMT) ((*(u8 *) &Cmd.CmdFmt & 0xF4
+ | 0x3A) & 0x3F);
+ v11 = *((u8 *) &Cmd.CmdFmt + 1);
+ v5[128] = 0;
+ *((u8 *) &Cmd.CmdFmt + 1) = v11 & 0xC0 | 6;
+ v5[129] = 0;
+ Cmd.Arg = v8 | 0xFFFFF0 | (v7 << 31);
+ SdioHostSendCmd(&Cmd);
+ result = SdioHostChkCmdComplete(v5);//, v12);
+ if (!result) {
+ SdioHostGetResponse(v5, *(u8 *) &Cmd.CmdFmt & 3);
+ result = SdioHostChkXferComplete(v5, 0x1388u, v13);
+ if (result) {
+ if (result != 16) {
+ if (HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS) & ERR_INT_STAT_ADMA) {
+ HAL_SDIOH_REG16(REG_SDIO_HOST_ERROR_INT_STATUS) = ERR_INT_STAT_ADMA;
+ if (HalSdioHostStopTransferRtl8195a(psha)) {
+ DBG_SDIO_ERR("Stop transmission error!\n");
+ }
+ }
+ }
+ result = 238;
+ }
+ }
+ }
+ }
}
return result;
}
-// 23D4: using guessed type int DiagPrintf(const char *, ...);
-//----- (000008FC) --------------------------------------------------------
-int SdioHostGetCSD(void *Data, uint32_t a2) {
- void *v2; // r4@1
- int result; // r0@2
- int v4; // r3@3
- uint32_t v5; // r1@3
- signed int v6; // r6@3
- unsigned int v7; // r3@4
- unsigned int v8; // r2@4
- unsigned int v9; // r3@4
- unsigned int v10; // r2@4
- unsigned int v11; // r3@4
- unsigned int v12; // r2@4
- unsigned int v13; // r3@4
- SDIO_HOST_CMD Cmd; // [sp+0h] [bp-18h]@1
- *(u32 *) &Cmd.CmdFmt = Data;
- Cmd.Arg = a2;
- v2 = Data;
- if (Data) {
- result = SdioHostChkCmdInhibitCMD((uint32_t) Data);
- if (!result) {
- Cmd.CmdFmt = (SDIO_HOST_CMD_FMT) ((*(u8 *) &Cmd.CmdFmt & 0xFC | 9)
- & 0xF);
- *((u8 *) &Cmd.CmdFmt + 1) = *((u8 *) &Cmd.CmdFmt + 1) & 0xC0 | 9;
- v4 = *((u16 *) v2 + 67);
- *((u8 *) v2 + 128) = 0;
- Cmd.Arg = v4 << 16;
- SdioHostSendCmd(&Cmd);
- v6 = SdioHostChkCmdComplete(v2, v5);
- if (!v6) {
- SdioHostGetResponse(v2, *(u8 *) &Cmd.CmdFmt & 3);
- v7 = *((u32 *) v2 + 8);
- *((u8 *) v2 + 127) = 1;
- *((u8 *) v2 + 112) = v7 >> 16;
- *((u8 *) v2 + 114) = v7;
- v8 = v7 >> 8;
- v9 = *((u32 *) v2 + 7);
- *((u8 *) v2 + 113) = v8;
- *((u8 *) v2 + 115) = BYTE3(v9);
- *((u8 *) v2 + 116) = v9 >> 16;
- *((u8 *) v2 + 118) = v9;
- v10 = v9 >> 8;
- v11 = *((u32 *) v2 + 6);
- *((u8 *) v2 + 117) = v10;
- *((u8 *) v2 + 119) = BYTE3(v11);
- *((u8 *) v2 + 120) = v11 >> 16;
- *((u8 *) v2 + 122) = v11;
- v12 = v11 >> 8;
- v13 = *((u32 *) v2 + 5);
- *((u8 *) v2 + 121) = v12;
- *((u8 *) v2 + 123) = BYTE3(v13);
- *((u8 *) v2 + 124) = v13 >> 16;
- *((u8 *) v2 + 125) = BYTE1(v13);
- *((u8 *) v2 + 126) = v13;
- }
- result = v6;
- } else
- result = 3;
- return result;
- }
-}
+
+
+
//----- (000009CC) --------------------------------------------------------
HAL_Status HalSdioHostReadBlocksDmaRtl8195a(IN VOID *Data, IN u64 ReadAddr,
IN u32 BlockCnt) {
@@ -753,7 +832,7 @@ IN u32 BlockCnt) {
if (BlockCnt != 1)
break;
v4005800C = 17;
- LABEL_18: result = SdioHostChkCmdInhibitCMD(result);
+ LABEL_18: result = SdioHostChkCmdInhibitCMD();//result);
if (result)
return result;
result = SdioHostChkDataLineActive(0);
@@ -768,7 +847,7 @@ IN u32 BlockCnt) {
*((u8 *) &Cmd.CmdFmt + 1) = v12 & 0xC0 | 0x11;
Cmd.Arg = v4;
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete((void *) v5, v13);
+ result = SdioHostChkCmdComplete((void *) v5);//, v13);
if (result)
goto LABEL_21;
SdioHostGetResponse((void *) v5, *(u8 *) &Cmd.CmdFmt & 3);
@@ -792,7 +871,7 @@ IN u32 BlockCnt) {
v4005800C = 55;
if (BlockCnta <= 1)
goto LABEL_18;
- result = SdioHostChkCmdInhibitCMD(result);
+ result = SdioHostChkCmdInhibitCMD();//result);
if (result)
return result;
result = SdioHostChkDataLineActive(0);
@@ -807,7 +886,7 @@ IN u32 BlockCnt) {
*((u8 *) &Cmd.CmdFmt + 1) = v7 & 0xC0 | 0x12;
Cmd.Arg = v4;
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete((void *) v5, v8);
+ result = SdioHostChkCmdComplete((void *) v5);//, v8);
if (!result) {
SdioHostGetResponse((void *) v5, *(u8 *) &Cmd.CmdFmt & 3);
result = SdioHostChkXferComplete((void *) v5, 0x1388u, v9);
@@ -832,7 +911,7 @@ IN u32 BlockCnt) {
HAL_Status HalSdioHostWriteBlocksDmaRtl8195a(IN VOID *Data,
IN u64 WriteAddr,
IN u32 BlockCnt) {
-
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
PHAL_SDIO_HOST_ADAPTER pSdioHostAdapter = (PHAL_SDIO_HOST_ADAPTER) Data; //int v5; // r6@1
uint32_t sec_count; // v4; // r4@1
@@ -884,7 +963,7 @@ IN u32 BlockCnt) {
if (BlockCnt > 1)
break;
- LABEL_23: result = SdioHostChkCmdInhibitCMD(result);
+ LABEL_23: result = SdioHostChkCmdInhibitCMD();//result);
if (result != HAL_OK)
return result;
result = SdioHostChkDataLineActive(0);
@@ -899,7 +978,7 @@ IN u32 BlockCnt) {
*((u8 *) &Cmd.CmdFmt + 1) = v10 & 0xC0 | 0x18;
Cmd.Arg = sec_count;
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete((void *) v5, v11);
+ result = SdioHostChkCmdComplete((void *) v5);//, v11);
if (result)
goto LABEL_26;
SdioHostGetResponse((void *) pSdioHostAdapter,
@@ -926,7 +1005,7 @@ IN u32 BlockCnt) {
return 238;
}
}
- result = SdioHostChkCmdInhibitCMD(result);
+ result = SdioHostChkCmdInhibitCMD();//result);
if (result != HAL_OK)
return result;
result = SdioHostChkDataLineActive(0);
@@ -941,7 +1020,7 @@ IN u32 BlockCnt) {
*((u8 *) &Cmd.CmdFmt + 1) = v7 & 0xC0 | 0x19;
Cmd.Arg = sec_count;
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete((void *) v5, v8);
+ result = SdioHostChkCmdComplete((void *) v5);//, v8);
if (!result) {
SdioHostGetResponse((void *) pSdioHostAdapter,
*(u8 *) &Cmd.CmdFmt & 3);
@@ -967,73 +1046,6 @@ IN u32 BlockCnt) {
}
// 23D4: using guessed type int DiagPrintf(const char *, ...);
-//----- (00000D34) --------------------------------------------------------
-int SdioHostSwitchFunction(void *Data, int Mode, int Fn2Sel, int Fn1Sel,
- uint8_t *StatusBuf) {
- u8 *v5; // r4@1
- uint32_t v6; // r0@1
- int v7; // r5@1
- int v8; // r6@1
- char v9; // r7@3
- int result; // r0@3
- char v11; // r3@5
- uint32_t v12; // r1@5
- signed int v13; // r2@6
- uint32_t v14; // r1@6
- SDIO_HOST_CMD Cmd; // [sp+0h] [bp-20h]@1
- int v16; // [sp+8h] [bp-18h]@1
-
- *(u32 *) &Cmd.CmdFmt = Data;
- Cmd.Arg = Mode;
- v16 = Fn2Sel;
- v5 = Data;
- v6 = *((u32 *) Data + 4);
- v7 = Mode;
- v8 = Fn2Sel;
- if (!v6 || ((u8) Fn1Sel | (u8) v6) & 3) {
- result = 3;
- } else {
- v40058058 = v6;
- v40058004 = 64;
- v4005800C = 17;
- v9 = *(u8 *) v6;
- *(u16 *) (v6 + 2) = 64;
- *(u8 *) v6 = ((v9 | 3) & 0xFB | 4 * ((Fn1Sel | v6) & 1)) & 0xEF
- | 16 * ((Fn1Sel | v6) & 1) | 0x20;
- *(u32 *) (v6 + 4) = Fn1Sel;
- result = SdioHostChkCmdInhibitCMD(v6);
- if (!result) {
- result = SdioHostChkDataLineActive(0);
- if (!result) {
- Cmd.CmdFmt = (SDIO_HOST_CMD_FMT) ((*(u8 *) &Cmd.CmdFmt & 0xF4
- | 0x3A) & 0x3F);
- v11 = *((u8 *) &Cmd.CmdFmt + 1);
- v5[128] = 0;
- *((u8 *) &Cmd.CmdFmt + 1) = v11 & 0xC0 | 6;
- v5[129] = 0;
- Cmd.Arg = v8 | 0xFFFFF0 | (v7 << 31);
- SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete(v5, v12);
- if (!result) {
- SdioHostGetResponse(v5, *(u8 *) &Cmd.CmdFmt & 3);
- result = SdioHostChkXferComplete(v5, 0x1388u, v13);
- if (result) {
- if (result != 16) {
- if (v40058032 & 0x200) {
- v40058032 = 512;
- if (HalSdioHostStopTransferRtl8195a(v5, v14)) {
- DBG_SDIO_ERR("Stop transmission error!\n");
- }
- }
- }
- result = 238;
- }
- }
- }
- }
- }
- return result;
-}
// 23D4: using guessed type int DiagPrintf(const char *, ...);
//----- (00000E34) --------------------------------------------------------
@@ -1053,7 +1065,7 @@ HAL_Status HalSdioHostGetCardStatusRtl8195a(IN VOID *Data) {
v3 = Data;
if (!Data)
return 3;
- result = SdioHostChkCmdInhibitCMD((uint32_t) Data);
+ result = SdioHostChkCmdInhibitCMD();//(uint32_t) Data);
if (result)
return result;
Cmd.CmdFmt =
@@ -1063,7 +1075,7 @@ HAL_Status HalSdioHostGetCardStatusRtl8195a(IN VOID *Data) {
*((u8 *) &Cmd.CmdFmt + 1) = v5 & 0xC0 | 0xD;
Cmd.Arg = *((u16 *) v3 + 67) << 16;
SdioHostSendCmd(&Cmd);
- v7 = SdioHostChkCmdComplete(v3, v6);
+ v7 = SdioHostChkCmdComplete(v3);//, v6);
if (v7)
return v7;
SdioHostGetResponse(v3, *(u8 *) &Cmd.CmdFmt & 3);
@@ -1140,7 +1152,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
v7 = 3;
goto LABEL_115;
};
- v4 = SdioHostChkCmdInhibitCMD((uint32_t) Data);
+ v4 = SdioHostChkCmdInhibitCMD();//(uint32_t) Data);
if (!v4) {
v5 = (char) v52;
v3[128] = 0;
@@ -1148,7 +1160,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
v53 = 0;
BYTE1(v52) &= 0xC0u;
SdioHostSendCmd((SDIO_HOST_CMD *) &v52);
- v4 = SdioHostChkCmdComplete(v3, v6);
+ v4 = SdioHostChkCmdComplete(v3);//, v6);
};
v7 = v4;
if (v4) {
@@ -1157,12 +1169,12 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
};
goto LABEL_115;
- v9 = SdioHostChkCmdInhibitCMD(0);
+ v9 = SdioHostChkCmdInhibitCMD();//0);
if (v9
|| (LOBYTE(v52) = (((u8) v52 & 0xF4 | 0x1A) & 0xDF | 32 * (v7 & 1))
& 0x3F | ((v7 & 3) << 6), BYTE1(v52) = BYTE1(v52) & 0xC0
| 8, v3[128] = v7, v53 = 426, SdioHostSendCmd(
- (SDIO_HOST_CMD *) &v52), (v9 = SdioHostChkCmdComplete(v3,
+ (SDIO_HOST_CMD *) &v52), (v9 = SdioHostChkCmdComplete(v3);//,
v10)) != 0)) {
v7 = v9;
if (v9)
@@ -1197,7 +1209,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
goto LABEL_115;
}
}
- v13 = SdioHostChkCmdInhibitCMD(v9);
+ v13 = SdioHostChkCmdInhibitCMD();//v9);
if (v13)
goto LABEL_63;
LOBYTE (v52) = ((u8) v52 & 0xFC | 0x1A) & 0x1F;
@@ -1206,7 +1218,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
BYTE1 (v52) = v14;
v53 = v7;
SdioHostSendCmd((SDIO_HOST_CMD *) &v52);
- v13 = SdioHostChkCmdComplete(v3, v15);
+ v13 = SdioHostChkCmdComplete(v3);//, v15);
if (v13)
goto LABEL_63;
v16 = SdioHostGetResponse(v3, (u8) v52 & 3);
@@ -1227,12 +1239,11 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
LABEL_57: v7 = 238;
goto LABEL_60;
};
- v13 = SdioHostChkCmdInhibitCMD(v16);
+ v13 = SdioHostChkCmdInhibitCMD();//v16);
if (v13
|| (LOBYTE(v52) = ((u8) v52 & 0xFC | 2) & 7, v18 = BYTE1(v52) & 0xC0
| 0x29, v3[128] = v7, BYTE1(v52) = v18, v53 = v7, SdioHostSendCmd(
- (SDIO_HOST_CMD *) &v52), (v13 = SdioHostChkCmdComplete(v3,
- v19)) != 0)) {
+ (SDIO_HOST_CMD *) &v52), (v13 = SdioHostChkCmdComplete(v3)) != 0)) {
LABEL_63: v7 = v13;
if (!v13)
goto LABEL_64;
@@ -1249,7 +1260,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
v22 = __CFADD__(v21--, -1);
if (!v22)
goto LABEL_51;
- v13 = SdioHostChkCmdInhibitCMD(v20);
+ v13 = SdioHostChkCmdInhibitCMD();//v20);
if (v13)
goto LABEL_63;
LOBYTE (v52) = ((u8) v52 & 0xFC | 0x1A) & 0x1F;
@@ -1258,7 +1269,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
v53 = 0;
BYTE1 (v52) = v23 & 0xC0 | 0x37;
SdioHostSendCmd((SDIO_HOST_CMD *) &v52);
- v13 = SdioHostChkCmdComplete(v3, v24);
+ v13 = SdioHostChkCmdComplete(v3);//, v24);
if (v13)
goto LABEL_63;
v25 = SdioHostGetResponse(v3, (u8) v52 & 3);
@@ -1278,7 +1289,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
LABEL_62: v13 = 238;
goto LABEL_63;
}
- v13 = SdioHostChkCmdInhibitCMD(v25);
+ v13 = SdioHostChkCmdInhibitCMD();//v25);
if (v13)
goto LABEL_63;
LOBYTE (v52) = ((u8) v52 & 0xFC | 2) & 7;
@@ -1287,7 +1298,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
BYTE1 (v52) = v27 & 0xC0 | 0x29;
v53 = 1077673984;
SdioHostSendCmd((SDIO_HOST_CMD *) &v52);
- v13 = SdioHostChkCmdComplete(v3, v28);
+ v13 = SdioHostChkCmdComplete(v3);//, v28);
if (v13)
goto LABEL_63;
SdioHostGetResponse(v3, (u8) v52 & 3);
@@ -1312,12 +1323,11 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
}
DiagPrintf(v29);
LABEL_64: v30 = HalDelayUs(20);
- v31 = SdioHostChkCmdInhibitCMD(v30);
+ v31 = SdioHostChkCmdInhibitCMD();//v30);
if (v31
|| (LOBYTE(v52) = ((u8) v52 & 0xF4 | 9) & 0xF, v32 = BYTE1(v52)
& 0xC0 | 2, v3[128] = v7, BYTE1(v52) = v32, v53 = v7, SdioHostSendCmd(
- (SDIO_HOST_CMD *) &v52), (v31 = SdioHostChkCmdComplete(v3,
- v33)) != 0)) {
+ (SDIO_HOST_CMD *) &v52), (v31 = SdioHostChkCmdComplete(v3)) != 0)) {
v7 = v31;
if (!v31)
goto LABEL_70;
@@ -1328,12 +1338,11 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
goto LABEL_115;
}
v31 = SdioHostGetResponse(v3, (u8) v52 & 3);
- LABEL_70: v34 = SdioHostChkCmdInhibitCMD(v31);
+ LABEL_70: v34 = SdioHostChkCmdInhibitCMD();//v31);
if (v34
|| (LOBYTE(v52) = ((u8) v52 & 0xF4 | 0x1A) & 0x1F, v35 = BYTE1(v52)
& 0xC0 | 3, v3[128] = v7, BYTE1(v52) = v35, v53 = v7, SdioHostSendCmd(
- (SDIO_HOST_CMD *) &v52), (v34 = SdioHostChkCmdComplete(v3,
- v36)) != 0)) {
+ (SDIO_HOST_CMD *) &v52), (v34 = SdioHostChkCmdComplete(v3)) != 0)) {
v7 = v34;
if (v34)
goto LABEL_79;
@@ -1370,7 +1379,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
LABEL_108: DiagPrintf(v41, v40);
goto LABEL_113;
}
- v42 = SdioHostChkCmdInhibitCMD(0);
+ v42 = SdioHostChkCmdInhibitCMD();//0);
if (v42)
goto LABEL_120;
LOBYTE (v52) = ((u8) v52 & 0xFC | 0x1A) & 0x1F;
@@ -1379,7 +1388,7 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
v3[128] = v7;
v53 = v45;
SdioHostSendCmd((SDIO_HOST_CMD *) &v52);
- v42 = SdioHostChkCmdComplete(v3, v46);
+ v42 = SdioHostChkCmdComplete(v3);//, v46);
if (v42)
goto LABEL_120;
v47 = SdioHostGetResponse(v3, (u8) v52 & 3);
@@ -1392,12 +1401,11 @@ HAL_Status HalSdioHostInitCardRtl8195a(IN VOID *Data) {
}
goto LABEL_96;
}
- v42 = SdioHostChkCmdInhibitCMD(v47);
+ v42 = SdioHostChkCmdInhibitCMD();//v47);
if (v42
|| (LOBYTE(v52) = ((u8) v52 & 0xFC | 0x1A) & 0x1F, v49 = BYTE1(v52)
& 0xC0 | 6, v3[128] = v7, BYTE1(v52) = v49, v53 = 2, SdioHostSendCmd(
- (SDIO_HOST_CMD *) &v52), (v42 = SdioHostChkCmdComplete(v3,
- v50)) != 0)) {
+ (SDIO_HOST_CMD *) &v52), (v42 = SdioHostChkCmdComplete(v3)) != 0)) {
LABEL_120: v7 = v42;
if (v42)
goto LABEL_102;
@@ -1475,7 +1483,7 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
v6 = (u8) ((v5 | 3) & 0xEB) | 0x20;
*(u8 *) v3 = v6;
*(u32 *) (v3 + 4) = v4 + 48;
- result = SdioHostChkCmdInhibitCMD(v6);
+ result = SdioHostChkCmdInhibitCMD();//v6);
if (!result) {
Cmd.CmdFmt =
(SDIO_HOST_CMD_FMT) ((*(u8 *) &Cmd.CmdFmt & 0xFC | 0x1A)
@@ -1485,7 +1493,7 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
v4[128] = 0;
Cmd.Arg = v8 << 16;
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete(v4, v9);
+ result = SdioHostChkCmdComplete(v4);
if (!result) {
SdioHostGetResponse(v4, *(u8 *) &Cmd.CmdFmt & 3);
if (v4[24] != 55) {
@@ -1504,7 +1512,7 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
}
return 238;
}
- result = SdioHostChkCmdInhibitCMD(*((u32 *) v4 + 5) << 26);
+ result = SdioHostChkCmdInhibitCMD();//*((u32 *) v4 + 5) << 26);
if (!result) {
result = SdioHostChkDataLineActive(0);
if (!result) {
@@ -1516,7 +1524,7 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
Cmd.Arg = 0;
*((u8 *) &Cmd.CmdFmt + 1) = v12 & 0xC0 | 0xD;
SdioHostSendCmd(&Cmd);
- result = SdioHostChkCmdComplete(v4, v13);
+ result = SdioHostChkCmdComplete(v4);//, v13);
if (!result) {
SdioHostGetResponse(v4, *(u8 *) &Cmd.CmdFmt & 3);
v15 = SdioHostChkXferComplete(v4, 0x1388u, v14);
@@ -1544,11 +1552,11 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
// 23D4: using guessed type int DiagPrintf(const char *, ...);
//----- (00001668) --------------------------------------------------------
+// SD_CLK_FREQUENCY Frequency
HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
- PHAL_SDIO_HOST_ADAPTER v2 /*pSdioHostAdapter*/=
- (PHAL_SDIO_HOST_ADAPTER) Data;
- u8 * v2; // r5@1
- int v3; // r4@6
+ PHAL_SDIO_HOST_ADAPTER pSdioHostAdapter = (PHAL_SDIO_HOST_ADAPTER) Data; // v2 = Data; u8 * v2; // r5@1
+ PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
+ HAL_Status ret = HAL_ERR_PARA; // int v3; // r4@6
int v4; // r2@8
int v5; // r0@10
int v6; // r0@10
@@ -1565,65 +1573,65 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
int v17; // r0@34
int v18; // r0@36
const char *v19; // r0@40
- int v20; // r2@52
- char v22; // [sp+0h] [bp-58h]@11
+ u8 Divisor; // int v20; // r2@52
+ char v22; // SDIO_HOST_CMD [sp+0h] [bp-58h]@11
char v23; // [sp+1h] [bp-57h]@11
int v24; // [sp+4h] [bp-54h]@11
+
uint8_t StatusData[64]; // [sp+8h] [bp-50h]@8
- v2 = Data;
- if (!Data || (unsigned int) (Frequency - 5) > 3)
- return 3;
- if (v2.CurrSdClk == Frequency) {
- DBG_SDIO_WARN(
- "Current SDCLK frequency is already the specified value...\n");
- return 0;
+
+ if (!psha || Frequency > SD_CLK_41_6MHZ)
+ return ret;
+ if (psha->CurrSdClk == Frequency) {
+ DBG_SDIO_WARN("Current SDCLK frequency is already the specified value...\n");
+ ret = HAL_OK;
+ return ret;
}
- if (Frequency != SD_CLK_41_6MHZ) { // SD_CLK_41_6MHZ
- if (Frequency == SD_CLK_10_4MHZ) // SD_CLK_10_4MHZ
- v20 = BASE_CLK_DIVIDED_BY_4;
- else if (Frequency == SD_CLK_20_8MHZ) // SD_CLK_20_8MHZ
- v20 = BASE_CLK_DIVIDED_BY_2;
- else if (Frequency != SD_CLK_5_2MHZ) { // SD_CLK_5_2MHZ
+ if (Frequency != SD_CLK_41_6MHZ) {
+ if (Frequency == SD_CLK_10_4MHZ)
+ Divisor = BASE_CLK_DIVIDED_BY_4; // 10.4 MHz
+ else if (Frequency == SD_CLK_20_8MHZ)
+ Divisor = BASE_CLK_DIVIDED_BY_2; // 20.8 MHz
+ else if (Frequency != SD_CLK_5_2MHZ) {
DBG_SDIO_ERR("Unsupported SDCLK frequency!\n");
- v3 = 3;
- goto LABEL_60;
+ return ret;
}
- v20 = BASE_CLK_DIVIDED_BY_8;
+ Divisor = BASE_CLK_DIVIDED_BY_8; // 5.2 MHZ
}
- v3 = SdioHostSdClkCtrl(Data, 1, v20);
- if (!v3)
- return 0;
- LABEL_60: if (!(ConfigDebugErr & 0x400)) {
- return v3;
- v19 = "\r[SDIO Err]Host changes clock fail!\n"; // DBG_SDIO_ERR("
- goto LABEL_62;
- }
- v4 = *((u32 *) Data + 4);
+ ret = SdioHostSdClkCtrl(psha, 1, Divisor);
+ if (ret == HAL_OK) return ret;
+ DBG_SDIO_ERR("Host changes clock fail!\n");
+ return ret;
+
*(u32 *) StatusData = 0;
*(u32 *) &StatusData[4] = 0;
- if (!v4 || v4 & 3)
- return 3;
- v40058058 = v4;
- v40058004 = 8;
- v4005800C = 17;
- v5 = (u8) ((*(u8 *) v4 | 3) & 0xEB) | 0x20;
- *(u8 *) v4 = v5;
- *(u16 *) (v4 + 2) = 8;
- *(u32 *) (v4 + 4) = StatusData;
- v6 = SdioHostChkCmdInhibitCMD(v5);
- if (v6)
- goto LABEL_70;
- v22 = (v22 & 0xF4 | 0x1A) & 0x1F;
- v7 = v23;
- v2[128] = 0;
- v23 = v7 & 0xC0 | 0x37;
- v24 = *((u16 *) v2 + 67) << 16;
- SdioHostSendCmd((SDIO_HOST_CMD *) &v22);
- v6 = SdioHostChkCmdComplete(v2, v8);
- if (v6)
- goto LABEL_70;
- v9 = SdioHostGetResponse(v2, v22 & 3);
+
+ PADMA2_DESC_FMT pAdmaDescTbl = psha->AdmaDescTbl;
+ if (pAdmaDescTbl == NULL || ((uint32)(pAdmaDescTbl) & 3)) {
+ ret = HAL_ERR_PARA;
+ return ret;
+ }
+ HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = psha->AdmaDescTbl; // v40058058 = v4;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_SIZE) = 8; // v40058004 = 8;
+ HAL_SDIOH_REG16(REG_SDIO_HOST_XFER_MODE) = XFER_MODE_DMA_EN | XFER_MODE_DATA_XFER_DIR; // v4005800C = 17;
+ // v5 = (u8) ((*(u8 *) v4 | 3) & 0xEB) | 0x20;
+ // *(u8 *) v4 = v5;
+ pAdmaDescTbl->Attrib1.Int = 0;
+ pAdmaDescTbl->Attrib1.Act1 = 1;
+ pAdmaDescTbl->Len1 = 8; // *(u16 *) (v4 + 2) = 8;
+ pAdmaDescTbl->Addr2 = &StatusData; // *(u32 *) (v4 + 4) = StatusData;
+ ret = SdioHostChkCmdInhibitCMD();//v5);
+ if (ret != HAL_OK) return ret;
+ SDIO_HOST_CMD sdhcmd;
+ sdhcmd.CmdFmt.CmdCrcChkEn = 1; // v22 = (v22 & 0xF4 | 0x1A) & 0x1F;
+ sdhcmd.CmdFmt.CmdIdx = 0x37; // v23 = v7 & 0xC0 | 0x37;
+ pSdioHostAdapter->CmdCompleteFlg = 0; // v2[128] = 0;
+ sdhcmd.Arg = pSdioHostAdapter->Csd[?] << 16; // v24 = *((u16 *) v2 + 67) << 16;
+ SdioHostSendCmd((SDIO_HOST_CMD *) &sdhcmd);
+ ret = SdioHostChkCmdComplete(psha);//, v8);
+ if (ret != HAL_OK) return ret;
+ v9 = SdioHostGetResponse(psha, v22 & 3);
if (v2[24] != 55) {
if (!(ConfigDebugErr & 0x400))
return 238;
@@ -1637,18 +1645,17 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
v10 = "\r[SDIO Err]ACMD isn't expected!\n";
goto LABEL_15;
}
- v6 = SdioHostChkCmdInhibitCMD(v9);
+ v6 = SdioHostChkCmdInhibitCMD();//v9);
if (v6 || (v6 = SdioHostChkDataLineActive(0)) != 0
- || (v22 = (v22 & 0xF4 | 0x3A) & 0x3F, v11 = v23, v2[128] = 0, v2[129] =
+ || (v22 = (v22 & 0xF4 | 0x3A) & 0x3F, v11 = v23, psha v2[128] = 0, v2[129] =
0, v24 = 0, v23 = v11 & 0xC0 | 0x33, SdioHostSendCmd(
- (SDIO_HOST_CMD *) &v22), (v6 = SdioHostChkCmdComplete(v2,
- v12)) != 0)) {
+ (SDIO_HOST_CMD *) &v22), (v6 = SdioHostChkCmdComplete(psha)) != 0)) {
LABEL_70: v3 = v6;
if (v6)
return v3;
} else {
SdioHostGetResponse(v2, v22 & 3);
- v14 = SdioHostChkXferComplete(v2, 0x1388u, v13);
+ v14 = SdioHostChkXferComplete(psha, 0x1388u, v13);
if (v14) {
if (v14 == 16)
return 238;
@@ -1656,7 +1663,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
if (!(v40058032 & 0x200))
return 238;
v40058032 = 512;
- if (!HalSdioHostStopTransferRtl8195a(v2, v15)
+ if (!HalSdioHostStopTransferRtl8195a(psha, v15)
|| !(ConfigDebugErr & 0x400))
return 238;
v10 = "\r[SDIO Err]Stop transmission error!\n";
@@ -1666,12 +1673,12 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
*((u16 *) v2 + 68) = StatusData[0] & 0xF;
}
if (*((u16 *) v2 + 68)) {
- v16 = SdioHostSwitchFunction(v2, 0, 15, (int) StatusData,
+ v16 = SdioHostSwitchFunction(psha, 0, 15, (int) StatusData,
*(uint8_t **) &v22);
if (v16)
return v16;
if (StatusData[13] & 2) {
- v17 = SdioHostSwitchFunction(v2, v16, 1, (int) StatusData,
+ v17 = SdioHostSwitchFunction(psha, v16, 1, (int) StatusData,
*(uint8_t **) &v22);
if (v17)
return v17;
@@ -1691,7 +1698,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN u8 Frequency) {
v10 = "\r[SDIO Err]Card changes to High-Speed fail!\n";
goto LABEL_15;
}
- v3 = SdioHostSdClkCtrl(v2, 1, v18);
+ v3 = SdioHostSdClkCtrl(psha, 1, v18);
if (v3) {
if (!(ConfigDebugErr & 0x400))
return v3;
@@ -1742,7 +1749,7 @@ IN u64 EndAddr) {
v4 = a2 >> 9;
v3 = EndAddra >> 9;
}
- result = SdioHostChkCmdInhibitCMD(EndAddr);
+ result = SdioHostChkCmdInhibitCMD();//EndAddr);
if (!result) {
v16.CmdFmt = (SDIO_HOST_CMD_FMT) ((*(u8 *) &v16.CmdFmt & 0xFC | 0x1A)
& 0x1F);
@@ -1751,12 +1758,12 @@ IN u64 EndAddr) {
*((u8 *) &v16.CmdFmt + 1) = v7 & 0xC0 | 0x20;
v16.Arg = v4;
SdioHostSendCmd(&v16);
- result = SdioHostChkCmdComplete((void *) v5, v8);
+ result = SdioHostChkCmdComplete((void *) v5);
if (!result) {
v9 = SdioHostGetResponse((void *) v5, *(u8 *) &v16.CmdFmt & 3);
if (*(u8 *) (v5 + 24) != 32)
goto LABEL_20;
- result = SdioHostChkCmdInhibitCMD(v9);
+ result = SdioHostChkCmdInhibitCMD();//v9);
if (result)
return result;
v16.CmdFmt =
@@ -1767,7 +1774,7 @@ IN u64 EndAddr) {
*((u8 *) &v16.CmdFmt + 1) = v10 & 0xC0 | 0x21;
v16.Arg = v3;
SdioHostSendCmd(&v16);
- result = SdioHostChkCmdComplete((void *) v5, v11);
+ result = SdioHostChkCmdComplete((void *) v5);
if (result)
return result;
v12 = SdioHostGetResponse((void *) v5, *(u8 *) &v16.CmdFmt & 3);
@@ -1776,7 +1783,7 @@ IN u64 EndAddr) {
DBG_SDIO_ERR("Command index error!\n");
result = 238;
} else {
- result = SdioHostChkCmdInhibitCMD(v12);
+ result = SdioHostChkCmdInhibitCMD();//v12);
if (!result) {
result = SdioHostChkCmdInhibitDAT(0);
if (!result) {
@@ -1788,7 +1795,7 @@ IN u64 EndAddr) {
v16.Arg = 0;
*((u8 *) &v16.CmdFmt + 1) = v13 & 0xC0 | 0x26;
SdioHostSendCmd(&v16);
- result = SdioHostChkCmdComplete((void *) v5, v14);
+ result = SdioHostChkCmdComplete((void *) v5);
if (!result)
result = SdioHostChkXferComplete((void *) v5,
0x1388u, v15);
@@ -1902,7 +1909,7 @@ HAL_Status HalSdioHostSetWriteProtectRtl8195a(IN VOID *Data, IN u8 Setting) {
*(u16 *) (v2 + 2) = 16;
*(u8 *) v2 = v10 & 0xC8 | 0x23;
*(u32 *) (v2 + 4) = tmp;
- result = SdioHostChkCmdInhibitCMD(1u);
+ result = SdioHostChkCmdInhibitCMD();//1u);
if (!result) {
result = SdioHostChkDataLineActive(0);
if (!result) {
@@ -1913,7 +1920,7 @@ HAL_Status HalSdioHostSetWriteProtectRtl8195a(IN VOID *Data, IN u8 Setting) {
ret = 0;
v17 = v12 & 0xC0 | 0x1B;
SdioHostSendCmd((SDIO_HOST_CMD *) &v16);
- result = SdioHostChkCmdComplete(v3, v13);
+ result = SdioHostChkCmdComplete(v3);
if (!result) {
SdioHostGetResponse(v3, v16 & 3);
if (*((u32 *) v3 + 5) & 0x4000000) {
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
index f992d3d..c1c77aa 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
@@ -245,7 +245,6 @@ HAL_Status HalSsiInitRtl8195a_Patch(VOID *Adaptor)
u32 IRQ_UNKNOWN = 999;
u32 Ctrlr0Value = 0;
u32 Ctrlr1Value = 0;
- u32 SerValue = 0;
u32 BaudrValue = 0;
u32 TxftlrValue = 0;
u32 RxftlrValue = 0;
@@ -318,8 +317,7 @@ HAL_Status HalSsiInitRtl8195a_Patch(VOID *Adaptor)
HAL_SSI_READ32(Index, REG_DW_SSI_CTRLR1));
}
- SerValue = BIT_SER_SER(1 << (pHalSsiAdaptor->SlaveSelectEnable));
- SSI_DBG_INIT("[1] Set SSI%d REG_DW_SSI_SER Value: %X\n", Index, SerValue);
+ SSI_DBG_INIT("[1] Set SSI%d REG_DW_SSI_SER Value: %X\n", Index, BIT_SER_SER(1 << (pHalSsiAdaptor->SlaveSelectEnable)));
//HAL_SSI_WRITE32(Index, REG_DW_SSI_SER, SerValue);
HalSsiSetSlaveEnableRegisterRtl8195a(Adaptor, pHalSsiAdaptor->SlaveSelectEnable);
@@ -617,7 +615,6 @@ HAL_Status HalSsiSetFormatRtl8195a(VOID *Adaptor)
u32 RxftlrValue = 0;
u8 Index = pHalSsiAdaptor->Index;
u8 Role = pHalSsiAdaptor->Role;
- u32 Spi_mode = 0;
if (Index > 2) {
DBG_SSI_ERR("HalSsiSetFormatRtl8195a: Invalid SSI Idx %d\r\n", Index);
@@ -639,10 +636,9 @@ HAL_Status HalSsiSetFormatRtl8195a(VOID *Adaptor)
HAL_SSI_WRITE32(Index, REG_DW_SSI_CTRLR0, Ctrlr0Value);
- Spi_mode = (HAL_SSI_READ32(Index, REG_DW_SSI_CTRLR0) >>6) & 0x3;
SSI_DBG_INIT("[2] SSI%d REG_DW_SSI_CTRLR0(%X) = %X, SPI Mode = %X\n", Index,
SSI0_REG_BASE + (SSI_REG_OFF * Index) + REG_DW_SSI_CTRLR0,
- HAL_SSI_READ32(Index, REG_DW_SSI_CTRLR0), Spi_mode);
+ HAL_SSI_READ32(Index, REG_DW_SSI_CTRLR0), (HAL_SSI_READ32(Index, REG_DW_SSI_CTRLR0) >>6) & 0x3);
//The tx threshold and rx threshold value will be reset after the spi changes its role
/* REG_DW_SSI_TXFTLR */
TxftlrValue = BIT_TXFTLR_TFT(pHalSsiAdaptor->TxThresholdLevel);
@@ -741,7 +737,7 @@ HAL_Status HalSsiIntReadRtl8195a(VOID *Adapter, VOID *RxData, u32 Length)
{
PHAL_SSI_ADAPTOR pHalSsiAdapter = (PHAL_SSI_ADAPTOR) Adapter;
u32 RxFifoThresholdLevel;
- u8 Index = pHalSsiAdapter->Index;
+// u8 Index = pHalSsiAdapter->Index;
DBG_SSI_INFO("HalSsiIntReadRtl8195a: Idx=%d, RxData=0x%x, Len=0x%x\r\n", Index, RxData, Length);
// if (HalSsiBusyRtl8195a(Adapter)) {
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c
index 6f66871..9eb2a3d 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c
@@ -12,13 +12,14 @@
#include "rtl8195a_uart.h"
#include "hal_uart.h"
#include "hal_gdma.h"
+#include "strproc.h"
u8
HalRuartGetChipVerRtl8195a(VOID)
{
u8 chip_ver;
- chip_ver = (HAL_READ32(SYSTEM_CTRL_BASE, 0x01F0) >> 4) & 0x0f;
+ chip_ver = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_SYSTEM_CFG0) >> 4) & 0x0f; // 0x400001F0 RTL8710AF = 0x41000220
return chip_ver;
}
@@ -151,9 +152,8 @@ HalRuartGenBaudRateRtl8195a(
u32 min_divisor=0;
u32 min_err=0xffffffff;
u32 uart_ovsr;
- u32 uart_ovsr_mod;
- u32 min_uart_ovsr; // ovsr with mini err
- u32 min_uart_ovsr_mod;
+ u32 min_uart_ovsr = 0; // ovsr with mini err
+ u32 min_uart_ovsr_mod = 0;
u64 uart_clock;
u32 divisor_temp;
u32 max_jitter_temp;
@@ -200,7 +200,7 @@ HalRuartGenBaudRateRtl8195a(
min_uart_ovsr = uart_ovsr/100;
min_uart_ovsr_mod = uart_ovsr%100;
} else if (err_temp == min_err) {
- uart_ovsr_mod = uart_ovsr%100;
+ u32 uart_ovsr_mod = uart_ovsr%100;
// we perfer OVSR bigger and adj bits smaller
if (((uart_ovsr/100) >= min_uart_ovsr) && (uart_ovsr_mod < min_uart_ovsr_mod)) {
min_err = err_temp;
@@ -369,7 +369,7 @@ HalRuartSetBaudRateRtl8195a(
u8 chip_ver;
// get chip version
- chip_ver = HalRuartGetChipVerRtl8195a();
+ chip_ver = HalRuartGetChipVerRtl8195a(); // RTL8710AF = 2
#endif
if (pHalRuartAdapter->WordLen == RUART_WLS_8BITS) {
@@ -1248,7 +1248,7 @@ HalRuartMultiBlkDmaRecvRtl8195a(
}
/**
- * Stop non-blocking UART RX
+ * Stop non-blocking UART TX
*
*
* @return VOID
@@ -1283,7 +1283,7 @@ HalRuartStopRecvRtl8195a_Patch(
if (NULL != pUartGdmaConfig) {
PHAL_GDMA_ADAPTER pHalGdmaAdapter;
PHAL_GDMA_OP pHalGdmaOp;
- u8 IsrTypeMap;
+
pHalGdmaAdapter = (PHAL_GDMA_ADAPTER)pUartGdmaConfig->pRxHalGdmaAdapter;
pHalGdmaOp = (PHAL_GDMA_OP)pUartGdmaConfig->pHalGdmaOp;
@@ -1293,7 +1293,8 @@ HalRuartStopRecvRtl8195a_Patch(
// Clean Auto Reload Bit
pHalGdmaOp->HalGdmaChCleanAutoDst((VOID*)pHalGdmaAdapter);
// Clear Pending ISR
- IsrTypeMap = pHalGdmaOp->HalGdmaChIsrClean((VOID*)pHalGdmaAdapter);
+// u8 IsrTypeMap =
+ pHalGdmaOp->HalGdmaChIsrClean((VOID*)pHalGdmaAdapter);
pHalGdmaOp->HalGdmaChDis((VOID*)(pHalGdmaAdapter));
DMA_Dar = HalGdmaQueryDArRtl8195a((VOID*)pHalGdmaAdapter);
@@ -1358,7 +1359,7 @@ HalRuartStopSendRtl8195a_Patch(
if (NULL != pUartGdmaConfig) {
PHAL_GDMA_ADAPTER pHalGdmaAdapter;
PHAL_GDMA_OP pHalGdmaOp;
- u8 IsrTypeMap;
+
pHalGdmaAdapter = (PHAL_GDMA_ADAPTER)pUartGdmaConfig->pTxHalGdmaAdapter;
pHalGdmaOp = (PHAL_GDMA_OP)pUartGdmaConfig->pHalGdmaOp;
@@ -1368,7 +1369,8 @@ HalRuartStopSendRtl8195a_Patch(
// Clean Auto Reload Bit
pHalGdmaOp->HalGdmaChCleanAutoDst((VOID*)pHalGdmaAdapter);
// Clear Pending ISR
- IsrTypeMap = pHalGdmaOp->HalGdmaChIsrClean((VOID*)pHalGdmaAdapter);
+// u8 IsrTypeMap =
+ pHalGdmaOp->HalGdmaChIsrClean((VOID*)pHalGdmaAdapter);
pHalGdmaOp->HalGdmaChDis((VOID*)(pHalGdmaAdapter));
DMA_Sar = HalGdmaQuerySArRtl8195a((VOID*)pHalGdmaAdapter);
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/bitband_io.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/bitband_io.c
index 957fc2c..c39c5fd 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/bitband_io.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/bitband_io.c
@@ -1,54 +1,68 @@
-#include "PinNames.h"
#include "bitband_io.h"
+//#include "rtl8195a_gpio.h"
-volatile u8 * BitBandAddr(void *addr, u8 bit) {
- return (volatile u8 *)(BITBAND_ADDR((u32)addr, bit));
+#define BITBAND_ADDR(a,b) (0x02000000 + (a & 0xF0000000) + (a - (a & 0xF0000000)) * 32 + ((b) * 4)) // Convert address ?
+
+volatile uint8_t * BitBandAddr(void *addr, uint8_t bit) {
+ uint32_t ret = BITBAND_ADDR((u32)addr, bit);
+ return (volatile uint8_t *) ret;
}
-volatile u8 * BitBandPeriAddr(void *addr, u8 bit) {
- return (volatile u8 *)(BITBAND_PERI((u32)addr, bit));
+volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit) {
+ return (volatile uint8_t *)(BITBAND_PERI((u32)addr, bit));
}
-volatile u8 * GetOutPinBitBandAddr(PinName pin) {
- u32 paddr = NULL;
- u32 ippin = HAL_GPIO_GetIPPinName_8195a(pin);
- if(ippin != 0xff) {
+volatile uint8_t * GetOutPinBitBandAddr(PinName pin) {
+ volatile uint8_t * paddr = 0;
+ uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
+ if(ippin < 0xff) {
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_PORTB_DR * (ippin >> 5)), ippin & 0x1f);
}
return paddr;
}
-volatile u8 * GetInPinBitBandAddr(PinName pin) {
- volatile u8 * paddr = NULL;
- u32 ippin = HAL_GPIO_GetIPPinName_8195a(pin);
- if(ippin != 0xff) {
+volatile uint8_t * GetInPinBitBandAddr(PinName pin) {
+ volatile uint8_t * paddr = NULL;
+ uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
+ if(ippin < 0xff) {
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_EXT_PORTA + (ippin >> 5) * 4), ippin & 0x1f);
}
return paddr;
}
-volatile u8 * HardSetPin(PinName pin, PinDirection pdir, PinMode pmode, u8 val)
+extern _LONG_CALL_ u32 GPIO_FuncOn_8195a(VOID);
+extern void wait_us(int us);
+
+volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
{
- volatile u8 *paddr = NULL;
- u32 ippin = HAL_GPIO_GetIPPinName_8195a(pin);
- if(ippin != 0xff) {
+ volatile uint8_t *paddr = NULL;
+ uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
+ if(ippin < 0xff) {
+ if(_pHAL_Gpio_Adapter == NULL) {
+ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
+ _pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter;
+ }
+ if(_pHAL_Gpio_Adapter->Gpio_Func_En == 0) GPIO_FuncOn_8195a();
+ wait_us(100);
+ // delayMicroseconds(100);
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
+#if CONFIG_DEBUG_LOG > 3
+ GpioFunctionChk(ippin, ENABLE);
+#endif
+ GPIO_PullCtrl_8195a(ippin, HAL_GPIO_HIGHZ); // Make the pin pull control default as High-Z
paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_PORTB_DR * (ippin >> 5)), ippin & 0x1f);
- }
- if(paddr && _pHAL_Gpio_Adapter) {
- if (_pHAL_Gpio_Adapter->Gpio_Func_En == 0) GPIO_FuncOn_8195a();
- paddr[0] = val; // data register
- paddr[(GPIO_PORTB_DDR - GPIO_PORTB_DR) * 32] = pdir; // data direction
-#if 1 // if use HAL_Gpio_Adapter
- uint32 * p = &_pHAL_Gpio_Adapter->Local_Gpio_Dir[ippin >> 5];
- if(pdir) *p |= 1 << (ippin & 0x1f);
- else *p &= ~(1 << (ippin & 0x1f));
-#endif
- paddr[(GPIO_PORTB_CTRL - GPIO_PORTB_DR) * 32] = 0; // data source control, we should keep it as default: data source from software
- HAL_GPIO_PullCtrl_8195a(pin, pmode); // set GPIO_PULL_CTRLx
+ *paddr = val; // data register
+ HAL_GPIO_PIN gpio;
+ gpio.pin_name = ippin;
+ gpio.pin_mode = pmode;
+ HAL_GPIO_Init_8195a(&gpio);
+ *paddr = val; // data register
+// paddr[(GPIO_PORTB_DDR - GPIO_PORTB_DR) * 32] = pmode == DOUT_PUSH_PULL; // data direction
+// GPIO_PullCtrl_8195a(ippin, pmode); // set GPIO_PULL_CTRLx
+// paddr[(GPIO_PORTB_CTRL - GPIO_PORTB_DR) * 32] = 0; // data source control, we should keep it as default: data source from software
}
return paddr;
}
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_adc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_adc.c
index fee78fe..a5c6abb 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_adc.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_adc.c
@@ -533,16 +533,16 @@ ADCISRHandle(
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
PHAL_ADC_INIT_DAT pHalADCInitDat = NULL;
PHAL_ADC_OP pHalADCOP = NULL;
- PSAL_ADC_USER_CB pSalADCUserCB = NULL;
- u8 ADCIrqIdx;
+// PSAL_ADC_USER_CB pSalADCUserCB = NULL;
+// u8 ADCIrqIdx;
/* To get the SAL_I2C_MNGT_ADPT pointer, and parse the rest pointers */
pSalADCHNDPriv = CONTAINER_OF(pSalADCHND, SAL_ADC_HND_PRIV, SalADCHndPriv);
pSalADCMngtAdpt = CONTAINER_OF(pSalADCHNDPriv->ppSalADCHnd, SAL_ADC_MNGT_ADPT, pSalHndPriv);
pHalADCInitDat = pSalADCMngtAdpt->pHalInitDat;
pHalADCOP = pSalADCMngtAdpt->pHalOp;
- ADCIrqIdx = pHalADCInitDat->ADCIdx;
- pSalADCUserCB = pSalADCHND->pUserCB;
+// ADCIrqIdx = pHalADCInitDat->ADCIdx;
+// pSalADCUserCB = pSalADCHND->pUserCB;
DBG_8195A_ADC_LVL(HAL_ADC_LVL,"ADC INTR STS:%x\n",pHalADCOP->HalADCReadReg(pHalADCInitDat, REG_ADC_INTR_STS));
#else
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_misc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_misc.c
index dc26766..ddd23d1 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_misc.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_misc.c
@@ -34,7 +34,7 @@ void HalReInitPlatformTimer(void)
TimerAdapter.IrqDis = 1;
TimerAdapter.TimerId = 1;
HalTimerOpInit_Patch(&HalTimerOp);
- HAL_TIMER_OP x;
+// HAL_TIMER_OP x;
HalTimerOp.HalTimerInit(&TimerAdapter);
HalTimerOp.HalTimerEn(1);
}
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
index 29a7c8a..1051f1d 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
@@ -150,11 +150,13 @@ unsigned int rand_x = 123456789;
*/
#ifdef CONFIG_SDR_EN
+#ifndef __GNUC__
//#pragma arm section code = ".hal.sdrc.text"
#pragma arm section rodata = ".rodata.hal.sdrc"
//, rwdata = ".hal.sdrc.data"
//, zidata = ".hal.sdrc.bss"
//#pragma arm section bss = ".hal.sdrc.bss"
+#endif
#ifdef CONFIG_SDR_VERIFY
enum{
@@ -448,13 +450,10 @@ DramInit (
u32 CrTwr, DramMaxWr, DramWr;
u32 CrTrtw = 0, CrTrtwT = 0;
u32 DrmaPeriod;
- DRAM_TYPE DdrType;
+ DRAM_TYPE DdrType = DRAM_SDR;
DRAM_DQ_WIDTH DqWidth;
DRAM_COLADDR_WTH Page;
u32 DfiRate;
- volatile struct ms_rxi310_portmap *ms_ctrl_0_map;
- ms_ctrl_0_map = (struct ms_rxi310_portmap*) SDR_CTRL_BASE;
-// ms_ctrl_0_map = ms_ctrl_0_map;
DfiRate = 1 << (u32) (DramInfo->DfiRate);
DrmaPeriod = (DramInfo->DdrPeriodPs)*(DfiRate); // according DFI_RATE to setting
@@ -658,6 +657,9 @@ DramInit (
// enter mem_mode
HAL_SDR_WRITE32(REG_SDR_CSR,0x600);
#else
+ volatile struct ms_rxi310_portmap *ms_ctrl_0_map;
+ ms_ctrl_0_map = (struct ms_rxi310_portmap*) SDR_CTRL_BASE;
+// ms_ctrl_0_map = ms_ctrl_0_map;
// WRAP_MISC setting
ms_ctrl_0_map->misc = //0x12;
(
@@ -753,7 +755,8 @@ SdrCalibration(
DBG_8195A("%s()\n", __func__);
u32 RdPipe = 0, TapCnt = 0, Pass = 0, AvaWdsCnt = 0;
u32 RdPipeCounter, RecNum[2], RecRdPipe[2];//, AvaWds[2][REC_NUM];
- BOOL RdPipeFlag, PassFlag = 0, Result;
+ BOOL RdPipeFlag, Result;
+// BOOL PassFlag = 0;
u8 flashtype = 0;
flashtype = SpicInitParaAllClk[0][0].flashtype;
@@ -829,7 +832,7 @@ SdrCalibration(
#endif
RdPipeFlag = _FALSE;
- PassFlag = _FALSE;
+// PassFlag = _FALSE;
AvaWdsCnt = 0;
for(TapCnt=0; TapCnt < (MAX_TAP_DLY+1); TapCnt++) {
@@ -853,7 +856,7 @@ SdrCalibration(
#endif
Pass = MemTest(10000);
- PassFlag = _FALSE;
+// PassFlag = _FALSE;
if(Pass==_TRUE) { // PASS
@@ -876,7 +879,7 @@ SdrCalibration(
break;
}
- PassFlag = _TRUE;
+// PassFlag = _TRUE;
DBG_SDR_INFO("Verify Pass => RdPipe:%d; TapCnt: %d\n", RdPipe, TapCnt);
@@ -1044,7 +1047,7 @@ Sdr_Rand2(
}
*/
-
+extern __attribute__ ((long_call)) unsigned int Rand(void);
HAL_SDRC_TEXT_SECTION
s32
MemTest(
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
index cd42785..8949ea9 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
@@ -373,6 +373,7 @@ WakeFromSLPPG(
);
}
+// Предел 8355 ms!
VOID
DurationScaleAndPeriodOP(
IN u32 SDuration,
@@ -412,7 +413,7 @@ CLKCal(
u32 Rtemp = 0;
u32 RRTemp = 0;
- u32 x = (HAL_READ32(PERI_ON_BASE,REG_SYS_CLK_CTRL1) >> BIT_SHIFT_PESOC_OCP_CPU_CK_SEL) & BIT_MASK_PESOC_OCP_CPU_CK_SEL;
+ u32 x = (HAL_READ32(PERI_ON_BASE, REG_SYS_CLK_CTRL1) >> BIT_SHIFT_PESOC_OCP_CPU_CK_SEL) & BIT_MASK_PESOC_OCP_CPU_CK_SEL;
if( ClkSel ){
//a33_ck
@@ -432,7 +433,8 @@ CLKCal(
}
else {
//anack
- RRTemp = (((2133/Rtemp) >> x) - 1);
+//pvvx: eror RTL8710AF? RRTemp = (((2133/Rtemp) >> x) - 1);
+ RRTemp = (2133/Rtemp) - 1;
}
if ( x == 5 )
DiagPrintf("Using ana to cal is not allowed!\n");
@@ -516,7 +518,7 @@ SleepClkGatted(
//3 1.5 Enable low power mode
// 1.5.1 0x4000_0118[2] = 1 => for sleep mode
- Rtemp = 0x00000004;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000004;
+ Rtemp = BIT_SYSON_PM_CMD_SLP;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000004;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//3 1.6 Wait CHIP enter low power mode
@@ -535,7 +537,7 @@ VOID SleepPwrGatted(
u32 Rtemp = 0;
u32 ScaleTemp = 0;
u32 PeriodTemp = 0;
- u32 CalTemp = 0;
+// u32 CalTemp = 0;
//Backup CPU CLK
BackupCPUClk();
@@ -547,7 +549,7 @@ VOID SleepPwrGatted(
//3 1.1 Set TU timer timescale
//0x4000_0090[21:16] = 6'h1F
//0x4000_0090[15] = 1'b0 => Disable timer
- CalTemp = (CLKCal(ANACK) << 16);
+// CalTemp = (CLKCal(ANACK) << 16);
Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL)
& (~((BIT_MASK_SYS_DSTDY_TIM_SCAL << BIT_SHIFT_SYS_DSTDY_TIM_SCAL) | (BIT_MASK_SYS_ANACK_TU_TIME << BIT_SHIFT_SYS_ANACK_TU_TIME))))
| ScaleTemp;
@@ -580,7 +582,7 @@ VOID SleepPwrGatted(
//3 1.5 Enable low power mode
// 1.5.1 0x4000_0118[2] = 1 => for sleep mode
- Rtemp = 0x00000004;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000004;
+ Rtemp = BIT_SYSON_PM_CMD_SLP;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000004;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//3 1.6 Wait CHIP enter low power mode
@@ -602,7 +604,7 @@ DStandby(
u32 Rtemp = 0;
u32 ScaleTemp = 0;
u32 PeriodTemp = 0;
- u32 CalTemp = 0;
+// u32 CalTemp = 0;
//Backup CPU CLK
BackupCPUClk();
@@ -615,7 +617,7 @@ DStandby(
//3 1.1 Set TU timer timescale
//0x4000_0090[21:16] = 6'h1F
//0x4000_0090[15] = 1'b0 => Disable timer
- CalTemp = (CLKCal(ANACK) << 16);
+// CalTemp = (CLKCal(ANACK) << 16);
Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL)
& (~((BIT_MASK_SYS_DSTDY_TIM_SCAL << BIT_SHIFT_SYS_DSTDY_TIM_SCAL) | (BIT_MASK_SYS_ANACK_TU_TIME << BIT_SHIFT_SYS_ANACK_TU_TIME))))
| ScaleTemp;
@@ -648,7 +650,7 @@ DStandby(
//3 1.5 Enable low power mode
// [0x4000_0118[1] = 1 => for deep standby mode]
- Rtemp = 0x00000002;
+ Rtemp = BIT_SYSON_PM_CMD_DSTBY;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//3 1.6 Wait CHIP enter low power mode
@@ -672,8 +674,6 @@ DSleep(
//u32 PeriodTemp = 0;
u32 UTemp = 0;
u32 MaxTemp = 0;
-
- u32 Reada335 = 0;
//2 Deep Sleep mode:
//3 2.1 Set TU timer timescale
@@ -724,16 +724,15 @@ DSleep(
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_DSLP_TIM_CTRL, Rtemp);
HalDelayUs(1000);
- Reada335 = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_DSLP_TIM_CAL_CTRL);
#if CONFIG_DEBUG_LOG > 3
- DiagPrintf("a33 timer : 0x%x\n", Reada335);
+ DiagPrintf("a33 timer : 0x%x\n", HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_DSLP_TIM_CAL_CTRL));
#endif
HalDelayUs(8000);
//3 2.2.3
//2.3 Enable low power mode: 0x4000_0118[0] = 1'b1;
- Rtemp = 0x00000001;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
+ Rtemp = BIT_SYSON_PM_CMD_DSLP;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//2.4 Wait CHIP enter deep sleep mode
@@ -1418,6 +1417,9 @@ SetSYSTimer(
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL, Rtemp);
}
+/*
+ * SDuration < 8355 ms!
+ */
VOID
SleepCG(
IN u8 Option,
@@ -1446,7 +1448,8 @@ SleepCG(
Rtemp = 0x74003B00; //0x74003900;
}
else {
- Rtemp = 0x74000900;
+ Rtemp = 0x74000900; // BIT_SYSON_PMOPT_NORM_XTAL_EN | BIT_SYSON_PMOPT_NORM_SYSPLL_EN | BIT_SYSON_PMOPT_NORM_SYSCLK_SEL | BIT_SYSON_PMOPT_NORM_EN_PWM
+ // | BIT_SYSON_PMOPT_SLP_LPLDO_SEL | BIT_SYSON_PMOPT_SLP_EN_SOC
}
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_OPTION, Rtemp);
@@ -1465,49 +1468,49 @@ SleepCG(
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL, Rtemp);
//Enable wake event
- WakeEvent |= BIT0;
+ WakeEvent |= BIT0; // BIT_SYSON_WEVT_SYSTIM_MSK
}
if (Option & SLP_GTIMER) {
//Enable wake event
- WakeEvent |= BIT1;
+ WakeEvent |= BIT1; // BIT_SYSON_WEVT_GTIM_MSK
}
if (Option & SLP_GPIO) {
//Enable wake event
- WakeEvent |= BIT4;
+ WakeEvent |= BIT4; // BIT_SYSON_WEVT_GPIO_MSK
}
if (Option & SLP_WL) {
//Enable wake event
- WakeEvent |= BIT8;
+ WakeEvent |= BIT8; // BIT_SYSON_WEVT_WLAN_MSK
}
if (Option & SLP_NFC) {
//Enable wake event
- WakeEvent |= BIT28;
+ WakeEvent |= BIT28; // BIT_SYSON_WEVT_A33_MSK
}
if (Option & SLP_SDIO) {
//Enable wake event
- WakeEvent |= BIT14;
+ WakeEvent |= BIT14; // BIT_SYSON_WEVT_SDIO_MSK
}
if (Option & SLP_USB) {
//Enable wake event
- //WakeEvent |= BIT16;
+ //WakeEvent |= BIT16; // BIT_SYSON_WEVT_USB_MSK
}
if (Option & SLP_TIMER33) {
//Enable wake event
- WakeEvent |= BIT28;
+ WakeEvent |= BIT28; // BIT_SYSON_WEVT_A33_MSK
}
/*
while(1) {
@@ -1533,7 +1536,7 @@ SleepCG(
if (SDREn) SDRSleep();
#endif
- Rtemp = 0x00000004;
+ Rtemp = BIT_SYSON_PM_CMD_SLP;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//3 Wait CHIP enter low power mode
@@ -1565,7 +1568,7 @@ SleepPG(
//3 2 Configure power state option:
// 2.1 power mode option:
- Rtemp = 0x74000100;
+ Rtemp = 0x74000100; // BIT_SYSON_PMOPT_SLP_LPLDO_SEL
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_OPTION, Rtemp);
// 2.2 sleep power mode option1
@@ -1648,7 +1651,7 @@ SleepPG(
LDO25M_CTRL(OFF);
#endif
- Rtemp = 0x00000004;
+ Rtemp = BIT_SYSON_PM_CMD_SLP;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//3 Wait CHIP enter low power mode
@@ -1701,7 +1704,7 @@ DeepStandby(
//3 2 Configure power state option:
// 2.1 deep standby power mode option:
- Rtemp = 0x74000100;
+ Rtemp = 0x74000100; // BIT_SYSON_PMOPT_SLP_LPLDO_SEL
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_OPTION, Rtemp);
// 2.2 sleep power mode option1
@@ -1737,19 +1740,19 @@ DeepStandby(
if (Option & DSTBY_GPIO){
- if (GpioOption & BIT0) {
+ if (GpioOption & BIT0) { // PA_5
DSTBYGpioCtrl(BIT0, (GpioOption & BIT4));
}
- if (GpioOption & BIT1) {
+ if (GpioOption & BIT1) { // PC_7
DSTBYGpioCtrl(BIT1, (GpioOption & BIT5));
}
- if (GpioOption & BIT2) {
+ if (GpioOption & BIT2) { // PD_5
DSTBYGpioCtrl(BIT2, (GpioOption & BIT6));
}
- if (GpioOption & BIT3) {
+ if (GpioOption & BIT3) { // PE_3
DSTBYGpioCtrl(BIT3, (GpioOption & BIT7));
}
@@ -1773,10 +1776,10 @@ DeepStandby(
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_GPIO_SHTDN_CTRL, 0x0);
- Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_FUNC_EN) & 0xBFFFFFFF);
+ Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_FUNC_EN) & (~BIT_SYS_PWRON_TRAP_SHTDN_N)); // 0xBFFFFFFF, ~BIT(30)
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_FUNC_EN, Rtemp);
- Rtemp = 0x00000002;
+ Rtemp = BIT_SYSON_PM_CMD_DSTBY;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//3 Wait CHIP enter low power mode
@@ -1799,7 +1802,7 @@ DeepSleep(
u32 UTemp = 0;
u32 MaxTemp = 0;
-//??? HAL_WRITE32(0x60008000, 0x80006180, PS_MASK);
+ HAL_WRITE32(0x60008000, 0x80006180, PS_MASK);
//1.1.1 Enable REGU access interface 0x4000_0094[31] = 1
Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_DSLP_TIM_CTRL) | 0x80000000);
@@ -1885,7 +1888,7 @@ DeepSleep(
Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_FUNC_EN) & 0xBFFFFFFF);
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_FUNC_EN, Rtemp);
- Rtemp = 0x00000001;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
+ Rtemp = BIT_SYSON_PM_CMD_DSLP;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//2.4 Wait CHIP enter deep sleep mode
@@ -1916,7 +1919,7 @@ DSleep_GPIO(
//2.2.2
//2.3 Enable low power mode: 0x4000_0118[0] = 1'b1;
- Rtemp = 0x00000001;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
+ Rtemp = BIT_SYSON_PM_CMD_DSLP;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//2.4 Wait CHIP enter deep sleep mode
@@ -1989,7 +1992,7 @@ DSleep_Timer(
//3 2.3
//2.3 Enable low power mode: 0x4000_0118[0] = 1'b1;
- Rtemp = 0x00000001;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
+ Rtemp = BIT_SYSON_PM_CMD_DSLP;//HAL_READ32(SYSTEM_CTRL_BASE, REG_SYSON_PWRMGT_CTRL) | 0x00000001;
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_PWRMGT_CTRL, Rtemp);
//2.4 Wait CHIP enter deep sleep mode
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_ssi.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_ssi.c
index 96c92f9..d7bb997 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_ssi.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_ssi.c
@@ -527,7 +527,7 @@ HalSsiInit(VOID *Data)
{
HAL_Status ret;
PHAL_SSI_ADAPTOR pHalSsiAdapter = (PHAL_SSI_ADAPTOR) Data;
- u32 Function;
+ u32 Function = SPI0;
u8 PinmuxSelect;
u8 Index;
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_uart.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_uart.c
index 2b3fe3c..8448b1c 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_uart.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_uart.c
@@ -1021,7 +1021,7 @@ HalRuartDmaSend(
u32 BlockSize;
HAL_Status ret;
PUART_DMA_CONFIG pUartGdmaConfig;
- PHAL_GDMA_ADAPTER pHalGdmaAdapter;
+// PHAL_GDMA_ADAPTER pHalGdmaAdapter;
if (((Length & 0x03)==0) &&
(((u32)(pTxBuf) & 0x03)==0)) {
@@ -1078,7 +1078,7 @@ HalRuartDmaRecv(
// u32 BlockSize;
HAL_Status ret;
PUART_DMA_CONFIG pUartGdmaConfig;
- PHAL_GDMA_ADAPTER pHalGdmaAdapter;
+// PHAL_GDMA_ADAPTER pHalGdmaAdapter;
if (Length < 4096) {
#if CONFIG_CHIP_E_CUT
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c
index 2c7c0db..ad6a631 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c
@@ -13,6 +13,7 @@
#include "rtl8195a.h"
#include "rtl_bios_data.h"
#include "osdep_api.h"
+#include "osdep_service.h"
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
#include "freertos_pmu.h"
#else
@@ -44,7 +45,7 @@ IN u8 EchoFlag);
//_LONG_CALL_ extern void UartLogCmdExecute(IN PUART_LOG_CTL pUartLogCtlExe);
//======================================================
extern PCOMMAND_TABLE UartLogRamCmdTable[];
-extern UartLogRamCmdTableSize;
+extern int UartLogRamCmdTableSize;
//======================================================
//: UartLogIrqHandleRam
//: To deal with Uart-Log RX IRQ
@@ -61,7 +62,7 @@ void UartLogIrqHandleRam(void * Data) {
if (UartReceiveData == 0) {
goto exit;
}
- PUART_LOG_CTL p = pUartLogCtl;
+ PUART_LOG_CTL p = (PUART_LOG_CTL) pUartLogCtl;
//KB_ESC chk is for cmd history, it's a special case here.
if (UartReceiveData == KB_ASCII_ESC) {
// Esc detection is only valid in the first stage of boot sequence (few seconds)
@@ -102,7 +103,7 @@ void UartLogIrqHandleRam(void * Data) {
if (p->pTmpLogBuf != NULL) {
p->ExecuteCmd = _TRUE;
if (p->TaskRdy) {
- RtlUpSemaFromISR((_Sema *) &pUartLogCtl->Sema);
+ rtw_up_sema_from_isr((_Sema *) &pUartLogCtl->Sema);
}
} else {
ArrayInitialize((u8 *) pUartLogCtl->pTmpLogBuf->UARTLogBuf,
@@ -130,7 +131,7 @@ int GetArgvRam(IN u8 *pstr, u8** argv) {
int arvc = 0;
// u8** argv = ArgvArray;
u8* p = pstr;
- u8 t, n = ' ';
+ u8 t = 0, n = ' ';
int m = 0;
while(*p != 0
&& *p != '\r'
@@ -200,7 +201,7 @@ int GetArgvRam(IN u8 *pstr, u8** argv) {
//:
//======================================================
MON_RAM_TEXT_SECTION void RtlConsolTaskRam(void *Data) {
- PUART_LOG_CTL p = pUartLogCtl;
+ PUART_LOG_CTL p = (PUART_LOG_CTL) pUartLogCtl;
#ifdef USE_ROM_CONSOLE // show Help
p->pTmpLogBuf->UARTLogBuf[0] = '?';
p->pTmpLogBuf->BufCount = 1;
@@ -208,7 +209,7 @@ MON_RAM_TEXT_SECTION void RtlConsolTaskRam(void *Data) {
#endif
do {
p->TaskRdy = _TRUE;
- RtlDownSema(&p->Sema);
+ rtw_down_sema(&p->Sema);
if (p->ExecuteCmd) {
// UartLogCmdExecute(pUartLogCtl);
int argc = GetArgvRam(p->pTmpLogBuf->UARTLogBuf, ArgvArray);
@@ -225,9 +226,9 @@ MON_RAM_TEXT_SECTION void RtlConsolTaskRam(void *Data) {
flg = 0;
if(pcmd->ArgvCnt < argc) {
#ifdef USE_ROM_CONSOLE
- pcmd->func(argc-1, &ArgvArray[1]);
+ pcmd->func(argc-1, (char **) &ArgvArray[1]);
#else
- pcmd->func(argc, &ArgvArray);
+ pcmd->func(argc, (char **) &ArgvArray);
#endif
} else {
#ifdef USE_ROM_CONSOLE
@@ -291,7 +292,7 @@ MON_RAM_TEXT_SECTION void console_init(void) {
#endif
pUartLogCtl->RevdNo = UART_LOG_HISTORY_LEN;
// Create a Semaphone
- RtlInitSema(&pUartLogCtl->Sema, 1);
+ rtw_init_sema((_sema *)&pUartLogCtl->Sema, 1);
// executing boot sequence
pUartLogCtl->ExecuteCmd = _FALSE;
pUartLogCtl->ExecuteEsc = _TRUE; //don't check Esc anymore
@@ -316,7 +317,7 @@ extern char str_rom_57ch3Dch0A[]; // "==========================================
_WEAK void console_help(int argc, char *argv[]) { // Help
DiagPrintf("CONSOLE COMMAND SET:\n");
DiagPrintf(&str_rom_57ch3Dch0A[25]); // DiagPrintf("==============================\n");
- PCOMMAND_TABLE pcmdtab = UartLogRamCmdTable;
+ PCOMMAND_TABLE pcmdtab = (PCOMMAND_TABLE) UartLogRamCmdTable;
while(pcmdtab->cmd) {
#ifdef USE_ROM_CONSOLE
DiagPrintf(pcmdtab->msg);
@@ -327,7 +328,8 @@ _WEAK void console_help(int argc, char *argv[]) { // Help
}
DiagPrintf(&str_rom_57ch3Dch0A[25]); // DiagPrintf("==============================\n");
}
-LOCAL void print_on(int argc, char *argv[])
+
+void print_on(int argc, char *argv[])
{
print_off = argv[1][0]!='1';
}
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rt_lib_rom.h b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rt_lib_rom.h
index 50cc4ee..b070303 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rt_lib_rom.h
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rt_lib_rom.h
@@ -105,6 +105,22 @@ extern _LONG_CALL_ double __rtl_dsub_v1_00(double a, double b);
extern _LONG_CALL_ double __rtl_dmul_v1_00(double a, double b);
extern _LONG_CALL_ double __rtl_ddiv_v1_00(double a, double b);
+// --- ???
+extern _LONG_CALL_ float __rtl_dtof_v1_00(double d);
+extern _LONG_CALL_ int __rtl_dtoui_v1_00(double d);
+extern _LONG_CALL_ float __rtl_itof_v1_00(int val);
+extern _LONG_CALL_ char *__rtl_ltoa_v1_00(int value, char *string, int radix);
+extern _LONG_CALL_ char *__rtl_ultoa_v1_00(unsigned int value, char *string, int radix);
+extern _LONG_CALL_ int __rtl_ftol_v1_00(float f);
+extern _LONG_CALL_ int __rtl_ftod_v1_00(float f);
+extern _LONG_CALL_ float __rtl_fadd_v1_00(float a, float b);
+extern _LONG_CALL_ float __rtl_fsub_v1_00(float a, float b);
+extern _LONG_CALL_ float __rtl_fmul_v1_00(float a, float b);
+extern _LONG_CALL_ float __rtl_fdiv_v1_00(float a, float b);
+extern _LONG_CALL_ int __rtl_dcmple_v1_00(double a, double b);
+extern _LONG_CALL_ int __rtl_fcmplt_v1_00(float a, float b);
+extern _LONG_CALL_ int __rtl_fcmpgt_v1_00(float a, float b);
+// --- ???
//
// mprec
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c
index 4ff3a67..de6857e 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c
@@ -22,7 +22,9 @@
#define strsep __rtl_strsep_v1_00
#define strtok __rtl_strtok_v1_00
-static char toupper(char ch) {
+extern int isdigit (int c);
+
+static int toupper(int ch) {
return ((ch >= 'a' && ch <= 'z') ? ch - 'a' + 'A' : ch);
};
@@ -371,7 +373,7 @@ llatob(u_quad_t *vp, char *p, int base)
char *
btoa(char *dst, u_int value, int base)
{
- char buf[34], digit;
+ char buf[34], digit = 0;
int i, j, rem, neg;
if (value == 0) {
@@ -417,7 +419,7 @@ btoa(char *dst, u_int value, int base)
char *
llbtoa(char *dst, u_quad_t value, int base)
{
- char buf[66], digit;
+ char buf[66], digit = 0;
int i, j, rem, neg;
if (value == 0) {
@@ -536,7 +538,7 @@ c_vsprintf (char *d, const char *s, va_list ap)
const char *t;
char *p, *dst, tmp[40];
unsigned int n;
- int fmt, trunc, haddot, width, base, longlong;
+ int fmt, trunc, haddot, width, base = 0, longlong;
double dbl;
#ifndef NEWFP
EP ex;
@@ -1072,11 +1074,14 @@ int c_printf(const char *fmt, ...)
#endif // ENAC_FLOAT
+extern _LONG_CALL_ROM_ void HalSerialPutcRtl8195a(char c);
+
int puts (const char *s)
{
while(*s) {
HalSerialPutcRtl8195a(*s++);
}
+ return 0; // -1 -> EOF
}
void vTaskDelete(void *);
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c
index 79739ac..ba95083 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c
@@ -170,7 +170,6 @@ int rtl_vprintf(const char *fmt, va_list param) {
int rtl_vsnprintf(char *str, size_t size, const char *fmt, va_list param) {
int result;
int w;
- int v11;
FILE f;
#if CHECK_LIBC_INIT
if (!libc_has_init) {
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c
index afe713a..40d3175 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c
@@ -122,6 +122,6 @@ void init_rom_libgloss_ram_map(void) {
rom_libgloss_ram_map.libgloss_open = ram_libgloss_open;
rom_libgloss_ram_map.libgloss_read = ram_libgloss_read;
rom_libgloss_ram_map.libgloss_write = ram_libgloss_write;
- rom_libgloss_ram_map.libgloss_sbrk = ram_libgloss_sbrk;
+ rom_libgloss_ram_map.libgloss_sbrk = (void*)ram_libgloss_sbrk;
}
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c
index 18233d6..85bfbf6 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c
@@ -67,9 +67,12 @@ unsigned long long __aeabi_llsr(unsigned long long val, unsigned int shift);
extern struct _reent * _rtl_impure_ptr;
+#if CHECK_LIBC_INIT
extern char libc_has_init;
+#endif
extern char print_off;
+#undef snprintf
//-------------------------------------------------------------------------
// Function
//----- snprintf()
@@ -107,7 +110,9 @@ int snprintf(char *str, size_t size, const char *fmt, ...) {
return result;
}
+
#ifndef ENAC_FLOAT
+#undef sprintf
//----- sprintf()
int sprintf(char *str, const char *fmt, ...) {
FILE f;
@@ -131,6 +136,7 @@ int sprintf(char *str, const char *fmt, ...) {
return result;
}
+#undef printf
//----- printf()
int printf(const char *fmt, ...) {
#if CHECK_LIBC_INIT
@@ -151,6 +157,7 @@ int printf(const char *fmt, ...) {
else return 0;
}
+#undef vprintf
//----- vprintf()
int vprintf(const char * fmt, __VALIST param) {
#if CHECK_LIBC_INIT
@@ -165,11 +172,11 @@ int vprintf(const char * fmt, __VALIST param) {
}
#endif // ENAC_FLOAT
+#undef vsnprintf
//----- vsnprintf()
int vsnprintf(char *str, size_t size, const char *fmt, __VALIST param) {
int result;
int w;
- int v11;
FILE f;
#if CHECK_LIBC_INIT
if (!libc_has_init) {
@@ -199,6 +206,7 @@ int vsnprintf(char *str, size_t size, const char *fmt, __VALIST param) {
return result;
}
+#undef vfprintf
//----- vfprintf()
int vfprintf(FILE *fp, const char *fmt0, va_list ap) {
#if CHECK_LIBC_INIT
@@ -209,86 +217,103 @@ int vfprintf(FILE *fp, const char *fmt0, va_list ap) {
return __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, fp, fmt0, ap);
}
+#undef memchr
//----- memchr()
void * memchr(const void * src_void , int c , size_t length) {
return __rtl_memchr_v1_00(src_void, c, length);
}
+#undef memcmp
//----- memcmp()
int memcmp(const void *m1, const void *m2, size_t n) {
return __rtl_memcmp_v1_00(m1, m2, n);
}
+#undef memcpy
//----- memcpy()
void * memcpy(void *dst0, const void *src0, size_t len0) {
return __rtl_memcpy_v1_00(dst0, src0, len0);
}
+#undef memmove
//----- memmove()
void * memmove(void *dst_void, const void *src_void, size_t length) {
return __rtl_memmove_v1_00(dst_void, src_void, length);
}
+#undef memset
//----- memset()
void * memset(void *m, int c, size_t n) {
return __rtl_memset_v1_00(m, c, n);
}
+#undef strcat
//----- strcat()
char * strcat(char *s1, const char *s2) {
return (char *) __rtl_strcat_v1_00(s1, s2);
}
-
+#undef strchr
//----- strchr()
char * strchr(const char *s1, int i) {
return (char *) __rtl_strchr_v1_00(s1, i);
}
+#undef strcmp
//----- strcmp()
int strcmp(const char *s1, const char *s2) {
return __rtl_strcmp_v1_00(s1, s2);
}
+#undef strcpy
//----- strcpy()
char * strcpy(char *dst0, const char *src0) {
return (char *) __rtl_strcpy_v1_00(dst0, src0);
}
+#undef strlen
//----- strlen()
size_t strlen(const char *str) {
return __rtl_strlen_v1_00(str);
}
+#undef strncat
//----- strncat()
char * strncat(char *s1, const char *s2, size_t n) {
return (char *) __rtl_strncat_v1_00(s1, s2, n);
}
+#undef strncmp
//----- strncmp()
int strncmp(const char *s1, const char *s2, size_t n) {
return __rtl_strncmp_v1_00(s1, s2, n);
}
+#undef strncpy
//----- strncpy()
char * strncpy(char *dst0, const char *src0, size_t count) {
return (char *) __rtl_strncpy_v1_00(dst0, src0, count);
}
+#undef strstr
//----- strstr()
char * strstr(const char *searchee, const char *lookfor) {
return (char *) __rtl_strstr_v1_00(searchee, lookfor);
}
+#undef strsep
//----- strsep()
char * strsep(char **source_ptr, const char *delim) {
return (char *) __rtl_strsep_v1_00(source_ptr, delim);
}
+#undef strtok
//----- strtok()
char * strtok(char *s, const char *delim) {
return (char *) __rtl_strtok_v1_00(s, delim);
}
+extern _LONG_CALL_ROM_ int _vsscanf(const char *buf, const char *fmt, va_list args);
+#undef sscanf
int sscanf(const char *buf, const char *fmt, ...) {
va_list args;
int i;
@@ -300,7 +325,7 @@ int sscanf(const char *buf, const char *fmt, ...) {
return i;
}
-char toupper(char ch) {
+int toupper(int ch) {
return ((ch >= 'a' && ch <= 'z') ? ch - 'a' + 'A' : ch);
};
@@ -366,7 +391,7 @@ void longjmp(__jmp_buf buf, long value)
extern __attribute__ ((long_call)) unsigned int Rand(void);
-unsigned int rand(void)
+int rand(void)
{
return Rand();
}
@@ -534,3 +559,8 @@ int __aeabi_fcmpgt(float a, float b)
{
return __rtl_fcmpgt_v1_00(a, b);
}
+
+extern _LONG_CALL_ void __aeabi_memset(void *dest, size_t n, int c); // { memset(dest, c, n); }
+
+void __aeabi_memclr(void *dest, size_t n) { __aeabi_memset(dest, n, 0); }
+void __aeabi_memclr4(void *dest, size_t n) { __aeabi_memset(dest, n, 0); }
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c
index 8f7589a..ed2a343 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c
@@ -4,6 +4,7 @@
*/
#include "basic_types.h"
+#include "rt_lib_rom.h"
//-------------------------------------------------------------------------
// Function declarations
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c
index 7fa3703..a82e96a 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c
@@ -20,25 +20,28 @@ float rtl_sin_f32(float a);
// int __rtl_cos_f32_v1_00();
// int __rtl_sin_f32_v1_00();
-
+extern _LONG_CALL_ float __rtl_fabsf_v1_00(float a);
//----- rtl_fabsf()
float rtl_fabsf(float a)
{
return __rtl_fabsf_v1_00(a);
}
+extern _LONG_CALL_ int __rtl_fabs_v1_00(double a);
//----- rtl_fabs()
int rtl_fabs(double a)
{
return __rtl_fabs_v1_00(a);
}
+extern _LONG_CALL_ float __rtl_cos_f32_v1_00(float a);
//----- rtl_cos_f32()
float rtl_cos_f32(float a)
{
return __rtl_cos_f32_v1_00(a);
}
+extern _LONG_CALL_ float __rtl_sin_f32_v1_00(float a);
//----- rtl_sin_f32()
float rtl_sin_f32(float a)
{
diff --git a/RTL00_SDKV35a/sdkset.mk b/RTL00_SDKV35a/sdkset.mk
index 6f9cda5..825a814 100644
--- a/RTL00_SDKV35a/sdkset.mk
+++ b/RTL00_SDKV35a/sdkset.mk
@@ -19,9 +19,11 @@
# FLAGS
# -------------------------------------------------------------------
CFLAGS = -DM3 -DCONFIG_PLATFORM_8195A -DGCC_ARMCM3 -DARDUINO_SDK -DF_CPU=166666666L -DNDEBUG
-CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -Os -std=gnu99 -Wall -Werror
+CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -Os -std=gnu99
CFLAGS += -fno-common -fmessage-length=0 -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-short-enums -fsigned-char
-CFLAGS += -w -Wno-pointer-sign
+CFLAGS += -Wall -Werror
+CFLAGS += -Wno-old-style-declaration -Wno-pointer-sign -Wno-strict-aliasing
+CFLAGS += -Wno-variadic-macros -Wno-empty-body
ifdef USE_GCC_LIB
LFLAGS = -mcpu=cortex-m3 -mthumb -g -Os -nostartfiles --specs=nano.specs
else
@@ -39,6 +41,10 @@ else
all: LIBS +=_platform_new _wlan _p2p _wps _websocket _sdcard _xmodem _mdns
mp: LIBS +=_platform_new _wlan_mp _wps _p2p _websocket _sdcard _xmodem _mdns
endif
+ifdef USE_UVC
+all: LIBS +=_rtsp _usbh
+mp: LIBS +=_rtsp _usbh
+endif
# m c nosys gcc
PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/gcc
LDFILE = rlx8195A-symbol-v04-img2.ld
@@ -81,11 +87,14 @@ INCLUDES += sdk/component/common/drivers/wlan/realtek/src/hal/OUTSRC
INCLUDES += sdk/component/common/drivers/sdio/realtek/sdio_host/inc
INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/wlan/realtek/wlan_ram_map/rom
INCLUDES += sdk/component/common/network/ssl/ssl_ram_map/rom
-#INCLUDES += sdk/component/common/media/codec
-#INCLUDES += sdk/component/common/drivers/usb_class/host/uvc/inc
-#INCLUDES += sdk/component/common/drivers/usb_class/device
-#INCLUDES += sdk/component/common/drivers/usb_class/device/class
-#INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include
+ifdef USE_UVC
+INCLUDES += sdk/component/common/media/codec
+INCLUDES += sdk/component/common/video/v4l2/inc
+INCLUDES += sdk/component/common/drivers/usb_class/host/uvc/inc
+INCLUDES += sdk/component/common/drivers/usb_class/device
+INCLUDES += sdk/component/common/drivers/usb_class/device/class
+INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include
+endif
# Source file list
# -------------------------------------------------------------------
diff --git a/build/bin/ota.bin b/build/bin/ota.bin
index 24cbae6..df810dc 100644
Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ
diff --git a/build/bin/ram_2.bin b/build/bin/ram_2.bin
index 1ad20e2..6c94e5f 100644
Binary files a/build/bin/ram_2.bin and b/build/bin/ram_2.bin differ
diff --git a/build/bin/ram_2.ns.bin b/build/bin/ram_2.ns.bin
index 18bf491..f15e377 100644
Binary files a/build/bin/ram_2.ns.bin and b/build/bin/ram_2.ns.bin differ
diff --git a/build/bin/ram_2.p.bin b/build/bin/ram_2.p.bin
index 58b86b7..0b0f2f6 100644
Binary files a/build/bin/ram_2.p.bin and b/build/bin/ram_2.p.bin differ
diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin
index 971374a..f49b20e 100644
Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ
diff --git a/build/obj/build.nmap b/build/obj/build.nmap
index 194faf6..68d5b24 100644
--- a/build/obj/build.nmap
+++ b/build/obj/build.nmap
@@ -811,2369 +811,2365 @@
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-10028628 T set_opmode
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-100288f6 T WMMOnAssocRsp
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-10028a88 T HTOnAssocRsp
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-10028f34 T update_tx_basic_rate
-10028f8c T check_assoc_AP
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-100290de T update_capinfo
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-1002b174 T DisableInterrupt8195a
-1002b18c T UpdateInterruptMask8195a
-1002b1ee T CheckRxTgRtl8195a
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-1002b598 T InterruptHandle8195a
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-1002b9ba T SetTxbdForLxDMARtl8195ab
-1002ba3a T UpdateTxbdHostIndex
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-1002c46c T HalCheckInReqStateThreadRtl8195a
-1002c4b8 T HalTDMAChangeStateThreadRtl8195a
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-1002d17a T _InitBurstPktLen_8195AB
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-1002d2b0 T Hal_GetChnlGroup8195A
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-1002d630 T Hal_EfuseParseEEPROMVer_8195A
-1002d646 T Hal_EfuseParsePackageType_8195A
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-1002d6e0 T Hal_EfuseParseCustomerID_8195A
-1002d6f6 T Hal_EfuseParseXtal_8195A
-1002d70e T Hal_EfuseParseThermalMeter_8195A
-1002d736 T Hal_ReadRFGainOffset
-1002d786 T BWMapping_8195A
-1002d7a6 T SCMapping_8195A
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-1002da9e T rtl8195a_fill_fake_txdesc
-1002db5c T SetHwReg8195A
-1002e81c T GetHwReg8195A
-1002e8b0 T SetHalDefVar8195A
-1002e990 T GetHalDefVar8195A
-1002e9b4 T PHY_QueryBBReg_8195A_Safe
-1002e9e0 T PHY_SetBBReg_8195A_Safe
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-1002ead8 T PHY_SetRFReg_8195A
-1002eb30 T PHY_MACConfig8195A
-1002eb4a T PHY_BBConfig8195A
-1002ec5a T PHY_RFConfig8195A
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-1002ed68 T phy_TxPwrAdjInPercentage
-1002eda8 T PHY_GetTxPowerIndex_8195A
-1002ee98 T PHY_SetTxPowerLevel8195A
-1002ee9e T phy_SpurCalibration_8195A
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-1002f194 T phy_PostSetBwMode8195A
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-1002f3e8 T PHY_HandleSwChnlAndSetBW8195A
-1002f498 T PHY_SetBWMode8195A
-1002f4ba T PHY_SwChnl8195A
-1002f4d4 T PHY_SetSwChnlBWMode8195A
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-1002f53c T GetMinRateInRRSR
-1002f570 T CheckInReqState
-1002f580 T InitCheckStateTimer
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-1002f644 T ChangeTransmiteRate
-1002f680 T PowerBitSetting
-1002f6fc T ChkandChangePS
-1002f760 T IssueRsvdPagePacketSetting
-1002f7d4 T IssuePSPoll
-1002f800 T WaitTxStateMachineOk
-1002f854 T IssueNullData
-1002f8e4 T PsCloseRF
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-1002f948 T ChkTxQueueIsEmpty
-1002f960 T InitPS
-1002f9d0 T ConfigListenBeaconPeriod
-1002f9f4 T PS_S2_Condition_Match
-1002fa28 T PS_S4_Condition_Match
-1002faa4 T PS_32K_Condition_Match
-1002fae0 T PS_S2ToS3ToS0State
-1002fb48 T PS_S2ToS0State
-1002fb64 T PS_S3ToS2orS0State
-1002fb94 T PS_S0ToS1ToS2State
-1002fbf0 T PS_S1ToS0orS2State
-1002fc20 T PS_S2ToS4State
-1002fc6c T PS_S0ToS6State
-1002fc8c T PS_S6ToS0State
-1002fca4 T CheckTSFIsStable
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-1002fe58 T SleepTo32K
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-100302e0 T TDMAChangeStateTask
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-10030fc0 T PHY_RF6052SetBandwidth8195A
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-10031920 T PHY_StoreTxPowerByRateNew
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-10031ab8 T PHY_GetRateIndexOfTxPowerByRate
-10031acc T PHY_GetTxPowerByRate
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-10031b78 T PHY_SetTxPowerByRate
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-10031cb4 T PHY_TxPowerByRateConfiguration
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-100323a6 T rtw_hal_write_bbreg
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-1003243c T rtw_hal_dm_watchdog
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-10032606 T rtw_reset_securitypriv
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-10033742 T indicate_wx_scan_result_present
-1003376a T indicate_wx_scan_complete_event
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-1003386e T rtw_indicate_wx_disassoc_event
-1003389e T rtw_set_wpa_ie
-100339b4 T strtopsk
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-10033a6c T rtw_wx_set_ap_essid
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-10033c64 T rf_reg_dump
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-10034420 T rtw_ex_get
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-10035648 T rtw_os_recv_resource_alloc
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-100356f4 T rtw_handle_tkip_mic_err
-1003579c T rtw_recv_indicatepkt
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-10035a08 T skb_fail_get_and_rst
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-10035a7c T init_skb_data_pool
-10035ad4 T alloc_skb
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-10035c40 T skb_put
-10035c74 T skb_reserve
-10035c82 T dev_alloc_skb
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-10035ca2 T skb_set_tail_pointer
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-10035cf6 T _rtw_open_pktfile
-10035d08 T _rtw_pktfile_read
-10035d36 T rtw_set_tx_chksum_offload
-10035d38 T rtw_os_xmit_resource_alloc
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-10035d44 T rtw_os_pkt_complete
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-10035d5e T rtw_os_xmit_schedule
-10035d9a T rtw_xmit_entry
-10035de6 T rtw_alloc_etherdev_with_old_priv
-10035dfc T rtw_alloc_etherdev
-10035e28 T rtw_free_netdev
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+1004c9fa d CSWTCH.39
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+1004ca30 D hci_ops
+1004ca55 V Array_MP_8195A_TXPWR_LMT
+1004cfc8 D xHeapRegions
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+1004cff8 D console_cmd_wifi_api
+1004d068 D console_commands_at
+1004d0d8 D console_commands
+1004d0f8 D UartLogRamCmdTable_end
+1004d0fc D __data_start__
+1004d0fc D oversampling
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+1004d104 D error_flag
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+1004d170 D tab_txt_rtw_secyrity
+1004d198 D wifi_ap_cfg
+1004d200 D wifi_ap_dhcp
+1004d210 D wifi_cfg
+1004d217 D wifi_st_cfg
+1004d288 D wifi_st_dhcp
+1004d298 D wlan_ap_name
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+1004d2a8 d iss.7965
+1004d2ac d tcp_port
+1004d2ae d udp_port
+1004d2b0 D lwip_host_name
+1004d2d0 d dhcp_recorded_xid
+1004d2d4 d dhcp_server_state_machine
+1004d2d8 d uxCriticalNesting
+1004d2dc d seed.12758
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+1004d300 d wakelock
+1004d304 d wakeup_event
+1004d308 D mlme_sta_tbl
+1004d378 d PMKID_KDE_TYPE.17744
+1004d380 V nr_xmitbuff
+1004d384 V nr_xmitframe
+1004d388 d P802_1H_OUI
+1004d38b D rtw_adaptivity_mode
+1004d38c D g_user_ap_sta_num
+1004d390 d rtw_private_handler
+1004d3d4 V max_local_skb_num
+1004d3d8 V max_skb_buf_num
+1004d3dc D rom_e_rtw_msgp_str_
+1004d5b8 D ARFB_table
+1004d5f7 D TRYING_NECESSARY_idx
+1004d60b D DROPING_NECESSARY
+1004d61f D PER_RATE_UP
+1004d633 D PER_RATE_DOWN
+1004d648 V Array_MP_8195A_PHY_REG_PG
+1004d6d8 D Array_MP_8195A_AGC_TAB
+1004d8e8 D Array_MP_8195A_PHY_REG
+1004df60 D rtl8195A_card_disable_flow
+1004e000 D rtl8195A_card_enable_flow
+1004e0a0 D Array_MP_8195A_MAC_REG
+1004e3a8 D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_TFBGA96_8195A
+1004e3c8 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_TFBGA96_8195A
+1004e3e8 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN48_8195A
+1004e406 D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN56_8195A
+1004e424 D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN48_8195A
+1004e442 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN56_8195A
+1004e460 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_TFBGA96_8195A
+1004e480 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN56_8195A
+1004e49e D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN48_8195A
+1004e4bc D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN56_8195A
+1004e4dc D Array_MP_8195A_RadioA
+1004eaa4 D gDeltaSwingTableXtal_MP_P_TxXtalTrack_8195A
+1004eac2 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_TFBGA96_8195A
+1004eae2 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN48_8195A
+1004eb00 D .ram.bss$$Base
+1004eb00 D __bss_start__
+1004eb00 D __data_end__
+1004eb00 D __ram_image2_text_end__
+1004eb00 d skbdata_list
+1004eb08 V skb_data_pool
+10051f08 D HalI2SOpSAL
+10051f44 d bufUnderrunCt
+10051f48 D mp3_serv
+10051fcc d oldRate
+10051fd0 D readBuf
+10051fd4 d sampCnt
+10051fd8 d sampCntAdd
+10051fd9 d sampDelCnt
+10051fda D tskmad_enable
+10051fdb D tskreader_enable
+10051fdc D pbuf_fifo
+10051fe0 D I2sTxSema
+10051fe4 D pi2s
+10051fec d join_user_data
+10051ff0 D rtw_join_status
+10051ff4 D scan_result_handler_ptr
+10052008 D wifi_mode
+1005200c d event_callback_list
+1005218c D paff_array
+10052204 D lwip_init_done
+10052208 D xnetif
+10052280 D wifi_autoreconnect
+10052288 D wifi_run_mode
+10052289 D wifi_st_status
+1005228a D wlan_st_netifn
+1005228c D web_scan_handler_ptr
+10052298 D h_errno
+1005229c d s_aliases.7583
+100522a0 d s_hostent.7582
+100522b4 d s_hostent_addr.7584
+100522b8 d s_phostent_addr.7585
+100522c0 d select_cb_ctr
+100522c4 d select_cb_list
+100522c8 d sockets
+10052388 d mbox
+1005238c d tcpip_init_done
+10052390 d tcpip_init_done_arg
+10052394 d allrouters
+10052398 d allsystems
+1005239c d igmp_group_list
+100523a0 D current_header
+100523a4 D current_iphdr_dest
+100523a8 D current_iphdr_src
+100523ac D current_netif
+100523b0 d ip_id
+100523b2 d str.6845
+100523c2 d ip_reass_pbufcount
+100523c4 d reassdatagrams
+100523c8 D dhcp_rx_options_given
+100523d4 D dhcp_rx_options_val
+100523fc d xid.7865
+10052400 d dns_payload
+10052404 d dns_payload_buffer
+10052608 d dns_pcb
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+10052610 d dns_servers
+10052618 d dns_table
+10052a78 d next_timeout
+10052a7c d tcpip_tcp_timer_active
+10052a80 D netif_default
+10052a84 D netif_list
+10052a88 d netif_num
+10052a89 D pbuf_free_ooseq_pending
+10052a8c d raw_pcbs
+10052a90 D tcp_active_pcbs
+10052a94 D tcp_active_pcbs_changed
+10052a98 D tcp_bound_pcbs
+10052a9c D tcp_listen_pcbs
+10052aa0 D tcp_ticks
+10052aa4 d tcp_timer
+10052aa5 d tcp_timer_ctr
+10052aa8 D tcp_tmp_pcb
+10052aac D tcp_tw_pcbs
+10052ab0 d ackno
+10052ab4 d flags
+10052ab8 d inseg
+10052acc d recv_data
+10052ad0 d recv_flags
+10052ad4 d seqno
+10052ad8 D tcp_input_pcb
+10052adc d tcphdr
+10052ae0 d tcplen
+10052ae4 D udp_pcbs
+10052ae8 d arp_table
+10052bb0 d etharp_cached_entry
+10052bb4 D lwip_tickless_used
+10052bb8 d s_nextthread
+10052bbc d s_timeoutlist
+10052bec d bound_client_ethernet_address
+10052bfc d client_request_ip
+10052c00 d dhcp_client_ethernet_address
+10052c10 d dhcp_message_repository
+10052c14 d dhcp_message_total_options_lenth
+10052c18 d dhcps_allocated_client_address
+10052c1c D dhcps_ip4addr_pool_end
+10052c1d D dhcps_ip4addr_pool_start
+10052c20 d dhcps_ip_table_semaphore
+10052c24 d dhcps_local_address
+10052c28 d dhcps_local_gateway
+10052c2c d dhcps_local_mask
+10052c30 d dhcps_netif
+10052c34 d dhcps_network_id
+10052c38 d dhcps_pcb
+10052c3c d dhcps_send_broadcast_address
+10052c40 d dhcps_subnet_broadcast
+10052c44 d ip_table
+10052c64 d ext_free
+10052c68 D ext_lower
+10052c6c D ext_upper
+10052c70 d pxEnd
+10052c74 d xFreeBytesRemaining
+10052c78 d xMinimumEverFreeBytesRemaining
+10052c7c d xStart
+10052c84 d ulStoppedTimerCompensation
+10052c88 d ulTimerCountsForOneTick
+10052c8c d xMaximumPossibleSuppressedTicks
+10052c90 D pxCurrentTCB
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+10052c9c d pxReadyTasksLists
+10052d78 d ulTaskSwitchedInTime
+10052d7c d uxCurrentNumberOfTasks
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+10052d84 d uxPendedTicks
+10052d88 d uxSchedulerSuspended
+10052d8c d uxTaskNumber
+10052d90 d uxTopReadyPriority
+10052d94 d xDelayedTaskList1
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+10052dbc d xIdleTaskHandle
+10052dc0 d xNextTaskUnblockTime
+10052dc4 d xNumOfOverflows
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+10052ddc d xSchedulerRunning
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+10052df4 d xTasksWaitingTermination
+10052e08 d xTickCount
+10052e0c d xYieldPending
+10052e10 d pxCurrentTimerList
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+10052e18 d xActiveTimerList1
+10052e2c d xActiveTimerList2
+10052e40 d xLastTime.5386
+10052e44 d xTimerQueue
+10052e48 d xTimerTaskHandle
+10052e4c d device_mutex
+10052e58 d mutex_init
+10052e5c d uxSavedInterruptStatus
+10052e60 D min_free_heap_size
+10052e64 d g_heap_inited
+10052e68 D g_tcm_heap
+10052e6c d tcm_lock
+10052e70 D flashobj
+10052e7c D fspic_isinit
+10052e80 D WDGAdapter
+10052ebc d hold_wakelock_time
+10052f3c d last_acquire_wakelock_time
+10052fbc D missing_tick
+10052fc0 D post_sleep_callback
+10053040 D pre_sleep_callback
+100530c0 D reserve_pll
+100530c4 d sys_sleep_time
+100530c8 D Timer2To7HandlerData
+100530e0 D PwrAdapter
+1005336c D SYSAdapte
+1005336d D libc_has_init
+1005336e D print_off
+10053370 d rheap_end
+10053380 d g_rtl_cipherEngine
+10053880 d init_status.9288
+10053884 D auto_reconnect_running
+10053888 D p_wlan_autoreconnect_hdl
+1005388c D mac_monitor_callback
+10053890 D mf_list_head
+10053894 d pscan_retry_cnt.21430
+10053898 D promisc_callback_all
+1005389c D promisc_sema
+100538a0 D promisc_callback
+100538a4 D psk_essid
+100538ec D psk_passphrase
+1005396e D psk_passphrase64
+100539af D wpa_global_PSK
+100539ff d RFC1042_OUI
+10053a04 d rx_ring_pool
+10055ae4 d stop_report_count.20629
+10055ae5 D bCheckStateTIMER
+10055ae8 d WifiMcuCmdBitMap.20974
+10055aec D p_wlan_init_done_callback
+10055af0 D rtw_power_percentage_idx
+10055af4 D p_wlan_uart_adapter_callback
+10055af8 D rtw_adaptivity_en
+10055afc D p_wlan_mgmt_filter
+10055b00 D rtw_initmac
+10055b04 D rtw_adaptivity_th_l2h_ini
+10055b08 d drvpriv
+10055b1c D skbbuf_used_num
+10055b20 V skb_pool
+10055cd8 D skbdata_used_num
+10055cdc d wrapper_skbbuf_list
+10055ce4 D max_skbdata_used_num
+10055ce8 D max_skbbuf_used_num
+10055cec d skb_fail_count
+10055cf0 D timer_table
+10055cf8 D rltk_wlan_info
+10055d28 d timer_used_num
+10055d2c D max_timer_used_num
+10055d30 D Noisy_State
+10055d34 D pExportWlanIrqSemaphore
+10055d38 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A
+10055d56 D .ram.bss$$Limit
+10055d56 D __bss_end__
+10055d58 B __ram_heap2_start__
10070000 A __ram_heap2_end__
1fff0000 D __ram_tcm_start__
1fff0000 D __tcm_heap_start__
diff --git a/project/inc/FreeRTOSConfig.h b/project/inc/FreeRTOSConfig.h
index 08007b8..d5d86d9 100644
--- a/project/inc/FreeRTOSConfig.h
+++ b/project/inc/FreeRTOSConfig.h
@@ -85,18 +85,14 @@ extern uint32_t SystemCoreClock;
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
-#define configUSE_STACK_TCM_HEAP 1 // RTL871xAx/RTL8195Ax Stack priority used TCM HEAP
+#define configUSE_STACK_TCM_HEAP 5 // RTL871xAx/RTL8195Ax Stack priority used TCM HEAP
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ( ( uint32_t ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 )
-#ifdef CONFIG_UVC
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 110 * 1024 ) ) // use HEAP5
-#else
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 90 * 1024 ) ) // use HEAP5
-#endif
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 90 * 1024 ) ) // use HEAP5
#define configMAX_TASK_NAME_LEN ( 10 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
@@ -112,10 +108,11 @@ extern uint32_t SystemCoreClock;
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_ALTERNATIVE_API 0
-#define configCHECK_FOR_STACK_OVERFLOW 2
+#define configCHECK_FOR_STACK_OVERFLOW 0
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configGENERATE_RUN_TIME_STATS 1
+
#if configGENERATE_RUN_TIME_STATS
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() //( ulHighFrequencyTimerTicks = 0UL )
@@ -137,8 +134,8 @@ extern uint32_t SystemCoreClock;
#if (__IASMARM__ != 1)
-extern void freertos_pre_sleep_processing(unsigned int *expected_idle_time);
-extern void freertos_post_sleep_processing(unsigned int *expected_idle_time);
+extern void freertos_pre_sleep_processing(uint32_t *expected_idle_time);
+extern void freertos_post_sleep_processing(uint32_t *expected_idle_time);
extern int freertos_ready_to_sleep();
/* Enable tickless power saving. */
@@ -164,7 +161,7 @@ extern int freertos_ready_to_sleep();
#define traceLOW_POWER_IDLE_END(); } while (0);
/* It's FreeRTOS related feature but it's not included in FreeRTOS design. */
-#define configUSE_WAKELOCK_PMU 1
+#define configUSE_WAKELOCK_PMU 1
#endif // #if (__IASMARM__ != 1)
@@ -210,4 +207,6 @@ See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
//#define RTK_MODE_TIMER
+#define INCLUDE_uxTaskGetStackHighWaterMark 1
+
#endif /* FREERTOS_CONFIG_H */
diff --git a/project/inc/feep_config.h b/project/inc/feep_config.h
index bd7d8bc..34930e5 100644
--- a/project/inc/feep_config.h
+++ b/project/inc/feep_config.h
@@ -8,8 +8,8 @@
#ifndef _INC_FEEP_CONFIG_H_
#define _INC_FEEP_CONFIG_H_
-#define FEEP_ID_WIFI_CFG 0x5730 // id:'0W', type: struct wlan_fast_reconnect
-#define FEEP_ID_WIFI_AP_CFG 0x5731 // id:'1W', type: struct rtw_wifi_config_t
+//#define FEEP_ID_WIFI_CFG 0x5730 // id:'0W', type: struct wlan_fast_reconnect
+//#define FEEP_ID_WIFI_AP_CFG 0x5731 // id:'1W', type: struct rtw_wifi_config_t
#define FEEP_ID_UART_CFG 0x5530 // id:'0U', type: UART_LOG_CONF
#define FEEP_ID_LWIP_CFG 0x4C30 // id:'0L', type: struct atcmd_lwip_conf
#define FEEP_ID_DHCP_CFG 0x4430 // id:'0D', type: struct
diff --git a/project/inc/lwipopts.h b/project/inc/lwipopts.h
index d78f067..7babf72 100644
--- a/project/inc/lwipopts.h
+++ b/project/inc/lwipopts.h
@@ -167,6 +167,7 @@ a lot of data that needs to be copied, this should be set high. */
* LWIP_AUTOIP==1: Enable AUTOIP module.
*/
#define LWIP_AUTOIP 0 //Realtek modified (0->1)
+
/* ---------- DHCP options ---------- */
/* Define LWIP_DHCP to 1 if you want DHCP configuration of
interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
@@ -184,6 +185,7 @@ a lot of data that needs to be copied, this should be set high. */
/* Support Multicast */
#define LWIP_IGMP 1
+
extern __attribute__ ((long_call)) unsigned int Rand(void);
#define LWIP_RAND() Rand()
diff --git a/project/inc/mad/config.h b/project/inc/mad/config.h
index e583e82..05a483d 100644
--- a/project/inc/mad/config.h
+++ b/project/inc/mad/config.h
@@ -8,7 +8,9 @@
/* #undef EXPERIMENTAL */
/* Define to disable debugging assertions. */
+#ifndef NDEBUG
#define NDEBUG
+#endif
/* Define to optimize for accuracy over speed. */
/* #undef OPT_ACCURACY */
diff --git a/project/inc/mad/frame.h b/project/inc/mad/frame.h
index 17b1b68..ac3a159 100644
--- a/project/inc/mad/frame.h
+++ b/project/inc/mad/frame.h
@@ -74,8 +74,8 @@ struct mad_frame {
mad_fixed_t (*overlap)[2][32][18]; /* Layer III block overlap data */
};
-# define MAD_NCHANNELS(header) ((header)->mode ? 2 : 1)
-# define MAD_NSBSAMPLES(header) \
+#define MAD_NCHANNELS(header) ((header)->mode ? 2 : 1)
+#define MAD_NSBSAMPLES(header) \
((header)->layer == MAD_LAYER_I ? 12 : \
(((header)->layer == MAD_LAYER_III && \
((header)->flags & MAD_FLAG_LSF_EXT)) ? 18 : 36))
diff --git a/project/inc/mad/mad.h b/project/inc/mad/mad.h
index ae6383b..1f01af8 100644
--- a/project/inc/mad/mad.h
+++ b/project/inc/mad/mad.h
@@ -718,7 +718,7 @@ struct mad_stream {
enum mad_error error; /* error code (see above) */
};
-enum {
+enum _MAD_OPTION{
MAD_OPTION_IGNORECRC = 0x0001, /* ignore CRC errors */
MAD_OPTION_HALFSAMPLERATE = 0x0002 /* generate PCM at 1/2 sample rate */
# if 0 /* not yet implemented */
diff --git a/project/inc/mad/stream.h b/project/inc/mad/stream.h
index 67ef5ab..4cc420e 100644
--- a/project/inc/mad/stream.h
+++ b/project/inc/mad/stream.h
@@ -83,7 +83,7 @@ struct mad_stream {
enum mad_error error; /* error code (see above) */
};
-enum {
+enum e_MAD_OPTION_{
MAD_OPTION_IGNORECRC = 0x0001, /* ignore CRC errors */
MAD_OPTION_HALFSAMPLERATE = 0x0002 /* generate PCM at 1/2 sample rate */
# if 0 /* not yet implemented */
diff --git a/project/inc/platform_autoconf.h b/project/inc/platform_autoconf.h
index 5802c64..3be5470 100644
--- a/project/inc/platform_autoconf.h
+++ b/project/inc/platform_autoconf.h
@@ -1,5 +1,5 @@
/*
- *
+ * Automatically generated by make menuconfig: don't edit
*/
#define AUTOCONF_INCLUDED
@@ -12,10 +12,11 @@
/*
* Target Platform Selection
*/
-#define CONFIG_WITHOUT_MONITOR 1
#define CONFIG_USE_TCM_HEAP 1
#define configUSE_STACK_TCM_HEAP 5 // min priority use tcm ?
+#define CONFIG_WITHOUT_MONITOR 1
+
#undef CONFIG_RTL8195A
#define CONFIG_RTL8195A 1
#undef CONFIG_FPGA
@@ -134,8 +135,8 @@
#define CONFIG_CRYPTO_NORMAL 1
#undef CONFIG_CRYPTO_TEST
#define CONFIG_CRYPTO_MODULE 1
-#define CONFIG_CRYPTO_STARTUP 0
-#define CONFIG_MII_EN 1
+#define CONFIG_CRYPTO_STARTUP 1
+#define CONFIG_MII_EN 0 //1
#define CONFIG_PWM_EN 1
#define CONFIG_PWM_NORMAL 1
#undef CONFIG_PWM_TEST
@@ -155,7 +156,7 @@
#undef CONFIG_SPIC_TEST
#define CONFIG_SPIC_MODULE 1
#define CONFIG_ADC_EN 1
-//#define CONFIG_DAC_EN 1
+#define CONFIG_DAC_EN 1
#define CONFIG_NOR_FLASH 1
#undef CONFIG_SPI_FLASH
#undef CONFIG_NAND_FLASH
diff --git a/project/inc/platform_opts.h b/project/inc/platform_opts.h
index 7e6c7cb..39e871b 100644
--- a/project/inc/platform_opts.h
+++ b/project/inc/platform_opts.h
@@ -8,7 +8,7 @@
#define __PLATFORM_OPTS_H__
/*For MP mode setting*/
-#define SUPPORT_MP_MODE 1
+#define SUPPORT_MP_MODE 0
/**
* For AT cmd Log service configurations
@@ -39,7 +39,7 @@
* For FreeRTOS tickless configurations
*/
#define FREERTOS_PMU_TICKLESS_PLL_RESERVED 0 // In sleep mode, 0: close PLL clock, 1: reserve PLL clock
-#define FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM 1 // In sleep mode, 1: suspend SDRAM, 0: no act
+#define FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM 0 // In sleep mode, 1: suspend SDRAM, 0: no act
/******************************************************************************/
@@ -53,6 +53,7 @@
/**
* For Wlan configurations
*/
+
#define CONFIG_WLAN 1
#if CONFIG_WLAN
#define CONFIG_LWIP_LAYER 1
@@ -86,7 +87,7 @@
#endif
/* For Simple Link */
-#define CONFIG_INCLUDE_SIMPLE_CONFIG 1
+#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
/*For wowlan service settings*/
#define CONFIG_WOWLAN_SERVICE 0
@@ -157,4 +158,15 @@
#define USE_FLASH_EEP 1
#define CONFIG_WLAN_CONNECT_CB 1
+//#define CONFIG_FATFS_EN 1 // FatFs & SD
+#ifdef CONFIG_FATFS_EN
+// fatfs version
+#define FATFS_R_10C
+// fatfs disk interface
+#define FATFS_DISK_USB 0
+#define FATFS_DISK_SD 1
+#undef CONFIG_SDIO_HOST_EN
+#define CONFIG_SDIO_HOST_EN 1
#endif
+
+#endif //__PLATFORM_OPTS_H__
diff --git a/project/inc/rtl8195a/esp_comp.h b/project/inc/rtl8195a/esp_comp.h
deleted file mode 100644
index 41446c4..0000000
--- a/project/inc/rtl8195a/esp_comp.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
-*
-*
-*/
-#ifndef _INCLUDE_ESP_COMP_H_
-#define _INCLUDE_ESP_COMP_H_
-
-#include "platform_autoconf.h"
-
-#define ICACHE_FLASH_ATTR
-#define ICACHE_RODATA_ATTR
-#define DATA_IRAM_ATTR
-
-#define os_printf(...) rtl_printf(__VA_ARGS__)
-#define os_printf_plus(...) rtl_printf(__VA_ARGS__)
-#define os_sprintf_fd(...) rtl_sprintf(__VA_ARGS__)
-#define ets_sprintf(...) rtl_sprintf(__VA_ARGS__)
-/*
-#define os_malloc pvPortMalloc
-#define os_zalloc pvPortZalloc
-#define os_calloc pvPortCalloc
-#define os_realloc pvPortRealloc
-*/
-#undef os_free
-#define os_free vPortFree
-#define system_get_free_heap_size xPortGetFreeHeapSize
-#undef os_realloc
-#define os_realloc pvPortReAlloc
-
-
-#define os_bzero rtl_bzero
-#define os_delay_us wait_us // HalDelayUs
-//#define os_install_putc1 rtl_install_putc1
-//#define os_install_putc2 rtl_install_putc2
-//#define os_intr_lock rtl_intr_lock
-//#define os_intr_unlock rtl_intr_unlock
-//#define os_isr_attach rtl_isr_attach
-//#define os_isr_mask rtl_isr_mask
-//#define os_isr_unmask rtl_isr_unmask
-#define os_memcmp rtl_memcmp
-#define os_memcpy rtl_memcpy
-#define ets_memcpy rtl_memcpy
-#define os_memmove rtl_memmove
-#define os_memset rtl_memset
-#define os_putc rtl_putc
-//#define os_str2macaddr rtl_str2macaddr
-//#define os_strcat strcat
-#define os_strchr rtl_strchr
-#define os_strrchr rtl_strrchr
-#define os_strcmp rtl_strcmp
-#define os_strcpy rtl_strcpy
-#define os_strlen rtl_strlen
-#define os_strncmp rtl_strncmp
-#define os_strncpy rtl_strncpy
-#define os_strstr rtl_strstr
-#define os_random Rand
-//extern uint32 phy_get_rand(void);
-#define system_get_os_print() 1
-
-#ifdef USE_US_TIMER
-#define os_timer_arm_us(a, b, c) rtl_timer_arm_new(a, b, c)
-#endif
-
-
-//#define os_timer_arm(a, b, c) rtl_timer_arm_new(a, b, c)
-//#define os_timer_disarm rtl_timer_disarm
-//#define os_timer_init rtl_timer_init
-//#define os_timer_setfn rtl_timer_setfn
-
-//#define os_timer_done rtl_timer_done
-//#define os_timer_handler_isr rtl_timer_handler_isr
-
-//#define os_update_cpu_frequency rtl_update_cpu_frequency
-
-//#define os_sprintf ets_sprintf
-
-#define spi_flash_real_size() (1<<(flashobj.SpicInitPara.id[2]-1))
-
-
-
-#define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0])
-#define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1])
-#define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2])
-#define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3])
-/* These are cast to u16_t, with the intent that they are often arguments
- * to printf using the U16_F format from cc.h. */
-#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr))
-#define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr))
-#define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr))
-#define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr))
-
-#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \
- ip4_addr2_16(ipaddr), \
- ip4_addr3_16(ipaddr), \
- ip4_addr4_16(ipaddr)
-
-#define IPSTR "%d.%d.%d.%d"
-
-/* CONFIG_DEBUG_LOG:
-=0 Off all diag/debug msg,
-=1 Only errors,
-=2 errors + warning, (default)
-=3 errors + warning + info,
-=4 errors + warning + info + debug,
-=5 full */
-#if CONFIG_DEBUG_LOG > 3
-#define DEBUGSOO (CONFIG_DEBUG_LOG - 1)
-#elif CONFIG_DEBUG_LOG > 1
-#define DEBUGSOO 2
-#else
-#define DEBUGSOO CONFIG_DEBUG_LOG
-#endif
-
-#endif // _INCLUDE_ESP_COMP_H_
diff --git a/project/inc/rtl8195a/rtl_libc.h b/project/inc/rtl8195a/rtl_libc.h
index 15733fc..40a9699 100644
--- a/project/inc/rtl8195a/rtl_libc.h
+++ b/project/inc/rtl8195a/rtl_libc.h
@@ -5,9 +5,9 @@
#ifndef _INC_RTL_LIBC_
#define _INC_RTL_LIBC_
-//#undef malloc
+#undef malloc
#define malloc(size) pvPortMalloc(size)
-//#undef free
+#undef free
#define free(pbuf) vPortFree(pbuf)
#define atoi(str) prvAtoi(str)
diff --git a/project/inc/wifi_user_set.h b/project/inc/wifi_user_set.h
index 3b1b854..ca7c2e4 100644
--- a/project/inc/wifi_user_set.h
+++ b/project/inc/wifi_user_set.h
@@ -15,7 +15,7 @@
#define DEF_WIFI_COUNTRY RTW_COUNTRY_RU // Регион использования WiFi...
#define DEF_WIFI_TX_PWR RTW_TX_PWR_PERCENTAGE_25 // RTW_TX_PWR_PERCENTAGE_75 // RTW_TX_PWR_PERCENTAGE_100
#define DEF_WIFI_BGN RTW_NETWORK_BGN // rtw_network_mode_t
-#define DEF_WIFI_ADAPTIVITY RTW_ADAPTIVITY_NORMAL // RTW_ADAPTIVITY_DISABLE/RTW_ADAPTIVITY_NORMAL/RTW_ADAPTIVITY_CARRIER_SENSE
+#define DEF_WIFI_ADAPTIVITY RTW_ADAPTIVITY_DISABLE // RTW_ADAPTIVITY_NORMAL // RTW_ADAPTIVITY_DISABLE/RTW_ADAPTIVITY_NORMAL/RTW_ADAPTIVITY_CARRIER_SENSE
/* Опции загрузки конфигов по старту */
//#define DEF_LOAD_CFG 0 // старт в назначенном режиме по умолчанию
@@ -33,7 +33,7 @@
RTW_SECURITY_WPA_TKIP_PSK - WPA Security
RTW_SECURITY_WPA2_AES_PSK - WPA2 Security using AES cipher
RTW_SECURITY_WPA2_MIXED_PSK - WPA2 Security using AES and/or TKIP ciphers */
-#define DEF_AP_SECURITY RTW_SECURITY_WPA2_AES_PSK // WEP security is NOT IMPLEMENTED. It is NOT SECURE!
+#define DEF_AP_SECURITY RTW_ENCRYPTION_WPA2_MIXED // WEP security is NOT IMPLEMENTED. It is NOT SECURE!
#define DEF_AP_BEACON 100 // 100...6000 ms
#define DEF_AP_CHANNEL 1 // 1..14
#define DEF_AP_CHANNEL 1 // 1..14
@@ -47,7 +47,7 @@
//==== Interface 1 - wlan1 = STA ==========
#define DEF_ST_SSID "HOMEAP" // Имя SSID AP (роутера) для присоединения по умолчанию (первый старт)
#define DEF_ST_PASSWORD "0123456789" // Пароль AP (роутера) для присоединения по умолчанию (первый старт)
-#define DEF_ST_SECURITY RTW_SECURITY_WPA_WPA2_MIXED // Тип Security
+#define DEF_ST_SECURITY RTW_ENCRYPTION_WPA2_MIXED // Тип Security
#define DEF_ST_BSSID { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } // If bssid set is not ff.ff.ff.ff.ff.ff,
#define DEF_ST_USE_BSSID 0 // station will connect to the router with both ssid[] and bssid[] matched.
#define DEF_ST_CHANNEL 1 // 1..14
diff --git a/project/src/driver/i2s_freertos.c b/project/src/driver/i2s_freertos.c
index 1c7cf68..9cf6107 100644
--- a/project/src/driver/i2s_freertos.c
+++ b/project/src/driver/i2s_freertos.c
@@ -32,6 +32,8 @@ speed.
#include "osdep_api.h"
#include "i2s_api.h"
#include "driver/i2s_freertos.h"
+#include "rtl_lib.h"
+#include "rtl8195a/rtl_libc.h"
#define USE_RTL_I2S_API 0 // speed
@@ -103,7 +105,7 @@ int i2sInit(int mask, int bufsize, int word_len) { // word_len = WL_16b or WL_24
DBG_8195A("I2S%d: Not heap buffer %d bytes!\n", i, sizeof(i2s_t) + page_size * I2S_DMA_PAGE_NUM);
return 0;
}
- rtl_memset(pi2s_new, 0, sizeof(i2s_t));
+ memset(pi2s_new, 0, sizeof(i2s_t));
u8 * i2s_tx_buf = (u8 *) pvPortMalloc(page_size * I2S_DMA_PAGE_NUM);
if (i2s_tx_buf == NULL) {
vPortFree(pi2s_new);
@@ -135,12 +137,13 @@ int i2sInit(int mask, int bufsize, int word_len) { // word_len = WL_16b or WL_24
else i2s_init(pi2s_obj, I2S1_SCLK_PIN, I2S1_WS_PIN, I2S1_SD_PIN);
i2s_set_param(pi2s_obj, pi2s_obj->channel_num, pi2s_obj->sampling_rate, pi2s_obj->word_length);
i2s_set_dma_buffer(pi2s_obj, i2s_tx_buf, NULL, I2S_DMA_PAGE_NUM, page_size);
- i2s_tx_irq_handler(pi2s_obj, i2s_test_tx_complete, (uint32_t)pi2s_obj);
+ i2s_tx_irq_handler(pi2s_obj, (i2s_irq_handler)i2s_test_tx_complete, (uint32_t)pi2s_obj);
// i2s_rx_irq_handler(pi2s_obj, (i == 0)? (i2s_irq_handler)i2s1_test_rx_complete : (i2s_irq_handler)i2s2_test_rx_complete, i); // TX only!
i2s_enable(pi2s_obj);
DBG_8195A("I2S%d: Alloc DMA buf %d bytes (%d x %d samples %d bits)\n", i, page_size * I2S_DMA_PAGE_NUM, I2S_DMA_PAGE_NUM, bufsize, (word_len == WL_16b)? 32 : 96);
}
}
+ return 1;
}
//Set the I2S sample rate, in HZ
@@ -265,6 +268,7 @@ u32 i2sPushPWMSamples(u32 sample) {
}
}
portEXIT_CRITICAL();
+ return sample;
}
#endif
diff --git a/project/src/mad/synth.c b/project/src/mad/synth.c
index 0a6b294..5450f9a 100644
--- a/project/src/mad/synth.c
+++ b/project/src/mad/synth.c
@@ -19,16 +19,16 @@
* $Id: synth.c,v 1.25 2004/01/23 09:41:33 rob Exp $
*/
-# ifdef HAVE_CONFIG_H
-# include "config.h"
-# endif
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
-# include "global.h"
+#include "global.h"
-# include "fixed.h"
-# include "frame.h"
-# include "synth.h"
-# include "string.h"
+#include "fixed.h"
+#include "frame.h"
+#include "synth.h"
+#include "string.h"
// #define SAVED_SAMPLE_BUFF_LEN 240000
// unsigned int saved_idx = 0;
@@ -582,6 +582,7 @@ void synth_full(struct mad_synth *, struct mad_frame const *,
* NAME: synth->full()
* DESCRIPTION: perform full frequency PCM synthesis
*/
+extern void render_sample_block(short int *short_sample_buff, int no_samples);
static
void synth_full(struct mad_synth *synth, struct mad_frame const *frame,
unsigned int nch, unsigned int ns)
@@ -608,7 +609,7 @@ void synth_full(struct mad_synth *synth, struct mad_frame const *frame,
for (ch = 0; ch < nch; ++ch)
{
- sbsample = &frame->sbsample[ch];
+ sbsample = (void *)&frame->sbsample[ch];
filter = &synth->filter[ch];
pcm1 = short_sample_buff[ch];
@@ -732,7 +733,7 @@ void synth_full(struct mad_synth *synth, struct mad_frame const *frame,
/* Render di un blocco */
if(nch < 2) memcpy(short_sample_buff[1], short_sample_buff[0], sizeof(short_sample_buff[0]));
- render_sample_block(short_sample_buff, sizeof(short_sample_buff[0])/sizeof(short int));
+ render_sample_block((short int *) short_sample_buff, sizeof(short_sample_buff[0])/sizeof(short int));
phase = (phase + 1) % 16;
@@ -745,11 +746,12 @@ void synth_full(struct mad_synth *synth, struct mad_frame const *frame,
* DESCRIPTION: perform half frequency PCM synthesis
*/
static
-void synth_half(struct mad_synth *synth, struct mad_frame const *frame,
+void synth_half(struct mad_synth *synth, struct mad_frame *frame,
unsigned int nch, unsigned int ns)
{
unsigned int phase, ch, s, sb, pe, po;
- short int *pcm1, *pcm1v, *pcm2v;
+// short int *pcm1;
+ short int *pcm1v, *pcm2v;
mad_fixed_t (*filter)[2][2][16][8];
mad_fixed_t (*sbsample)[36][32];
register mad_fixed_t (*fe)[8], (*fx)[8], (*fo)[8];
@@ -772,7 +774,8 @@ void synth_half(struct mad_synth *synth, struct mad_frame const *frame,
{
sbsample = &frame->sbsample[ch];
filter = &synth->filter[ch];
- pcm1 = pcm1v = short_sample_buff;
+// pcm1 =
+ pcm1v = (short int *)short_sample_buff;
dct32((*sbsample)[s], phase >> 1,
(*filter)[0][phase & 1], (*filter)[1][phase & 1]);
@@ -894,14 +897,15 @@ void synth_half(struct mad_synth *synth, struct mad_frame const *frame,
/* Render di un blocco */
if(nch < 2) memcpy(short_sample_buff[1], short_sample_buff[0], sizeof(short_sample_buff[0]));
- render_sample_block(short_sample_buff, sizeof(short_sample_buff[0])/sizeof(short int));
+ render_sample_block((short int *)short_sample_buff, sizeof(short_sample_buff[0])/sizeof(short int));
- pcm1 = pcm1v + 8;
+// pcm1 = pcm1v + 8;
phase = (phase + 1) % 16;
} /* for di blocco */
}
+extern void set_dac_sample_rate(int rate, int chls);
/*
* NAME: synth->frame()
* DESCRIPTION: perform PCM synthesis of frame subband samples
@@ -925,7 +929,7 @@ void mad_synth_frame(struct mad_synth *synth, struct mad_frame const *frame)
if (frame->options & MAD_OPTION_HALFSAMPLERATE) {
synth->pcm.samplerate /= 2;
synth->pcm.length /= 2;
- synth_frame = synth_half;
+ synth_frame = (void *)synth_half;
}
set_dac_sample_rate(synth->pcm.samplerate, nch);
diff --git a/project/src/user/atcmd_user.c b/project/src/user/atcmd_user.c
index 36ec730..4947368 100644
--- a/project/src/user/atcmd_user.c
+++ b/project/src/user/atcmd_user.c
@@ -41,7 +41,7 @@ LOCAL void fATST(int argc, char *argv[]) {
#if 0 //CONFIG_DEBUG_LOG > 1
dump_mem_block_list();
tcm_heap_dump();
-#endif;
+#endif
printf("\n");
#if (configGENERATE_RUN_TIME_STATS == 1)
char *cBuffer = pvPortMalloc(512);
@@ -132,7 +132,7 @@ void dump_bytes(uint32 addr, int size)
while (size) {
if (symbs_line > size) symbs_line = size;
printf("%08X ", addr);
- copy_align4_to_align1(buf, addr, symbs_line);
+ copy_align4_to_align1(buf, (void *)addr, symbs_line);
print_hex_dump(buf, symbs_line, ' ');
int i;
for(i = 0 ; i < symbs_line ; i++) {
@@ -151,6 +151,7 @@ void dump_bytes(uint32 addr, int size)
//------------------------------------------------------------------------------
// Dump byte register
//------------------------------------------------------------------------------
+extern _LONG_CALL_ u32 Strtoul(IN const u8 *nptr, IN u8 **endptr, IN u32 base);
LOCAL void fATSB(int argc, char *argv[])
{
int size = 16;
diff --git a/project/src/user/main.c b/project/src/user/main.c
index 8bb4740..a82f503 100644
--- a/project/src/user/main.c
+++ b/project/src/user/main.c
@@ -3,13 +3,16 @@
* FileName: user_main.c
*
*******************************************************************************/
+
+#include "platform_autoconf.h"
+#include "autoconf.h"
#include "rtl8195a/rtl_common.h"
#include "rtl8195a.h"
#include "hal_log_uart.h"
#include "FreeRTOS.h"
#include "task.h"
-//#include "diag.h"
+#include "diag.h"
#include "osdep_service.h"
#include "device_lock.h"
#include "semphr.h"
@@ -33,6 +36,7 @@
#include "user/playerconfig.h"
#include "user/atcmd_user.h"
#include "main.h"
+#include "flash_eep.h"
#include "wifi_api.h"
#include "rtl8195a/rtl_libc.h"
@@ -88,7 +92,7 @@ LOCAL int mp3_cfg_read(void)
// Called by the NXP modifications of libmad. It passes us (for the mono synth)
// 32 16-bit samples.
-void render_sample_block(short *short_sample_buff, int no_samples) {
+void render_sample_block(short int *short_sample_buff, int no_samples) {
int i;
for (i = 0; i < no_samples; i++) {
int x = oversampling;
@@ -122,6 +126,8 @@ void set_dac_sample_rate(int rate, int chls) {
oversampling = i2sSetRate(-1, rate);
}
+extern int RamFifoLen(void);
+
static enum mad_flow input(struct mad_stream *stream) {
int n, i;
int rem; //, fifoLen;
@@ -203,9 +209,9 @@ LOCAL void tskmad(void *pvParameters) {
sizeof(struct mad_stream) + sizeof(struct mad_frame) + sizeof(struct mad_synth) + READBUFSZ,
mad_bufs);
#endif
- struct mad_stream *stream = mad_bufs;
- struct mad_frame *frame = &mad_bufs[sizeof(struct mad_stream)];
- struct mad_synth *synth = &mad_bufs[sizeof(struct mad_stream)
+ struct mad_stream *stream = (struct mad_stream *)mad_bufs;
+ struct mad_frame *frame = (struct mad_frame *) &mad_bufs[sizeof(struct mad_stream)];
+ struct mad_synth *synth = (struct mad_synth *) &mad_bufs[sizeof(struct mad_stream)
+ sizeof(struct mad_frame)];
readBuf = &mad_bufs[sizeof(struct mad_stream) + sizeof(struct mad_frame)
+ sizeof(struct mad_synth)];
@@ -374,6 +380,8 @@ LOCAL int http_head_read(unsigned char *buf, int len, int ff) {
return ret;
}
+extern void RamFifoClose(void);
+
//Reader task. This will try to read data from a TCP socket into the SPI fifo buffer.
LOCAL void tskreader(void *pvParameters) {
char wbuf[SOCK_READ_BUF];
@@ -503,6 +511,8 @@ void connect_start(void) {
#endif
}
+extern int tcm_heap_freeSpace(void);
+extern void console_init(void);
/* RAM/TCM/Heaps info */
void ShowMemInfo(void)
{
@@ -525,13 +535,15 @@ LOCAL void user_init_thrd(void) {
vTaskDelete(NULL);
}
+extern void WDGStart(void);
+extern int rtl_cryptoEngine_init(void);
/**
* @brief Main program.
* @param None
* @retval None
*/
-void main(void)
+int main(void)
{
#if DEBUG_MAIN_LEVEL > 3
ConfigDebugErr = -1;
@@ -560,7 +572,7 @@ void main(void)
#endif
/* wlan & user_start intialization */
- xTaskCreate(user_init_thrd, "user_init", 1024, NULL, tskIDLE_PRIORITY + 0 + PRIORITIE_OFFSET, NULL);
+ xTaskCreate((TaskFunction_t) user_init_thrd, "user_init", 1024, NULL, tskIDLE_PRIORITY + 0 + PRIORITIE_OFFSET, NULL);
/*Enable Schedule, Start Kernel*/
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
@@ -600,7 +612,7 @@ LOCAL void fATWS(int argc, char *argv[]){
}
else if(argv[1][0] == 'S') { // strcmp(argv[1], "save") == 0
printf("%s: %s,%d\n", argv[0], mp3_serv.url, mp3_serv.port);
- if(flash_write_cfg(&mp3_serv, ID_FEEP_MP3, strlen(mp3_serv.port) + strlen(mp3_serv.url)))
+ if(flash_write_cfg(&mp3_serv, ID_FEEP_MP3, sizeof(mp3_serv.port) + strlen((const char *)mp3_serv.url)))
printf("ATWS: saved\n", mp3_serv.url, mp3_serv.port);
return;
}
diff --git a/project/src/user/wifi_console.c b/project/src/user/wifi_console.c
index 8a77947..83db493 100644
--- a/project/src/user/wifi_console.c
+++ b/project/src/user/wifi_console.c
@@ -7,16 +7,22 @@
#include
#include "FreeRTOS.h"
-#include "freertos_pmu.h"
#include "diag.h"
-#include "wifi_api.h"
-#include "wifi_conf.h"
-#include "rtl8195a/rtl_libc.h"
#include "hal_platform.h"
+#include "freertos_pmu.h"
#include "section_config.h"
#include "hal_diag.h"
#include "lwip/netif.h"
+#include "wifi_api.h"
+#include "wifi_conf.h"
+#include "rtl8195a/rtl_libc.h"
+
+
+#if CONFIG_WLAN_CONNECT_CB
+extern void connect_close(void);
+extern void connect_start(void);
+#endif
extern struct netif xnetif[NET_IF_NUM];
@@ -71,6 +77,7 @@ LOCAL void fATPN(int argc, char *argv[]){
else wifi_st_cfg.reconnect_pause = 5;
show_wifi_st_cfg();
#if CONFIG_WLAN_CONNECT_CB
+extern void connect_close(void);
connect_close();
#endif
wifi_run(wifi_run_mode | RTW_MODE_STA);
@@ -143,11 +150,13 @@ LOCAL void fATWR(int argc, char *argv[]){
#if CONFIG_WLAN_CONNECT_CB
// Close connections
LOCAL void fATOF(int argc, char *argv[]){
+ (void)argc; (void)argv;
connect_close();
}
// Open connections
LOCAL void fATON(int argc, char *argv[]){
+ (void)argc; (void)argv;
connect_start();
}
#endif
@@ -168,6 +177,8 @@ LOCAL void fATWI(int argc, char *argv[]) {
wifi_cfg.mode = atoi(argv[2]);
}
}
+#else
+ (void)argc; (void)argv;
#endif
rtw_wifi_setting_t Setting;
if((wifi_run_mode & RTW_MODE_AP)
@@ -191,12 +202,19 @@ LOCAL void fATWI(int argc, char *argv[]) {
printf("\nWIFI ST config:\n");
printf(&str_rom_57ch3Dch0A[25]); // "================================\n"
show_wifi_st_cfg();
+ printf("\nWIFI AP clients:\n");
+ printf(&str_rom_57ch3Dch0A[25]); // "================================\n"
+#if SDK_VER_NUM >= 0x4000
+ show_wifi_ap_clients();
+#endif
printf("\n");
}
extern uint8_t rtw_power_percentage_idx;
+extern int rltk_set_tx_power_percentage(rtw_tx_pwr_percentage_t power_percentage_idx);
-LOCAL void fATWT(int argc, char *argv[]) {
+void fATWT(int argc, char *argv[]) {
+ (void) argc; (void) argv;
if(argc > 1) {
int txpwr = atoi(argv[1]);
debug_printf("set tx power (%d)...\n", txpwr);
@@ -209,7 +227,10 @@ LOCAL void fATWT(int argc, char *argv[]) {
//-- Test tsf (64-bits counts, 1 us step) ---
-#include "hal_com_reg.h"
+//#include "hal_com_reg.h"
+#define WIFI_REG_BASE 0x40080000
+#define REG_TSFTR 0x0560
+#define REG_TSFTR1 0x0568 // HW Port 1 TSF Register
#define ReadTSF_Lo32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR)))
#define ReadTSF_Hi32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR1)))
@@ -219,13 +240,15 @@ LOCAL uint64_t get_tsf(void)
return *((uint64_t *)(WIFI_REG_BASE + REG_TSFTR));
}
-LOCAL void fATSF(int argc, char *argv[])
+void fATSF(int argc, char *argv[])
{
+ (void) argc; (void) argv;
uint64_t tsf = get_tsf();
printf("\nTSF: %08x%08x\n", (uint32_t)(tsf>>32), (uint32_t)(tsf));
}
-LOCAL void fATWP(int argc, char *argv[]) {
+void fATWP(int argc, char *argv[]) {
+ (void) argc; (void) argv;
int x = 0;
if(argc > 1) {
x = atoi(argv[1]);
@@ -244,9 +267,8 @@ LOCAL void fATWP(int argc, char *argv[]) {
printf("DTIM: %d\n", _wext_get_lps_dtim(0));
}
}
-
/* -------- WiFi Scan ------------------------------- */
-LOCAL void scan_result_handler(internal_scan_handler_t* ap_scan_result)
+LOCAL rtw_result_t scan_result_handler(internal_scan_handler_t* ap_scan_result)
{
if (ap_scan_result) {
if(ap_scan_result->scan_cnt) {
@@ -268,15 +290,16 @@ LOCAL void scan_result_handler(internal_scan_handler_t* ap_scan_result)
record->SSID.val[record->SSID.len] = '\0';
printf("%s\n", record->SSID.val);
}
-
}
} else {
printf("Scan networks: None!\n");
}
+ return RTW_SUCCESS;
}
/* -------- WiFi Scan ------------------------------- */
-LOCAL void fATSN(int argc, char *argv[])
+void fATSN(int argc, char *argv[])
{
+ (void) argc; (void) argv;
api_wifi_scan(scan_result_handler);
}
@@ -315,7 +338,7 @@ MON_RAM_TAB_SECTION COMMAND_TABLE console_cmd_wifi_api[] = {
{"P2P_DISCCONNECT", 0, cmd_p2p_disconnect, ": p2p disconnect"},
{"P2P_CONNECT", 0, cmd_p2p_connect, ": p2p connect"},
#endif
- {"ATWR", 0, fATWR, ": WIFI Connect, Disconnect"},
+ {"ATWR", 0, fATWR, "=[mode]: WIFI Mode: 0 - off, 1 - ST, 2 - AP, 3 - ST+AP"},
#if CONFIG_WLAN_CONNECT_CB
{"ATON", 0, fATON, ": Open connections"},
{"ATOFF", 0, fATOF, ": Close connections"},
@@ -323,7 +346,7 @@ MON_RAM_TAB_SECTION COMMAND_TABLE console_cmd_wifi_api[] = {
{"ATWI", 0, fATWI, ": WiFi Info"},
#if CONFIG_DEBUG_LOG > 3
{"ATWT", 1, fATWT, "=: WiFi tx power: 0 - 100%, 1 - 75%, 2 - 50%, 3 - 25%, 4 - 12.5%"},
- {"ATSF", 0, fATSF, ": Test TSF value"},
+ {"ATSF", 0, fATSF, ": Get TSF value"},
#endif
// {"ATWP", 0, fATWP, "=[dtim]: 0 - WiFi ipc/lpc off, 1..10 - on + dtim"},
{"ATSN", 0, fATSN, ": Scan networks"}
diff --git a/userset.mk b/userset.mk
index 1cecc52..74b87f9 100644
--- a/userset.mk
+++ b/userset.mk
@@ -1,8 +1,8 @@
#=============================================
# User defined
#=============================================
-#SDK_PATH ?= ../RTL00_WEB/USDK/
-SDK_PATH ?= RTL00_SDKV35a/
+#SDK_PATH = ../RTL00_WEB/USDK/
+SDK_PATH = RTL00_SDKV35a/
#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/6.2017-q1-update/bin/# + or set in PATH
#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/5.2_2015q4/bin/# + or set in PATH
#OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH