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pvvx 2016-12-05 11:48:41 +03:00
parent ad9b495d7e
commit 494a7e1b39
31 changed files with 391 additions and 851 deletions
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8
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sdio.h
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@ -346,7 +346,7 @@ typedef struct _SPDIO_AHB_DMA_CTRL {
#else
#if CONFIG_INIC_EN
//TX BD setting
#define SDIO_TX_BD_NUM 20 // Number of TX BD
#define SDIO_TX_BD_NUM 16 // Number of TX BD
#define SDIO_TX_BD_BUF_SIZE 1540 //1514+24
//#define SDIO_TX_PKT_NUM 1 // not used
@ -354,11 +354,11 @@ typedef struct _SPDIO_AHB_DMA_CTRL {
#define RX_BD_FREE_TH 5 // trigger the interrupt when free RX BD over this threshold
#define SDIO_RX_BD_BUF_SIZE 1540 //1514+24
#define MAX_RX_BD_BUF_SIZE 16380 // the Maximum size for a RX_BD point to, make it 4-bytes aligned
#define SDIO_RX_BD_NUM 32 // Number of RX BD, to make 32K of bus aggregation, it needs 22 RX_BD at least
#define SDIO_RX_PKT_NUM 128 // Number of RX packet handler
#define SDIO_RX_PKT_NUM 16 // Number of RX packet handler
#define MIN_RX_BD_SEND_PKT 2 /* the minum needed RX_BD to send a Packet to Host, we need 2:
one for RX_Desc, the other for payload */
#define SDIO_RX_BD_NUM (SDIO_RX_PKT_NUM*MIN_RX_BD_SEND_PKT) /*Number of RX BD,
to make 32K of bus aggregation, it needs 22 RX_BD at least*/
#else
#define SDIO_TX_BD_NUM 24 // Number of TX BD
#define SDIO_TX_BD_BUF_SIZE (2048+32) // the size of a TX BD pointed buffer, WLan header = 26 bytes

1
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/Descript.ion
View file

@ -2,5 +2,6 @@ hal_common.c +
hal_efuse.c +
hal_misc.c +
hal_pinmux.c +
hal_sdio_host.c +
hal_soc_ps_monitor.c +
hal_spi_flash_ram.c +-

10
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c
View file

@ -286,7 +286,7 @@ VOID HAL_FLASH_TEXT_SECTION SpicInitRefinedRtl8195A(IN u8 InitBaudRate, IN u8 Sp
TmpSpicInitPara.id[0] = SpicBitMode;
u32 CpuClkMode = (HAL_PERI_ON_READ32(REG_SYS_CLK_CTRL1)
>> BIT_SHIFT_PESOC_OCP_CPU_CK_SEL) & BIT_MASK_PESOC_OCP_CPU_CK_SEL; // v4 = (40000014 >> 4) & 7;
PSPIC_INIT_PARA pspicp = &SpicInitParaAllClk[CpuClkMode];
pspicp = &SpicInitParaAllClk[CpuClkMode];
if (!pspicp->Rsvd) {
SpicLoadInitParaFromClockRtl8195A(CpuClkMode, 1, &TmpSpicInitPara);
pspicp = &TmpSpicInitPara;
@ -313,14 +313,14 @@ VOID HAL_FLASH_TEXT_SECTION SpicInitRefinedRtl8195A(IN u8 InitBaudRate, IN u8 Sp
}
//----- SpicReadIDRtl8195A
//VOID HAL_FLASH_TEXT_SECTION SpicReadIDRtl8195A(VOID)
void SpicReadIDRtl8195A(SPIC_INIT_PARA SpicInitPara)
void HAL_FLASH_TEXT_SECTION SpicReadIDRtl8195A(VOID)
//void SpicReadIDRtl8195A(SPIC_INIT_PARA SpicInitPara)
{
u16 flash_type;
u8 flashtype;
u32 flash_id;
u32 flash_density;
SPIC_INIT_PARA spic_para = SpicInitPara;
SPIC_INIT_PARA spic_para;// = SpicInitPara;
// memset(&spic_para, 0, sizeof(not_used));
// spic_para = SpicInitPara;
DBG_SPIF_INFO("%s(0x%x)\n", "SpicReadIDRtl8195A", *((u32 *)spic_para));
@ -942,7 +942,7 @@ VOID SpicNVMCalLoad(u8 BitMode, u8 CpuClk)
if (BitMode == 166666666) {
40006120 |= 0x202u;
HAL_SPI_WRITE32(REG_SPIC_SSIENR, v4); // 40006008 = v4;
BitMode = SpicWaitBusyDoneRtl8195A(166666666);
SpicWaitBusyDoneRtl8195A();
}
}
v7 = *(u32 *) (8 * v2 - 0x67FF6F80);

BIN
RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_sdcard.a
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