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pvvx 2018-01-20 20:54:53 +03:00
parent 30b951832c
commit 39a516cd39
22 changed files with 98 additions and 3346 deletions
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17
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c
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@ -46,6 +46,12 @@ void SYSPlatformInit(void);
// Data declarations
extern u8 __bss_start__, __bss_end__;
extern const unsigned char cus_sig[32]; // images name
/*
#include "section_config.h"
SECTION(".custom.validate.rodata")
__attribute__ ((weak)) const unsigned char cus_sig[32] = "Customer Signature-modelxxx";
*/
//extern HAL_TIMER_OP HalTimerOp;
IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 =
@ -185,7 +191,12 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
_pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter;
VectorTableInitRtl8195A(STACK_TOP); // 0x1FFFFFFC
loguart_wait_tx_fifo_empty(); // иначе глючит LogUART, если переключение CLK приходится на вывод символов !
#if 1 // if set CLK CPU
uint8 ChipId = HalGetChipId();
#if 1 //def ARDUINO
// 0 - 166666666 Hz, 1 - 83333333 Hz
*((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3
HalCpuClkConfig(ChipId < CHIP_ID_8195AM);
#else // if set CLK CPU
if(HalGetCpuClk() != PLATFORM_CLOCK) {
//----- CLK CPU
#if CPU_CLOCK_SEL_DIV5_3
@ -198,7 +209,7 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
#endif // CPU_CLOCK_SEL_DIV5_3
};
#endif
#endif // ARDUINO
PSHalInitPlatformLogUart(); // HalInitPlatformLogUartV02(); // Show "<RTL8195A>"... :(
HalReInitPlatformTimer(); // HalInitPlatformTimerV02(); HalTimerOpInit_Patch((VOID*) (&HalTimerOp));
SystemCoreClockUpdate();
@ -226,7 +237,7 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
// SpicFlashInitRtl8195A(SpicDualBitMode); // SpicReadIDRtl8195A(); SpicDualBitMode
#ifdef CONFIG_SDR_EN
//---- SDRAM
uint8 ChipId = HalGetChipId();
// uint8 ChipId = HalGetChipId();
if (ChipId >= CHIP_ID_8195AM) {
if((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT(21)) == 0) { // SDR not init?
#ifdef FIX_SDR_CALIBRATION // for speed :)