j3d1/RTL00MP3
1
0
Fork 0
mirror of https://github.com/pvvx/RTL00MP3.git synced 2025-07-31 12:41:06 +00:00
Code Issues Projects Releases Packages Wiki Activity

update

Browse source
This commit is contained in:
pvvx 2017-04-07 17:47:33 +03:00
parent 0cf6a74c39
commit 020aedc9bb
114 changed files with 28699 additions and 2408 deletions
Download patch file Download diff file Expand all files Collapse all files

6
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_adc.h
View file

@ -39,7 +39,6 @@ typedef enum _ADC_DBG_LVL_ {
VERI_ADC_LVL = 0x04,
}ADC_DBG_LVL,*PADC_DBG_LVL;
#if CONFIG_DEBUG_LOG > 0
#ifdef CONFIG_DEBUG_LOG_ADC_HAL
#define DBG_8195A_ADC(...) do{ \
@ -58,7 +57,6 @@ typedef enum _ADC_DBG_LVL_ {
#define DBG_8195A_ADC(...)
#define DBG_8195A_ADC_LVL(...)
#endif
#endif
//================ ADC HAL Related Enumeration ==================
@ -292,8 +290,8 @@ RtkADCIdxChk(
#endif
#if !ADC3_USED
if (ADCIdx == ADC3_SEL)
return _EXIT_FAILURE;
if (ADCIdx == ADC3_SEL)
return _EXIT_FAILURE;
#endif
ADCIdx++; //for compile warning.
return _EXIT_SUCCESS;

1
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_log_uart.h
View file

@ -146,5 +146,6 @@ VOID HalLogUartAbortIntRecv(HAL_LOG_UART_ADAPTER *pUartAdapter);
HAL_Status HalLogUartRstFIFO(HAL_LOG_UART_ADAPTER *pUartAdapter, u8 RstCtrl);
VOID HalLogUartEnable(HAL_LOG_UART_ADAPTER *pUartAdapter);
VOID HalLogUartDisable(HAL_LOG_UART_ADAPTER *pUartAdapter);
VOID HalLogUartWaitTxFifoEmpty(VOID);
#endif

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
View file

@ -111,7 +111,7 @@ VOID _SsiWriteInterruptRtl8195a(VOID *Adapter)
if (pHalSsiAdapter->TxLength == 0) {
pHalSsiAdapter->InterruptMask &= ~(BIT_IMR_TXEIM);
HalSsiSetInterruptMaskRtl8195a((VOID*)pHalSsiAdapter);
for (i=0;i<1000000;i++) {
for (i=0;i<1000000;i++) {
bus_busy = HAL_SSI_READ32(Index, REG_DW_SSI_SR) & BIT_SR_BUSY;
if (!bus_busy) {
break; // break the for loop

52
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_adc.c
View file

@ -259,7 +259,8 @@ VOID HalADCOpInit(
// Author:
// By Jason Deng, 2014-04-02.
//
//---------------------------------------------------------------------------------------------------
//---------------------------------------------------------------------------------------------------
#define sizealign4(x) ((sizeof(x) + 3) & (~3))
PSAL_ADC_MNGT_ADPT
RtkADCGetMngtAdpt(
IN u8 ADCIdx
@ -269,6 +270,40 @@ RtkADCGetMngtAdpt(
/* If the kernel is available, Memory-allocation is used. */
#if (!ADC_STATIC_ALLOC)
#if 1 // pvvx
pSalADCMngtAdpt = (PSAL_ADC_MNGT_ADPT)RtlZmalloc(
sizealign4(SAL_ADC_MNGT_ADPT)
+ sizealign4(SAL_ADC_HND_PRIV)
+ sizealign4(HAL_ADC_INIT_DAT)
+ sizealign4(HAL_ADC_OP)
+ sizealign4(IRQ_HANDLE)
+ sizealign4(SAL_ADC_USER_CB)
+ sizealign4(HAL_GDMA_ADAPTER)
+ sizealign4(HAL_GDMA_OP)
+ sizealign4(IRQ_HANDLE)
+ (sizealign4(SAL_ADC_USERCB_ADPT)*SAL_ADC_USER_CB_NUM));
if(!pSalADCMngtAdpt) {
return pSalADCMngtAdpt;
};
unsigned char *ptr = (unsigned char *)pSalADCMngtAdpt + sizeof(SAL_ADC_MNGT_ADPT);
pSalADCMngtAdpt->pSalHndPriv = (PSAL_ADC_HND_PRIV)ptr;
ptr += sizealign4(SAL_ADC_HND_PRIV);
pSalADCMngtAdpt->pHalInitDat = (PHAL_ADC_INIT_DAT)ptr;
ptr += sizealign4(HAL_ADC_INIT_DAT);
pSalADCMngtAdpt->pHalOp = (PHAL_ADC_OP)ptr;
ptr += sizealign4(HAL_ADC_OP);
pSalADCMngtAdpt->pIrqHnd = (PIRQ_HANDLE)ptr;
ptr += sizealign4(IRQ_HANDLE);
pSalADCMngtAdpt->pUserCB = (PSAL_ADC_USER_CB)ptr;
ptr += sizealign4(SAL_ADC_USER_CB);
pSalADCMngtAdpt->pHalGdmaAdp = (PHAL_GDMA_ADAPTER)ptr;
ptr += sizealign4(HAL_GDMA_ADAPTER);
pSalADCMngtAdpt->pHalGdmaOp = (PHAL_GDMA_OP)ptr;
ptr += sizealign4(HAL_GDMA_OP);
pSalADCMngtAdpt->pIrqGdmaHnd = (PIRQ_HANDLE)ptr;
ptr += sizealign4(IRQ_HANDLE);
pSalADCUserCBAdpt = (PSAL_ADC_USERCB_ADPT)ptr;
#else
pSalADCMngtAdpt = (PSAL_ADC_MNGT_ADPT)RtlZmalloc(sizeof(SAL_ADC_MNGT_ADPT));
pSalADCMngtAdpt->pSalHndPriv = (PSAL_ADC_HND_PRIV)RtlZmalloc(sizeof(SAL_ADC_HND_PRIV));
pSalADCMngtAdpt->pHalInitDat = (PHAL_ADC_INIT_DAT)RtlZmalloc(sizeof(HAL_ADC_INIT_DAT));
@ -279,6 +314,7 @@ RtkADCGetMngtAdpt(
pSalADCMngtAdpt->pHalGdmaOp = (PHAL_GDMA_OP)RtlZmalloc(sizeof(HAL_GDMA_OP));
pSalADCMngtAdpt->pIrqGdmaHnd = (PIRQ_HANDLE)RtlZmalloc(sizeof(IRQ_HANDLE));
pSalADCUserCBAdpt = (PSAL_ADC_USERCB_ADPT)RtlZmalloc((sizeof(SAL_ADC_USERCB_ADPT)*SAL_ADC_USER_CB_NUM));
#endif
#else
switch (ADCIdx){
case ADC0_SEL:
@ -408,6 +444,19 @@ RtkADCFreeMngtAdpt(
IN PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt
){
#ifdef CONFIG_KERNEL
#if 1 // pvvx
RtlMfree((u8 *)pSalADCMngtAdpt,
sizealign4(SAL_ADC_MNGT_ADPT)
+ sizealign4(SAL_ADC_HND_PRIV)
+ sizealign4(HAL_ADC_INIT_DAT)
+ sizealign4(HAL_ADC_OP)
+ sizealign4(IRQ_HANDLE)
+ sizealign4(SAL_ADC_USER_CB)
+ sizealign4(HAL_GDMA_ADAPTER)
+ sizealign4(HAL_GDMA_OP)
+ sizealign4(IRQ_HANDLE)
+ (sizealign4(SAL_ADC_USERCB_ADPT)*SAL_ADC_USER_CB_NUM));
#else
RtlMfree((u8 *)pSalADCMngtAdpt->pUserCB->pTXCB, (sizeof(SAL_ADC_USERCB_ADPT)*SAL_ADC_USER_CB_NUM));
RtlMfree((u8 *)pSalADCMngtAdpt->pIrqGdmaHnd, sizeof(IRQ_HANDLE));
RtlMfree((u8 *)pSalADCMngtAdpt->pHalGdmaOp, sizeof(HAL_GDMA_OP));
@ -418,6 +467,7 @@ RtkADCFreeMngtAdpt(
RtlMfree((u8 *)pSalADCMngtAdpt->pHalInitDat, sizeof(HAL_ADC_INIT_DAT));
RtlMfree((u8 *)pSalADCMngtAdpt->pSalHndPriv, sizeof(SAL_ADC_HND_PRIV));
RtlMfree((u8 *)pSalADCMngtAdpt, sizeof(SAL_ADC_MNGT_ADPT));
#endif
#else
;
#endif

11
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_log_uart.c
View file

@ -50,6 +50,14 @@ extern VOID UartLogIrqHandleRam(VOID * Data);
// extern ConfigDebugInfo;
// extern UartLogIrqHandleRam;
//-------------------------------------------------------------------------
/*
* 16 bytes FIFO ... 16*11/38400 = 0.004583 sec
* (0.005/5)*166666666 = 166666.666
*/
VOID HalLogUartWaitTxFifoEmpty(VOID) {
int x = 16384;
while((!(HAL_READ8(LOG_UART_REG_BASE, 0x14) & BIT6)) && x--);
}
//----- HalLogUartIrqRxRdyHandle
void HalLogUartIrqRxRdyHandle(HAL_LOG_UART_ADAPTER *pUartAdapter) {
@ -427,8 +435,7 @@ void HalInitLogUart(void) {
//----- HalDeinitLogUart
void HalDeinitLogUart(void) {
while (!(HAL_UART_READ32(UART_LINE_STATUS_REG_OFF) & LSR_TEMT)) // 40003014 & 0x40
HalDelayUs(20);
HalLogUartWaitTxFifoEmpty();
HalPinCtrlRtl8195A(LOG_UART, 0, 0);
}

11
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
View file

@ -1520,7 +1520,7 @@ SleepCG(
//Enable wake event
WakeEvent |= BIT28;
}
/*
while(1) {
HalDelayUs(100);
@ -1530,7 +1530,8 @@ SleepCG(
break;
}
}
*/
HalLogUartWaitTxFifoEmpty();
//Set Event
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_SLP_WAKE_EVENT_MSK0, WakeEvent);
@ -1636,8 +1637,7 @@ SleepPG(
//Enable wake event
WakeEvent |= BIT28;
}
while(1) {
/* while(1) {
HalDelayUs(100);
@ -1645,7 +1645,8 @@ SleepPG(
break;
}
}
} */
HalLogUartWaitTxFifoEmpty();
//Set Event
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_SLP_WAKE_EVENT_MSK0, WakeEvent);