mirror of
https://github.com/pvvx/RTL00ConsoleROM.git
synced 2024-11-23 18:44:16 +00:00
119 lines
3.6 KiB
C
119 lines
3.6 KiB
C
/*
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* Test RTL Console ROM
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* pvvx 26.09.16
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*/
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//#include <stdint.h>
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#include <stdio.h>
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//#include "basic_types.h"
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//#include "cortex.h"
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#include "rtl8710.h"
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#include "rom_lib.h"
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#include "hal_pinmux.h"
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#include "hal_peri_on.h"
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//----------------------------------------------- Header
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#define HEAD_DATA_ATTR __attribute__((aligned(4), section(".header.data")))
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#define HEAD_CODE_ATTR __attribute__((aligned(4), section(".header.code")))
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#define FLASH_HEAD_ATTR __attribute__((aligned(4), section(".fheader.data")))
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typedef struct _Boot_Head {
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void * start_addr0; //+0x00 Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )
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void * start_addr1; //+0x04 Run if ( v40000210 & 0x20000000 )
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void * start_addr2; //+0x08 Run if ( v40000210 & 0x10000000 )
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void * start_addr3; //+0x0c Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 )
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void * start_addr4; //+0x10 for Init console, Run if ( v40000210 & 0x4000000 )
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u32 sign; //+0x14 = 0x88167923 // if != -> Image1 Validation Incorrect !!! Please Re-boot and try again, or re-burn the flash image
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u32 reserved; //+0x18 u32 0xFFFFFFFF,
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} BOOT_HEAD, *PBOOT_HEAD;
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typedef struct _Flash_Head {
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u32 SpicCalibrationPattern[4]; //+0x00 = { 0x96969999,0xFC66CC3F,0x03CC33C0,0x6231DCE5 };
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u32 Seg_size; //+0x10 in Bytes
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u32 Seg_load_addr; //+0x14
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u32 Image_2_Addr_1k; //+0x18 unit is 1024 bytes | 0xFFFF0000
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u32 Dummy; //+0x1C = 0xFFFFFFFF
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} FLASH_HEAD, *PFLASH_HEAD;
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void start_init(void);
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void start_init1(void);
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void start_init2(void);
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void start_init3(void);
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void start_init4(void);
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int main(int);
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BOOT_HEAD HEAD_DATA_ATTR boot_head = {
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start_init,
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start_init1,
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start_init2,
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start_init3,
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start_init4,
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0x88167923, 0xFFFFFFFF
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};
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// Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )
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void HEAD_CODE_ATTR start_init(void)
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{
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main(0);
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}
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// Run if ( v40000210 & 0x20000000 )
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void HEAD_CODE_ATTR start_init1(void)
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{
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main(1);
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}
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// Run if ( v40000210 & 0x10000000 )
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void HEAD_CODE_ATTR start_init2(void)
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{
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main(2);
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}
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// Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 )
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void HEAD_CODE_ATTR start_init3(void)
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{
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main(3);
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}
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// for Init console, Run if ( v40000210 & 0x4000000 )
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void HEAD_CODE_ATTR start_init4(void)
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{
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main(4);
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}
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//----------------------------------------------- Main
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extern volatile u32 ConfigDebugErr;
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extern volatile u8 * pUartLogCtl;
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extern int UartLogCmdExecute(volatile u8 *);
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extern u32 STACK_TOP;
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int main(int ini)
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{
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if(ini == 0) HalPinCtrlRtl8195A(JTAG, 0, 1);
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if((ini > 0)&&(ini < 4)) {
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__asm__ __volatile__ ("cpsid f\n");
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HalCpuClkConfig(2); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
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ConfigDebugErr = -1;
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VectorTableInitRtl8195A((u32)&STACK_TOP); // 0x1FFFFFFC);
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HalInitPlatformLogUartV02();
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HalInitPlatformTimerV02();
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__asm__ __volatile__ ("cpsie f\n");
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}
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printf("\r\nStart Init code: %d\r\n", ini);
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printf("EFUSE 0..3: 0x%08x 0x%08x 0x%08x 0x%08x\r\n", SYS->EFUSE_SYSCFG0, SYS->EFUSE_SYSCFG1, SYS->EFUSE_SYSCFG2, SYS->EFUSE_SYSCFG3);
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printf("EFUSE 4..7: 0x%08x 0x%08x 0x%08x 0x%08x\r\n", SYS->EFUSE_SYSCFG4, SYS->EFUSE_SYSCFG5, SYS->EFUSE_SYSCFG6, SYS->EFUSE_SYSCFG7);
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printf("SYSCFG 0..2: 0x%08x 0x%08x 0x%08x\r\n", SYS->SYSTEM_CFG0, SYS->SYSTEM_CFG1, SYS->SYSTEM_CFG2);
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printf("SOC_FUNC_EN: 0x%08x\r\n", PERI_ON->SOC_FUNC_EN);
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printf("\r\nRTL Console ROM: Start - press key 'Up', Help '?'\r\n");
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while(pUartLogCtl[5] != 1);
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pUartLogCtl[3] = 0;
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pUartLogCtl[6] = 1;
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DiagPrintf("\r<RTL8710AF>");
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while(1) {
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while(pUartLogCtl[4] != 1 );
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UartLogCmdExecute(pUartLogCtl);
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DiagPrintf("\r<RTL8710AF>");
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pUartLogCtl[4] = 0;
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}
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return 1;
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}
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