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35
lib/fwlib/ram_lib/usb_otg/include/Rtl8195a_otg_zero.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef RTL8195A_OTG_ZERO_H
#define RTL8195A_OTG_ZERO_H
#include "usb_ch9.h"
#include "usb_gadget.h"
struct zero_dev {
//ModifiedByJD spinlock_t lock;
struct usb_gadget *gadget;
struct usb_request *req; /* for control responses */
/* when configured, we have one of two configs:
* - source data (in to host) and sink it (out from host)
* - or loop it back (out from host back in to host)
*/
u8 config;
struct usb_ep *in_ep, *out_ep, *status_ep;//ModifiedByJD
const struct usb_endpoint_descriptor
*in, *out, *status; //ModifiedByJD
/* autoresume timer */
//ModifiedByJD struct timer_list resume;
};
#endif

211
lib/fwlib/ram_lib/usb_otg/include/cdc.h Normal file
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//#include "../otg/osk/sys-support.h" //ModifiedByJD
/*
* USB Communications Device Class (CDC) definitions
*
* CDC says how to talk to lots of different types of network adapters,
* notably ethernet adapters and various modems. It's used mostly with
* firmware based USB peripherals.
*/
#define USB_CDC_SUBCLASS_ACM 0x02
#define USB_CDC_SUBCLASS_ETHERNET 0x06
#define USB_CDC_SUBCLASS_WHCM 0x08
#define USB_CDC_SUBCLASS_DMM 0x09
#define USB_CDC_SUBCLASS_MDLM 0x0a
#define USB_CDC_SUBCLASS_OBEX 0x0b
#define USB_CDC_PROTO_NONE 0
#define USB_CDC_ACM_PROTO_AT_V25TER 1
#define USB_CDC_ACM_PROTO_AT_PCCA101 2
#define USB_CDC_ACM_PROTO_AT_PCCA101_WAKE 3
#define USB_CDC_ACM_PROTO_AT_GSM 4
#define USB_CDC_ACM_PROTO_AT_3G 5
#define USB_CDC_ACM_PROTO_AT_CDMA 6
#define USB_CDC_ACM_PROTO_VENDOR 0xff
/*-------------------------------------------------------------------------*/
//#define UPACKED __attribute__ ((packed))
#define UPACKED
/*
* Class-Specific descriptors ... there are a couple dozen of them
*/
#define USB_CDC_HEADER_TYPE 0x00 /* header_desc */
#define USB_CDC_CALL_MANAGEMENT_TYPE 0x01 /* call_mgmt_descriptor */
#define USB_CDC_ACM_TYPE 0x02 /* acm_descriptor */
#define USB_CDC_UNION_TYPE 0x06 /* union_desc */
#define USB_CDC_COUNTRY_TYPE 0x07
#define USB_CDC_NETWORK_TERMINAL_TYPE 0x0a /* network_terminal_desc */
#define USB_CDC_ETHERNET_TYPE 0x0f /* ether_desc */
#define USB_CDC_WHCM_TYPE 0x11
#define USB_CDC_MDLM_TYPE 0x12 /* mdlm_desc */
#define USB_CDC_MDLM_DETAIL_TYPE 0x13 /* mdlm_detail_desc */
#define USB_CDC_DMM_TYPE 0x14
#define USB_CDC_OBEX_TYPE 0x15
//ModifiedByJD (>>>) modify the data type to useable ones.
/* "Header Functional Descriptor" from CDC spec 5.2.3.1 */
struct usb_cdc_header_desc {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
u16 bcdCDC;
} UPACKED;
/* "Call Management Descriptor" from CDC spec 5.2.3.2 */
struct usb_cdc_call_mgmt_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
u8 bmCapabilities;
#define USB_CDC_CALL_MGMT_CAP_CALL_MGMT 0x01
#define USB_CDC_CALL_MGMT_CAP_DATA_INTF 0x02
u8 bDataInterface;
} UPACKED;
/* "Abstract Control Management Descriptor" from CDC spec 5.2.3.3 */
struct usb_cdc_acm_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
u8 bmCapabilities;
} UPACKED;
/* "Union Functional Descriptor" from CDC spec 5.2.3.8 */
struct usb_cdc_union_desc {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
u8 bMasterInterface0;
u8 bSlaveInterface0;
/* ... and there could be other slave interfaces */
} UPACKED;
/* "Network Channel Terminal Functional Descriptor" from CDC spec 5.2.3.11 */
struct usb_cdc_network_terminal_desc {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
u8 bEntityId;
u8 iName;
u8 bChannelIndex;
u8 bPhysicalInterface;
} UPACKED;
/* "Ethernet Networking Functional Descriptor" from CDC spec 5.2.3.16 */
struct usb_cdc_ether_desc {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
u8 iMACAddress;
u32 bmEthernetStatistics;
u16 wMaxSegmentSize;
u16 wNumberMCFilters;
u8 bNumberPowerFilters;
} UPACKED;
/* "MDLM Functional Descriptor" from CDC WMC spec 6.7.2.3 */
struct usb_cdc_mdlm_desc {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
u16 bcdVersion;
u8 bGUID[16];
}UPACKED;
/* "MDLM Detail Functional Descriptor" from CDC WMC spec 6.7.2.4 */
struct usb_cdc_mdlm_detail_desc {
u8 bLength;
u8 bDescriptorType;
u8 bDescriptorSubType;
/* type is associated with mdlm_desc.bGUID */
u8 bGuidDescriptorType;
u8 bDetailData[0];
} UPACKED;
/*-------------------------------------------------------------------------*/
/*
* Class-Specific Control Requests (6.2)
*
* section 3.6.2.1 table 4 has the ACM profile, for modems.
* section 3.8.2 table 10 has the ethernet profile.
*
* Microsoft's RNDIS stack for Ethernet is a vendor-specific CDC ACM variant,
* heavily dependent on the encapsulated (proprietary) command mechanism.
*/
#define USB_CDC_SEND_ENCAPSULATED_COMMAND 0x00
#define USB_CDC_GET_ENCAPSULATED_RESPONSE 0x01
#define USB_CDC_REQ_SET_LINE_CODING 0x20
#define USB_CDC_REQ_GET_LINE_CODING 0x21
#define USB_CDC_REQ_SET_CONTROL_LINE_STATE 0x22
#define USB_CDC_REQ_SEND_BREAK 0x23
#define USB_CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
#define USB_CDC_SET_ETHERNET_PM_PATTERN_FILTER 0x41
#define USB_CDC_GET_ETHERNET_PM_PATTERN_FILTER 0x42
#define USB_CDC_SET_ETHERNET_PACKET_FILTER 0x43
#define USB_CDC_GET_ETHERNET_STATISTIC 0x44
/* Line Coding Structure from CDC spec 6.2.13 */
struct usb_cdc_line_coding {
u32 dwDTERate;
u8 bCharFormat;
#define USB_CDC_1_STOP_BITS 0
#define USB_CDC_1_5_STOP_BITS 1
#define USB_CDC_2_STOP_BITS 2
u8 bParityType;
#define USB_CDC_NO_PARITY 0
#define USB_CDC_ODD_PARITY 1
#define USB_CDC_EVEN_PARITY 2
#define USB_CDC_MARK_PARITY 3
#define USB_CDC_SPACE_PARITY 4
u8 bDataBits;
} UPACKED;
/* table 62; bits in multicast filter */
#define USB_CDC_PACKET_TYPE_PROMISCUOUS (1 << 0)
#define USB_CDC_PACKET_TYPE_ALL_MULTICAST (1 << 1) /* no filter */
#define USB_CDC_PACKET_TYPE_DIRECTED (1 << 2)
#define USB_CDC_PACKET_TYPE_BROADCAST (1 << 3)
#define USB_CDC_PACKET_TYPE_MULTICAST (1 << 4) /* filtered */
/*-------------------------------------------------------------------------*/
/*
* Class-Specific Notifications (6.3) sent by interrupt transfers
*
* section 3.8.2 table 11 of the CDC spec lists Ethernet notifications
* section 3.6.2.1 table 5 specifies ACM notifications, accepted by RNDIS
* RNDIS also defines its own bit-incompatible notifications
*/
#define USB_CDC_NOTIFY_NETWORK_CONNECTION 0x00
#define USB_CDC_NOTIFY_RESPONSE_AVAILABLE 0x01
#define USB_CDC_NOTIFY_SERIAL_STATE 0x20
#define USB_CDC_NOTIFY_SPEED_CHANGE 0x2a
struct usb_cdc_notification {
u8 bmRequestType;
u8 bNotificationType;
u16 wValue;
u16 wIndex;
u16 wLength;
}UPACKED;
//ModifiedByJD (<<<)

594
lib/fwlib/ram_lib/usb_otg/include/dwc_list.h Normal file
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/* $OpenBSD: queue.h,v 1.26 2004/05/04 16:59:32 grange Exp $ */
/* $NetBSD: queue.h,v 1.11 1996/05/16 05:17:14 mycroft Exp $ */
/*
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)queue.h 8.5 (Berkeley) 8/20/94
*/
#ifndef _DWC_LIST_H_
#define _DWC_LIST_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @file
*
* This file defines linked list operations. It is derived from BSD with
* only the MACRO names being prefixed with DWC_. This is because a few of
* these names conflict with those on Linux. For documentation on use, see the
* inline comments in the source code. The original license for this source
* code applies and is preserved in the dwc_list.h source file.
*/
/*
* This file defines five types of data structures: singly-linked lists,
* lists, simple queues, tail queues, and circular queues.
*
*
* A singly-linked list is headed by a single forward pointer. The elements
* are singly linked for minimum space and pointer manipulation overhead at
* the expense of O(n) removal for arbitrary elements. New elements can be
* added to the list after an existing element or at the head of the list.
* Elements being removed from the head of the list should use the explicit
* macro for this purpose for optimum efficiency. A singly-linked list may
* only be traversed in the forward direction. Singly-linked lists are ideal
* for applications with large datasets and few or no removals or for
* implementing a LIFO queue.
*
* A list is headed by a single forward pointer (or an array of forward
* pointers for a hash table header). The elements are doubly linked
* so that an arbitrary element can be removed without a need to
* traverse the list. New elements can be added to the list before
* or after an existing element or at the head of the list. A list
* may only be traversed in the forward direction.
*
* A simple queue is headed by a pair of pointers, one the head of the
* list and the other to the tail of the list. The elements are singly
* linked to save space, so elements can only be removed from the
* head of the list. New elements can be added to the list before or after
* an existing element, at the head of the list, or at the end of the
* list. A simple queue may only be traversed in the forward direction.
*
* A tail queue is headed by a pair of pointers, one to the head of the
* list and the other to the tail of the list. The elements are doubly
* linked so that an arbitrary element can be removed without a need to
* traverse the list. New elements can be added to the list before or
* after an existing element, at the head of the list, or at the end of
* the list. A tail queue may be traversed in either direction.
*
* A circle queue is headed by a pair of pointers, one to the head of the
* list and the other to the tail of the list. The elements are doubly
* linked so that an arbitrary element can be removed without a need to
* traverse the list. New elements can be added to the list before or after
* an existing element, at the head of the list, or at the end of the list.
* A circle queue may be traversed in either direction, but has a more
* complex end of list detection.
*
* For details on the use of these macros, see the queue(3) manual page.
*/
/*
* Double-linked List.
*/
typedef struct dwc_list_link {
struct dwc_list_link *next;
struct dwc_list_link *prev;
} dwc_list_link_t;
#define DWC_LIST_INIT(link) do { \
(link)->next = (link); \
(link)->prev = (link); \
} while (0)
#define DWC_LIST_FIRST(link) ((link)->next)
#define DWC_LIST_LAST(link) ((link)->prev)
#define DWC_LIST_END(link) (link)
#define DWC_LIST_NEXT(link) ((link)->next)
#define DWC_LIST_PREV(link) ((link)->prev)
#define DWC_LIST_EMPTY(link) \
(DWC_LIST_FIRST(link) == DWC_LIST_END(link))
#define DWC_LIST_ENTRY(link, type, field) \
(type *)((uint8_t *)(link) - (size_t)(&((type *)0)->field))
#if 0
#define DWC_LIST_INSERT_HEAD(list, link) do { \
(link)->next = (list)->next; \
(link)->prev = (list); \
(list)->next->prev = (link); \
(list)->next = (link); \
} while (0)
#define DWC_LIST_INSERT_TAIL(list, link) do { \
(link)->next = (list); \
(link)->prev = (list)->prev; \
(list)->prev->next = (link); \
(list)->prev = (link); \
} while (0)
#else
#define DWC_LIST_INSERT_HEAD(list, link) do { \
dwc_list_link_t *__next__ = (list)->next; \
__next__->prev = (link); \
(link)->next = __next__; \
(link)->prev = (list); \
(list)->next = (link); \
} while (0)
#define DWC_LIST_INSERT_TAIL(list, link) do { \
dwc_list_link_t *__prev__ = (list)->prev; \
(list)->prev = (link); \
(link)->next = (list); \
(link)->prev = __prev__; \
__prev__->next = (link); \
} while (0)
#endif
#if 0
static inline void __list_add(struct list_head *new,
struct list_head *prev,
struct list_head *next)
{
next->prev = new;
new->next = next;
new->prev = prev;
prev->next = new;
}
static inline void list_add(struct list_head *new, struct list_head *head)
{
__list_add(new, head, head->next);
}
static inline void list_add_tail(struct list_head *new, struct list_head *head)
{
__list_add(new, head->prev, head);
}
static inline void __list_del(struct list_head * prev, struct list_head * next)
{
next->prev = prev;
prev->next = next;
}
static inline void list_del(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
entry->next = LIST_POISON1;
entry->prev = LIST_POISON2;
}
#endif
#define DWC_LIST_REMOVE(link) do { \
(link)->next->prev = (link)->prev; \
(link)->prev->next = (link)->next; \
} while (0)
#define DWC_LIST_REMOVE_INIT(link) do { \
DWC_LIST_REMOVE(link); \
DWC_LIST_INIT(link); \
} while (0)
#define DWC_LIST_MOVE_HEAD(list, link) do { \
DWC_LIST_REMOVE(link); \
DWC_LIST_INSERT_HEAD(list, link); \
} while (0)
#define DWC_LIST_MOVE_TAIL(list, link) do { \
DWC_LIST_REMOVE(link); \
DWC_LIST_INSERT_TAIL(list, link); \
} while (0)
#define DWC_LIST_FOREACH(var, list) \
for((var) = DWC_LIST_FIRST(list); \
(var) != DWC_LIST_END(list); \
(var) = DWC_LIST_NEXT(var))
#define DWC_LIST_FOREACH_SAFE(var, var2, list) \
for((var) = DWC_LIST_FIRST(list), (var2) = DWC_LIST_NEXT(var); \
(var) != DWC_LIST_END(list); \
(var) = (var2), (var2) = DWC_LIST_NEXT(var2))
#define DWC_LIST_FOREACH_REVERSE(var, list) \
for((var) = DWC_LIST_LAST(list); \
(var) != DWC_LIST_END(list); \
(var) = DWC_LIST_PREV(var))
/*
* Singly-linked List definitions.
*/
#define DWC_SLIST_HEAD(name, type) \
struct name { \
struct type *slh_first; /* first element */ \
}
#define DWC_SLIST_HEAD_INITIALIZER(head) \
{ NULL }
#define DWC_SLIST_ENTRY(type) \
struct { \
struct type *sle_next; /* next element */ \
}
/*
* Singly-linked List access methods.
*/
#define DWC_SLIST_FIRST(head) ((head)->slh_first)
#define DWC_SLIST_END(head) NULL
#define DWC_SLIST_EMPTY(head) (SLIST_FIRST(head) == SLIST_END(head))
#define DWC_SLIST_NEXT(elm, field) ((elm)->field.sle_next)
#define DWC_SLIST_FOREACH(var, head, field) \
for((var) = SLIST_FIRST(head); \
(var) != SLIST_END(head); \
(var) = SLIST_NEXT(var, field))
#define DWC_SLIST_FOREACH_PREVPTR(var, varp, head, field) \
for((varp) = &SLIST_FIRST((head)); \
((var) = *(varp)) != SLIST_END(head); \
(varp) = &SLIST_NEXT((var), field))
/*
* Singly-linked List functions.
*/
#define DWC_SLIST_INIT(head) { \
SLIST_FIRST(head) = SLIST_END(head); \
}
#define DWC_SLIST_INSERT_AFTER(slistelm, elm, field) do { \
(elm)->field.sle_next = (slistelm)->field.sle_next; \
(slistelm)->field.sle_next = (elm); \
} while (0)
#define DWC_SLIST_INSERT_HEAD(head, elm, field) do { \
(elm)->field.sle_next = (head)->slh_first; \
(head)->slh_first = (elm); \
} while (0)
#define DWC_SLIST_REMOVE_NEXT(head, elm, field) do { \
(elm)->field.sle_next = (elm)->field.sle_next->field.sle_next; \
} while (0)
#define DWC_SLIST_REMOVE_HEAD(head, field) do { \
(head)->slh_first = (head)->slh_first->field.sle_next; \
} while (0)
#define DWC_SLIST_REMOVE(head, elm, type, field) do { \
if ((head)->slh_first == (elm)) { \
SLIST_REMOVE_HEAD((head), field); \
} \
else { \
struct type *curelm = (head)->slh_first; \
while( curelm->field.sle_next != (elm) ) \
curelm = curelm->field.sle_next; \
curelm->field.sle_next = \
curelm->field.sle_next->field.sle_next; \
} \
} while (0)
/*
* Simple queue definitions.
*/
#define DWC_SIMPLEQ_HEAD(name, type) \
struct name { \
struct type *sqh_first; /* first element */ \
struct type **sqh_last; /* addr of last next element */ \
}
#define DWC_SIMPLEQ_HEAD_INITIALIZER(head) \
{ NULL, &(head).sqh_first }
#define DWC_SIMPLEQ_ENTRY(type) \
struct { \
struct type *sqe_next; /* next element */ \
}
/*
* Simple queue access methods.
*/
#define DWC_SIMPLEQ_FIRST(head) ((head)->sqh_first)
#define DWC_SIMPLEQ_END(head) NULL
#define DWC_SIMPLEQ_EMPTY(head) (SIMPLEQ_FIRST(head) == SIMPLEQ_END(head))
#define DWC_SIMPLEQ_NEXT(elm, field) ((elm)->field.sqe_next)
#define DWC_SIMPLEQ_FOREACH(var, head, field) \
for((var) = SIMPLEQ_FIRST(head); \
(var) != SIMPLEQ_END(head); \
(var) = SIMPLEQ_NEXT(var, field))
/*
* Simple queue functions.
*/
#define DWC_SIMPLEQ_INIT(head) do { \
(head)->sqh_first = NULL; \
(head)->sqh_last = &(head)->sqh_first; \
} while (0)
#define DWC_SIMPLEQ_INSERT_HEAD(head, elm, field) do { \
if (((elm)->field.sqe_next = (head)->sqh_first) == NULL) \
(head)->sqh_last = &(elm)->field.sqe_next; \
(head)->sqh_first = (elm); \
} while (0)
#define DWC_SIMPLEQ_INSERT_TAIL(head, elm, field) do { \
(elm)->field.sqe_next = NULL; \
*(head)->sqh_last = (elm); \
(head)->sqh_last = &(elm)->field.sqe_next; \
} while (0)
#define DWC_SIMPLEQ_INSERT_AFTER(head, listelm, elm, field) do { \
if (((elm)->field.sqe_next = (listelm)->field.sqe_next) == NULL)\
(head)->sqh_last = &(elm)->field.sqe_next; \
(listelm)->field.sqe_next = (elm); \
} while (0)
#define DWC_SIMPLEQ_REMOVE_HEAD(head, field) do { \
if (((head)->sqh_first = (head)->sqh_first->field.sqe_next) == NULL) \
(head)->sqh_last = &(head)->sqh_first; \
} while (0)
/*
* Tail queue definitions.
*/
#define DWC_TAILQ_HEAD(name, type) \
struct name { \
struct type *tqh_first; /* first element */ \
struct type **tqh_last; /* addr of last next element */ \
}
#define DWC_TAILQ_HEAD_INITIALIZER(head) \
{ NULL, &(head).tqh_first }
#define DWC_TAILQ_ENTRY(type) \
struct { \
struct type *tqe_next; /* next element */ \
struct type **tqe_prev; /* address of previous next element */ \
}
/*
* tail queue access methods
*/
#define DWC_TAILQ_FIRST(head) ((head)->tqh_first)
#define DWC_TAILQ_END(head) NULL
#define DWC_TAILQ_NEXT(elm, field) ((elm)->field.tqe_next)
#define DWC_TAILQ_LAST(head, headname) \
(*(((struct headname *)((head)->tqh_last))->tqh_last))
/* XXX */
#define DWC_TAILQ_PREV(elm, headname, field) \
(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
#define DWC_TAILQ_EMPTY(head) \
(TAILQ_FIRST(head) == TAILQ_END(head))
#define DWC_TAILQ_FOREACH(var, head, field) \
for((var) = TAILQ_FIRST(head); \
(var) != TAILQ_END(head); \
(var) = TAILQ_NEXT(var, field))
#define DWC_TAILQ_FOREACH_REVERSE(var, head, headname, field) \
for((var) = TAILQ_LAST(head, headname); \
(var) != TAILQ_END(head); \
(var) = TAILQ_PREV(var, headname, field))
/*
* Tail queue functions.
*/
#define DWC_TAILQ_INIT(head) do { \
(head)->tqh_first = NULL; \
(head)->tqh_last = &(head)->tqh_first; \
} while (0)
#define DWC_TAILQ_INSERT_HEAD(head, elm, field) do { \
if (((elm)->field.tqe_next = (head)->tqh_first) != NULL) \
(head)->tqh_first->field.tqe_prev = \
&(elm)->field.tqe_next; \
else \
(head)->tqh_last = &(elm)->field.tqe_next; \
(head)->tqh_first = (elm); \
(elm)->field.tqe_prev = &(head)->tqh_first; \
} while (0)
#define DWC_TAILQ_INSERT_TAIL(head, elm, field) do { \
(elm)->field.tqe_next = NULL; \
(elm)->field.tqe_prev = (head)->tqh_last; \
*(head)->tqh_last = (elm); \
(head)->tqh_last = &(elm)->field.tqe_next; \
} while (0)
#define DWC_TAILQ_INSERT_AFTER(head, listelm, elm, field) do { \
if (((elm)->field.tqe_next = (listelm)->field.tqe_next) != NULL)\
(elm)->field.tqe_next->field.tqe_prev = \
&(elm)->field.tqe_next; \
else \
(head)->tqh_last = &(elm)->field.tqe_next; \
(listelm)->field.tqe_next = (elm); \
(elm)->field.tqe_prev = &(listelm)->field.tqe_next; \
} while (0)
#define DWC_TAILQ_INSERT_BEFORE(listelm, elm, field) do { \
(elm)->field.tqe_prev = (listelm)->field.tqe_prev; \
(elm)->field.tqe_next = (listelm); \
*(listelm)->field.tqe_prev = (elm); \
(listelm)->field.tqe_prev = &(elm)->field.tqe_next; \
} while (0)
#define DWC_TAILQ_REMOVE(head, elm, field) do { \
if (((elm)->field.tqe_next) != NULL) \
(elm)->field.tqe_next->field.tqe_prev = \
(elm)->field.tqe_prev; \
else \
(head)->tqh_last = (elm)->field.tqe_prev; \
*(elm)->field.tqe_prev = (elm)->field.tqe_next; \
} while (0)
#define DWC_TAILQ_REPLACE(head, elm, elm2, field) do { \
if (((elm2)->field.tqe_next = (elm)->field.tqe_next) != NULL) \
(elm2)->field.tqe_next->field.tqe_prev = \
&(elm2)->field.tqe_next; \
else \
(head)->tqh_last = &(elm2)->field.tqe_next; \
(elm2)->field.tqe_prev = (elm)->field.tqe_prev; \
*(elm2)->field.tqe_prev = (elm2); \
} while (0)
/*
* Circular queue definitions.
*/
#define DWC_CIRCLEQ_HEAD(name, type) \
struct name { \
struct type *cqh_first; /* first element */ \
struct type *cqh_last; /* last element */ \
}
#define DWC_CIRCLEQ_HEAD_INITIALIZER(head) \
{ DWC_CIRCLEQ_END(&head), DWC_CIRCLEQ_END(&head) }
#define DWC_CIRCLEQ_ENTRY(type) \
struct { \
struct type *cqe_next; /* next element */ \
struct type *cqe_prev; /* previous element */ \
}
/*
* Circular queue access methods
*/
#define DWC_CIRCLEQ_FIRST(head) ((head)->cqh_first)
#define DWC_CIRCLEQ_LAST(head) ((head)->cqh_last)
#define DWC_CIRCLEQ_END(head) ((void *)(head))
#define DWC_CIRCLEQ_NEXT(elm, field) ((elm)->field.cqe_next)
#define DWC_CIRCLEQ_PREV(elm, field) ((elm)->field.cqe_prev)
#define DWC_CIRCLEQ_EMPTY(head) \
(DWC_CIRCLEQ_FIRST(head) == DWC_CIRCLEQ_END(head))
#define DWC_CIRCLEQ_EMPTY_ENTRY(elm, field) (((elm)->field.cqe_next == NULL) && ((elm)->field.cqe_prev == NULL))
#define DWC_CIRCLEQ_FOREACH(var, head, field) \
for((var) = DWC_CIRCLEQ_FIRST(head); \
(var) != DWC_CIRCLEQ_END(head); \
(var) = DWC_CIRCLEQ_NEXT(var, field))
#define DWC_CIRCLEQ_FOREACH_SAFE(var, var2, head, field) \
for((var) = DWC_CIRCLEQ_FIRST(head), var2 = DWC_CIRCLEQ_NEXT(var, field); \
(var) != DWC_CIRCLEQ_END(head); \
(var) = var2, var2 = DWC_CIRCLEQ_NEXT(var, field))
#define DWC_CIRCLEQ_FOREACH_REVERSE(var, head, field) \
for((var) = DWC_CIRCLEQ_LAST(head); \
(var) != DWC_CIRCLEQ_END(head); \
(var) = DWC_CIRCLEQ_PREV(var, field))
/*
* Circular queue functions.
*/
#define DWC_CIRCLEQ_INIT(head) do { \
(head)->cqh_first = DWC_CIRCLEQ_END(head); \
(head)->cqh_last = DWC_CIRCLEQ_END(head); \
} while (0)
#define DWC_CIRCLEQ_INIT_ENTRY(elm, field) do { \
(elm)->field.cqe_next = NULL; \
(elm)->field.cqe_prev = NULL; \
} while (0)
#define DWC_CIRCLEQ_INSERT_AFTER(head, listelm, elm, field) do { \
(elm)->field.cqe_next = (listelm)->field.cqe_next; \
(elm)->field.cqe_prev = (listelm); \
if ((listelm)->field.cqe_next == DWC_CIRCLEQ_END(head)) \
(head)->cqh_last = (elm); \
else \
(listelm)->field.cqe_next->field.cqe_prev = (elm); \
(listelm)->field.cqe_next = (elm); \
} while (0)
#define DWC_CIRCLEQ_INSERT_BEFORE(head, listelm, elm, field) do { \
(elm)->field.cqe_next = (listelm); \
(elm)->field.cqe_prev = (listelm)->field.cqe_prev; \
if ((listelm)->field.cqe_prev == DWC_CIRCLEQ_END(head)) \
(head)->cqh_first = (elm); \
else \
(listelm)->field.cqe_prev->field.cqe_next = (elm); \
(listelm)->field.cqe_prev = (elm); \
} while (0)
#define DWC_CIRCLEQ_INSERT_HEAD(head, elm, field) do { \
(elm)->field.cqe_next = (head)->cqh_first; \
(elm)->field.cqe_prev = DWC_CIRCLEQ_END(head); \
if ((head)->cqh_last == DWC_CIRCLEQ_END(head)) \
(head)->cqh_last = (elm); \
else \
(head)->cqh_first->field.cqe_prev = (elm); \
(head)->cqh_first = (elm); \
} while (0)
#define DWC_CIRCLEQ_INSERT_TAIL(head, elm, field) do { \
(elm)->field.cqe_next = DWC_CIRCLEQ_END(head); \
(elm)->field.cqe_prev = (head)->cqh_last; \
if ((head)->cqh_first == DWC_CIRCLEQ_END(head)) \
(head)->cqh_first = (elm); \
else \
(head)->cqh_last->field.cqe_next = (elm); \
(head)->cqh_last = (elm); \
} while (0)
#define DWC_CIRCLEQ_REMOVE(head, elm, field) do { \
if ((elm)->field.cqe_next == DWC_CIRCLEQ_END(head)) \
(head)->cqh_last = (elm)->field.cqe_prev; \
else \
(elm)->field.cqe_next->field.cqe_prev = \
(elm)->field.cqe_prev; \
if ((elm)->field.cqe_prev == DWC_CIRCLEQ_END(head)) \
(head)->cqh_first = (elm)->field.cqe_next; \
else \
(elm)->field.cqe_prev->field.cqe_next = \
(elm)->field.cqe_next; \
} while (0)
#define DWC_CIRCLEQ_REMOVE_INIT(head, elm, field) do { \
DWC_CIRCLEQ_REMOVE(head, elm, field); \
DWC_CIRCLEQ_INIT_ENTRY(elm, field); \
} while (0)
#define DWC_CIRCLEQ_REPLACE(head, elm, elm2, field) do { \
if (((elm2)->field.cqe_next = (elm)->field.cqe_next) == \
DWC_CIRCLEQ_END(head)) \
(head).cqh_last = (elm2); \
else \
(elm2)->field.cqe_next->field.cqe_prev = (elm2); \
if (((elm2)->field.cqe_prev = (elm)->field.cqe_prev) == \
DWC_CIRCLEQ_END(head)) \
(head).cqh_first = (elm2); \
else \
(elm2)->field.cqe_prev->field.cqe_next = (elm2); \
} while (0)
#ifdef __cplusplus
}
#endif
#endif /* _DWC_LIST_H_ */

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/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_adp.h $
* $Revision: #8 $
* $Date: 2013/04/09 $
* $Change: 2201932 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#ifndef __DWC_OTG_ADP_H__
#define __DWC_OTG_ADP_H__
/**
* @file
*
* This file contains the Attach Detect Protocol interfaces and defines
* (functions) and structures for Linux.
*
*/
#define DWC_OTG_ADP_UNATTACHED 0
#define DWC_OTG_ADP_ATTACHED 1
#define DWC_OTG_ADP_UNKOWN 2
#define HOST_RTIM_THRESHOLD 5
#define DEVICE_RTIM_THRESHOLD 3
typedef struct dwc_otg_adp {
uint32_t adp_started;
uint32_t initial_probe;
int32_t probe_timer_values[2];
uint32_t probe_enabled;
uint32_t sense_enabled;
dwc_timer_t *sense_timer;
uint32_t sense_timer_started;
dwc_timer_t *vbuson_timer;
uint32_t vbuson_timer_started;
uint32_t attached;
uint32_t probe_counter;
uint32_t gpwrdn;
} dwc_otg_adp_t;
/**
* Attach Detect Protocol functions
*/
extern void dwc_otg_adp_write_reg(dwc_otg_core_if_t * core_if, uint32_t value);
extern uint32_t dwc_otg_adp_read_reg(dwc_otg_core_if_t * core_if);
extern uint32_t dwc_otg_adp_probe_start(dwc_otg_core_if_t * core_if);
extern uint32_t dwc_otg_adp_sense_start(dwc_otg_core_if_t * core_if);
extern uint32_t dwc_otg_adp_probe_stop(dwc_otg_core_if_t * core_if);
extern uint32_t dwc_otg_adp_sense_stop(dwc_otg_core_if_t * core_if);
extern void dwc_otg_adp_start(dwc_otg_core_if_t * core_if, uint8_t is_host);
extern void dwc_otg_adp_init(dwc_otg_core_if_t * core_if);
extern void dwc_otg_adp_remove(dwc_otg_core_if_t * core_if);
extern int32_t dwc_otg_adp_handle_intr(dwc_otg_core_if_t * core_if);
extern int32_t dwc_otg_adp_handle_srp_intr(dwc_otg_core_if_t * core_if);
#endif //__DWC_OTG_ADP_H__

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/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_attr.h $
* $Revision: #13 $
* $Date: 2010/06/21 $
* $Change: 1532021 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#if !defined(__DWC_OTG_ATTR_H__)
#define __DWC_OTG_ATTR_H__
/** @file
* This file contains the interface to the Linux device attributes.
*/
extern struct device_attribute dev_attr_regoffset;
extern struct device_attribute dev_attr_regvalue;
extern struct device_attribute dev_attr_mode;
extern struct device_attribute dev_attr_hnpcapable;
extern struct device_attribute dev_attr_srpcapable;
extern struct device_attribute dev_attr_hnp;
extern struct device_attribute dev_attr_srp;
extern struct device_attribute dev_attr_buspower;
extern struct device_attribute dev_attr_bussuspend;
extern struct device_attribute dev_attr_mode_ch_tim_en;
extern struct device_attribute dev_attr_fr_interval;
extern struct device_attribute dev_attr_busconnected;
extern struct device_attribute dev_attr_gotgctl;
extern struct device_attribute dev_attr_gusbcfg;
extern struct device_attribute dev_attr_grxfsiz;
extern struct device_attribute dev_attr_gnptxfsiz;
extern struct device_attribute dev_attr_gpvndctl;
extern struct device_attribute dev_attr_ggpio;
extern struct device_attribute dev_attr_guid;
extern struct device_attribute dev_attr_gsnpsid;
extern struct device_attribute dev_attr_devspeed;
extern struct device_attribute dev_attr_enumspeed;
extern struct device_attribute dev_attr_hptxfsiz;
extern struct device_attribute dev_attr_hprt0;
#ifdef CONFIG_USB_DWC_OTG_LPM
extern struct device_attribute dev_attr_lpm_response;
extern struct device_attribute devi_attr_sleep_status;
#endif
void dwc_otg_attr_create(
#ifdef LM_INTERFACE
struct lm_device *dev
#elif PCI_INTERFACE
struct pci_dev *dev
#endif
);
void dwc_otg_attr_remove(
#ifdef LM_INTERFACE
struct lm_device *dev
#elif PCI_INTERFACE
struct pci_dev *dev
#endif
);
#endif

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "basic_types.h"
#include <osdep_api.h>
//#include "va_list.h"
#include <stdarg.h>
#include "diag.h"
#include "dwc_otg_dbg.h"
#include "dwc_os.h"
typedef struct _RAM_OTG_FUNCTION_TABLE_ {
VOID* (*RamMemSet) (void *dest, int byte, SIZE_T size);
VOID* (*RamMemCpy) (void *dest, void const *src, SIZE_T size);
int (*RamMemCmp) (void const*m1, void const *m2, SIZE_T size);
int (*RamStrnCmp) (const char *s1, const char *s2, SIZE_T size);
int (*RamStrCmp) (const char *s1, const char *s2);
SIZE_T (*RamStrLen) (char const *str);
char* (*RamStrCpy) (char *to, char const *from);
char* (*RamStrDup) (char const *str);
int (*RamAtoi) (const char *str, int32_t *value);
int (*RamAtoui) (const char *str, uint32_t *value);
int (*RamVsnPrintf) (char *str, int size, const char *format, ...);
u32 (*RamSPrintf) (u8 *buf, const char *fmt, ...);
int (*RamSnPrintf) (char *dst, int count, const char * src, ...);
u8* (*RamZmalloc) (u32 sz);
u8* (*RamZmallocAtomic) (u32 sz);
VOID (*RamMfree) (u8 *pbuf, u32 sz);
dwc_spinlock_t* (*RamSpinlockAlloc) (void);
VOID (*RamSpinlockFree) (dwc_spinlock_t *lock);
VOID (*RamSpinlock) (dwc_spinlock_t *lock);
VOID (*RamSpinUnlock) (dwc_spinlock_t *lock);
VOID (*RamSpinIrqSave) (dwc_spinlock_t *lock, dwc_irqflags_t *flags);
VOID (*RamSpinIrqRestore) (dwc_spinlock_t *lock, dwc_irqflags_t flags);
dwc_mutex_t*(*RamMutexAlloc) (void);
VOID (*RamMutexFree) (dwc_mutex_t *mutex);
VOID (*RamMutexLock) (dwc_mutex_t *mutex);
int (*RamMutexTryLock) (dwc_mutex_t *mutex);
VOID (*RamMutexUnLock) (dwc_mutex_t *mutex);
uint32_t(*RamUDelay) (uint32_t usecs);
void (*RamMSleep) (uint32_t msecs);
VOID (*timer_callback) (unsigned long data);
dwc_timer_t *(*RamTimerAlloc) (char *name, dwc_timer_callback_t cb, void *data);
VOID (*RamTimerFree) (dwc_timer_t *timer);
VOID (*RamTimerSche) (dwc_timer_t *timer, uint32_t time_ms);
VOID (*RamTimerCancel) (dwc_timer_t *timer);
VOID (*RamEnterCritical) (void);
VOID (*RamExitCritical) (void);
}RAM_OTG_FUNCTION_TABLE, *PRAM_OTG_FUNCTION_TABLE;
// Global Variable
extern RAM_OTG_FUNCTION_TABLE gRamOTGFunTbl;
// Funtion Prototype
// ROM
_LONG_CALL_ void dwc_otg_wrapper_reset(IN VOID);
_LONG_CALL_ void dwc_otg_wrapper_init_boot(IN VOID);
_LONG_CALL_ void dwc_otg_power_init(IN VOID);
_LONG_CALL_ VOID RtlInitListhead_Otg(IN _LIST *list);
_LONG_CALL_ u32 RtlIsListEmpty_Otg(IN _LIST *phead);
_LONG_CALL_ VOID RtlListInsertHead_Otg(IN _LIST *plist,IN _LIST *phead);
_LONG_CALL_ VOID RtlListInsertTail_Otg(IN _LIST *plist,IN _LIST *phead);
_LONG_CALL_ _LIST *RtlListGetNext_Otg(IN _LIST *plist);
_LONG_CALL_ VOID RtlListDelete_Otg(IN _LIST *plist);
extern _LONG_CALL_ char *DWC_STRDUP_ROM(char const *str);
extern _LONG_CALL_ int DWC_ATOI_ROM(const char *str, int32_t *value);
extern _LONG_CALL_ int DWC_ATOUI_ROM(const char *str, uint32_t *value);
// RAM
void dwc_otg_wrapper_init(IN VOID);

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/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_core_if.h $
* $Revision: #15 $
* $Date: 2012/12/10 $
* $Change: 2123206 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#if !defined(__DWC_CORE_IF_H__)
#define __DWC_CORE_IF_H__
#include "dwc_os.h"
/** @file
* This file defines DWC_OTG Core API
*/
struct dwc_otg_core_if;
typedef struct dwc_otg_core_if dwc_otg_core_if_t;
/** Maximum number of Periodic FIFOs */
#define MAX_PERIO_FIFOS 15
/** Maximum number of Periodic FIFOs */
#define MAX_TX_FIFOS 15
/** Maximum number of Endpoints/HostChannels */
#define MAX_EPS_CHANNELS 16
extern dwc_otg_core_if_t *dwc_otg_cil_init(const uint32_t * _reg_base_addr);
extern void dwc_otg_core_init(dwc_otg_core_if_t * _core_if);
extern void dwc_otg_cil_remove(dwc_otg_core_if_t * _core_if);
extern void dwc_otg_enable_global_interrupts(dwc_otg_core_if_t * _core_if);
extern void dwc_otg_disable_global_interrupts(dwc_otg_core_if_t * _core_if);
extern uint8_t dwc_otg_is_device_mode(dwc_otg_core_if_t * _core_if);
extern uint8_t dwc_otg_is_host_mode(dwc_otg_core_if_t * _core_if);
extern uint8_t dwc_otg_is_dma_enable(dwc_otg_core_if_t * core_if);
/** This function should be called on every hardware interrupt. */
extern int32_t dwc_otg_handle_common_intr(void *otg_dev);
/** @name OTG Core Parameters */
/** @{ */
/**
* Specifies the OTG capabilities. The driver will automatically
* detect the value for this parameter if none is specified.
* 0 - HNP and SRP capable (default)
* 1 - SRP Only capable
* 2 - No HNP/SRP capable
*/
extern int dwc_otg_set_param_otg_cap(dwc_otg_core_if_t * core_if, int32_t val);
extern int32_t dwc_otg_get_param_otg_cap(dwc_otg_core_if_t * core_if);
#define DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE 0
#define DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE 1
#define DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE 2
#define dwc_param_otg_cap_default DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE
extern int dwc_otg_set_param_opt(dwc_otg_core_if_t * core_if, int32_t val);
extern int32_t dwc_otg_get_param_opt(dwc_otg_core_if_t * core_if);
#define dwc_param_opt_default 1
/**
* Specifies whether to use slave or DMA mode for accessing the data
* FIFOs. The driver will automatically detect the value for this
* parameter if none is specified.
* 0 - Slave
* 1 - DMA (default, if available)
*/
extern int dwc_otg_set_param_dma_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_dma_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_dma_enable_default 1
/**
* When DMA mode is enabled specifies whether to use
* address DMA or DMA Descritor mode for accessing the data
* FIFOs in device mode. The driver will automatically detect
* the value for this parameter if none is specified.
* 0 - address DMA
* 1 - DMA Descriptor(default, if available)
*/
extern int dwc_otg_set_param_dma_desc_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_dma_desc_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_dma_desc_enable_default 1
/** The DMA Burst size (applicable only for External DMA
* Mode). 1, 4, 8 16, 32, 64, 128, 256 (default 32)
*/
extern int dwc_otg_set_param_dma_burst_size(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_dma_burst_size(dwc_otg_core_if_t * core_if);
#define dwc_param_dma_burst_size_default 32
/**
* Specifies the maximum speed of operation in host and device mode.
* The actual speed depends on the speed of the attached device and
* the value of phy_type. The actual speed depends on the speed of the
* attached device.
* 0 - High Speed (default)
* 1 - Full Speed
*/
extern int dwc_otg_set_param_speed(dwc_otg_core_if_t * core_if, int32_t val);
extern int32_t dwc_otg_get_param_speed(dwc_otg_core_if_t * core_if);
#define dwc_param_speed_default 0
#define DWC_SPEED_PARAM_HIGH 0
#define DWC_SPEED_PARAM_FULL 1
/** Specifies whether low power mode is supported when attached
* to a Full Speed or Low Speed device in host mode.
* 0 - Don't support low power mode (default)
* 1 - Support low power mode
*/
extern int dwc_otg_set_param_host_support_fs_ls_low_power(dwc_otg_core_if_t *
core_if, int32_t val);
extern int32_t dwc_otg_get_param_host_support_fs_ls_low_power(dwc_otg_core_if_t
* core_if);
#define dwc_param_host_support_fs_ls_low_power_default 0
/** Specifies the PHY clock rate in low power mode when connected to a
* Low Speed device in host mode. This parameter is applicable only if
* HOST_SUPPORT_FS_LS_LOW_POWER is enabled. If PHY_TYPE is set to FS
* then defaults to 6 MHZ otherwise 48 MHZ.
*
* 0 - 48 MHz
* 1 - 6 MHz
*/
extern int dwc_otg_set_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t *
core_if, int32_t val);
extern int32_t dwc_otg_get_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t *
core_if);
#define dwc_param_host_ls_low_power_phy_clk_default 0
#define DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
#define DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1
/**
* 0 - Use cC FIFO size parameters
* 1 - Allow dynamic FIFO sizing (default)
*/
extern int dwc_otg_set_param_enable_dynamic_fifo(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_enable_dynamic_fifo(dwc_otg_core_if_t *
core_if);
#define dwc_param_enable_dynamic_fifo_default 1
/** Total number of 4-byte words in the data FIFO memory. This
* memory includes the Rx FIFO, non-periodic Tx FIFO, and periodic
* Tx FIFOs.
* 32 to 32768 (default 8192)
* Note: The total FIFO memory depth in the FPGA configuration is 8192.
*/
extern int dwc_otg_set_param_data_fifo_size(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_data_fifo_size(dwc_otg_core_if_t * core_if);
#define dwc_param_data_fifo_size_default 8192
/** Number of 4-byte words in the Rx FIFO in device mode when dynamic
* FIFO sizing is enabled.
* 16 to 32768 (default 1064)
*/
extern int dwc_otg_set_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if);
#define dwc_param_dev_rx_fifo_size_default 1064
/** Number of 4-byte words in the non-periodic Tx FIFO in device mode
* when dynamic FIFO sizing is enabled.
* 16 to 32768 (default 1024)
*/
extern int dwc_otg_set_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t *
core_if, int32_t val);
extern int32_t dwc_otg_get_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t *
core_if);
#define dwc_param_dev_nperio_tx_fifo_size_default 1024
/** Number of 4-byte words in each of the periodic Tx FIFOs in device
* mode when dynamic FIFO sizing is enabled.
* 4 to 768 (default 256)
*/
extern int dwc_otg_set_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * core_if,
int32_t val, int fifo_num);
extern int32_t dwc_otg_get_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t *
core_if, int fifo_num);
#define dwc_param_dev_perio_tx_fifo_size_default 256
/** Number of 4-byte words in the Rx FIFO in host mode when dynamic
* FIFO sizing is enabled.
* 16 to 32768 (default 1024)
*/
extern int dwc_otg_set_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if);
#define dwc_param_host_rx_fifo_size_default 1024
/** Number of 4-byte words in the non-periodic Tx FIFO in host mode
* when Dynamic FIFO sizing is enabled in the core.
* 16 to 32768 (default 1024)
*/
extern int dwc_otg_set_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t *
core_if, int32_t val);
extern int32_t dwc_otg_get_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t *
core_if);
#define dwc_param_host_nperio_tx_fifo_size_default 1024
/** Number of 4-byte words in the host periodic Tx FIFO when dynamic
* FIFO sizing is enabled.
* 16 to 32768 (default 1024)
*/
extern int dwc_otg_set_param_host_perio_tx_fifo_size(dwc_otg_core_if_t *
core_if, int32_t val);
extern int32_t dwc_otg_get_param_host_perio_tx_fifo_size(dwc_otg_core_if_t *
core_if);
#define dwc_param_host_perio_tx_fifo_size_default 1024
/** The maximum transfer size supported in bytes.
* 2047 to 65,535 (default 65,535)
*/
extern int dwc_otg_set_param_max_transfer_size(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_max_transfer_size(dwc_otg_core_if_t * core_if);
#define dwc_param_max_transfer_size_default 65535
/** The maximum number of packets in a transfer.
* 15 to 511 (default 511)
*/
extern int dwc_otg_set_param_max_packet_count(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_max_packet_count(dwc_otg_core_if_t * core_if);
#define dwc_param_max_packet_count_default 511
/** The number of host channel registers to use.
* 1 to 16 (default 12)
* Note: The FPGA configuration supports a maximum of 12 host channels.
*/
extern int dwc_otg_set_param_host_channels(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_host_channels(dwc_otg_core_if_t * core_if);
#define dwc_param_host_channels_default 12
/** The number of endpoints in addition to EP0 available for device
* mode operations.
* 1 to 15 (default 6 IN and OUT)
* Note: The FPGA configuration supports a maximum of 6 IN and OUT
* endpoints in addition to EP0.
*/
extern int dwc_otg_set_param_dev_endpoints(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_dev_endpoints(dwc_otg_core_if_t * core_if);
#define dwc_param_dev_endpoints_default 6
/**
* Specifies the type of PHY interface to use. By default, the driver
* will automatically detect the phy_type.
*
* 0 - Full Speed PHY
* 1 - UTMI+ (default)
* 2 - ULPI
*/
extern int dwc_otg_set_param_phy_type(dwc_otg_core_if_t * core_if, int32_t val);
extern int32_t dwc_otg_get_param_phy_type(dwc_otg_core_if_t * core_if);
#define DWC_PHY_TYPE_PARAM_FS 0
#define DWC_PHY_TYPE_PARAM_UTMI 1
#define DWC_PHY_TYPE_PARAM_ULPI 2
#define dwc_param_phy_type_default DWC_PHY_TYPE_PARAM_UTMI
/**
* Specifies the UTMI+ Data Width. This parameter is
* applicable for a PHY_TYPE of UTMI+ or ULPI. (For a ULPI
* PHY_TYPE, this parameter indicates the data width between
* the MAC and the ULPI Wrapper.) Also, this parameter is
* applicable only if the OTG_HSPHY_WIDTH cC parameter was set
* to "8 and 16 bits", meaning that the core has been
* configured to work at either data path width.
*
* 8 or 16 bits (default 16)
*/
extern int dwc_otg_set_param_phy_utmi_width(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_phy_utmi_width(dwc_otg_core_if_t * core_if);
#define dwc_param_phy_utmi_width_default 16
/**
* Specifies whether the ULPI operates at double or single
* data rate. This parameter is only applicable if PHY_TYPE is
* ULPI.
*
* 0 - single data rate ULPI interface with 8 bit wide data
* bus (default)
* 1 - double data rate ULPI interface with 4 bit wide data
* bus
*/
extern int dwc_otg_set_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if);
#define dwc_param_phy_ulpi_ddr_default 0
/**
* Specifies whether to use the internal or external supply to
* drive the vbus with a ULPI phy.
*/
extern int dwc_otg_set_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if);
#define DWC_PHY_ULPI_INTERNAL_VBUS 0
#define DWC_PHY_ULPI_EXTERNAL_VBUS 1
#define dwc_param_phy_ulpi_ext_vbus_default DWC_PHY_ULPI_INTERNAL_VBUS
/**
* Specifies whether to use the I2Cinterface for full speed PHY. This
* parameter is only applicable if PHY_TYPE is FS.
* 0 - No (default)
* 1 - Yes
*/
extern int dwc_otg_set_param_i2c_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_i2c_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_i2c_enable_default 0
extern int dwc_otg_set_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if);
#define dwc_param_ulpi_fs_ls_default 0
extern int dwc_otg_set_param_ts_dline(dwc_otg_core_if_t * core_if, int32_t val);
extern int32_t dwc_otg_get_param_ts_dline(dwc_otg_core_if_t * core_if);
#define dwc_param_ts_dline_default 0
/**
* Specifies whether dedicated transmit FIFOs are
* enabled for non periodic IN endpoints in device mode
* 0 - No
* 1 - Yes
*/
extern int dwc_otg_set_param_en_multiple_tx_fifo(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_en_multiple_tx_fifo(dwc_otg_core_if_t *
core_if);
#define dwc_param_en_multiple_tx_fifo_default 1
/** Number of 4-byte words in each of the Tx FIFOs in device
* mode when dynamic FIFO sizing is enabled.
* 4 to 768 (default 256)
*/
//extern int dwc_otg_set_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if,
// int fifo_num, int32_t val);
extern int dwc_otg_set_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if, int32_t val,
int fifo_num);
extern int32_t dwc_otg_get_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if,
int fifo_num);
#define dwc_param_dev_tx_fifo_size_default 256
/** Thresholding enable flag-
* bit 0 - enable non-ISO Tx thresholding
* bit 1 - enable ISO Tx thresholding
* bit 2 - enable Rx thresholding
*/
extern int dwc_otg_set_param_thr_ctl(dwc_otg_core_if_t * core_if, int32_t val);
extern int32_t dwc_otg_get_thr_ctl(dwc_otg_core_if_t * core_if, int fifo_num);
#define dwc_param_thr_ctl_default 0
/** Thresholding length for Tx
* FIFOs in 32 bit DWORDs
*/
extern int dwc_otg_set_param_tx_thr_length(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_tx_thr_length(dwc_otg_core_if_t * core_if);
#define dwc_param_tx_thr_length_default 64
/** Thresholding length for Rx
* FIFOs in 32 bit DWORDs
*/
extern int dwc_otg_set_param_rx_thr_length(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_rx_thr_length(dwc_otg_core_if_t * core_if);
#define dwc_param_rx_thr_length_default 64
/**
* Specifies whether LPM (Link Power Management) support is enabled
*/
extern int dwc_otg_set_param_lpm_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_lpm_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_lpm_enable_default 1
/**
* Specifies whether LPM Errata (Link Power Management) support is enabled
*/
extern int dwc_otg_set_param_besl_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_besl_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_besl_enable_default 0
/**
* Specifies baseline_besl default value
*/
extern int dwc_otg_set_param_baseline_besl(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_baseline_besl(dwc_otg_core_if_t * core_if);
#define dwc_param_baseline_besl_default 0
/**
* Specifies deep_besl default value
*/
extern int dwc_otg_set_param_deep_besl(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_deep_besl(dwc_otg_core_if_t * core_if);
#define dwc_param_deep_besl_default 15
/**
* Specifies whether PTI enhancement is enabled
*/
extern int dwc_otg_set_param_pti_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_pti_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_pti_enable_default 0
/**
* Specifies whether MPI enhancement is enabled
*/
extern int dwc_otg_set_param_mpi_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_mpi_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_mpi_enable_default 0
/**
* Specifies whether ADP capability is enabled
*/
extern int dwc_otg_set_param_adp_enable(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_adp_enable(dwc_otg_core_if_t * core_if);
#define dwc_param_adp_enable_default 0
/**
* Specifies whether IC_USB capability is enabled
*/
extern int dwc_otg_set_param_ic_usb_cap(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_ic_usb_cap(dwc_otg_core_if_t * core_if);
#define dwc_param_ic_usb_cap_default 0
extern int dwc_otg_set_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if);
#define dwc_param_ahb_thr_ratio_default 0
extern int dwc_otg_set_param_power_down(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_power_down(dwc_otg_core_if_t * core_if);
#define dwc_param_power_down_default 0
extern int dwc_otg_set_param_reload_ctl(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_reload_ctl(dwc_otg_core_if_t * core_if);
#define dwc_param_reload_ctl_default 0
extern int dwc_otg_set_param_dev_out_nak(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_dev_out_nak(dwc_otg_core_if_t * core_if);
#define dwc_param_dev_out_nak_default 0
extern int dwc_otg_set_param_cont_on_bna(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_cont_on_bna(dwc_otg_core_if_t * core_if);
#define dwc_param_cont_on_bna_default 0
extern int dwc_otg_set_param_ahb_single(dwc_otg_core_if_t * core_if,
int32_t val);
extern int32_t dwc_otg_get_param_ahb_single(dwc_otg_core_if_t * core_if);
#define dwc_param_ahb_single_default 0
extern int dwc_otg_set_param_otg_ver(dwc_otg_core_if_t * core_if, int32_t val);
extern int32_t dwc_otg_get_param_otg_ver(dwc_otg_core_if_t * core_if);
#define dwc_param_otg_ver_default 0
/** @} */
/** @name Access to registers and bit-fields */
/**
* Dump core registers and SPRAM
*/
extern void dwc_otg_dump_dev_registers(dwc_otg_core_if_t * _core_if);
extern void dwc_otg_dump_spram(dwc_otg_core_if_t * _core_if);
extern void dwc_otg_dump_host_registers(dwc_otg_core_if_t * _core_if);
extern void dwc_otg_dump_global_registers(dwc_otg_core_if_t * _core_if);
/**
* Get host negotiation status.
*/
extern uint32_t dwc_otg_get_hnpstatus(dwc_otg_core_if_t * core_if);
/**
* Get srp status
*/
extern uint32_t dwc_otg_get_srpstatus(dwc_otg_core_if_t * core_if);
/**
* Set hnpreq bit in the GOTGCTL register.
*/
extern void dwc_otg_set_hnpreq(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get Content of SNPSID register.
*/
extern uint32_t dwc_otg_get_gsnpsid(dwc_otg_core_if_t * core_if);
/**
* Get current mode.
* Returns 0 if in device mode, and 1 if in host mode.
*/
extern uint32_t dwc_otg_get_mode(dwc_otg_core_if_t * core_if);
/**
* Get value of hnpcapable field in the GUSBCFG register
*/
extern uint32_t dwc_otg_get_hnpcapable(dwc_otg_core_if_t * core_if);
/**
* Set value of hnpcapable field in the GUSBCFG register
*/
extern void dwc_otg_set_hnpcapable(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of srpcapable field in the GUSBCFG register
*/
extern uint32_t dwc_otg_get_srpcapable(dwc_otg_core_if_t * core_if);
/**
* Set value of srpcapable field in the GUSBCFG register
*/
extern void dwc_otg_set_srpcapable(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of devspeed field in the DCFG register
*/
extern uint32_t dwc_otg_get_devspeed(dwc_otg_core_if_t * core_if);
/**
* Set value of devspeed field in the DCFG register
*/
extern void dwc_otg_set_devspeed(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get the value of busconnected field from the HPRT0 register
*/
extern uint32_t dwc_otg_get_busconnected(dwc_otg_core_if_t * core_if);
/**
* Gets the device enumeration Speed.
*/
extern uint32_t dwc_otg_get_enumspeed(dwc_otg_core_if_t * core_if);
/**
* Get value of prtpwr field from the HPRT0 register
*/
extern uint32_t dwc_otg_get_prtpower(dwc_otg_core_if_t * core_if);
/**
* Get value of flag indicating core state - hibernated or not
*/
extern uint32_t dwc_otg_get_core_state(dwc_otg_core_if_t * core_if);
/**
* Set value of prtpwr field from the HPRT0 register
*/
extern void dwc_otg_set_prtpower(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of prtsusp field from the HPRT0 regsiter
*/
extern uint32_t dwc_otg_get_prtsuspend(dwc_otg_core_if_t * core_if);
/**
* Set value of prtpwr field from the HPRT0 register
*/
extern void dwc_otg_set_prtsuspend(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of ModeChTimEn field from the HCFG regsiter
*/
extern uint32_t dwc_otg_get_mode_ch_tim(dwc_otg_core_if_t * core_if);
/**
* Set value of ModeChTimEn field from the HCFG regsiter
*/
extern void dwc_otg_set_mode_ch_tim(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of Fram Interval field from the HFIR regsiter
*/
extern uint32_t dwc_otg_get_fr_interval(dwc_otg_core_if_t * core_if);
/**
* Set value of Frame Interval field from the HFIR regsiter
*/
extern void dwc_otg_set_fr_interval(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Set value of prtres field from the HPRT0 register
*FIXME Remove?
*/
extern void dwc_otg_set_prtresume(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of rmtwkupsig bit in DCTL register
*/
extern uint32_t dwc_otg_get_remotewakesig(dwc_otg_core_if_t * core_if);
/**
* Get value of besl_reject bit in DCTL register
*/
extern uint32_t dwc_otg_get_beslreject(dwc_otg_core_if_t * core_if);
/**
* Set value of besl_reject bit in DCTL register
*/
extern void dwc_otg_set_beslreject(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of prt_sleep_sts field from the GLPMCFG register
*/
extern uint32_t dwc_otg_get_lpm_portsleepstatus(dwc_otg_core_if_t * core_if);
/**
* Get value of rem_wkup_en field from the GLPMCFG register
*/
extern uint32_t dwc_otg_get_lpm_remotewakeenabled(dwc_otg_core_if_t * core_if);
/**
* Get value of appl_resp field from the GLPMCFG register
*/
extern uint32_t dwc_otg_get_lpmresponse(dwc_otg_core_if_t * core_if);
/**
* Set value of appl_resp field from the GLPMCFG register
*/
extern void dwc_otg_set_lpmresponse(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of hsic_connect field from the GLPMCFG register
*/
extern uint32_t dwc_otg_get_hsic_connect(dwc_otg_core_if_t * core_if);
/**
* Set value of hsic_connect field from the GLPMCFG register
*/
extern void dwc_otg_set_hsic_connect(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of inv_sel_hsic field from the GLPMCFG register.
*/
extern uint32_t dwc_otg_get_inv_sel_hsic(dwc_otg_core_if_t * core_if);
/**
* Set value of inv_sel_hsic field from the GLPMFG register.
*/
extern void dwc_otg_set_inv_sel_hsic(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Set value of hird_thresh field from the GLPMFG register.
*/
extern void dwc_otg_set_hirdthresh(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* Get value of hird_thresh field from the GLPMFG register.
*/
extern uint32_t dwc_otg_get_hirdthresh(dwc_otg_core_if_t * core_if);
/*
* Some functions for accessing registers
*/
/**
* GOTGCTL register
*/
extern uint32_t dwc_otg_get_gotgctl(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_gotgctl(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* GUSBCFG register
*/
extern uint32_t dwc_otg_get_gusbcfg(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_gusbcfg(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* GRXFSIZ register
*/
extern uint32_t dwc_otg_get_grxfsiz(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_grxfsiz(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* GNPTXFSIZ register
*/
extern uint32_t dwc_otg_get_gnptxfsiz(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_gnptxfsiz(dwc_otg_core_if_t * core_if, uint32_t val);
extern uint32_t dwc_otg_get_gpvndctl(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_gpvndctl(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* GGPIO register
*/
extern uint32_t dwc_otg_get_ggpio(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_ggpio(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* GUID register
*/
extern uint32_t dwc_otg_get_guid(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_guid(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* HPRT0 register
*/
extern uint32_t dwc_otg_get_hprt0(dwc_otg_core_if_t * core_if);
extern void dwc_otg_set_hprt0(dwc_otg_core_if_t * core_if, uint32_t val);
/**
* GHPTXFSIZE
*/
extern uint32_t dwc_otg_get_hptxfsiz(dwc_otg_core_if_t * core_if);
/** @} */
#endif /* __DWC_CORE_IF_H__ */

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/* ==========================================================================
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#ifndef __DWC_OTG_DBG_H__
#define __DWC_OTG_DBG_H__
#include "section_config.h"
//#define OTGDEBUG 0
#undef OTGDEBUG
#define VERBOSE 1
/** @file
* This file defines debug levels.
* Debugging support vanishes in non-debug builds.
*/
/**
* The Debug Level bit-mask variable.
*/
extern uint32_t g_dbg_lvl;
/**
* Set the Debug Level variable.
*/
extern _LONG_CALL_ uint32_t SET_DEBUG_LEVEL(const uint32_t new);
/** When debug level has the DBG_CIL bit set, display CIL Debug messages. */
#define DBG_CIL (0x2)
/** When debug level has the DBG_CILV bit set, display CIL Verbose debug
* messages */
#define DBG_CILV (0x20)
/** When debug level has the DBG_PCD bit set, display PCD (Device) debug
* messages */
#define DBG_PCD (0x4)
/** When debug level has the DBG_PCDV set, display PCD (Device) Verbose debug
* messages */
#define DBG_PCDV (0x40)
/** When debug level has the DBG_HCD bit set, display Host debug messages */
#define DBG_HCD (0x8)
/** When debug level has the DBG_HCDV bit set, display Verbose Host debug
* messages */
#define DBG_HCDV (0x80)
/** When debug level has the DBG_HCD_URB bit set, display enqueued URBs in host
* mode. */
#define DBG_HCD_URB (0x800)
/** When debug level has any bit set, display debug messages */
#define DBG_ANY (0xFF)
/** All debug messages off */
#define DBG_OFF 0
/** Prefix string for DWC_DEBUG print macros. */
#define USB_DWC "DWC_otg: "
/**
* Print a debug message when the Global debug level variable contains
* the bit defined in <code>lvl</code>.
*
* @param[in] lvl - Debug level, use one of the DBG_ constants above.
* @param[in] x - like printf
*
* Example:<p>
* <code>
* DWC_DEBUGPL( DBG_ANY, "%s(%p)\n", __func__, _reg_base_addr);
* </code>
* <br>
* results in:<br>
* <code>
* usb-DWC_otg: dwc_otg_cil_init(ca867000)
* </code>
*/
#ifdef OTGDEBUG
//# define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl)__DWC_DEBUG(USB_DWC x ); }while(0)
# define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl)DBG_8195A_OTG(x); }while(0)
# define DWC_DEBUGP(x...) DWC_DEBUGPL(DBG_ANY, x )
# define CHK_DEBUG_LEVEL(level) ((level) & g_dbg_lvl)
#else
# define DWC_DEBUGPL(lvl, x...) do{}while(0)
# define DWC_DEBUGP(x...)
# define CHK_DEBUG_LEVEL(level) (0)
#endif /*DEBUG*/
#endif

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/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.h $
* $Revision: #19 $
* $Date: 2010/11/15 $
* $Change: 1627671 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#ifndef __DWC_OTG_DRIVER_H__
#define __DWC_OTG_DRIVER_H__
/** @file
* This file contains the interface to the Linux driver.
*/
//#include "dwc_otg_os_dep.h"
#include "dwc_otg_core_if.h"
/* Type declarations */
struct dwc_otg_pcd;
struct dwc_otg_hcd;
/**
* This structure is a wrapper that encapsulates the driver components used to
* manage a single DWC_otg controller.
*/
typedef struct dwc_otg_device {
/** Structure containing OS-dependent stuff. KEEP THIS STRUCT AT THE
* VERY BEGINNING OF THE DEVICE STRUCT. OSes such as FreeBSD and NetBSD
* require this. */
//struct os_dependent os_dep;
/** Base address returned from ioremap() */
void *base;
uint32_t reg_offset;
/** Pointer to the core interface structure. */
dwc_otg_core_if_t *core_if;
/** Pointer to the PCD structure. */
struct dwc_otg_pcd *pcd;
/** Pointer to the HCD structure. */
struct dwc_otg_hcd *hcd;
/** Flag to indicate whether the common IRQ handler is installed. */
uint8_t common_irq_installed;
} dwc_otg_device_t;
/*We must clear S3C24XX_EINTPEND external interrupt register
* because after clearing in this register trigerred IRQ from
* H/W core in kernel interrupt can be occured again before OTG
* handlers clear all IRQ sources of Core registers because of
* timing latencies and Low Level IRQ Type.
*/
#ifdef CONFIG_MACH_IPMATE
#define S3C2410X_CLEAR_EINTPEND() \
do { \
__raw_writel(1UL << 11,S3C24XX_EINTPEND); \
} while (0)
#else
#define S3C2410X_CLEAR_EINTPEND() do { } while (0)
#endif
typedef struct USB_OTG_DRV_ADP {
dwc_otg_device_t *otgdev;
IRQ_HANDLE *pIrqHnd;
#if !TASK_SCHEDULER_DISABLED
_Sema Sema;
#else
u32 Sema;
#endif
#ifdef PLATFORM_FREERTOS
xTaskHandle OTGTask;
#else
u32 OTGTask;
#endif
}USB_OTG_DRV_ADP,*PUSB_OTG_DRV_ADP;
typedef struct _DWC_OTG_ADAPTER_ {
u32 temp0;
dwc_otg_device_t *otgdev;
u8 TestItem;
}DWC_OTG_ADAPTER, *PDWC_OTG_ADAPTER;
#endif

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/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd.h $
* $Revision: #58 $
* $Date: 2011/09/15 $
* $Change: 1846647 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#ifndef DWC_DEVICE_ONLY
#ifndef __DWC_HCD_H__
#define __DWC_HCD_H__
//#include "dwc_otg_os_dep.h"
#include "usb.h"
#include "dwc_otg_hcd_if.h"
#include "dwc_otg_core_if.h"
#include "dwc_list.h"
#include "dwc_otg_cil.h"
/**
* @file
*
* This file contains the structures, constants, and interfaces for
* the Host Contoller Driver (HCD).
*
* The Host Controller Driver (HCD) is responsible for translating requests
* from the USB Driver into the appropriate actions on the DWC_otg controller.
* It isolates the USBD from the specifics of the controller by providing an
* API to the USBD.
*/
struct dwc_otg_hcd_pipe_info {
uint8_t dev_addr;
uint8_t ep_num;
uint8_t pipe_type;
uint8_t pipe_dir;
uint16_t mps;
};
struct dwc_otg_hcd_iso_packet_desc {
uint32_t offset;
uint32_t length;
uint32_t actual_length;
uint32_t status;
};
struct dwc_otg_qtd;
struct dwc_otg_hcd_urb {
void *priv;
struct dwc_otg_qtd *qtd;
void *buf;
dwc_dma_t dma;
void *setup_packet;
dwc_dma_t setup_dma;
uint32_t length;
uint32_t actual_length;
uint32_t status;
uint32_t error_count;
uint32_t packet_count;
uint32_t flags;
uint16_t interval;
struct dwc_otg_hcd_pipe_info pipe_info;
struct dwc_otg_hcd_iso_packet_desc iso_descs[0];
};
static inline uint8_t dwc_otg_hcd_get_ep_num(struct dwc_otg_hcd_pipe_info *pipe)
{
return pipe->ep_num;
}
static inline uint8_t dwc_otg_hcd_get_pipe_type(struct dwc_otg_hcd_pipe_info
*pipe)
{
return pipe->pipe_type;
}
static inline uint16_t dwc_otg_hcd_get_mps(struct dwc_otg_hcd_pipe_info *pipe)
{
return pipe->mps;
}
static inline uint8_t dwc_otg_hcd_get_dev_addr(struct dwc_otg_hcd_pipe_info
*pipe)
{
return pipe->dev_addr;
}
static inline uint8_t dwc_otg_hcd_is_pipe_isoc(struct dwc_otg_hcd_pipe_info
*pipe)
{
return (pipe->pipe_type == UE_ISOCHRONOUS);
}
static inline uint8_t dwc_otg_hcd_is_pipe_int(struct dwc_otg_hcd_pipe_info
*pipe)
{
return (pipe->pipe_type == UE_INTERRUPT);
}
static inline uint8_t dwc_otg_hcd_is_pipe_bulk(struct dwc_otg_hcd_pipe_info
*pipe)
{
return (pipe->pipe_type == UE_BULK);
}
static inline uint8_t dwc_otg_hcd_is_pipe_control(struct dwc_otg_hcd_pipe_info
*pipe)
{
return (pipe->pipe_type == UE_CONTROL);
}
static inline uint8_t dwc_otg_hcd_is_pipe_in(struct dwc_otg_hcd_pipe_info *pipe)
{
return (pipe->pipe_dir == UE_DIR_IN);
}
static inline uint8_t dwc_otg_hcd_is_pipe_out(struct dwc_otg_hcd_pipe_info
*pipe)
{
return (!dwc_otg_hcd_is_pipe_in(pipe));
}
static inline void dwc_otg_hcd_fill_pipe(struct dwc_otg_hcd_pipe_info *pipe,
uint8_t devaddr, uint8_t ep_num,
uint8_t pipe_type, uint8_t pipe_dir,
uint16_t mps)
{
pipe->dev_addr = devaddr;
pipe->ep_num = ep_num;
pipe->pipe_type = pipe_type;
pipe->pipe_dir = pipe_dir;
pipe->mps = mps;
}
/**
* Phases for control transfers.
*/
typedef enum dwc_otg_control_phase {
DWC_OTG_CONTROL_SETUP,
DWC_OTG_CONTROL_DATA,
DWC_OTG_CONTROL_STATUS
} dwc_otg_control_phase_e;
/** Transaction types. */
typedef enum dwc_otg_transaction_type {
DWC_OTG_TRANSACTION_NONE,
DWC_OTG_TRANSACTION_PERIODIC,
DWC_OTG_TRANSACTION_NON_PERIODIC,
DWC_OTG_TRANSACTION_ALL
} dwc_otg_transaction_type_e;
struct dwc_otg_qh;
/**
* A Queue Transfer Descriptor (QTD) holds the state of a bulk, control,
* interrupt, or isochronous transfer. A single QTD is created for each URB
* (of one of these types) submitted to the HCD. The transfer associated with
* a QTD may require one or multiple transactions.
*
* A QTD is linked to a Queue Head, which is entered in either the
* non-periodic or periodic schedule for execution. When a QTD is chosen for
* execution, some or all of its transactions may be executed. After
* execution, the state of the QTD is updated. The QTD may be retired if all
* its transactions are complete or if an error occurred. Otherwise, it
* remains in the schedule so more transactions can be executed later.
*/
typedef struct dwc_otg_qtd {
/**
* Determines the PID of the next data packet for the data phase of
* control transfers. Ignored for other transfer types.<br>
* One of the following values:
* - DWC_OTG_HC_PID_DATA0
* - DWC_OTG_HC_PID_DATA1
*/
uint8_t data_toggle;
/** Current phase for control transfers (Setup, Data, or Status). */
dwc_otg_control_phase_e control_phase;
/** Keep track of the current split type
* for FS/LS endpoints on a HS Hub */
uint8_t complete_split;
/** How many bytes transferred during SSPLIT OUT */
uint32_t ssplit_out_xfer_count;
/**
* Holds the number of bus errors that have occurred for a transaction
* within this transfer.
*/
uint8_t error_count;
/**
* Index of the next frame descriptor for an isochronous transfer. A
* frame descriptor describes the buffer position and length of the
* data to be transferred in the next scheduled (micro)frame of an
* isochronous transfer. It also holds status for that transaction.
* The frame index starts at 0.
*/
uint16_t isoc_frame_index;
/** Position of the ISOC split on full/low speed */
uint8_t isoc_split_pos;
/** Position of the ISOC split in the buffer for the current frame */
uint16_t isoc_split_offset;
/** URB for this transfer */
struct dwc_otg_hcd_urb *urb;
struct dwc_otg_qh *qh;
/** This list of QTDs */
DWC_CIRCLEQ_ENTRY(dwc_otg_qtd) qtd_list_entry;
/** Indicates if this QTD is currently processed by HW. */
uint8_t in_process;
/** Number of DMA descriptors for this QTD */
uint8_t n_desc;
/**
* Last activated frame(packet) index.
* Used in Descriptor DMA mode only.
*/
uint16_t isoc_frame_index_last;
} dwc_otg_qtd_t;
DWC_CIRCLEQ_HEAD(dwc_otg_qtd_list, dwc_otg_qtd);
/**
* A Queue Head (QH) holds the static characteristics of an endpoint and
* maintains a list of transfers (QTDs) for that endpoint. A QH structure may
* be entered in either the non-periodic or periodic schedule.
*/
typedef struct dwc_otg_qh {
/**
* Endpoint type.
* One of the following values:
* - UE_CONTROL
* - UE_BULK
* - UE_INTERRUPT
* - UE_ISOCHRONOUS
*/
uint8_t ep_type;
uint8_t ep_is_in;
/** wMaxPacketSize Field of Endpoint Descriptor. */
uint16_t maxp;
/**
* Device speed.
* One of the following values:
* - DWC_OTG_EP_SPEED_LOW
* - DWC_OTG_EP_SPEED_FULL
* - DWC_OTG_EP_SPEED_HIGH
*/
uint8_t dev_speed;
/**
* Determines the PID of the next data packet for non-control
* transfers. Ignored for control transfers.<br>
* One of the following values:
* - DWC_OTG_HC_PID_DATA0
* - DWC_OTG_HC_PID_DATA1
*/
uint8_t data_toggle;
/** Ping state if 1. */
uint8_t ping_state;
/**
* List of QTDs for this QH.
*/
struct dwc_otg_qtd_list qtd_list;
/** Host channel currently processing transfers for this QH. */
struct dwc_hc *channel;
/** Full/low speed endpoint on high-speed hub requires split. */
uint8_t do_split;
/** @name Periodic schedule information */
/** @{ */
/** Bandwidth in microseconds per (micro)frame. */
uint16_t usecs;
/** Interval between transfers in (micro)frames. */
uint16_t interval;
/**
* (micro)frame to initialize a periodic transfer. The transfer
* executes in the following (micro)frame.
*/
uint16_t sched_frame;
/** (micro)frame at which last start split was initialized. */
uint16_t start_split_frame;
/** @} */
/**
* Used instead of original buffer if
* it(physical address) is not dword-aligned.
*/
uint8_t *dw_align_buf;
dwc_dma_t dw_align_buf_dma;
/** Entry for QH in either the periodic or non-periodic schedule. */
dwc_list_link_t qh_list_entry;
/** @name Descriptor DMA support */
/** @{ */
/** Descriptor List. */
dwc_otg_host_dma_desc_t *desc_list;
/** Descriptor List physical address. */
dwc_dma_t desc_list_dma;
/**
* Xfer Bytes array.
* Each element corresponds to a descriptor and indicates
* original XferSize size value for the descriptor.
*/
uint32_t *n_bytes;
/** Actual number of transfer descriptors in a list. */
uint16_t ntd;
/** First activated isochronous transfer descriptor index. */
uint8_t td_first;
/** Last activated isochronous transfer descriptor index. */
uint8_t td_last;
/** @} */
} dwc_otg_qh_t;
DWC_CIRCLEQ_HEAD(hc_list, dwc_hc);
/**
* This structure holds the state of the HCD, including the non-periodic and
* periodic schedules.
*/
struct dwc_otg_hcd {
/** The DWC otg device pointer */
struct dwc_otg_device *otg_dev;
/** DWC OTG Core Interface Layer */
dwc_otg_core_if_t *core_if;
/** Function HCD driver callbacks */
struct dwc_otg_hcd_function_ops *fops;
/** Internal DWC HCD Flags */
volatile union dwc_otg_hcd_internal_flags {
uint32_t d32;
struct {
unsigned port_connect_status_change:1;
unsigned port_connect_status:1;
unsigned port_reset_change:1;
unsigned port_enable_change:1;
unsigned port_suspend_change:1;
unsigned port_over_current_change:1;
unsigned port_l1_change:1;
unsigned reserved:26;
} b;
} flags;
/**
* Inactive items in the non-periodic schedule. This is a list of
* Queue Heads. Transfers associated with these Queue Heads are not
* currently assigned to a host channel.
*/
dwc_list_link_t non_periodic_sched_inactive;
/**
* Active items in the non-periodic schedule. This is a list of
* Queue Heads. Transfers associated with these Queue Heads are
* currently assigned to a host channel.
*/
dwc_list_link_t non_periodic_sched_active;
/**
* Pointer to the next Queue Head to process in the active
* non-periodic schedule.
*/
dwc_list_link_t *non_periodic_qh_ptr;
/**
* Inactive items in the periodic schedule. This is a list of QHs for
* periodic transfers that are _not_ scheduled for the next frame.
* Each QH in the list has an interval counter that determines when it
* needs to be scheduled for execution. This scheduling mechanism
* allows only a simple calculation for periodic bandwidth used (i.e.
* must assume that all periodic transfers may need to execute in the
* same frame). However, it greatly simplifies scheduling and should
* be sufficient for the vast majority of OTG hosts, which need to
* connect to a small number of peripherals at one time.
*
* Items move from this list to periodic_sched_ready when the QH
* interval counter is 0 at SOF.
*/
dwc_list_link_t periodic_sched_inactive;
/**
* List of periodic QHs that are ready for execution in the next
* frame, but have not yet been assigned to host channels.
*
* Items move from this list to periodic_sched_assigned as host
* channels become available during the current frame.
*/
dwc_list_link_t periodic_sched_ready;
/**
* List of periodic QHs to be executed in the next frame that are
* assigned to host channels.
*
* Items move from this list to periodic_sched_queued as the
* transactions for the QH are queued to the DWC_otg controller.
*/
dwc_list_link_t periodic_sched_assigned;
/**
* List of periodic QHs that have been queued for execution.
*
* Items move from this list to either periodic_sched_inactive or
* periodic_sched_ready when the channel associated with the transfer
* is released. If the interval for the QH is 1, the item moves to
* periodic_sched_ready because it must be rescheduled for the next
* frame. Otherwise, the item moves to periodic_sched_inactive.
*/
dwc_list_link_t periodic_sched_queued;
/**
* Total bandwidth claimed so far for periodic transfers. This value
* is in microseconds per (micro)frame. The assumption is that all
* periodic transfers may occur in the same (micro)frame.
*/
uint16_t periodic_usecs;
/**
* Frame number read from the core at SOF. The value ranges from 0 to
* DWC_HFNUM_MAX_FRNUM.
*/
uint16_t frame_number;
/**
* Count of periodic QHs, if using several eps. For SOF enable/disable.
*/
uint16_t periodic_qh_count;
/**
* Free host channels in the controller. This is a list of
* dwc_hc_t items.
*/
struct hc_list free_hc_list;
/**
* Number of host channels assigned to periodic transfers. Currently
* assuming that there is a dedicated host channel for each periodic
* transaction and at least one host channel available for
* non-periodic transactions.
*/
int periodic_channels;
/**
* Number of host channels assigned to non-periodic transfers.
*/
int non_periodic_channels;
/**
* Array of pointers to the host channel descriptors. Allows accessing
* a host channel descriptor given the host channel number. This is
* useful in interrupt handlers.
*/
struct dwc_hc *hc_ptr_array[MAX_EPS_CHANNELS];
/**
* Buffer to use for any data received during the status phase of a
* control transfer. Normally no data is transferred during the status
* phase. This buffer is used as a bit bucket.
*/
uint8_t *status_buf;
/**
* DMA address for status_buf.
*/
dma_addr_t status_buf_dma;
#define DWC_OTG_HCD_STATUS_BUF_SIZE 64
/**
* Connection timer. An OTG host must display a message if the device
* does not connect. Started when the VBus power is turned on via
* sysfs attribute "buspower".
*/
dwc_timer_t *conn_timer;
/* Tasket to do a reset */
//dwc_tasklet_t *reset_tasklet;
/* */
dwc_spinlock_t *lock;
/**
* Private data that could be used by OS wrapper.
*/
void *priv;
uint8_t otg_port;
/** Frame List */
uint32_t *frame_list;
/** Frame List DMA address */
dma_addr_t frame_list_dma;
#ifdef OTGDEBUG
uint32_t frrem_samples;
uint64_t frrem_accum;
uint32_t hfnum_7_samples_a;
uint64_t hfnum_7_frrem_accum_a;
uint32_t hfnum_0_samples_a;
uint64_t hfnum_0_frrem_accum_a;
uint32_t hfnum_other_samples_a;
uint64_t hfnum_other_frrem_accum_a;
uint32_t hfnum_7_samples_b;
uint64_t hfnum_7_frrem_accum_b;
uint32_t hfnum_0_samples_b;
uint64_t hfnum_0_frrem_accum_b;
uint32_t hfnum_other_samples_b;
uint64_t hfnum_other_frrem_accum_b;
#endif
};
/** @name Transaction Execution Functions */
/** @{ */
extern dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t
* hcd);
extern void dwc_otg_hcd_queue_transactions(dwc_otg_hcd_t * hcd,
dwc_otg_transaction_type_e tr_type);
/** @} */
/** @name Interrupt Handler Functions */
/** @{ */
extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_rx_status_q_level_intr(dwc_otg_hcd_t *
dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr(dwc_otg_hcd_t *
dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_perio_tx_fifo_empty_intr(dwc_otg_hcd_t *
dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_incomplete_periodic_intr(dwc_otg_hcd_t *
dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_port_intr(dwc_otg_hcd_t * dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_conn_id_status_change_intr(dwc_otg_hcd_t *
dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_disconnect_intr(dwc_otg_hcd_t * dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd_t * dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd_t * dwc_otg_hcd,
uint32_t num);
extern int32_t dwc_otg_hcd_handle_session_req_intr(dwc_otg_hcd_t * dwc_otg_hcd);
extern int32_t dwc_otg_hcd_handle_wakeup_detected_intr(dwc_otg_hcd_t *
dwc_otg_hcd);
/** @} */
/** @name Schedule Queue Functions */
/** @{ */
/* Implemented in dwc_otg_hcd_queue.c */
extern dwc_otg_qh_t *dwc_otg_hcd_qh_create(dwc_otg_hcd_t * hcd,
dwc_otg_hcd_urb_t * urb, int atomic_alloc);
extern void dwc_otg_hcd_qh_free(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
extern int dwc_otg_hcd_qh_add(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
extern void dwc_otg_hcd_qh_remove(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
extern void dwc_otg_hcd_qh_deactivate(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh,
int sched_csplit);
/** Remove and free a QH */
static inline void dwc_otg_hcd_qh_remove_and_free(dwc_otg_hcd_t * hcd,
dwc_otg_qh_t * qh)
{
dwc_irqflags_t flags;
DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags);
dwc_otg_hcd_qh_remove(hcd, qh);
DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags);
dwc_otg_hcd_qh_free(hcd, qh);
}
/** Allocates memory for a QH structure.
* @return Returns the memory allocate or NULL on error. */
static inline dwc_otg_qh_t *dwc_otg_hcd_qh_alloc(int atomic_alloc)
{
if (atomic_alloc)
return (dwc_otg_qh_t *) DWC_ALLOC_ATOMIC(sizeof(dwc_otg_qh_t));
else
return (dwc_otg_qh_t *) DWC_ALLOC(sizeof(dwc_otg_qh_t));
}
extern dwc_otg_qtd_t *dwc_otg_hcd_qtd_create(dwc_otg_hcd_urb_t * urb,
int atomic_alloc);
extern void dwc_otg_hcd_qtd_init(dwc_otg_qtd_t * qtd, dwc_otg_hcd_urb_t * urb);
extern int dwc_otg_hcd_qtd_add(dwc_otg_qtd_t * qtd, dwc_otg_hcd_t * dwc_otg_hcd,
dwc_otg_qh_t ** qh, int atomic_alloc);
/** Allocates memory for a QTD structure.
* @return Returns the memory allocate or NULL on error. */
static inline dwc_otg_qtd_t *dwc_otg_hcd_qtd_alloc(int atomic_alloc)
{
if (atomic_alloc)
return (dwc_otg_qtd_t *) DWC_ALLOC_ATOMIC(sizeof(dwc_otg_qtd_t));
else
return (dwc_otg_qtd_t *) DWC_ALLOC(sizeof(dwc_otg_qtd_t));
}
/** Frees the memory for a QTD structure. QTD should already be removed from
* list.
* @param qtd QTD to free.*/
static inline void dwc_otg_hcd_qtd_free(dwc_otg_qtd_t * qtd)
{
DWC_FREE(qtd);
}
/** Removes a QTD from list.
* @param hcd HCD instance.
* @param qtd QTD to remove from list.
* @param qh QTD belongs to.
*/
static inline void dwc_otg_hcd_qtd_remove(dwc_otg_hcd_t * hcd,
dwc_otg_qtd_t * qtd,
dwc_otg_qh_t * qh)
{
DWC_CIRCLEQ_REMOVE(&qh->qtd_list, qtd, qtd_list_entry);
}
/** Remove and free a QTD
* Need to disable IRQ and hold hcd lock while calling this function out of
* interrupt servicing chain */
static inline void dwc_otg_hcd_qtd_remove_and_free(dwc_otg_hcd_t * hcd,
dwc_otg_qtd_t * qtd,
dwc_otg_qh_t * qh)
{
dwc_otg_hcd_qtd_remove(hcd, qtd, qh);
dwc_otg_hcd_qtd_free(qtd);
}
/** @} */
/** @name Descriptor DMA Supporting Functions */
/** @{ */
extern void dwc_otg_hcd_start_xfer_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
extern void dwc_otg_hcd_complete_xfer_ddma(dwc_otg_hcd_t * hcd,
dwc_hc_t * hc,
dwc_otg_hc_regs_t * hc_regs,
dwc_otg_halt_status_e halt_status);
extern int dwc_otg_hcd_qh_init_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
extern void dwc_otg_hcd_qh_free_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
void reset_tasklet_func(void *data);
/** @} */
/** @name Internal Functions */
/** @{ */
dwc_otg_qh_t *dwc_urb_to_qh(dwc_otg_hcd_urb_t * urb);
/** @} */
#ifdef CONFIG_USB_DWC_OTG_LPM
extern int dwc_otg_hcd_get_hc_for_lpm_tran(dwc_otg_hcd_t * hcd,
uint8_t devaddr);
extern void dwc_otg_hcd_free_hc_from_lpm(dwc_otg_hcd_t * hcd);
#endif
/** Gets the QH that contains the list_head */
#define dwc_list_to_qh(_list_head_ptr_) container_of(_list_head_ptr_, dwc_otg_qh_t, qh_list_entry)
/** Gets the QTD that contains the list_head */
#define dwc_list_to_qtd(_list_head_ptr_) container_of(_list_head_ptr_, dwc_otg_qtd_t, qtd_list_entry)
/** Check if QH is non-periodic */
#define dwc_qh_is_non_per(_qh_ptr_) ((_qh_ptr_->ep_type == UE_BULK) || \
(_qh_ptr_->ep_type == UE_CONTROL))
/** High bandwidth multiplier as encoded in highspeed endpoint descriptors */
#define dwc_hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
/** Packet size for any kind of endpoint descriptor */
#define dwc_max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
/**
* Returns true if _frame1 is less than or equal to _frame2. The comparison is
* done modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the
* frame number when the max frame number is reached.
*/
static inline int dwc_frame_num_le(uint16_t frame1, uint16_t frame2)
{
return ((frame2 - frame1) & DWC_HFNUM_MAX_FRNUM) <=
(DWC_HFNUM_MAX_FRNUM >> 1);
}
/**
* Returns true if _frame1 is greater than _frame2. The comparison is done
* modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the frame
* number when the max frame number is reached.
*/
static inline int dwc_frame_num_gt(uint16_t frame1, uint16_t frame2)
{
return (frame1 != frame2) &&
(((frame1 - frame2) & DWC_HFNUM_MAX_FRNUM) <
(DWC_HFNUM_MAX_FRNUM >> 1));
}
/**
* Increments _frame by the amount specified by _inc. The addition is done
* modulo DWC_HFNUM_MAX_FRNUM. Returns the incremented value.
*/
static inline uint16_t dwc_frame_num_inc(uint16_t frame, uint16_t inc)
{
return (frame + inc) & DWC_HFNUM_MAX_FRNUM;
}
static inline uint16_t dwc_full_frame_num(uint16_t frame)
{
return (frame & DWC_HFNUM_MAX_FRNUM) >> 3;
}
static inline uint16_t dwc_micro_frame_num(uint16_t frame)
{
return frame & 0x7;
}
void dwc_otg_hcd_save_data_toggle(dwc_hc_t * hc,
dwc_otg_hc_regs_t * hc_regs,
dwc_otg_qtd_t * qtd);
#ifdef OTGDEBUG
/**
* Macro to sample the remaining PHY clocks left in the current frame. This
* may be used during debugging to determine the average time it takes to
* execute sections of code. There are two possible sample points, "a" and
* "b", so the _letter argument must be one of these values.
*
* To dump the average sample times, read the "hcd_frrem" sysfs attribute. For
* example, "cat /sys/devices/lm0/hcd_frrem".
*/
#define dwc_sample_frrem(_hcd, _qh, _letter) \
{ \
hfnum_data_t hfnum; \
dwc_otg_qtd_t *qtd; \
qtd = list_entry(_qh->qtd_list.next, dwc_otg_qtd_t, qtd_list_entry); \
if (usb_pipeint(qtd->urb->pipe) && _qh->start_split_frame != 0 && !qtd->complete_split) { \
hfnum.d32 = DWC_READ_REG32(&_hcd->core_if->host_if->host_global_regs->hfnum); \
switch (hfnum.b.frnum & 0x7) { \
case 7: \
_hcd->hfnum_7_samples_##_letter++; \
_hcd->hfnum_7_frrem_accum_##_letter += hfnum.b.frrem; \
break; \
case 0: \
_hcd->hfnum_0_samples_##_letter++; \
_hcd->hfnum_0_frrem_accum_##_letter += hfnum.b.frrem; \
break; \
default: \
_hcd->hfnum_other_samples_##_letter++; \
_hcd->hfnum_other_frrem_accum_##_letter += hfnum.b.frrem; \
break; \
} \
} \
}
#else
#define dwc_sample_frrem(_hcd, _qh, _letter)
#endif
#endif
#endif /* DWC_DEVICE_ONLY */

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@ -0,0 +1,412 @@
/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_if.h $
* $Revision: #12 $
* $Date: 2011/10/26 $
* $Change: 1873028 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#ifndef DWC_DEVICE_ONLY
#ifndef __DWC_HCD_IF_H__
#define __DWC_HCD_IF_H__
#include "dwc_otg_core_if.h"
/** @file
* This file defines DWC_OTG HCD Core API.
*/
struct dwc_otg_hcd;
typedef struct dwc_otg_hcd dwc_otg_hcd_t;
struct dwc_otg_hcd_urb;
typedef struct dwc_otg_hcd_urb dwc_otg_hcd_urb_t;
/** @name HCD Function Driver Callbacks */
/** @{ */
/** This function is called whenever core switches to host mode. */
typedef int (*dwc_otg_hcd_start_cb_t) (dwc_otg_hcd_t * hcd);
/** This function is called when device has been disconnected */
typedef int (*dwc_otg_hcd_disconnect_cb_t) (dwc_otg_hcd_t * hcd);
/** Wrapper provides this function to HCD to core, so it can get hub information to which device is connected */
typedef int (*dwc_otg_hcd_hub_info_from_urb_cb_t) (dwc_otg_hcd_t * hcd,
void *urb_handle,
uint32_t * hub_addr,
uint32_t * port_addr);
/** Via this function HCD core gets device speed */
typedef int (*dwc_otg_hcd_speed_from_urb_cb_t) (dwc_otg_hcd_t * hcd,
void *urb_handle);
/** This function is called when urb is completed */
typedef int (*dwc_otg_hcd_complete_urb_cb_t) (dwc_otg_hcd_t * hcd,
void *urb_handle,
dwc_otg_hcd_urb_t * dwc_otg_urb,
int32_t status);
/** Via this function HCD core gets b_hnp_enable parameter */
typedef int (*dwc_otg_hcd_get_b_hnp_enable) (dwc_otg_hcd_t * hcd);
struct dwc_otg_hcd_function_ops {
dwc_otg_hcd_start_cb_t start;
dwc_otg_hcd_disconnect_cb_t disconnect;
dwc_otg_hcd_hub_info_from_urb_cb_t hub_info;
dwc_otg_hcd_speed_from_urb_cb_t speed;
dwc_otg_hcd_complete_urb_cb_t complete;
dwc_otg_hcd_get_b_hnp_enable get_b_hnp_enable;
};
/** @} */
/** @name HCD Core API */
/** @{ */
/** This function allocates dwc_otg_hcd structure and returns pointer on it. */
extern dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void);
/** This function should be called to initiate HCD Core.
*
* @param hcd The HCD
* @param core_if The DWC_OTG Core
*
* Returns -DWC_E_NO_MEMORY if no enough memory.
* Returns 0 on success
*/
extern int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if);
/** Frees HCD
*
* @param hcd The HCD
*/
extern void dwc_otg_hcd_remove(dwc_otg_hcd_t * hcd);
/** This function should be called on every hardware interrupt.
*
* @param dwc_otg_hcd The HCD
*
* Returns non zero if interrupt is handled
* Return 0 if interrupt is not handled
*/
extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd);
/**
* Returns private data set by
* dwc_otg_hcd_set_priv_data function.
*
* @param hcd The HCD
*/
extern void *dwc_otg_hcd_get_priv_data(dwc_otg_hcd_t * hcd);
/**
* Set private data.
*
* @param hcd The HCD
* @param priv_data pointer to be stored in private data
*/
extern void dwc_otg_hcd_set_priv_data(dwc_otg_hcd_t * hcd, void *priv_data);
/**
* This function initializes the HCD Core.
*
* @param hcd The HCD
* @param fops The Function Driver Operations data structure containing pointers to all callbacks.
*
* Returns -DWC_E_NO_DEVICE if Core is currently is in device mode.
* Returns 0 on success
*/
extern int dwc_otg_hcd_start(dwc_otg_hcd_t * hcd,
struct dwc_otg_hcd_function_ops *fops);
/**
* Halts the DWC_otg host mode operations in a clean manner. USB transfers are
* stopped.
*
* @param hcd The HCD
*/
extern void dwc_otg_hcd_stop(dwc_otg_hcd_t * hcd);
/**
* Handles hub class-specific requests.
*
* @param dwc_otg_hcd The HCD
* @param typeReq Request Type
* @param wValue wValue from control request
* @param wIndex wIndex from control request
* @param buf data buffer
* @param wLength data buffer length
*
* Returns -DWC_E_INVALID if invalid argument is passed
* Returns 0 on success
*/
extern int dwc_otg_hcd_hub_control(dwc_otg_hcd_t * dwc_otg_hcd,
uint16_t typeReq, uint16_t wValue,
uint16_t wIndex, uint8_t * buf,
uint16_t wLength);
/**
* Returns otg port number.
*
* @param hcd The HCD
*/
extern uint32_t dwc_otg_hcd_otg_port(dwc_otg_hcd_t * hcd);
/**
* Returns OTG version - either 1.3 or 2.0.
*
* @param core_if The core_if structure pointer
*/
extern uint16_t dwc_otg_get_otg_version(dwc_otg_core_if_t * core_if);
/**
* Returns 1 if currently core is acting as B host, and 0 otherwise.
*
* @param hcd The HCD
*/
extern uint32_t dwc_otg_hcd_is_b_host(dwc_otg_hcd_t * hcd);
/**
* Returns current frame number.
*
* @param hcd The HCD
*/
extern int dwc_otg_hcd_get_frame_number(dwc_otg_hcd_t * hcd);
/**
* Dumps hcd state.
*
* @param hcd The HCD
*/
extern void dwc_otg_hcd_dump_state(dwc_otg_hcd_t * hcd);
/**
* Dump the average frame remaining at SOF. This can be used to
* determine average interrupt latency. Frame remaining is also shown for
* start transfer and two additional sample points.
* Currently this function is not implemented.
*
* @param hcd The HCD
*/
extern void dwc_otg_hcd_dump_frrem(dwc_otg_hcd_t * hcd);
/**
* Sends LPM transaction to the local device.
*
* @param hcd The HCD
* @param devaddr Device Address
* @param hird Host initiated resume duration
* @param bRemoteWake Value of bRemoteWake field in LPM transaction
*
* Returns negative value if sending LPM transaction was not succeeded.
* Returns 0 on success.
*/
extern int dwc_otg_hcd_send_lpm(dwc_otg_hcd_t * hcd, uint8_t devaddr,
uint8_t hird, uint8_t bRemoteWake);
/* URB interface */
/**
* Allocates memory for dwc_otg_hcd_urb structure.
* Allocated memory should be freed by call of DWC_FREE.
*
* @param hcd The HCD
* @param iso_desc_count Count of ISOC descriptors
* @param atomic_alloc Specefies whether to perform atomic allocation.
*/
extern dwc_otg_hcd_urb_t *dwc_otg_hcd_urb_alloc(dwc_otg_hcd_t * hcd,
int iso_desc_count,
int atomic_alloc);
/**
* Set pipe information in URB.
*
* @param hcd_urb DWC_OTG URB
* @param devaddr Device Address
* @param ep_num Endpoint Number
* @param ep_type Endpoint Type
* @param ep_dir Endpoint Direction
* @param mps Max Packet Size
*/
extern void dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_hcd_urb_t * hcd_urb,
uint8_t devaddr, uint8_t ep_num,
uint8_t ep_type, uint8_t ep_dir,
uint16_t mps);
/* Transfer flags */
#define URB_GIVEBACK_ASAP 0x1
#define URB_SEND_ZERO_PACKET 0x2
/**
* Sets dwc_otg_hcd_urb parameters.
*
* @param urb DWC_OTG URB allocated by dwc_otg_hcd_urb_alloc function.
* @param urb_handle Unique handle for request, this will be passed back
* to function driver in completion callback.
* @param buf The buffer for the data
* @param dma The DMA buffer for the data
* @param buflen Transfer length
* @param sp Buffer for setup data
* @param sp_dma DMA address of setup data buffer
* @param flags Transfer flags
* @param interval Polling interval for interrupt or isochronous transfers.
*/
extern void dwc_otg_hcd_urb_set_params(dwc_otg_hcd_urb_t * urb,
void *urb_handle, void *buf,
dwc_dma_t dma, uint32_t buflen, void *sp,
dwc_dma_t sp_dma, uint32_t flags,
uint16_t interval);
/** Gets status from dwc_otg_hcd_urb
*
* @param dwc_otg_urb DWC_OTG URB
*/
extern uint32_t dwc_otg_hcd_urb_get_status(dwc_otg_hcd_urb_t * dwc_otg_urb);
/** Gets actual length from dwc_otg_hcd_urb
*
* @param dwc_otg_urb DWC_OTG URB
*/
extern uint32_t dwc_otg_hcd_urb_get_actual_length(dwc_otg_hcd_urb_t *
dwc_otg_urb);
/** Gets error count from dwc_otg_hcd_urb. Only for ISOC URBs
*
* @param dwc_otg_urb DWC_OTG URB
*/
extern uint32_t dwc_otg_hcd_urb_get_error_count(dwc_otg_hcd_urb_t *
dwc_otg_urb);
/** Set ISOC descriptor offset and length
*
* @param dwc_otg_urb DWC_OTG URB
* @param desc_num ISOC descriptor number
* @param offset Offset from beginig of buffer.
* @param length Transaction length
*/
extern void dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_hcd_urb_t * dwc_otg_urb,
int desc_num, uint32_t offset,
uint32_t length);
/** Get status of ISOC descriptor, specified by desc_num
*
* @param dwc_otg_urb DWC_OTG URB
* @param desc_num ISOC descriptor number
*/
extern uint32_t dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_hcd_urb_t *
dwc_otg_urb, int desc_num);
/** Get actual length of ISOC descriptor, specified by desc_num
*
* @param dwc_otg_urb DWC_OTG URB
* @param desc_num ISOC descriptor number
*/
extern uint32_t dwc_otg_hcd_urb_get_iso_desc_actual_length(dwc_otg_hcd_urb_t *
dwc_otg_urb,
int desc_num);
/** Queue URB. After transfer is completes, the complete callback will be called with the URB status
*
* @param dwc_otg_hcd The HCD
* @param dwc_otg_urb DWC_OTG URB
* @param ep_handle Out parameter for returning endpoint handle
* @param atomic_alloc Flag to do atomic allocation if needed
*
* Returns -DWC_E_NO_DEVICE if no device is connected.
* Returns -DWC_E_NO_MEMORY if there is no enough memory.
* Returns 0 on success.
*/
extern int dwc_otg_hcd_urb_enqueue(dwc_otg_hcd_t * dwc_otg_hcd,
dwc_otg_hcd_urb_t * dwc_otg_urb,
void **ep_handle, int atomic_alloc);
/** De-queue the specified URB
*
* @param dwc_otg_hcd The HCD
* @param dwc_otg_urb DWC_OTG URB
*/
extern int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_t * dwc_otg_hcd,
dwc_otg_hcd_urb_t * dwc_otg_urb);
/** Frees resources in the DWC_otg controller related to a given endpoint.
* Any URBs for the endpoint must already be dequeued.
*
* @param hcd The HCD
* @param ep_handle Endpoint handle, returned by dwc_otg_hcd_urb_enqueue function
* @param retry Number of retries if there are queued transfers.
*
* Returns -DWC_E_INVALID if invalid arguments are passed.
* Returns 0 on success
*/
extern int dwc_otg_hcd_endpoint_disable(dwc_otg_hcd_t * hcd, void *ep_handle,
int retry);
/* Resets the data toggle in qh structure. This function can be called from
* usb_clear_halt routine.
*
* @param hcd The HCD
* @param ep_handle Endpoint handle, returned by dwc_otg_hcd_urb_enqueue function
*
* Returns -DWC_E_INVALID if invalid arguments are passed.
* Returns 0 on success
*/
extern int dwc_otg_hcd_endpoint_reset(dwc_otg_hcd_t * hcd, void *ep_handle);
/** Returns 1 if status of specified port is changed and 0 otherwise.
*
* @param hcd The HCD
* @param port Port number
*/
extern int dwc_otg_hcd_is_status_changed(dwc_otg_hcd_t * hcd, int port);
/** Call this function to check if bandwidth was allocated for specified endpoint.
* Only for ISOC and INTERRUPT endpoints.
*
* @param hcd The HCD
* @param ep_handle Endpoint handle
*/
extern int dwc_otg_hcd_is_bandwidth_allocated(dwc_otg_hcd_t * hcd,
void *ep_handle);
/** Call this function to check if bandwidth was freed for specified endpoint.
*
* @param hcd The HCD
* @param ep_handle Endpoint handle
*/
extern int dwc_otg_hcd_is_bandwidth_freed(dwc_otg_hcd_t * hcd, void *ep_handle);
/** Returns bandwidth allocated for specified endpoint in microseconds.
* Only for ISOC and INTERRUPT endpoints.
*
* @param hcd The HCD
* @param ep_handle Endpoint handle
*/
extern uint8_t dwc_otg_hcd_get_ep_bandwidth(dwc_otg_hcd_t * hcd,
void *ep_handle);
/** @} */
#endif /* __DWC_HCD_IF_H__ */
#endif /* DWC_DEVICE_ONLY */

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#ifndef _DWC_OS_DEP_H_
#define _DWC_OS_DEP_H_
#include "errno.h"
#endif /* _DWC_OS_DEP_H_ */

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/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.h $
* $Revision: #49 $
* $Date: 2013/05/16 $
* $Change: 2231774 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#ifndef DWC_HOST_ONLY
#if !defined(__DWC_PCD_H__)
#define __DWC_PCD_H__
#include "dwc_otg_os_dep.h"
#include "usb.h"
#include "dwc_otg_cil.h"
#include "dwc_otg_pcd_if.h"
struct cfiobject;
/**
* @file
*
* This file contains the structures, constants, and interfaces for
* the Perpherial Contoller Driver (PCD).
*
* The Peripheral Controller Driver (PCD) for Linux will implement the
* Gadget API, so that the existing Gadget drivers can be used. For
* the Mass Storage Function driver the File-backed USB Storage Gadget
* (FBS) driver will be used. The FBS driver supports the
* Control-Bulk (CB), Control-Bulk-Interrupt (CBI), and Bulk-Only
* transports.
*
*/
/** Invalid DMA Address */
#define DWC_DMA_ADDR_INVALID (~(dwc_dma_t)0)
/** Max Transfer size for any EP */
#define DDMA_MAX_TRANSFER_SIZE 65535
/**
* Get the pointer to the core_if from the pcd pointer.
*/
#define GET_CORE_IF( _pcd ) (_pcd->core_if)
/**
* States of EP0.
*/
typedef enum ep0_state {
EP0_DISCONNECT, /* no host */
EP0_IDLE,
EP0_IN_DATA_PHASE,
EP0_OUT_DATA_PHASE,
EP0_IN_STATUS_PHASE,
EP0_OUT_STATUS_PHASE,
EP0_STALL,
} ep0state_e;
/** Fordward declaration.*/
struct dwc_otg_pcd;
/** DWC_otg iso request structure.
*
*/
typedef struct usb_iso_request dwc_otg_pcd_iso_request_t;
#ifdef DWC_UTE_PER_IO
/**
* This shall be the exact analogy of the same type structure defined in the
* usb_gadget.h. Each descriptor contains
*/
struct dwc_iso_pkt_desc_port {
uint32_t offset;
uint32_t length; /* expected length */
uint32_t actual_length;
uint32_t status;
};
struct dwc_iso_xreq_port {
/** transfer/submission flag */
uint32_t tr_sub_flags;
/** Start the request ASAP */
#define DWC_EREQ_TF_ASAP 0x00000002
/** Just enqueue the request w/o initiating a transfer */
#define DWC_EREQ_TF_ENQUEUE 0x00000004
/**
* count of ISO packets attached to this request - shall
* not exceed the pio_alloc_pkt_count
*/
uint32_t pio_pkt_count;
/** count of ISO packets allocated for this request */
uint32_t pio_alloc_pkt_count;
/** number of ISO packet errors */
uint32_t error_count;
/** reserved for future extension */
uint32_t res;
/** Will be allocated and freed in the UTE gadget and based on the CFC value */
struct dwc_iso_pkt_desc_port *per_io_frame_descs;
};
#endif
/** DWC_otg request structure.
* This structure is a list of requests.
*/
typedef struct dwc_otg_pcd_request {
void *priv;
void *buf;
dwc_dma_t dma;
uint32_t length;
uint32_t actual;
unsigned sent_zlp:1;
/**
* Used instead of original buffer if
* it(physical address) is not dword-aligned.
**/
uint8_t *dw_align_buf;
dwc_dma_t dw_align_buf_dma;
DWC_CIRCLEQ_ENTRY(dwc_otg_pcd_request) queue_entry;
#ifdef DWC_UTE_PER_IO
struct dwc_iso_xreq_port ext_req;
//void *priv_ereq_nport; /* */
#endif
} dwc_otg_pcd_request_t;
DWC_CIRCLEQ_HEAD(req_list, dwc_otg_pcd_request);
/** PCD EP structure.
* This structure describes an EP, there is an array of EPs in the PCD
* structure.
*/
typedef struct dwc_otg_pcd_ep {
/** USB EP Descriptor */
const usb_endpoint_descriptor_t *desc;
/** queue of dwc_otg_pcd_requests. */
struct req_list queue;
unsigned stopped:1;
unsigned disabling:1;
unsigned dma:1;
unsigned queue_sof:1;
#ifdef DWC_EN_ISOC
/** ISOC req handle passed */
void *iso_req_handle;
#endif //_EN_ISOC_
/** DWC_otg ep data. */
dwc_ep_t dwc_ep;
/** Pointer to PCD */
struct dwc_otg_pcd *pcd;
void *priv;
} dwc_otg_pcd_ep_t;
/** DWC_otg PCD Structure.
* This structure encapsulates the data for the dwc_otg PCD.
*/
struct dwc_otg_pcd {
const struct dwc_otg_pcd_function_ops *fops;
/** The DWC otg device pointer */
struct dwc_otg_device *otg_dev;
/** Core Interface */
dwc_otg_core_if_t *core_if;
/** State of EP0 */
ep0state_e ep0state;
/** EP0 Request is pending */
unsigned ep0_pending:1;
/** Indicates when SET CONFIGURATION Request is in process */
unsigned request_config:1;
/** The state of the Remote Wakeup Enable. */
unsigned remote_wakeup_enable:1;
/** The state of the B-Device HNP Enable. */
unsigned b_hnp_enable:1;
/** The state of A-Device HNP Support. */
unsigned a_hnp_support:1;
/** The state of the A-Device Alt HNP support. */
unsigned a_alt_hnp_support:1;
/** Count of pending Requests */
unsigned request_pending;
/** SETUP packet for EP0
* This structure is allocated as a DMA buffer on PCD initialization
* with enough space for up to 3 setup packets.
*/
union {
usb_device_request_t req;
uint32_t d32[2];
} *setup_pkt;
dwc_dma_t setup_pkt_dma_handle;
/* Additional buffer and flag for CTRL_WR premature case */
uint8_t *backup_buf;
unsigned data_terminated;
/** 2-byte dma buffer used to return status from GET_STATUS */
uint16_t *status_buf;
dwc_dma_t status_buf_dma_handle;
/** EP0 */
dwc_otg_pcd_ep_t ep0;
/** Array of IN EPs. */
dwc_otg_pcd_ep_t in_ep[MAX_EPS_CHANNELS - 1];
/** Array of OUT EPs. */
dwc_otg_pcd_ep_t out_ep[MAX_EPS_CHANNELS - 1];
/** number of valid EPs in the above array. */
// unsigned num_eps : 4;
dwc_spinlock_t *lock;
/** Tasklet to defer starting of TEST mode transmissions until
* Status Phase has been completed.
*/
dwc_tasklet_t *test_mode_tasklet;
/** Tasklet to delay starting of xfer in DMA mode */
dwc_tasklet_t *start_xfer_tasklet;
/** The test mode to enter when the tasklet is executed. */
unsigned test_mode;
/** The cfi_api structure that implements most of the CFI API
* and OTG specific core configuration functionality
*/
#ifdef DWC_UTE_CFI
struct cfiobject *cfi;
#endif
};
//FIXME this functions should be static, and this prototypes should be removed
extern void dwc_otg_request_nuke(dwc_otg_pcd_ep_t * ep);
extern void dwc_otg_request_done(dwc_otg_pcd_ep_t * ep,
dwc_otg_pcd_request_t * req, int32_t status);
void dwc_otg_iso_buffer_done(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep,
void *req_handle);
extern void dwc_otg_pcd_start_iso_ddma(dwc_otg_core_if_t * core_if,
dwc_otg_pcd_ep_t * ep);
extern void do_test_mode(void *data);
#endif
#endif /* DWC_HOST_ONLY */

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/* ==========================================================================
* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd_if.h $
* $Revision: #13 $
* $Date: 2012/12/12 $
* $Change: 2125019 $
*
* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
* otherwise expressly agreed to in writing between Synopsys and you.
*
* The Software IS NOT an item of Licensed Software or Licensed Product under
* any End User Software License Agreement or Agreement for Licensed Product
* with Synopsys or any supplement thereto. You are permitted to use and
* redistribute this Software in source and binary forms, with or without
* modification, provided that redistributions of source code must retain this
* notice. You may not view, use, disclose, copy or distribute this file or
* any information contained herein except pursuant to this license grant from
* Synopsys. If you do not agree with this notice, including the disclaimer
* below, then you are not authorized to use the Software.
*
* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
* ========================================================================== */
#ifndef DWC_HOST_ONLY
#if !defined(__DWC_PCD_IF_H__)
#define __DWC_PCD_IF_H__
//#include "dwc_os.h"
#include "dwc_otg_core_if.h"
/** @file
* This file defines DWC_OTG PCD Core API.
*/
struct dwc_otg_pcd;
typedef struct dwc_otg_pcd dwc_otg_pcd_t;
/** Maxpacket size for EP0 */
#define MAX_EP0_SIZE 64
/** Maxpacket size for any EP */
#define MAX_PACKET_SIZE 2048
/** @name Function Driver Callbacks */
/** @{ */
/** This function will be called whenever a previously queued request has
* completed. The status value will be set to -DWC_E_SHUTDOWN to indicated a
* failed or aborted transfer, or -DWC_E_RESTART to indicate the device was reset,
* or -DWC_E_TIMEOUT to indicate it timed out, or -DWC_E_INVALID to indicate invalid
* parameters. */
typedef int (*dwc_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle,
void *req_handle, int32_t status,
uint32_t actual);
/**
* This function will be called whenever a previousle queued ISOC request has
* completed. Count of ISOC packets could be read using dwc_otg_pcd_get_iso_packet_count
* function.
* The status of each ISOC packet could be read using dwc_otg_pcd_get_iso_packet_*
* functions.
*/
typedef int (*dwc_isoc_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle,
void *req_handle, int proc_buf_num);
/** This function should handle any SETUP request that cannot be handled by the
* PCD Core. This includes most GET_DESCRIPTORs, SET_CONFIGS, Any
* class-specific requests, etc. The function must non-blocking.
*
* Returns 0 on success.
* Returns -DWC_E_NOT_SUPPORTED if the request is not supported.
* Returns -DWC_E_INVALID if the setup request had invalid parameters or bytes.
* Returns -DWC_E_SHUTDOWN on any other error. */
typedef int (*dwc_setup_cb_t) (dwc_otg_pcd_t * pcd, uint8_t * bytes);
/** This is called whenever the device has been disconnected. The function
* driver should take appropriate action to clean up all pending requests in the
* PCD Core, remove all endpoints (except ep0), and initialize back to reset
* state. */
typedef int (*dwc_disconnect_cb_t) (dwc_otg_pcd_t * pcd);
/** This function is called when device has been connected. */
typedef int (*dwc_connect_cb_t) (dwc_otg_pcd_t * pcd, int speed);
/** This function is called when device has been suspended */
typedef int (*dwc_suspend_cb_t) (dwc_otg_pcd_t * pcd);
/** This function is called when device has received LPM tokens, i.e.
* device has been sent to sleep state. */
typedef int (*dwc_sleep_cb_t) (dwc_otg_pcd_t * pcd);
/** This function is called when device has been resumed
* from suspend(L2) or L1 sleep state. */
typedef int (*dwc_resume_cb_t) (dwc_otg_pcd_t * pcd);
/** This function is called whenever hnp params has been changed.
* User can call get_b_hnp_enable, get_a_hnp_support, get_a_alt_hnp_support functions
* to get hnp parameters. */
typedef int (*dwc_hnp_params_changed_cb_t) (dwc_otg_pcd_t * pcd);
/** This function is called whenever USB RESET is detected. */
typedef int (*dwc_reset_cb_t) (dwc_otg_pcd_t * pcd);
typedef int (*cfi_setup_cb_t) (dwc_otg_pcd_t * pcd, void *ctrl_req_bytes);
/**
*
* @param ep_handle Void pointer to the usb_ep structure
* @param ereq_port Pointer to the extended request structure created in the
* portable part.
*/
typedef int (*xiso_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle,
void *req_handle, int32_t status,
void *ereq_port);
/** Function Driver Ops Data Structure */
struct dwc_otg_pcd_function_ops {
dwc_connect_cb_t connect;
dwc_disconnect_cb_t disconnect;
dwc_setup_cb_t setup;
dwc_completion_cb_t complete;
dwc_isoc_completion_cb_t isoc_complete;
dwc_suspend_cb_t suspend;
dwc_sleep_cb_t sleep;
dwc_resume_cb_t resume;
dwc_reset_cb_t reset;
dwc_hnp_params_changed_cb_t hnp_changed;
cfi_setup_cb_t cfi_setup;
#ifdef DWC_UTE_PER_IO
xiso_completion_cb_t xisoc_complete;
#endif
};
/** @} */
/** @name Function Driver Functions */
/** @{ */
/** Call this function to get pointer on dwc_otg_pcd_t,
* this pointer will be used for all PCD API functions.
*
* @param core_if The DWC_OTG Core
*/
extern dwc_otg_pcd_t *dwc_otg_pcd_init(dwc_otg_core_if_t * core_if);
/** Frees PCD allocated by dwc_otg_pcd_init
*
* @param pcd The PCD
*/
extern void dwc_otg_pcd_remove(dwc_otg_pcd_t * pcd);
/** Call this to bind the function driver to the PCD Core.
*
* @param pcd Pointer on dwc_otg_pcd_t returned by dwc_otg_pcd_init function.
* @param fops The Function Driver Ops data structure containing pointers to all callbacks.
*/
extern void dwc_otg_pcd_start(dwc_otg_pcd_t * pcd,
const struct dwc_otg_pcd_function_ops *fops);
/** Enables an endpoint for use. This function enables an endpoint in
* the PCD. The endpoint is described by the ep_desc which has the
* same format as a USB ep descriptor. The ep_handle parameter is used to refer
* to the endpoint from other API functions and in callbacks. Normally this
* should be called after a SET_CONFIGURATION/SET_INTERFACE to configure the
* core for that interface.
*
* Returns -DWC_E_INVALID if invalid parameters were passed.
* Returns -DWC_E_SHUTDOWN if any other error ocurred.
* Returns 0 on success.
*
* @param pcd The PCD
* @param ep_desc Endpoint descriptor
* @param ep_handle Handle on endpoint, that will be used to identify endpoint.
*/
extern int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t * pcd,
const uint8_t * ep_desc, void *ep_handle);
/** Disable the endpoint referenced by ep_handle.
*
* Returns -DWC_E_INVALID if invalid parameters were passed.
* Returns -DWC_E_SHUTDOWN if any other error occurred.
* Returns 0 on success. */
extern int dwc_otg_pcd_ep_disable(dwc_otg_pcd_t * pcd, void *ep_handle);
/** Queue a data transfer request on the endpoint referenced by ep_handle.
* After the transfer is completes, the complete callback will be called with
* the request status.
*
* @param pcd The PCD
* @param ep_handle The handle of the endpoint
* @param buf The buffer for the data
* @param dma_buf The DMA buffer for the data
* @param buflen The length of the data transfer
* @param zero Specifies whether to send zero length last packet.
* @param req_handle Set this handle to any value to use to reference this
* request in the ep_dequeue function or from the complete callback
* @param atomic_alloc If driver need to perform atomic allocations
* for internal data structures.
*
* Returns -DWC_E_INVALID if invalid parameters were passed.
* Returns -DWC_E_SHUTDOWN if any other error ocurred.
* Returns 0 on success. */
extern int dwc_otg_pcd_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle,
uint8_t * buf, dwc_dma_t dma_buf,
uint32_t buflen, int zero, void *req_handle,
int atomic_alloc);
#ifdef DWC_UTE_PER_IO
/**
*
* @param ereq_nonport Pointer to the extended request part of the
* usb_request structure defined in usb_gadget.h file.
*/
extern int dwc_otg_pcd_xiso_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle,
uint8_t * buf, dwc_dma_t dma_buf,
uint32_t buflen, int zero,
void *req_handle, int atomic_alloc,
void *ereq_nonport);
#endif
/** De-queue the specified data transfer that has not yet completed.
*
* Returns -DWC_E_INVALID if invalid parameters were passed.
* Returns -DWC_E_SHUTDOWN if any other error ocurred.
* Returns 0 on success. */
extern int dwc_otg_pcd_ep_dequeue(dwc_otg_pcd_t * pcd, void *ep_handle,
void *req_handle);
/** Halt (STALL) an endpoint or clear it.
*
* Returns -DWC_E_INVALID if invalid parameters were passed.
* Returns -DWC_E_SHUTDOWN if any other error ocurred.
* Returns -DWC_E_AGAIN if the STALL cannot be sent and must be tried again later
* Returns 0 on success. */
extern int dwc_otg_pcd_ep_halt(dwc_otg_pcd_t * pcd, void *ep_handle, int value);
/** This function should be called on every hardware interrupt */
extern int32_t dwc_otg_pcd_handle_intr(dwc_otg_pcd_t * pcd);
/** This function returns current frame number */
extern int dwc_otg_pcd_get_frame_number(dwc_otg_pcd_t * pcd);
/**
* Start isochronous transfers on the endpoint referenced by ep_handle.
* For isochronous transfers duble buffering is used.
* After processing each of buffers comlete callback will be called with
* status for each transaction.
*
* @param pcd The PCD
* @param ep_handle The handle of the endpoint
* @param buf0 The virtual address of first data buffer
* @param buf1 The virtual address of second data buffer
* @param dma0 The DMA address of first data buffer
* @param dma1 The DMA address of second data buffer
* @param sync_frame Data pattern frame number
* @param dp_frame Data size for pattern frame
* @param data_per_frame Data size for regular frame
* @param start_frame Frame number to start transfers, if -1 then start transfers ASAP.
* @param buf_proc_intrvl Interval of ISOC Buffer processing
* @param req_handle Handle of ISOC request
* @param atomic_alloc Specefies whether to perform atomic allocation for
* internal data structures.
*
* Returns -DWC_E_NO_MEMORY if there is no enough memory.
* Returns -DWC_E_INVALID if incorrect arguments are passed to the function.
* Returns -DW_E_SHUTDOWN for any other error.
* Returns 0 on success
*/
extern int dwc_otg_pcd_iso_ep_start(dwc_otg_pcd_t * pcd, void *ep_handle,
uint8_t * buf0, uint8_t * buf1,
dwc_dma_t dma0, dwc_dma_t dma1,
int sync_frame, int dp_frame,
int data_per_frame, int start_frame,
int buf_proc_intrvl, void *req_handle,
int atomic_alloc);
/** Stop ISOC transfers on endpoint referenced by ep_handle.
*
* @param pcd The PCD
* @param ep_handle The handle of the endpoint
* @param req_handle Handle of ISOC request
*
* Returns -DWC_E_INVALID if incorrect arguments are passed to the function
* Returns 0 on success
*/
int dwc_otg_pcd_iso_ep_stop(dwc_otg_pcd_t * pcd, void *ep_handle,
void *req_handle);
/** Get ISOC packet status.
*
* @param pcd The PCD
* @param ep_handle The handle of the endpoint
* @param iso_req_handle Isochronoush request handle
* @param packet Number of packet
* @param status Out parameter for returning status
* @param actual Out parameter for returning actual length
* @param offset Out parameter for returning offset
*
*/
extern void dwc_otg_pcd_get_iso_packet_params(dwc_otg_pcd_t * pcd,
void *ep_handle,
void *iso_req_handle, int packet,
int *status, int *actual,
int *offset);
/** Get ISOC packet count.
*
* @param pcd The PCD
* @param ep_handle The handle of the endpoint
* @param iso_req_handle
*/
extern int dwc_otg_pcd_get_iso_packet_count(dwc_otg_pcd_t * pcd,
void *ep_handle,
void *iso_req_handle);
/** This function starts the SRP Protocol if no session is in progress. If
* a session is already in progress, but the device is suspended,
* remote wakeup signaling is started.
*/
extern int dwc_otg_pcd_wakeup(dwc_otg_pcd_t * pcd);
/** This function returns 1 if LPM support is enabled, and 0 otherwise. */
extern int dwc_otg_pcd_is_lpm_enabled(dwc_otg_pcd_t * pcd);
/** This function returns 1 if LPM Errata support is enabled, and 0 otherwise. */
extern int dwc_otg_pcd_is_besl_enabled(dwc_otg_pcd_t * pcd);
/** This function returns baseline_besl module parametr. */
extern int dwc_otg_pcd_get_param_baseline_besl(dwc_otg_pcd_t * pcd);
/** This function returns deep_besl module parametr. */
extern int dwc_otg_pcd_get_param_deep_besl(dwc_otg_pcd_t * pcd);
/** This function returns 1 if remote wakeup is allowed and 0, otherwise. */
extern int dwc_otg_pcd_get_rmwkup_enable(dwc_otg_pcd_t * pcd);
/** Initiate SRP */
extern void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t * pcd);
/** Starts remote wakeup signaling. */
extern void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t * pcd, int set);
/** Starts micorsecond soft disconnect. */
extern void dwc_otg_pcd_disconnect_us(dwc_otg_pcd_t * pcd, int no_of_usecs);
/** This function returns whether device is dualspeed.*/
extern uint32_t dwc_otg_pcd_is_dualspeed(dwc_otg_pcd_t * pcd);
/** This function returns whether device is otg. */
extern uint32_t dwc_otg_pcd_is_otg(dwc_otg_pcd_t * pcd);
/** These functions allow to get hnp parameters */
extern uint32_t get_b_hnp_enable(dwc_otg_pcd_t * pcd);
extern uint32_t get_a_hnp_support(dwc_otg_pcd_t * pcd);
extern uint32_t get_a_alt_hnp_support(dwc_otg_pcd_t * pcd);
/** CFI specific Interface functions */
/** Allocate a cfi buffer */
extern uint8_t *cfiw_ep_alloc_buffer(dwc_otg_pcd_t * pcd, void *pep,
dwc_dma_t * addr, size_t buflen,
int flags);
/******************************************************************************/
/** @} */
#endif /* __DWC_PCD_IF_H__ */
#endif /* DWC_HOST_ONLY */

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#ifndef _GENERIC_ERRNO_H
#define _GENERIC_ERRNO_H
#define EPERM 1 /* Operation not permitted */
#define ENOENT 2 /* No such file or directory */
#define ESRCH 3 /* No such process */
#define EINTR 4 /* Interrupted system call */
#define EIO 5 /* I/O error */
#define ENXIO 6 /* No such device or address */
#define E2BIG 7 /* Argument list too long */
#define ENOEXEC 8 /* Exec format error */
#define EBADF 9 /* Bad file number */
#define ECHILD 10 /* No child processes */
#define EAGAIN 11 /* Try again */
#define ENOMEM 12 /* Out of memory */
#define EACCES 13 /* Permission denied */
#define EFAULT 14 /* Bad address */
#define ENOTBLK 15 /* Block device required */
#define EBUSY 16 /* Device or resource busy */
#define EEXIST 17 /* File exists */
#define EXDEV 18 /* Cross-device link */
#define ENODEV 19 /* No such device */
#define ENOTDIR 20 /* Not a directory */
#define EISDIR 21 /* Is a directory */
#define EINVAL 22 /* Invalid argument */
#define ENFILE 23 /* File table overflow */
#define EMFILE 24 /* Too many open files */
#define ENOTTY 25 /* Not a typewriter */
#define ETXTBSY 26 /* Text file busy */
#define EFBIG 27 /* File too large */
#define ENOSPC 28 /* No space left on device */
#define ESPIPE 29 /* Illegal seek */
#define EROFS 30 /* Read-only file system */
#define EMLINK 31 /* Too many links */
#define EPIPE 32 /* Broken pipe */
#define EDOM 33 /* Math argument out of domain of func */
#define ERANGE 34 /* Math result not representable */
#define EDEADLK 35 /* Resource deadlock would occur */
#define ENAMETOOLONG 36 /* File name too long */
#define ENOLCK 37 /* No record locks available */
#define ENOSYS 38 /* Function not implemented */
#define ENOTEMPTY 39 /* Directory not empty */
#define ELOOP 40 /* Too many symbolic links encountered */
#define EWOULDBLOCK EAGAIN /* Operation would block */
#define ENOMSG 42 /* No message of desired type */
#define EIDRM 43 /* Identifier removed */
#define ECHRNG 44 /* Channel number out of range */
#define EL2NSYNC 45 /* Level 2 not synchronized */
#define EL3HLT 46 /* Level 3 halted */
#define EL3RST 47 /* Level 3 reset */
#define ELNRNG 48 /* Link number out of range */
#define EUNATCH 49 /* Protocol driver not attached */
#define ENOCSI 50 /* No CSI structure available */
#define EL2HLT 51 /* Level 2 halted */
#define EBADE 52 /* Invalid exchange */
#define EBADR 53 /* Invalid request descriptor */
#define EXFULL 54 /* Exchange full */
#define ENOANO 55 /* No anode */
#define EBADRQC 56 /* Invalid request code */
#define EBADSLT 57 /* Invalid slot */
#define EDEADLOCK EDEADLK
#define EBFONT 59 /* Bad font file format */
#define ENOSTR 60 /* Device not a stream */
#define ENODATA 61 /* No data available */
#define ETIME 62 /* Timer expired */
#define ENOSR 63 /* Out of streams resources */
#define ENONET 64 /* Machine is not on the network */
#define ENOPKG 65 /* Package not installed */
#define EREMOTE 66 /* Object is remote */
#define ENOLINK 67 /* Link has been severed */
#define EADV 68 /* Advertise error */
#define ESRMNT 69 /* Srmount error */
#define ECOMM 70 /* Communication error on send */
#define EPROTO 71 /* Protocol error */
#define EMULTIHOP 72 /* Multihop attempted */
#define EDOTDOT 73 /* RFS specific error */
#define EBADMSG 74 /* Not a data message */
#define EOVERFLOW 75 /* Value too large for defined data type */
#define ENOTUNIQ 76 /* Name not unique on network */
#define EBADFD 77 /* File descriptor in bad state */
#define EREMCHG 78 /* Remote address changed */
#define ELIBACC 79 /* Can not access a needed shared library */
#define ELIBBAD 80 /* Accessing a corrupted shared library */
#define ELIBSCN 81 /* .lib section in a.out corrupted */
#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
#define ELIBEXEC 83 /* Cannot exec a shared library directly */
#define EILSEQ 84 /* Illegal byte sequence */
#define ERESTART 85 /* Interrupted system call should be restarted */
#define ESTRPIPE 86 /* Streams pipe error */
#define EUSERS 87 /* Too many users */
#define ENOTSOCK 88 /* Socket operation on non-socket */
#define EDESTADDRREQ 89 /* Destination address required */
#define EMSGSIZE 90 /* Message too long */
#define EPROTOTYPE 91 /* Protocol wrong type for socket */
#define ENOPROTOOPT 92 /* Protocol not available */
#define EPROTONOSUPPORT 93 /* Protocol not supported */
#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
#define EPFNOSUPPORT 96 /* Protocol family not supported */
#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
#define EADDRINUSE 98 /* Address already in use */
#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
#define ENETDOWN 100 /* Network is down */
#define ENETUNREACH 101 /* Network is unreachable */
#define ENETRESET 102 /* Network dropped connection because of reset */
#define ECONNABORTED 103 /* Software caused connection abort */
#define ECONNRESET 104 /* Connection reset by peer */
#define ENOBUFS 105 /* No buffer space available */
#define EISCONN 106 /* Transport endpoint is already connected */
#define ENOTCONN 107 /* Transport endpoint is not connected */
#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
#define ETOOMANYREFS 109 /* Too many references: cannot splice */
#define ETIMEDOUT 110 /* Connection timed out */
#define ECONNREFUSED 111 /* Connection refused */
#define EHOSTDOWN 112 /* Host is down */
#define EHOSTUNREACH 113 /* No route to host */
#define EALREADY 114 /* Operation already in progress */
#define EINPROGRESS 115 /* Operation now in progress */
#define ESTALE 116 /* Stale NFS file handle */
#define EUCLEAN 117 /* Structure needs cleaning */
#define ENOTNAM 118 /* Not a XENIX named type file */
#define ENAVAIL 119 /* No XENIX semaphores available */
#define EISNAM 120 /* Is a named type file */
#define EREMOTEIO 121 /* Remote I/O error */
#define EDQUOT 122 /* Quota exceeded */
#define ENOMEDIUM 123 /* No medium found */
#define EMEDIUMTYPE 124 /* Wrong medium type */
#define ECANCELED 125 /* Operation Canceled */
#define ENOKEY 126 /* Required key not available */
#define EKEYEXPIRED 127 /* Key has expired */
#define EKEYREVOKED 128 /* Key has been revoked */
#define EKEYREJECTED 129 /* Key was rejected by service */
/* for robust mutexes */
#define EOWNERDEAD 130 /* Owner died */
#define ENOTRECOVERABLE 131 /* State not recoverable */
#define ERFKILL 132 /* Operation not possible due to RF-kill */
#define EHWPOISON 133 /* Memory page has hardware error */
#define ENOTSUPP 524 /* Operation is not supported */
#endif

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_OTG_H_
#define _HAL_OTG_H_
#include "rtl8195a_otg.h"
#include "dwc_otg_regs.h"
#endif

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#ifndef _HCD_H_
#define _HCD_H_
struct hc_driver {
const char *description; /* "ehci-hcd" etc */
const char *product_desc; /* product/vendor string */
size_t hcd_priv_size; /* size of private data */
/* irq handler */
//irqreturn_t (*irq) (struct usb_hcd *hcd);
int flags;
#define HCD_MEMORY 0x0001 /* HC regs use memory (else I/O) */
#define HCD_LOCAL_MEM 0x0002 /* HC needs local memory */
#define HCD_SHARED 0x0004 /* Two (or more) usb_hcds share HW */
#define HCD_USB11 0x0010 /* USB 1.1 */
#define HCD_USB2 0x0020 /* USB 2.0 */
#define HCD_USB3 0x0040 /* USB 3.0 */
#define HCD_MASK 0x0070
/* called to init HCD and root hub */
int (*reset) (struct usb_hcd *hcd);
int (*start) (struct usb_hcd *hcd);
/* NOTE: these suspend/resume calls relate to the HC as
* a whole, not just the root hub; they're for PCI bus glue.
*/
/* called after suspending the hub, before entering D3 etc */
// int (*pci_suspend)(struct usb_hcd *hcd, bool do_wakeup);
/* called after entering D0 (etc), before resuming the hub */
// int (*pci_resume)(struct usb_hcd *hcd, bool hibernated);
/* cleanly make HCD stop writing memory and doing I/O */
void (*stop) (struct usb_hcd *hcd);
/* shutdown HCD */
// void (*shutdown) (struct usb_hcd *hcd);
/* return current frame number */
int (*get_frame_number) (struct usb_hcd *hcd);
/* manage i/o requests, device state */
int (*urb_enqueue)(struct usb_hcd *hcd,
struct urb *urb);//, gfp_t mem_flags);
int (*urb_dequeue)(struct usb_hcd *hcd,
struct urb *urb, int status);
/*
* (optional) these hooks allow an HCD to override the default DMA
* mapping and unmapping routines. In general, they shouldn't be
* necessary unless the host controller has special DMA requirements,
* such as alignment contraints. If these are not specified, the
* general usb_hcd_(un)?map_urb_for_dma functions will be used instead
* (and it may be a good idea to call these functions in your HCD
* implementation)
*/
#if 0
int (*map_urb_for_dma)(struct usb_hcd *hcd, struct urb *urb,
gfp_t mem_flags);
void (*unmap_urb_for_dma)(struct usb_hcd *hcd, struct urb *urb);
#endif
/* hw synch, freeing endpoint resources that urb_dequeue can't */
void (*endpoint_disable)(struct usb_hcd *hcd,
struct usb_host_endpoint *ep);
/* (optional) reset any endpoint state such as sequence number
and current window */
void (*endpoint_reset)(struct usb_hcd *hcd,
struct usb_host_endpoint *ep);
/* root hub support */
int (*hub_status_data) (struct usb_hcd *hcd, char *buf);
int (*hub_control) (struct usb_hcd *hcd,
u16 typeReq, u16 wValue, u16 wIndex,
char *buf, u16 wLength);
#if 0
int (*bus_suspend)(struct usb_hcd *);
int (*bus_resume)(struct usb_hcd *);
int (*start_port_reset)(struct usb_hcd *, unsigned port_num);
/* force handover of high-speed port to full-speed companion */
void (*relinquish_port)(struct usb_hcd *, int);
/* has a port been handed over to a companion? */
int (*port_handed_over)(struct usb_hcd *, int);
/* CLEAR_TT_BUFFER completion callback */
void (*clear_tt_buffer_complete)(struct usb_hcd *,
struct usb_host_endpoint *);
/* xHCI specific functions */
/* Called by usb_alloc_dev to alloc HC device structures */
int (*alloc_dev)(struct usb_hcd *, struct usb_device *);
/* Called by usb_disconnect to free HC device structures */
void (*free_dev)(struct usb_hcd *, struct usb_device *);
/* Change a group of bulk endpoints to support multiple stream IDs */
int (*alloc_streams)(struct usb_hcd *hcd, struct usb_device *udev,
struct usb_host_endpoint **eps, unsigned int num_eps,
unsigned int num_streams, gfp_t mem_flags);
/* Reverts a group of bulk endpoints back to not using stream IDs.
* Can fail if we run out of memory.
*/
int (*free_streams)(struct usb_hcd *hcd, struct usb_device *udev,
struct usb_host_endpoint **eps, unsigned int num_eps,
gfp_t mem_flags);
/* Bandwidth computation functions */
/* Note that add_endpoint() can only be called once per endpoint before
* check_bandwidth() or reset_bandwidth() must be called.
* drop_endpoint() can only be called once per endpoint also.
* A call to xhci_drop_endpoint() followed by a call to
* xhci_add_endpoint() will add the endpoint to the schedule with
* possibly new parameters denoted by a different endpoint descriptor
* in usb_host_endpoint. A call to xhci_add_endpoint() followed by a
* call to xhci_drop_endpoint() is not allowed.
*/
/* Allocate endpoint resources and add them to a new schedule */
int (*add_endpoint)(struct usb_hcd *, struct usb_device *,
struct usb_host_endpoint *);
/* Drop an endpoint from a new schedule */
int (*drop_endpoint)(struct usb_hcd *, struct usb_device *,
struct usb_host_endpoint *);
/* Check that a new hardware configuration, set using
* endpoint_enable and endpoint_disable, does not exceed bus
* bandwidth. This must be called before any set configuration
* or set interface requests are sent to the device.
*/
int (*check_bandwidth)(struct usb_hcd *, struct usb_device *);
/* Reset the device schedule to the last known good schedule,
* which was set from a previous successful call to
* check_bandwidth(). This reverts any add_endpoint() and
* drop_endpoint() calls since that last successful call.
* Used for when a check_bandwidth() call fails due to resource
* or bandwidth constraints.
*/
void (*reset_bandwidth)(struct usb_hcd *, struct usb_device *);
/* Returns the hardware-chosen device address */
int (*address_device)(struct usb_hcd *, struct usb_device *udev);
/* Notifies the HCD after a hub descriptor is fetched.
* Will block.
*/
int (*update_hub_device)(struct usb_hcd *, struct usb_device *hdev,
struct usb_tt *tt, gfp_t mem_flags);
int (*reset_device)(struct usb_hcd *, struct usb_device *);
/* Notifies the HCD after a device is connected and its
* address is set
*/
int (*update_device)(struct usb_hcd *, struct usb_device *);
int (*set_usb2_hw_lpm)(struct usb_hcd *, struct usb_device *, int);
/* USB 3.0 Link Power Management */
/* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
int (*enable_usb3_lpm_timeout)(struct usb_hcd *,
struct usb_device *, enum usb3_link_state state);
/* The xHCI host controller can still fail the command to
* disable the LPM timeouts, so this can return an error code.
*/
int (*disable_usb3_lpm_timeout)(struct usb_hcd *,
struct usb_device *, enum usb3_link_state state);
int (*find_raw_port_number)(struct usb_hcd *, int);
#endif
};
#endif

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#ifndef _RTL8195A_OTG_H_
#define _RTL8195A_OTG_H_
#include "dwc_otg_core_if.h"
#include "rtl8195a.h"
#define HAL_OTG_READ32(addr) HAL_READ32(USB_OTG_REG_BASE, (u32)addr)
#define HAL_OTG_WRITE32(addr, value) HAL_WRITE32(USB_OTG_REG_BASE, (u32)addr, value)
#define HAL_OTG_MODIFY32(addr, clrmsk, setmsk) HAL_WRITE32(USB_OTG_REG_BASE,(u32)addr,\
((HAL_READ32(USB_OTG_REG_BASE, (u32)addr) & (~clrmsk)) | setmsk))
#define DWC_READ_REG32(_reg_) HAL_OTG_READ32((u32)_reg_)
#define DWC_WRITE_REG32(_reg_, _val_) HAL_OTG_WRITE32((u32)_reg_,_val_)
#define DWC_MODIFY_REG32(_reg_,_cmsk_,_smsk_) HAL_OTG_MODIFY32((u32)_reg_,_cmsk_,_smsk_)
//This part is added for RTK power sequence
#if 1
//3 SYS_ON reg
//#define REG_SYS_FUNC_EN 0x08
#define BIT_SHIFT_SOC_SYSPEON_EN 4
#define BIT_MASK_SOC_SYSPEON_EN 0x1
#define BIT_SOC_SYSPEON_EN_OTG(x)(((x) & BIT_MASK_SOC_SYSPEON_EN) << BIT_SHIFT_SOC_SYSPEON_EN)
#define BIT_INVC_SOC_SYSPEON_EN (~(BIT_MASK_SOC_SYSPEON_EN << BIT_SHIFT_SOC_SYSPEON_EN))
//3 Peri_ON reg
#define REG_OTG_PWCSEQ_OFFSET_OTG 0x40000000
#define REG_OTG_PWCSEQ_PWC_OTG 0x200
#define REG_OTG_PWCSEQ_ISO_OTG 0x204
#define REG_SOC_HCI_COM_FUNC_EN_OTG 0x214
#define REG_PESOC_HCI_CLK_CTRL0_OTG 0x240
#endif
//#define REG_PON_ISO_CTRL 0x204
#define REG_OTG_PWCSEQ_IP_OFF 0x30004 //This is in OTG IP
//4 REG_OTG_PWCSEQ_PWC
#define BIT_SHIFT_PWC_USBD_EN 0
#define BIT_MASK_PWC_USBD_EN 0x1
#define BIT_PWC_USBD_EN(x)(((x) & BIT_MASK_PWC_USBD_EN) << BIT_SHIFT_PWC_USBD_EN)
#define BIT_INVC_PWC_USBD_EN (~(BIT_MASK_PWC_USBD_EN << BIT_SHIFT_PWC_USBD_EN))
#define BIT_SHIFT_PWC_UPLV_EN 1
#define BIT_MASK_PWC_UPLV_EN 0x1
#define BIT_PWC_UPLV_EN(x)(((x) & BIT_MASK_PWC_UPLV_EN) << BIT_SHIFT_PWC_UPLV_EN)
#define BIT_INVC_PWC_UPLV_EN (~(BIT_MASK_PWC_UPLV_EN << BIT_SHIFT_PWC_UPLV_EN))
#define BIT_SHIFT_PWC_UPHV_EN 2
#define BIT_MASK_PWC_UPHV_EN 0x1
#define BIT_PWC_UPHV_EN(x)(((x) & BIT_MASK_PWC_UPHV_EN) << BIT_SHIFT_PWC_UPHV_EN)
#define BIT_INVC_PWC_UPHV_EN (~(BIT_MASK_PWC_UPHV_EN << BIT_SHIFT_PWC_UPHV_EN))
//4 REG_OTG_PWCSEQ_ISO
#define BIT_SHIFT_ISO_USBD_EN 0
#define BIT_MASK_ISO_USBD_EN 0x1
#define BIT_ISO_USBD_EN(x)(((x) & BIT_MASK_ISO_USBD_EN) << BIT_SHIFT_ISO_USBD_EN)
#define BIT_INVC_ISO_USBD_EN (~(BIT_MASK_ISO_USBD_EN << BIT_SHIFT_ISO_USBD_EN))
#define BIT_SHIFT_ISO_USBA_EN 1
#define BIT_MASK_ISO_USBA_EN 0x1
#define BIT_ISO_USBA_EN(x)(((x) & BIT_MASK_ISO_USBA_EN) << BIT_SHIFT_ISO_USBA_EN)
#define BIT_INVC_ISO_USBA_EN (~(BIT_MASK_ISO_USBA_EN << BIT_SHIFT_ISO_USBA_EN))
//4 REG_SOC_HCI_COM_FUNC_EN
#define BIT_SHIFT_SOC_HCI_OTG_EN 4
#define BIT_MASK_SOC_HCI_OTG_EN 0x1
#define BIT_SOC_HCI_OTG_EN_OTG(x)(((x) & BIT_MASK_SOC_HCI_OTG_EN) << BIT_SHIFT_SOC_HCI_OTG_EN)
#define BIT_INVC_SOC_HCI_OTG_EN (~(BIT_MASK_SOC_HCI_OTG_EN << BIT_SHIFT_SOC_HCI_OTG_EN))
//4 REG_PESOC_HCI_CLK_CTRL0
#define BIT_SHIFT_SOC_ACTCK_OTG_EN 4
#define BIT_MASK_SOC_ACTCK_OTG_EN 0x1
#define BIT_SOC_ACTCK_OTG_EN_OTG(x)(((x) & BIT_MASK_SOC_ACTCK_OTG_EN) << BIT_SHIFT_SOC_ACTCK_OTG_EN)
#define BIT_INVC_SOC_ACTCK_OTG_EN (~(BIT_MASK_SOC_ACTCK_OTG_EN << BIT_SHIFT_SOC_ACTCK_OTG_EN))
//4 REG_OTG_PWCSEQ_OTG
#define BIT_SHIFT_UPLL_CKRDY 5
#define BIT_MASK_UPLL_CKRDY 0x1
#define BIT_UPLL_CKRDY(x)(((x) & BIT_MASK_UPLL_CKRDY) << BIT_SHIFT_UPLL_CKRDY)
#define BIT_INVC_UPLL_CKRDY (~(BIT_MASK_UPLL_CKRDY << BIT_SHIFT_UPLL_CKRDY))
#define BIT_SHIFT_USBOTG_EN 8
#define BIT_MASK_USBOTG_EN 0x1
#define BIT_USBOTG_EN(x)(((x) & BIT_MASK_USBOTG_EN) << BIT_SHIFT_USBOTG_EN)
#define BIT_INVC_USBOTG_EN (~(BIT_MASK_USBOTG_EN << BIT_SHIFT_USBOTG_EN))
#define BIT_SHIFT_USBPHY_EN 9
#define BIT_MASK_USBPHY_EN 0x1
#define BIT_USBPHY_EN(x)(((x) & BIT_MASK_USBPHY_EN) << BIT_SHIFT_USBPHY_EN)
#define BIT_INVC_USBPHY_EN (~(BIT_MASK_USBPHY_EN << BIT_SHIFT_USBPHY_EN))
#endif

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/*
* This file holds USB constants and structures that are needed for USB
* device APIs. These are used by the USB device model, which is defined
* in chapter 9 of the USB 2.0 specification. Linux has several APIs in C
* that need these:
*
* - the master/host side Linux-USB kernel driver API;
* - the "usbfs" user space API; and
* - the Linux "gadget" slave/device/peripheral side driver API.
*
* USB 2.0 adds an additional "On The Go" (OTG) mode, which lets systems
* act either as a USB master/host or as a USB slave/device. That means
* the master and slave side APIs benefit from working well together.
*
* There's also "Wireless USB", using low power short range radios for
* peripheral interconnection but otherwise building on the USB framework.
*/
#ifndef _USB_CH9_H_
#define _USB_CH9_H_
//#include <linux/types.h> /* __u8 etc */
//#include "../otg/osk/sys-support.h"
/*-------------------------------------------------------------------------*/
/* CONTROL REQUEST SUPPORT */
/*
* USB directions
*
* This bit flag is used in endpoint descriptors' bEndpointAddress field.
* It's also one of three fields in control requests bRequestType.
*/
//#define USB_DIR_OUT 0 /* to device */
//#define USB_DIR_IN 0x80 /* to host */
/*
* USB types, the second of three bRequestType fields
*/
#define USB_TYPE_MASK (0x03 << 5)
#define USB_TYPE_STANDARD (0x00 << 5)
#define USB_TYPE_CLASS (0x01 << 5)
#define USB_TYPE_VENDOR (0x02 << 5)
#define USB_TYPE_RESERVED (0x03 << 5)
/*
* USB recipients, the third of three bRequestType fields
*/
#define USB_RECIP_MASK 0x1f
#define USB_RECIP_DEVICE 0x00
#define USB_RECIP_INTERFACE 0x01
#define USB_RECIP_ENDPOINT 0x02
#define USB_RECIP_OTHER 0x03
/* From Wireless USB 1.0 */
#define USB_RECIP_PORT 0x04
#define USB_RECIP_RPIPE 0x05
/*
* Standard requests, for the bRequest field of a SETUP packet.
*
* These are qualified by the bRequestType field, so that for example
* TYPE_CLASS or TYPE_VENDOR specific feature flags could be retrieved
* by a GET_STATUS request.
*/
#define USB_REQ_GET_STATUS 0x00
#define USB_REQ_CLEAR_FEATURE 0x01
#define USB_REQ_SET_FEATURE 0x03
#define USB_REQ_SET_ADDRESS 0x05
#define USB_REQ_GET_DESCRIPTOR 0x06
#define USB_REQ_SET_DESCRIPTOR 0x07
#define USB_REQ_GET_CONFIGURATION 0x08
#define USB_REQ_SET_CONFIGURATION 0x09
#define USB_REQ_GET_INTERFACE 0x0A
#define USB_REQ_SET_INTERFACE 0x0B
#define USB_REQ_SYNCH_FRAME 0x0C
#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */
#define USB_REQ_GET_ENCRYPTION 0x0E
#define USB_REQ_RPIPE_ABORT 0x0E
#define USB_REQ_SET_HANDSHAKE 0x0F
#define USB_REQ_RPIPE_RESET 0x0F
#define USB_REQ_GET_HANDSHAKE 0x10
#define USB_REQ_SET_CONNECTION 0x11
#define USB_REQ_SET_SECURITY_DATA 0x12
#define USB_REQ_GET_SECURITY_DATA 0x13
#define USB_REQ_SET_WUSB_DATA 0x14
#define USB_REQ_LOOPBACK_DATA_WRITE 0x15
#define USB_REQ_LOOPBACK_DATA_READ 0x16
#define USB_REQ_SET_INTERFACE_DS 0x17
/*
* USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and
* are read as a bit array returned by USB_REQ_GET_STATUS. (So there
* are at most sixteen features of each type.)
*/
#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
#define USB_DEVICE_TEST_MODE 2 /* (wired high speed only) */
#define USB_DEVICE_BATTERY 2 /* (wireless) */
#define USB_DEVICE_B_HNP_ENABLE 3 /* (otg) dev may initiate HNP */
#define USB_DEVICE_WUSB_DEVICE 3 /* (wireless)*/
#define USB_DEVICE_A_HNP_SUPPORT 4 /* (otg) RH port supports HNP */
#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
/**
* struct usb_ctrlrequest - SETUP data for a USB device control request
* @bRequestType: matches the USB bmRequestType field
* @bRequest: matches the USB bRequest field
* @wValue: matches the USB wValue field (le16 byte order)
* @wIndex: matches the USB wIndex field (le16 byte order)
* @wLength: matches the USB wLength field (le16 byte order)
*
* This structure is used to send control requests to a USB device. It matches
* the different fields of the USB 2.0 Spec section 9.3, table 9-2. See the
* USB spec for a fuller description of the different fields, and what they are
* used for.
*
* Note that the driver for any interface can issue control requests.
* For most devices, interfaces don't coordinate with each other, so
* such requests may be made at any time.
*/
struct usb_ctrlrequest {
u8 bRequestType;
u8 bRequest;
u16 wValue;
u16 wIndex;
u16 wLength;
};
/*-------------------------------------------------------------------------*/
/*
* STANDARD DESCRIPTORS ... as returned by GET_DESCRIPTOR, or
* (rarely) accepted by SET_DESCRIPTOR.
*
* Note that all multi-byte values here are encoded in little endian
* byte order "on the wire". But when exposed through Linux-USB APIs,
* they've been converted to cpu byte order.
*/
/*
* Descriptor types ... USB 2.0 spec table 9.5
*/
#define USB_DT_DEVICE 0x01
#define USB_DT_CONFIG 0x02
#define USB_DT_STRING 0x03
#define USB_DT_INTERFACE 0x04
#define USB_DT_ENDPOINT 0x05
#define USB_DT_DEVICE_QUALIFIER 0x06
#define USB_DT_OTHER_SPEED_CONFIG 0x07
#define USB_DT_INTERFACE_POWER 0x08
/* these are from a minor usb 2.0 revision (ECN) */
#define USB_DT_OTG 0x09
#define USB_DT_DEBUG 0x0a
#define USB_DT_INTERFACE_ASSOCIATION 0x0b
/* these are from the Wireless USB spec */
#define USB_DT_SECURITY 0x0c
#define USB_DT_KEY 0x0d
#define USB_DT_ENCRYPTION_TYPE 0x0e
#define USB_DT_BOS 0x0f
#define USB_DT_DEVICE_CAPABILITY 0x10
#define USB_DT_WIRELESS_ENDPOINT_COMP 0x11
#define USB_DT_WIRE_ADAPTER 0x21
#define USB_DT_RPIPE 0x22
/* conventional codes for class-specific descriptors */
#define USB_DT_CS_DEVICE 0x21
#define USB_DT_CS_CONFIG 0x22
#define USB_DT_CS_STRING 0x23
#define USB_DT_CS_INTERFACE 0x24
#define USB_DT_CS_ENDPOINT 0x25
/* All standard descriptors have these 2 fields at the beginning */
struct usb_descriptor_header {
u8 bLength;
u8 bDescriptorType;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE: Device descriptor */
struct usb_device_descriptor {
u8 bLength;
u8 bDescriptorType;
u16 bcdUSB;
u8 bDeviceClass;
u8 bDeviceSubClass;
u8 bDeviceProtocol;
u8 bMaxPacketSize0;
u16 idVendor;
u16 idProduct;
u16 bcdDevice;
u8 iManufacturer;
u8 iProduct;
u8 iSerialNumber;
u8 bNumConfigurations;
};
#define USB_DT_DEVICE_SIZE 18
/*
* Device and/or Interface Class codes
* as found in bDeviceClass or bInterfaceClass
* and defined by www.usb.org documents
*/
#define USB_CLASS_PER_INTERFACE 0 /* for DeviceClass */
#define USB_CLASS_AUDIO 1
#define USB_CLASS_COMM 2
#define USB_CLASS_HID 3
#define USB_CLASS_PHYSICAL 5
#define USB_CLASS_STILL_IMAGE 6
#define USB_CLASS_PRINTER 7
#define USB_CLASS_MASS_STORAGE 8
#define USB_CLASS_HUB 9
#define USB_CLASS_CDC_DATA 0x0a
#define USB_CLASS_CSCID 0x0b /* chip+ smart card */
#define USB_CLASS_CONTENT_SEC 0x0d /* content security */
#define USB_CLASS_VIDEO 0x0e
#define USB_CLASS_WIRELESS_CONTROLLER 0xe0
#define USB_CLASS_APP_SPEC 0xfe
#define USB_CLASS_VENDOR_SPEC 0xff
/*-------------------------------------------------------------------------*/
/* USB_DT_CONFIG: Configuration descriptor information.
*
* USB_DT_OTHER_SPEED_CONFIG is the same descriptor, except that the
* descriptor type is different. Highspeed-capable devices can look
* different depending on what speed they're currently running. Only
* devices with a USB_DT_DEVICE_QUALIFIER have any OTHER_SPEED_CONFIG
* descriptors.
*/
struct usb_config_descriptor {
u8 bLength;
u8 bDescriptorType;
u16 wTotalLength;
u8 bNumInterfaces;
u8 bConfigurationValue;
u8 iConfiguration;
u8 bmAttributes;
u8 bMaxPower;
};
#define USB_DT_CONFIG_SIZE 9
/* from config descriptor bmAttributes */
#define USB_CONFIG_ATT_ONE (1 << 7) /* must be set */
#define USB_CONFIG_ATT_SELFPOWER (1 << 6) /* self powered */
#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */
#define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */
/*-------------------------------------------------------------------------*/
/* USB_DT_STRING: String descriptor */
struct usb_string_descriptor {
u8 bLength;
u8 bDescriptorType;
u16 wData[1]; /* UTF-16LE encoded */
};
/* note that "string" zero is special, it holds language codes that
* the device supports, not Unicode characters.
*/
/*-------------------------------------------------------------------------*/
/* USB_DT_INTERFACE: Interface descriptor */
struct usb_interface_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bInterfaceNumber;
u8 bAlternateSetting;
u8 bNumEndpoints;
u8 bInterfaceClass;
u8 bInterfaceSubClass;
u8 bInterfaceProtocol;
u8 iInterface;
};
#define USB_DT_INTERFACE_SIZE 9
/*-------------------------------------------------------------------------*/
/* Endpoint descriptor */
struct usb_endpoint_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bEndpointAddress;
u8 bmAttributes;
u16 wMaxPacketSize;
u8 bInterval;
u8 bRefresh;
u8 bSynchAddress;
unsigned char *extra; /* Extra descriptors */
int extralen;
};
#define USB_DT_ENDPOINT_SIZE 7
#define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */
/*
* Endpoints
*/
#if 0
#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */
#define USB_ENDPOINT_DIR_MASK 0x80
#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */
#define USB_ENDPOINT_XFER_CONTROL 0
#define USB_ENDPOINT_XFER_ISOC 1
#define USB_ENDPOINT_XFER_BULK 2
#define USB_ENDPOINT_XFER_INT 3
#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
#endif
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE_QUALIFIER: Device Qualifier descriptor */
struct usb_qualifier_descriptor {
u8 bLength;
u8 bDescriptorType;
u16 bcdUSB;
u8 bDeviceClass;
u8 bDeviceSubClass;
u8 bDeviceProtocol;
u8 bMaxPacketSize0;
u8 bNumConfigurations;
u8 bRESERVED;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_OTG (from OTG 1.0a supplement) */
struct usb_otg_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bmAttributes; /* support for HNP, SRP, etc */
};
/* from usb_otg_descriptor.bmAttributes */
#define USB_OTG_SRP (1 << 0)
#define USB_OTG_HNP (1 << 1) /* swap host/device roles */
/*-------------------------------------------------------------------------*/
/* USB_DT_DEBUG: for special highspeed devices, replacing serial console */
struct usb_debug_descriptor {
u8 bLength;
u8 bDescriptorType;
/* bulk endpoints with 8 byte maxpacket */
u8 bDebugInEndpoint;
u8 bDebugOutEndpoint;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_INTERFACE_ASSOCIATION: groups interfaces */
struct usb_interface_assoc_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bFirstInterface;
u8 bInterfaceCount;
u8 bFunctionClass;
u8 bFunctionSubClass;
u8 bFunctionProtocol;
u8 iFunction;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_SECURITY: group of wireless security descriptors, including
* encryption types available for setting up a CC/association.
*/
struct usb_security_descriptor {
u8 bLength;
u8 bDescriptorType;
u16 wTotalLength;
u8 bNumEncryptionTypes;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_KEY: used with {GET,SET}_SECURITY_DATA; only public keys
* may be retrieved.
*/
struct usb_key_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 tTKID[3];
u8 bReserved;
u8 bKeyData[0];
};
/*-------------------------------------------------------------------------*/
/* USB_DT_ENCRYPTION_TYPE: bundled in DT_SECURITY groups */
struct usb_encryption_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bEncryptionType;
#define USB_ENC_TYPE_UNSECURE 0
#define USB_ENC_TYPE_WIRED 1 /* non-wireless mode */
#define USB_ENC_TYPE_CCM_1 2 /* aes128/cbc session */
#define USB_ENC_TYPE_RSA_1 3 /* rsa3072/sha1 auth */
u8 bEncryptionValue; /* use in SET_ENCRYPTION */
u8 bAuthKeyIndex;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_BOS: group of wireless capabilities */
struct usb_bos_descriptor {
u8 bLength;
u8 bDescriptorType;
u16 wTotalLength;
u8 bNumDeviceCaps;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE_CAPABILITY: grouped with BOS */
struct usb_dev_cap_header {
u8 bLength;
u8 bDescriptorType;
u8 bDevCapabilityType;
};
#define USB_CAP_TYPE_WIRELESS_USB 1
struct usb_wireless_cap_descriptor { /* Ultra Wide Band */
u8 bLength;
u8 bDescriptorType;
u8 bDevCapabilityType;
u8 bmAttributes;
#define USB_WIRELESS_P2P_DRD (1 << 1)
#define USB_WIRELESS_BEACON_MASK (3 << 2)
#define USB_WIRELESS_BEACON_SELF (1 << 2)
#define USB_WIRELESS_BEACON_DIRECTED (2 << 2)
#define USB_WIRELESS_BEACON_NONE (3 << 2)
u16 wPHYRates; /* bit rates, Mbps */
#define USB_WIRELESS_PHY_53 (1 << 0) /* always set */
#define USB_WIRELESS_PHY_80 (1 << 1)
#define USB_WIRELESS_PHY_107 (1 << 2) /* always set */
#define USB_WIRELESS_PHY_160 (1 << 3)
#define USB_WIRELESS_PHY_200 (1 << 4) /* always set */
#define USB_WIRELESS_PHY_320 (1 << 5)
#define USB_WIRELESS_PHY_400 (1 << 6)
#define USB_WIRELESS_PHY_480 (1 << 7)
u8 bmTFITXPowerInfo; /* TFI power levels */
u8 bmFFITXPowerInfo; /* FFI power levels */
u16 bmBandGroup;
u8 bReserved;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_WIRELESS_ENDPOINT_COMP: companion descriptor associated with
* each endpoint descriptor for a wireless device
*/
struct usb_wireless_ep_comp_descriptor {
u8 bLength;
u8 bDescriptorType;
u8 bMaxBurst;
u8 bMaxSequence;
u16 wMaxStreamDelay;
u16 wOverTheAirPacketSize;
u8 bOverTheAirInterval;
u8 bmCompAttributes;
#define USB_ENDPOINT_SWITCH_MASK 0x03 /* in bmCompAttributes */
#define USB_ENDPOINT_SWITCH_NO 0
#define USB_ENDPOINT_SWITCH_SWITCH 1
#define USB_ENDPOINT_SWITCH_SCALE 2
};
/*-------------------------------------------------------------------------*/
/* USB_REQ_SET_HANDSHAKE is a four-way handshake used between a wireless
* host and a device for connection set up, mutual authentication, and
* exchanging short lived session keys. The handshake depends on a CC.
*/
struct usb_handshake {
u8 bMessageNumber;
u8 bStatus;
u8 tTKID[3];
u8 bReserved;
u8 CDID[16];
u8 nonce[16];
u8 MIC[8];
};
/*-------------------------------------------------------------------------*/
/* USB_REQ_SET_CONNECTION modifies or revokes a connection context (CC).
* A CC may also be set up using non-wireless secure channels (including
* wired USB!), and some devices may support CCs with multiple hosts.
*/
struct usb_connection_context {
u8 CHID[16]; /* persistent host id */
u8 CDID[16]; /* device id (unique w/in host context) */
u8 CK[16]; /* connection key */
};
/*-------------------------------------------------------------------------*/
#if 1
enum usb_device_state {
/* NOTATTACHED isn't in the USB spec, and this state acts
* the same as ATTACHED ... but it's clearer this way.
*/
USB_STATE_NOTATTACHED = 0,
/* chapter 9 and authentication (wireless) device states */
USB_STATE_ATTACHED,
USB_STATE_POWERED, /* wired */
USB_STATE_UNAUTHENTICATED, /* auth */
USB_STATE_RECONNECTING, /* auth */
USB_STATE_DEFAULT, /* limited function */
USB_STATE_ADDRESS,
USB_STATE_CONFIGURED, /* most functions */
USB_STATE_SUSPENDED
/* NOTE: there are actually four different SUSPENDED
* states, returning to POWERED, DEFAULT, ADDRESS, or
* CONFIGURED respectively when SOF tokens flow again.
*/
};
#endif
#endif /* __LINUX_USB_CH9_H */

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/*
* (C) Copyright 2001
* Denis Peter, MPL AG Switzerland
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* Note: Part of this code has been derived from linux
*
*/
#ifndef _USB_DEFS_H_
#define _USB_DEFS_H_
/* USB constants */
/* Device and/or Interface Class codes */
#define USB_CLASS_PER_INTERFACE 0 /* for DeviceClass */
#define USB_CLASS_AUDIO 1
#define USB_CLASS_COMM 2
#define USB_CLASS_HID 3
#define USB_CLASS_PHYSICAL 5
#define USB_CLASS_STILL_IMAGE 6
#define USB_CLASS_PRINTER 7
#define USB_CLASS_MASS_STORAGE 8
#define USB_CLASS_HUB 9
#define USB_CLASS_CDC_DATA 0x0a
#define USB_CLASS_DATA 10
#define USB_CLASS_CSCID 0x0b /* chip+ smart card */
#define USB_CLASS_CONTENT_SEC 0x0d /* content security */
#define USB_CLASS_VIDEO 0x0e
#define USB_CLASS_WIRELESS_CONTROLLER 0xe0
#define USB_CLASS_APP_SPEC 0xfe
#define USB_CLASS_VENDOR_SPEC 0xff
/* some HID sub classes */
#define USB_SUB_HID_NONE 0
#define USB_SUB_HID_BOOT 1
/* some UID Protocols */
#define USB_PROT_HID_NONE 0
#define USB_PROT_HID_KEYBOARD 1
#define USB_PROT_HID_MOUSE 2
/* Sub STORAGE Classes */
#define US_SC_RBC 1 /* Typically, flash devices */
#define US_SC_8020 2 /* CD-ROM */
#define US_SC_QIC 3 /* QIC-157 Tapes */
#define US_SC_UFI 4 /* Floppy */
#define US_SC_8070 5 /* Removable media */
#define US_SC_SCSI 6 /* Transparent */
#define US_SC_MIN US_SC_RBC
#define US_SC_MAX US_SC_SCSI
/* STORAGE Protocols */
#define US_PR_CB 1 /* Control/Bulk w/o interrupt */
#define US_PR_CBI 0 /* Control/Bulk/Interrupt */
#define US_PR_BULK 0x50 /* bulk only */
/* USB types */
#define USB_TYPE_STANDARD (0x00 << 5)
#define USB_TYPE_CLASS (0x01 << 5)
#define USB_TYPE_VENDOR (0x02 << 5)
#define USB_TYPE_RESERVED (0x03 << 5)
/* USB recipients */
#define USB_RECIP_DEVICE 0x00
#define USB_RECIP_INTERFACE 0x01
#define USB_RECIP_ENDPOINT 0x02
#define USB_RECIP_OTHER 0x03
#define USB_DT_CS_DEVICE 0x21
#define USB_DT_CS_CONFIG 0x22
#define USB_DT_CS_STRING 0x23
#define USB_DT_CS_INTERFACE 0x24
#define USB_DT_CS_ENDPOINT 0x25
/* USB directions */
#define USB_DIR_OUT 0 /* to device */
#define USB_DIR_IN 0x80 /* to host */
#if 0
enum usb_device_speed {
USB_SPEED_UNKNOWN = 0, /* enumerating */
USB_SPEED_LOW,
USB_SPEED_FULL, /* usb 1.1 */
USB_SPEED_HIGH, /* usb 2.0 */
};
#else
enum usb_device_speed {
USB_SPEED_UNKNOWN = 0, /* enumerating */
USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */
USB_SPEED_HIGH, /* usb 2.0 */
USB_SPEED_VARIABLE, /* wireless (usb 2.5) */
};
#endif
/* Descriptor types */
#define USB_DT_DEVICE 0x01
#define USB_DT_CONFIG 0x02
#define USB_DT_STRING 0x03
#define USB_DT_INTERFACE 0x04
#define USB_DT_ENDPOINT 0x05
#define USB_DT_DEVICE_QUALIFIER 0x06
#define USB_DT_OTHER_SPEED_CONFIG 0x07
#define USB_DT_INTERFACE_POWER 0x08
/* these are from a minor usb 2.0 revision (ECN) */
#define USB_DT_OTG 0x09
#define USB_DT_DEBUG 0x0a
#define USB_DT_INTERFACE_ASSOCIATION 0x0b
/* these are from the Wireless USB spec */
#define USB_DT_SECURITY 0x0c
#define USB_DT_KEY 0x0d
#define USB_DT_ENCRYPTION_TYPE 0x0e
#define USB_DT_BOS 0x0f
#define USB_DT_DEVICE_CAPABILITY 0x10
#define USB_DT_WIRELESS_ENDPOINT_COMP 0x11
#define USB_DT_WIRE_ADAPTER 0x21
#define USB_DT_RPIPE 0x22
//#define USB_DT_INTERFACE_ASSOCIATION 0x0b
#define USB_DT_HID (USB_TYPE_CLASS | 0x01)
#define USB_DT_REPORT (USB_TYPE_CLASS | 0x02)
#define USB_DT_PHYSICAL (USB_TYPE_CLASS | 0x03)
#define USB_DT_HUB (USB_TYPE_CLASS | 0x09)
/* Descriptor sizes per descriptor type */
#define USB_DT_DEVICE_SIZE 18
#define USB_DT_CONFIG_SIZE 9
#define USB_DT_INTERFACE_SIZE 9
#define USB_DT_ENDPOINT_SIZE 7
#define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */
#define USB_DT_HUB_NONVAR_SIZE 7
#define USB_DT_HID_SIZE 9
/* Endpoints */
#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */
#define USB_ENDPOINT_DIR_MASK 0x80
#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */
#define USB_ENDPOINT_XFER_CONTROL 0
#define USB_ENDPOINT_XFER_ISOC 1
#define USB_ENDPOINT_XFER_BULK 2
#define USB_ENDPOINT_XFER_INT 3
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
/* USB Packet IDs (PIDs) */
#define USB_PID_UNDEF_0 0xf0
#define USB_PID_OUT 0xe1
#define USB_PID_ACK 0xd2
#define USB_PID_DATA0 0xc3
#define USB_PID_UNDEF_4 0xb4
#define USB_PID_SOF 0xa5
#define USB_PID_UNDEF_6 0x96
#define USB_PID_UNDEF_7 0x87
#define USB_PID_UNDEF_8 0x78
#define USB_PID_IN 0x69
#define USB_PID_NAK 0x5a
#define USB_PID_DATA1 0x4b
#define USB_PID_PREAMBLE 0x3c
#define USB_PID_SETUP 0x2d
#define USB_PID_STALL 0x1e
#define USB_PID_UNDEF_F 0x0f
/* Standard requests */
#define USB_REQ_GET_STATUS 0x00
#define USB_REQ_CLEAR_FEATURE 0x01
#define USB_REQ_SET_FEATURE 0x03
#define USB_REQ_SET_ADDRESS 0x05
#define USB_REQ_GET_DESCRIPTOR 0x06
#define USB_REQ_SET_DESCRIPTOR 0x07
#define USB_REQ_GET_CONFIGURATION 0x08
#define USB_REQ_SET_CONFIGURATION 0x09
#define USB_REQ_GET_INTERFACE 0x0A
#define USB_REQ_SET_INTERFACE 0x0B
#define USB_REQ_SYNCH_FRAME 0x0C
/* HID requests */
#define USB_REQ_GET_REPORT 0x01
#define USB_REQ_GET_IDLE 0x02
#define USB_REQ_GET_PROTOCOL 0x03
#define USB_REQ_SET_REPORT 0x09
#define USB_REQ_SET_IDLE 0x0A
#define USB_REQ_SET_PROTOCOL 0x0B
/* "pipe" definitions */
#define PIPE_ISOCHRONOUS 0
#define PIPE_INTERRUPT 1
#define PIPE_CONTROL 2
#define PIPE_BULK 3
#define PIPE_DEVEP_MASK 0x0007ff00
#define USB_ISOCHRONOUS 0
#define USB_INTERRUPT 1
#define USB_CONTROL 2
#define USB_BULK 3
/* USB-status codes: */
#define USB_ST_ACTIVE 0x1 /* TD is active */
#define USB_ST_STALLED 0x2 /* TD is stalled */
#define USB_ST_BUF_ERR 0x4 /* buffer error */
#define USB_ST_BABBLE_DET 0x8 /* Babble detected */
#define USB_ST_NAK_REC 0x10 /* NAK Received*/
#define USB_ST_CRC_ERR 0x20 /* CRC/timeout Error */
#define USB_ST_BIT_ERR 0x40 /* Bitstuff error */
#define USB_ST_NOT_PROC 0x80000000L /* Not yet processed */
/*************************************************************************
* Hub defines
*/
/*
* Hub request types
*/
#define USB_RT_HUB (USB_TYPE_CLASS | USB_RECIP_DEVICE)
#define USB_RT_PORT (USB_TYPE_CLASS | USB_RECIP_OTHER)
/*
* Hub Class feature numbers
*/
#define C_HUB_LOCAL_POWER 0
#define C_HUB_OVER_CURRENT 1
/*
* Port feature numbers
*/
#define USB_PORT_FEAT_CONNECTION 0
#define USB_PORT_FEAT_ENABLE 1
#define USB_PORT_FEAT_SUSPEND 2
#define USB_PORT_FEAT_OVER_CURRENT 3
#define USB_PORT_FEAT_RESET 4
#define USB_PORT_FEAT_POWER 8
#define USB_PORT_FEAT_LOWSPEED 9
#define USB_PORT_FEAT_HIGHSPEED 10
#define USB_PORT_FEAT_C_CONNECTION 16
#define USB_PORT_FEAT_C_ENABLE 17
#define USB_PORT_FEAT_C_SUSPEND 18
#define USB_PORT_FEAT_C_OVER_CURRENT 19
#define USB_PORT_FEAT_C_RESET 20
/* wPortStatus bits */
#define USB_PORT_STAT_CONNECTION 0x0001
#define USB_PORT_STAT_ENABLE 0x0002
#define USB_PORT_STAT_SUSPEND 0x0004
#define USB_PORT_STAT_OVERCURRENT 0x0008
#define USB_PORT_STAT_RESET 0x0010
#define USB_PORT_STAT_POWER 0x0100
#define USB_PORT_STAT_LOW_SPEED 0x0200
#define USB_PORT_STAT_HIGH_SPEED 0x0400 /* support for EHCI */
#define USB_PORT_STAT_SPEED \
(USB_PORT_STAT_LOW_SPEED | USB_PORT_STAT_HIGH_SPEED)
/* wPortChange bits */
#define USB_PORT_STAT_C_CONNECTION 0x0001
#define USB_PORT_STAT_C_ENABLE 0x0002
#define USB_PORT_STAT_C_SUSPEND 0x0004
#define USB_PORT_STAT_C_OVERCURRENT 0x0008
#define USB_PORT_STAT_C_RESET 0x0010
/* wHubCharacteristics (masks) */
#define HUB_CHAR_LPSM 0x0003
#define HUB_CHAR_COMPOUND 0x0004
#define HUB_CHAR_OCPM 0x0018
/*
*Hub Status & Hub Change bit masks
*/
#define HUB_STATUS_LOCAL_POWER 0x0001
#define HUB_STATUS_OVERCURRENT 0x0002
#define HUB_CHANGE_LOCAL_POWER 0x0001
#define HUB_CHANGE_OVERCURRENT 0x0002
/* Struct USB_HCD defination */
// for flags
#define HCD_FLAG_HW_ACCESSIBLE 0 /* at full power */
#define HCD_FLAG_POLL_RH 2 /* poll for rh status? */
#define HCD_FLAG_POLL_PENDING 3 /* status has changed? */
#define HCD_FLAG_WAKEUP_PENDING 4 /* root hub is resuming? */
#define HCD_FLAG_RH_RUNNING 5 /* root hub is running? */
#define HCD_FLAG_DEAD 6 /* controller has died? */
/* The flags can be tested using these macros; they are likely to
* be slightly faster than test_bit().
*/
#define HCD_HW_ACCESSIBLE(hcd) ((hcd)->flags & (1U << HCD_FLAG_HW_ACCESSIBLE))
#define HCD_POLL_RH(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_RH))
#define HCD_POLL_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_PENDING))
#define HCD_WAKEUP_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_WAKEUP_PENDING))
#define HCD_RH_RUNNING(hcd) ((hcd)->flags & (1U << HCD_FLAG_RH_RUNNING))
#define HCD_DEAD(hcd) ((hcd)->flags & (1U << HCD_FLAG_DEAD))
// for state
#define __ACTIVE 0x01
#define __SUSPEND 0x04
#define __TRANSIENT 0x80
#define HC_STATE_HALT 0
#define HC_STATE_RUNNING (__ACTIVE)
#define HC_STATE_QUIESCING (__SUSPEND|__TRANSIENT|__ACTIVE)
#define HC_STATE_RESUMING (__SUSPEND|__TRANSIENT)
#define HC_STATE_SUSPENDED (__SUSPEND)
#define HC_IS_RUNNING(state) ((state) & __ACTIVE)
#define HC_IS_SUSPENDED(state) ((state) & __SUSPEND)
/*
* USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and
* are read as a bit array returned by USB_REQ_GET_STATUS. (So there
* are at most sixteen features of each type.) Hubs may also support a
* new USB_REQ_TEST_AND_SET_FEATURE to put ports into L1 suspend.
*/
#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
#define USB_DEVICE_TEST_MODE 2 /* (wired high speed only) */
#define USB_DEVICE_BATTERY 2 /* (wireless) */
#define USB_DEVICE_B_HNP_ENABLE 3 /* (otg) dev may initiate HNP */
#define USB_DEVICE_WUSB_DEVICE 3 /* (wireless)*/
#define USB_DEVICE_A_HNP_SUPPORT 4 /* (otg) RH port supports HNP */
#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
#define DeviceRequest \
((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8)
#define DeviceOutRequest \
((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8)
#define InterfaceRequest \
((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8)
#define EndpointRequest \
((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8)
#define EndpointOutRequest \
((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8)
/* class requests from the USB 2.0 hub spec, table 11-15 */
/* GetBusState and SetHubDescriptor are optional, omitted */
#define ClearHubFeature (0x2000 | USB_REQ_CLEAR_FEATURE)
#define ClearPortFeature (0x2300 | USB_REQ_CLEAR_FEATURE)
#define GetHubDescriptor (0xa000 | USB_REQ_GET_DESCRIPTOR)
#define GetHubStatus (0xa000 | USB_REQ_GET_STATUS)
#define GetPortStatus (0xa300 | USB_REQ_GET_STATUS)
#define SetHubFeature (0x2000 | USB_REQ_SET_FEATURE)
#define SetPortFeature (0x2300 | USB_REQ_SET_FEATURE)
/* from config descriptor bmAttributes */
#define USB_CONFIG_ATT_ONE (1 << 7) /* must be set */
#define USB_CONFIG_ATT_SELFPOWER (1 << 6) /* self powered */
#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */
#define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */
#endif /*_USB_DEFS_H_ */

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/*
* <linux/usb_gadget.h>
*
* We call the USB code inside a Linux-based peripheral device a "gadget"
* driver, except for the hardware-specific bus glue. One USB host can
* master many USB gadgets, but the gadgets are only slaved to one host.
*
*
* (C) Copyright 2002-2004 by David Brownell
* All Rights Reserved.
*
* This software is licensed under the GNU GPL version 2.
*/
#ifndef __USB_GADGET_H
#define __USB_GADGET_H
//#include "xlinux.h"
//#ifdef __KERNEL__
#include "osdep_api.h"
#include "usb_ch9.h"
//#include "usb_gadget.h"
#include "rtl8195a_otg_zero.h"
//#include "../otg/lm.h"
#if 1//defined(CONFIG_RTL_ULINKER)
#include "usb_ulinker.h"
#endif
#include "hal_util.h"
#include "usb.h"
typedef unsigned int gfp_t;
//struct usb_ep;
/**
* struct usb_ep - device side representation of USB endpoint
* @name:identifier for the endpoint, such as "ep-a" or "ep9in-bulk"
* @ops: Function pointers used to access hardware-specific operations.
* @ep_list:the gadget's ep_list holds all of its endpoints
* @maxpacket:The maximum packet size used on this endpoint. The initial
* value can sometimes be reduced (hardware allowing), according to
* the endpoint descriptor used to configure the endpoint.
* @driver_data:for use by the gadget driver. all other fields are
* read-only to gadget drivers.
*
* the bus controller driver lists all the general purpose endpoints in
* gadget->ep_list. the control endpoint (gadget->ep0) is not in that list,
* and is accessed only in response to a driver setup() callback.
*/
struct usb_ep {
void *driver_data;
const char *name;
const struct usb_ep_ops *ops;
_LIST ep_list;//ModifiedByJD
unsigned maxpacket:16;
const struct usb_endpoint_descriptor *desc;
};
typedef void (*usb_req_complete_t)(struct usb_ep *, struct usb_request *);
/**
* struct usb_request - describes one i/o request
* @buf: Buffer used for data. Always provide this; some controllers
* only use PIO, or don't use DMA for some endpoints.
* @dma: DMA address corresponding to 'buf'. If you don't set this
* field, and the usb controller needs one, it is responsible
* for mapping and unmapping the buffer.
* @length: Length of that data
* @no_interrupt: If true, hints that no completion irq is needed.
* Helpful sometimes with deep request queues that are handled
* directly by DMA controllers.
* @zero: If true, when writing data, makes the last packet be "short"
* by adding a zero length packet as needed;
* @short_not_ok: When reading data, makes short packets be
* treated as errors (queue stops advancing till cleanup).
* @complete: Function called when request completes, so this request and
* its buffer may be re-used.
* Reads terminate with a short packet, or when the buffer fills,
* whichever comes first. When writes terminate, some data bytes
* will usually still be in flight (often in a hardware fifo).
* Errors (for reads or writes) stop the queue from advancing
* until the completion function returns, so that any transfers
* invalidated by the error may first be dequeued.
* @context: For use by the completion callback
* @list: For use by the gadget driver.
* @status: Reports completion code, zero or a negative errno.
* Normally, faults block the transfer queue from advancing until
* the completion callback returns.
* Code "-ESHUTDOWN" indicates completion caused by device disconnect,
* or when the driver disabled the endpoint.
* @actual: Reports bytes transferred to/from the buffer. For reads (OUT
* transfers) this may be less than the requested length. If the
* short_not_ok flag is set, short reads are treated as errors
* even when status otherwise indicates successful completion.
* Note that for writes (IN transfers) some data bytes may still
* reside in a device-side FIFO when the request is reported as
* complete.
*
* These are allocated/freed through the endpoint they're used with. The
* hardware's driver can add extra per-request data to the memory it returns,
* which often avoids separate memory allocations (potential failures),
* later when the request is queued.
*
* Request flags affect request handling, such as whether a zero length
* packet is written (the "zero" flag), whether a short read should be
* treated as an error (blocking request queue advance, the "short_not_ok"
* flag), or hinting that an interrupt is not required (the "no_interrupt"
* flag, for use with deep request queues).
*
* Bulk endpoints can use any size buffers, and can also be used for interrupt
* transfers. interrupt-only endpoints can be much less functional.
*/
// NOTE this is analagous to 'struct urb' on the host side,
// except that it's thinner and promotes more pre-allocation.
struct usb_request {
void *buf;
unsigned length;
dma_addr_t dma;
unsigned no_interrupt:1;
unsigned zero:1;
unsigned short_not_ok:1;
usb_req_complete_t complete;
void *context;
_LIST list;//ModifiedByJD
int status;
unsigned actual;
};
/*-------------------------------------------------------------------------*/
/* endpoint-specific parts of the api to the usb controller hardware.
* unlike the urb model, (de)multiplexing layers are not required.
* (so this api could slash overhead if used on the host side...)
*
* note that device side usb controllers commonly differ in how many
* endpoints they support, as well as their capabilities.
*/
struct usb_ep_ops {
int (*enable) (struct usb_ep *ep,
const struct usb_endpoint_descriptor *desc);
int (*disable) (struct usb_ep *ep);
struct usb_request *(*alloc_request) (struct usb_ep *ep,
gfp_t gfp_flags);
void (*free_request) (struct usb_ep *ep, struct usb_request *req);
void *(*alloc_buffer) (struct usb_ep *ep, unsigned bytes,
dma_addr_t *dma, gfp_t gfp_flags);
void (*free_buffer) (struct usb_ep *ep, void *buf, dma_addr_t dma,
unsigned bytes);
// NOTE: on 2.6, drivers may also use dma_map() and
// dma_sync_single_*() to directly manage dma overhead.
int (*queue) (struct usb_ep *ep, struct usb_request *req,
gfp_t gfp_flags);
int (*dequeue) (struct usb_ep *ep, struct usb_request *req);
int (*set_halt) (struct usb_ep *ep, int value);
int (*fifo_status) (struct usb_ep *ep);
void (*fifo_flush) (struct usb_ep *ep);
};
/*-------------------------------------------------------------------------*/
/**
* usb_ep_enable - configure endpoint, making it usable
* @ep:the endpoint being configured. may not be the endpoint named "ep0".
* drivers discover endpoints through the ep_list of a usb_gadget.
* @desc:descriptor for desired behavior. caller guarantees this pointer
* remains valid until the endpoint is disabled; the data byte order
* is little-endian (usb-standard).
*
* when configurations are set, or when interface settings change, the driver
* will enable or disable the relevant endpoints. while it is enabled, an
* endpoint may be used for i/o until the driver receives a disconnect() from
* the host or until the endpoint is disabled.
*
* the ep0 implementation (which calls this routine) must ensure that the
* hardware capabilities of each endpoint match the descriptor provided
* for it. for example, an endpoint named "ep2in-bulk" would be usable
* for interrupt transfers as well as bulk, but it likely couldn't be used
* for iso transfers or for endpoint 14. some endpoints are fully
* configurable, with more generic names like "ep-a". (remember that for
* USB, "in" means "towards the USB master".)
*
* returns zero, or a negative error code.
*/
static inline int
usb_ep_enable (struct usb_ep *ep, const struct usb_endpoint_descriptor *desc)
{
return ep->ops->enable (ep, desc);
}
/**
* usb_ep_disable - endpoint is no longer usable
* @ep:the endpoint being unconfigured. may not be the endpoint named "ep0".
*
* no other task may be using this endpoint when this is called.
* any pending and uncompleted requests will complete with status
* indicating disconnect (-ESHUTDOWN) before this call returns.
* gadget drivers must call usb_ep_enable() again before queueing
* requests to the endpoint.
*
* returns zero, or a negative error code.
*/
static inline int
usb_ep_disable (struct usb_ep *ep)
{
return ep->ops->disable (ep);
}
/**
* usb_ep_alloc_request - allocate a request object to use with this endpoint
* @ep:the endpoint to be used with with the request
* @gfp_flags:GFP_* flags to use
*
* Request objects must be allocated with this call, since they normally
* need controller-specific setup and may even need endpoint-specific
* resources such as allocation of DMA descriptors.
* Requests may be submitted with usb_ep_queue(), and receive a single
* completion callback. Free requests with usb_ep_free_request(), when
* they are no longer needed.
*
* Returns the request, or null if one could not be allocated.
*/
static inline struct usb_request *
usb_ep_alloc_request (struct usb_ep *ep, gfp_t gfp_flags)
{
return ep->ops->alloc_request (ep, gfp_flags);
}
/**
* usb_ep_free_request - frees a request object
* @ep:the endpoint associated with the request
* @req:the request being freed
*
* Reverses the effect of usb_ep_alloc_request().
* Caller guarantees the request is not queued, and that it will
* no longer be requeued (or otherwise used).
*/
static inline void
usb_ep_free_request (struct usb_ep *ep, struct usb_request *req)
{
ep->ops->free_request (ep, req);
}
#if 0
/**
* usb_ep_alloc_buffer - allocate an I/O buffer
* @ep:the endpoint associated with the buffer
* @len:length of the desired buffer
* @dma:pointer to the buffer's DMA address; must be valid
* @gfp_flags:GFP_* flags to use
*
* Returns a new buffer, or null if one could not be allocated.
* The buffer is suitably aligned for dma, if that endpoint uses DMA,
* and the caller won't have to care about dma-inconsistency
* or any hidden "bounce buffer" mechanism. No additional per-request
* DMA mapping will be required for such buffers.
* Free it later with usb_ep_free_buffer().
*
* You don't need to use this call to allocate I/O buffers unless you
* want to make sure drivers don't incur costs for such "bounce buffer"
* copies or per-request DMA mappings.
*/
static inline void *
usb_ep_alloc_buffer (struct usb_ep *ep, unsigned len, dma_addr_t *dma,
gfp_t gfp_flags)
{
return ep->ops->alloc_buffer (ep, len, dma, gfp_flags);
}
/**
* usb_ep_free_buffer - frees an i/o buffer
* @ep:the endpoint associated with the buffer
* @buf:CPU view address of the buffer
* @dma:the buffer's DMA address
* @len:length of the buffer
*
* reverses the effect of usb_ep_alloc_buffer().
* caller guarantees the buffer will no longer be accessed
*/
static inline void
usb_ep_free_buffer (struct usb_ep *ep, void *buf, dma_addr_t dma, unsigned len)
{
ep->ops->free_buffer (ep, buf, dma, len);
}
#endif
/**
* usb_ep_queue - queues (submits) an I/O request to an endpoint.
* @ep:the endpoint associated with the request
* @req:the request being submitted
* @gfp_flags: GFP_* flags to use in case the lower level driver couldn't
* pre-allocate all necessary memory with the request.
*
* This tells the device controller to perform the specified request through
* that endpoint (reading or writing a buffer). When the request completes,
* including being canceled by usb_ep_dequeue(), the request's completion
* routine is called to return the request to the driver. Any endpoint
* (except control endpoints like ep0) may have more than one transfer
* request queued; they complete in FIFO order. Once a gadget driver
* submits a request, that request may not be examined or modified until it
* is given back to that driver through the completion callback.
*
* Each request is turned into one or more packets. The controller driver
* never merges adjacent requests into the same packet. OUT transfers
* will sometimes use data that's already buffered in the hardware.
* Drivers can rely on the fact that the first byte of the request's buffer
* always corresponds to the first byte of some USB packet, for both
* IN and OUT transfers.
*
* Bulk endpoints can queue any amount of data; the transfer is packetized
* automatically. The last packet will be short if the request doesn't fill it
* out completely. Zero length packets (ZLPs) should be avoided in portable
* protocols since not all usb hardware can successfully handle zero length
* packets. (ZLPs may be explicitly written, and may be implicitly written if
* the request 'zero' flag is set.) Bulk endpoints may also be used
* for interrupt transfers; but the reverse is not true, and some endpoints
* won't support every interrupt transfer. (Such as 768 byte packets.)
*
* Interrupt-only endpoints are less functional than bulk endpoints, for
* example by not supporting queueing or not handling buffers that are
* larger than the endpoint's maxpacket size. They may also treat data
* toggle differently.
*
* Control endpoints ... after getting a setup() callback, the driver queues
* one response (even if it would be zero length). That enables the
* status ack, after transfering data as specified in the response. Setup
* functions may return negative error codes to generate protocol stalls.
* (Note that some USB device controllers disallow protocol stall responses
* in some cases.) When control responses are deferred (the response is
* written after the setup callback returns), then usb_ep_set_halt() may be
* used on ep0 to trigger protocol stalls.
*
* For periodic endpoints, like interrupt or isochronous ones, the usb host
* arranges to poll once per interval, and the gadget driver usually will
* have queued some data to transfer at that time.
*
* Returns zero, or a negative error code. Endpoints that are not enabled
* report errors; errors will also be
* reported when the usb peripheral is disconnected.
*/
static inline int
usb_ep_queue (struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags)
{
DBG_8195A_OTG("%s, gfp_flags = %x\n",__func__, gfp_flags);
return ep->ops->queue (ep, req, gfp_flags);
}
/**
* usb_ep_dequeue - dequeues (cancels, unlinks) an I/O request from an endpoint
* @ep:the endpoint associated with the request
* @req:the request being canceled
*
* if the request is still active on the endpoint, it is dequeued and its
* completion routine is called (with status -ECONNRESET); else a negative
* error code is returned.
*
* note that some hardware can't clear out write fifos (to unlink the request
* at the head of the queue) except as part of disconnecting from usb. such
* restrictions prevent drivers from supporting configuration changes,
* even to configuration zero (a "chapter 9" requirement).
*/
static inline int usb_ep_dequeue (struct usb_ep *ep, struct usb_request *req)
{
return ep->ops->dequeue (ep, req);
}
#if 0
/**
* usb_ep_set_halt - sets the endpoint halt feature.
* @ep: the non-isochronous endpoint being stalled
*
* Use this to stall an endpoint, perhaps as an error report.
* Except for control endpoints,
* the endpoint stays halted (will not stream any data) until the host
* clears this feature; drivers may need to empty the endpoint's request
* queue first, to make sure no inappropriate transfers happen.
*
* Note that while an endpoint CLEAR_FEATURE will be invisible to the
* gadget driver, a SET_INTERFACE will not be. To reset endpoints for the
* current altsetting, see usb_ep_clear_halt(). When switching altsettings,
* it's simplest to use usb_ep_enable() or usb_ep_disable() for the endpoints.
*
* Returns zero, or a negative error code. On success, this call sets
* underlying hardware state that blocks data transfers.
* Attempts to halt IN endpoints will fail (returning -EAGAIN) if any
* transfer requests are still queued, or if the controller hardware
* (usually a FIFO) still holds bytes that the host hasn't collected.
*/
static inline int
usb_ep_set_halt (struct usb_ep *ep)
{
return ep->ops->set_halt (ep, 1);
}
/**
* usb_ep_clear_halt - clears endpoint halt, and resets toggle
* @ep:the bulk or interrupt endpoint being reset
*
* Use this when responding to the standard usb "set interface" request,
* for endpoints that aren't reconfigured, after clearing any other state
* in the endpoint's i/o queue.
*
* Returns zero, or a negative error code. On success, this call clears
* the underlying hardware state reflecting endpoint halt and data toggle.
* Note that some hardware can't support this request (like pxa2xx_udc),
* and accordingly can't correctly implement interface altsettings.
*/
static inline int
usb_ep_clear_halt (struct usb_ep *ep)
{
return ep->ops->set_halt (ep, 0);
}
/**
* usb_ep_fifo_status - returns number of bytes in fifo, or error
* @ep: the endpoint whose fifo status is being checked.
*
* FIFO endpoints may have "unclaimed data" in them in certain cases,
* such as after aborted transfers. Hosts may not have collected all
* the IN data written by the gadget driver (and reported by a request
* completion). The gadget driver may not have collected all the data
* written OUT to it by the host. Drivers that need precise handling for
* fault reporting or recovery may need to use this call.
*
* This returns the number of such bytes in the fifo, or a negative
* errno if the endpoint doesn't use a FIFO or doesn't support such
* precise handling.
*/
static inline int
usb_ep_fifo_status (struct usb_ep *ep)
{
if (ep->ops->fifo_status)
return ep->ops->fifo_status (ep);
else
return -EOPNOTSUPP;
}
/**
* usb_ep_fifo_flush - flushes contents of a fifo
* @ep: the endpoint whose fifo is being flushed.
*
* This call may be used to flush the "unclaimed data" that may exist in
* an endpoint fifo after abnormal transaction terminations. The call
* must never be used except when endpoint is not being used for any
* protocol translation.
*/
static inline void
usb_ep_fifo_flush (struct usb_ep *ep)
{
if (ep->ops->fifo_flush)
ep->ops->fifo_flush (ep);
}
#endif
/*-------------------------------------------------------------------------*/
/**
* struct usb_gadget - represents a usb slave device
* @ops: Function pointers used to access hardware-specific operations.
* @ep0: Endpoint zero, used when reading or writing responses to
* driver setup() requests
* @ep_list: List of other endpoints supported by the device.
* @speed: Speed of current connection to USB host.
* @is_dualspeed: True if the controller supports both high and full speed
* operation. If it does, the gadget driver must also support both.
* @is_otg: True if the USB device port uses a Mini-AB jack, so that the
* gadget driver must provide a USB OTG descriptor.
* @is_a_peripheral: False unless is_otg, the "A" end of a USB cable
* is in the Mini-AB jack, and HNP has been used to switch roles
* so that the "A" device currently acts as A-Peripheral, not A-Host.
* @a_hnp_support: OTG device feature flag, indicating that the A-Host
* supports HNP at this port.
* @a_alt_hnp_support: OTG device feature flag, indicating that the A-Host
* only supports HNP on a different root port.
* @b_hnp_enable: OTG device feature flag, indicating that the A-Host
* enabled HNP support.
* @name: Identifies the controller hardware type. Used in diagnostics
* and sometimes configuration.
* @dev: Driver model state for this abstract device.
*
* Gadgets have a mostly-portable "gadget driver" implementing device
* functions, handling all usb configurations and interfaces. Gadget
* drivers talk to hardware-specific code indirectly, through ops vectors.
* That insulates the gadget driver from hardware details, and packages
* the hardware endpoints through generic i/o queues. The "usb_gadget"
* and "usb_ep" interfaces provide that insulation from the hardware.
*
* Except for the driver data, all fields in this structure are
* read-only to the gadget driver. That driver data is part of the
* "driver model" infrastructure in 2.6 (and later) kernels, and for
* earlier systems is grouped in a similar structure that's not known
* to the rest of the kernel.
*
* Values of the three OTG device feature flags are updated before the
* setup() call corresponding to USB_REQ_SET_CONFIGURATION, and before
* driver suspend() calls. They are valid only when is_otg, and when the
* device is acting as a B-Peripheral (so is_a_peripheral is false).
*/
struct usb_gadget {
/* readonly to gadget driver */
const struct usb_gadget_ops *ops;
struct usb_ep *ep0;
_LIST ep_list; /* of usb_ep */ //ModifiedByJD
enum usb_device_speed speed;
enum usb_device_speed max_speed;
unsigned is_dualspeed:1;
unsigned is_otg:1;
unsigned is_a_peripheral:1;
unsigned b_hnp_enable:1;
unsigned a_hnp_support:1;
unsigned a_alt_hnp_support:1;
const char *name;
struct zero_dev dev;
void *driver_data;
void *device;
};
//struct usb_gadget;
/* the rest of the api to the controller hardware: device operations,
* which don't involve endpoints (or i/o).
*/
struct usb_gadget_ops {
int (*get_frame)(struct usb_gadget *);
int (*wakeup)(struct usb_gadget *);
int (*set_selfpowered) (struct usb_gadget *, int is_selfpowered);
int (*vbus_session) (struct usb_gadget *, int is_active);
int (*vbus_draw) (struct usb_gadget *, unsigned mA);
int (*pullup) (struct usb_gadget *, int is_on);
int (*ioctl)(struct usb_gadget *,
unsigned code, unsigned long param);
};
#if 0 //wei add
static inline void *
dev_get_drvdata (struct device *dev)
{
return dev->driver_data;
}
static inline void
dev_set_drvdata (struct device *dev, void *data)
{
dev->driver_data = data;
}
#endif
#if 0
static inline void set_gadget_data (struct usb_gadget *gadget, void *data)
{ dev_set_drvdata (gadget->dev, data); }
// { gadget->dev->driver_data = data; }
static inline void *get_gadget_data (struct usb_gadget *gadget)
{ return dev_get_drvdata (gadget->dev); }
// { return gadget->dev->driver_data;}
#endif
/* iterates the non-control endpoints; 'tmp' is a struct usb_ep pointer */
#define gadget_for_each_ep(tmp,gadget) \
list_for_each_entry(tmp, &(gadget)->ep_list, ep_list)
#if 0
/**
* usb_gadget_frame_number - returns the current frame number
* @gadget: controller that reports the frame number
*
* Returns the usb frame number, normally eleven bits from a SOF packet,
* or negative errno if this device doesn't support this capability.
*/
static inline int usb_gadget_frame_number (struct usb_gadget *gadget)
{
return gadget->ops->get_frame(gadget);
}
/**
* usb_gadget_wakeup - tries to wake up the host connected to this gadget
* @gadget: controller used to wake up the host
*
* Returns zero on success, else negative error code if the hardware
* doesn't support such attempts, or its support has not been enabled
* by the usb host. Drivers must return device descriptors that report
* their ability to support this, or hosts won't enable it.
*
* This may also try to use SRP to wake the host and start enumeration,
* even if OTG isn't otherwise in use. OTG devices may also start
* remote wakeup even when hosts don't explicitly enable it.
*/
static inline int usb_gadget_wakeup (struct usb_gadget *gadget)
{
if (!gadget->ops->wakeup)
return -EOPNOTSUPP;
return gadget->ops->wakeup (gadget);
}
/**
* usb_gadget_set_selfpowered - sets the device selfpowered feature.
* @gadget:the device being declared as self-powered
*
* this affects the device status reported by the hardware driver
* to reflect that it now has a local power supply.
*
* returns zero on success, else negative errno.
*/
static inline int
usb_gadget_set_selfpowered (struct usb_gadget *gadget)
{
xprintf("%s %s[%d]\n",__FILE__,__FUNCTION__,__LINE__);
if (!gadget->ops->set_selfpowered)
return -EOPNOTSUPP;
return gadget->ops->set_selfpowered (gadget, 1);
}
/**
* usb_gadget_clear_selfpowered - clear the device selfpowered feature.
* @gadget:the device being declared as bus-powered
*
* this affects the device status reported by the hardware driver.
* some hardware may not support bus-powered operation, in which
* case this feature's value can never change.
*
* returns zero on success, else negative errno.
*/
static inline int
usb_gadget_clear_selfpowered (struct usb_gadget *gadget)
{
if (!gadget->ops->set_selfpowered)
return -EOPNOTSUPP;
return gadget->ops->set_selfpowered (gadget, 0);
}
/**
* usb_gadget_vbus_connect - Notify controller that VBUS is powered
* @gadget:The device which now has VBUS power.
*
* This call is used by a driver for an external transceiver (or GPIO)
* that detects a VBUS power session starting. Common responses include
* resuming the controller, activating the D+ (or D-) pullup to let the
* host detect that a USB device is attached, and starting to draw power
* (8mA or possibly more, especially after SET_CONFIGURATION).
*
* Returns zero on success, else negative errno.
*/
static inline int
usb_gadget_vbus_connect(struct usb_gadget *gadget)
{
if (!gadget->ops->vbus_session)
return -EOPNOTSUPP;
return gadget->ops->vbus_session (gadget, 1);
}
#endif
/**
* usb_gadget_vbus_draw - constrain controller's VBUS power usage
* @gadget:The device whose VBUS usage is being described
* @mA:How much current to draw, in milliAmperes. This should be twice
* the value listed in the configuration descriptor bMaxPower field.
*
* This call is used by gadget drivers during SET_CONFIGURATION calls,
* reporting how much power the device may consume. For example, this
* could affect how quickly batteries are recharged.
*
* Returns zero on success, else negative errno.
*/
static inline int
usb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA)
{
if (!gadget->ops->vbus_draw)
return -1;//ModifiedByJD
return gadget->ops->vbus_draw (gadget, mA);
}
#if 0
/**
* usb_gadget_vbus_disconnect - notify controller about VBUS session end
* @gadget:the device whose VBUS supply is being described
*
* This call is used by a driver for an external transceiver (or GPIO)
* that detects a VBUS power session ending. Common responses include
* reversing everything done in usb_gadget_vbus_connect().
*
* Returns zero on success, else negative errno.
*/
static inline int
usb_gadget_vbus_disconnect(struct usb_gadget *gadget)
{
if (!gadget->ops->vbus_session)
return -EOPNOTSUPP;
return gadget->ops->vbus_session (gadget, 0);
}
/**
* usb_gadget_connect - software-controlled connect to USB host
* @gadget:the peripheral being connected
*
* Enables the D+ (or potentially D-) pullup. The host will start
* enumerating this gadget when the pullup is active and a VBUS session
* is active (the link is powered). This pullup is always enabled unless
* usb_gadget_disconnect() has been used to disable it.
*
* Returns zero on success, else negative errno.
*/
static inline int
usb_gadget_connect (struct usb_gadget *gadget)
{
if (!gadget->ops->pullup)
return -EOPNOTSUPP;
return gadget->ops->pullup (gadget, 1);
}
/**
* usb_gadget_disconnect - software-controlled disconnect from USB host
* @gadget:the peripheral being disconnected
*
* Disables the D+ (or potentially D-) pullup, which the host may see
* as a disconnect (when a VBUS session is active). Not all systems
* support software pullup controls.
*
* This routine may be used during the gadget driver bind() call to prevent
* the peripheral from ever being visible to the USB host, unless later
* usb_gadget_connect() is called. For example, user mode components may
* need to be activated before the system can talk to hosts.
*
* Returns zero on success, else negative errno.
*/
static inline int
usb_gadget_disconnect (struct usb_gadget *gadget)
{
if (!gadget->ops->pullup)
return -EOPNOTSUPP;
return gadget->ops->pullup (gadget, 0);
}
#endif
/*-------------------------------------------------------------------------*/
/**
* struct usb_gadget_driver - driver for usb 'slave' devices
* @function: String describing the gadget's function
* @speed: Highest speed the driver handles.
* @bind: Invoked when the driver is bound to a gadget, usually
* after registering the driver.
* At that point, ep0 is fully initialized, and ep_list holds
* the currently-available endpoints.
* Called in a context that permits sleeping.
* @setup: Invoked for ep0 control requests that aren't handled by
* the hardware level driver. Most calls must be handled by
* the gadget driver, including descriptor and configuration
* management. The 16 bit members of the setup data are in
* USB byte order. Called in_interrupt; this may not sleep. Driver
* queues a response to ep0, or returns negative to stall.
* @disconnect: Invoked after all transfers have been stopped,
* when the host is disconnected. May be called in_interrupt; this
* may not sleep. Some devices can't detect disconnect, so this might
* not be called except as part of controller shutdown.
* @unbind: Invoked when the driver is unbound from a gadget,
* usually from rmmod (after a disconnect is reported).
* Called in a context that permits sleeping.
* @suspend: Invoked on USB suspend. May be called in_interrupt.
* @resume: Invoked on USB resume. May be called in_interrupt.
* @driver: Driver model state for this driver.
*
* Devices are disabled till a gadget driver successfully bind()s, which
* means the driver will handle setup() requests needed to enumerate (and
* meet "chapter 9" requirements) then do some useful work.
*
* If gadget->is_otg is true, the gadget driver must provide an OTG
* descriptor during enumeration, or else fail the bind() call. In such
* cases, no USB traffic may flow until both bind() returns without
* having called usb_gadget_disconnect(), and the USB host stack has
* initialized.
*
* Drivers use hardware-specific knowledge to configure the usb hardware.
* endpoint addressing is only one of several hardware characteristics that
* are in descriptors the ep0 implementation returns from setup() calls.
*
* Except for ep0 implementation, most driver code shouldn't need change to
* run on top of different usb controllers. It'll use endpoints set up by
* that ep0 implementation.
*
* The usb controller driver handles a few standard usb requests. Those
* include set_address, and feature flags for devices, interfaces, and
* endpoints (the get_status, set_feature, and clear_feature requests).
*
* Accordingly, the driver's setup() callback must always implement all
* get_descriptor requests, returning at least a device descriptor and
* a configuration descriptor. Drivers must make sure the endpoint
* descriptors match any hardware constraints. Some hardware also constrains
* other descriptors. (The pxa250 allows only configurations 1, 2, or 3).
*
* The driver's setup() callback must also implement set_configuration,
* and should also implement set_interface, get_configuration, and
* get_interface. Setting a configuration (or interface) is where
* endpoints should be activated or (config 0) shut down.
*
* (Note that only the default control endpoint is supported. Neither
* hosts nor devices generally support control traffic except to ep0.)
*
* Most devices will ignore USB suspend/resume operations, and so will
* not provide those callbacks. However, some may need to change modes
* when the host is not longer directing those activities. For example,
* local controls (buttons, dials, etc) may need to be re-enabled since
* the (remote) host can't do that any longer; or an error state might
* be cleared, to make the device behave identically whether or not
* power is maintained.
*/
struct usb_gadget_driver {
char *function;
enum usb_device_speed *speed;
int (*bind)(struct usb_gadget *,
struct usb_gadget_driver *);
void (*unbind)(struct usb_gadget *);
int (*setup)(struct usb_gadget *, const struct usb_ctrlrequest *);
//CommentedByJD int (*setup)(dwc_otg_pcd_t *, const struct usb_ctrlrequest *);//ModifiedByJD
void (*disconnect)(struct usb_gadget *);
void (*suspend)(struct usb_gadget *);
void (*resume)(struct usb_gadget *);
// FIXME support safe rmmod
// struct device_driver *driver;
void * driver;
};
/*-------------------------------------------------------------------------*/
/* driver modules register and unregister, as usual.
* these calls must be made in a context that can sleep.
*
* these will usually be implemented directly by the hardware-dependent
* usb bus interface driver, which will only support a single driver.
*/
/**
* usb_gadget_register_driver - register a gadget driver
* @driver:the driver being registered
*
* Call this in your gadget driver's module initialization function,
* to tell the underlying usb controller driver about your driver.
* The driver's bind() function will be called to bind it to a
* gadget before this registration call returns. It's expected that
* the bind() functions will be in init sections.
* This function must be called in a context that can sleep.
*/
int usb_gadget_register_driver (struct usb_gadget_driver *driver);
/**
* usb_gadget_unregister_driver - unregister a gadget driver
* @driver:the driver being unregistered
*
* Call this in your gadget driver's module cleanup function,
* to tell the underlying usb controller that your driver is
* going away. If the controller is connected to a USB host,
* it will first disconnect(). The driver is also requested
* to unbind() and clean up any device state, before this procedure
* finally returns. It's expected that the unbind() functions
* will in in exit sections, so may not be linked in some kernels.
* This function must be called in a context that can sleep.
*/
int usb_gadget_unregister_driver (struct usb_gadget_driver *driver);
/**
* usb_free_descriptors - free descriptors returned by usb_copy_descriptors()
* @v: vector of descriptors
*/
static inline void usb_free_descriptors(struct usb_descriptor_header **v)
{
RtlMfree((u8 *)v, sizeof(struct usb_descriptor_header));
}
/*-------------------------------------------------------------------------*/
/* utility to simplify dealing with string descriptors */
/**
* struct usb_string - wraps a C string and its USB id
* @id:the (nonzero) ID for this string
* @s:the string, in UTF-8 encoding
*
* If you're using usb_gadget_get_string(), use this to wrap a string
* together with its ID.
*/
struct usb_string {
u8 id;
const char *s;
};
/**
* struct usb_gadget_strings - a set of USB strings in a given language
* @language:identifies the strings' language (0x0409 for en-us)
* @strings:array of strings with their ids
*
* If you're using usb_gadget_get_string(), use this to wrap all the
* strings for a given language.
*/
struct usb_gadget_strings {
u16 language; /* 0x0409 for en-us */
struct usb_string *strings;
};
/**
* gadget_is_dualspeed - return true iff the hardware handles high speed
* @g: controller that might support both high and full speeds
*/
static inline int gadget_is_dualspeed(struct usb_gadget *g)
{
return g->max_speed >= USB_SPEED_HIGH;
}
#if 0
/**
* gadget_is_superspeed() - return true if the hardware handles superspeed
* @g: controller that might support superspeed
*/
static inline int gadget_is_superspeed(struct usb_gadget *g)
{
return g->max_speed >= USB_SPEED_SUPER;
}
#endif
/* put descriptor for string with that id into buf (buflen >= 256) */
int usb_gadget_get_string (struct usb_gadget_strings *table, int id, u8 *buf);
/*-------------------------------------------------------------------------*/
/* utility to simplify managing config descriptors */
/* write vector of descriptors into buffer */
int usb_descriptor_fillbuf(void *, unsigned,
const struct usb_descriptor_header **);
/* build config descriptor from single descriptor vector */
int usb_gadget_config_buf(const struct usb_config_descriptor *config,
void *buf, unsigned buflen, const struct usb_descriptor_header **desc);
/*-------------------------------------------------------------------------*/
static inline void set_gadget_data(struct usb_gadget *gadget, void *data)
{ gadget->driver_data = data; }
static inline void *get_gadget_data(struct usb_gadget *gadget)
{ return gadget->driver_data; }
/* utility wrapping a simple endpoint selection policy */
#if 1
extern struct usb_ep *usb_ep_autoconfig (struct usb_gadget *,
struct usb_endpoint_descriptor *);// ULINKER_DEVINIT;
extern void usb_ep_autoconfig_reset (struct usb_gadget *);// ULINKER_DEVINIT;
#endif
//#endif /* __KERNEL__ */
#endif /* __LINUX_USB_GADGET_H */

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lib/fwlib/ram_lib/usb_otg/include/usb_ulinker.h Normal file
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#ifndef __LINUX_USB_ULINKER_H
#define __LINUX_USB_ULINKER_H
//#include "linux/autoconf.h"
//#ifndef CONFIG_RTL_ULINKER_CUSTOMIZATION
#if 1//ModifiedByJD
#define ULINKER_ETHER_VID 0x0BDA
#define ULINKER_ETHER_PID 0x8195
#define ULINKER_MANUFACTURER "Realtek Semicoonductor Corp."
#define ULINKER_WINTOOLS_GUID "1CACC490-055C-4035-A026-1DAB0BDA8196"
#define ULINKER_WINTOOLS_DISPLAY_NAME "Realtek RTL8196EU Universal Linker"
#define ULINKER_WINTOOLS_CONTACT "nicfae@realtek.com.tw"
#define ULINKER_WINTOOLS_DISPLAY_VERSION "v1.0.0.0"
#define ULINKER_WINTOOLS_HELP_LINK "http://www.realtek.com.tw"
#define ULINKER_WINTOOLS_PUBLISHER ULINKER_MANUFACTURER
#define ULINKER_WINTOOLS_TARGET_DIR ULINKER_WINTOOLS_DISPLAY_NAME
#else
#define ULINKER_ETHER_VID CONFIG_RTL_ULINKER_VID
#define ULINKER_ETHER_PID CONFIG_RTL_ULINKER_PID
#define ULINKER_STORAGE_VID CONFIG_RTL_ULINKER_VID_S
#define ULINKER_STORAGE_PID CONFIG_RTL_ULINKER_PID_S
#define ULINKER_MANUFACTURER CONFIG_RTL_ULINKER_MANUFACTURE
#define ULINKER_WINTOOLS_GUID CONFIG_RTL_ULINKER_WINTOOLS_GUID
#define ULINKER_WINTOOLS_DISPLAY_NAME CONFIG_RTL_ULINKER_WINTOOLS_DISPLAY_NAME
#define ULINKER_WINTOOLS_CONTACT CONFIG_RTL_ULINKER_WINTOOLS_CONTACT
#define ULINKER_WINTOOLS_DISPLAY_VERSION CONFIG_RTL_ULINKER_WINTOOLS_DISPLAY_VERSION
#define ULINKER_WINTOOLS_HELP_LINK CONFIG_RTL_ULINKER_WINTOOLS_HELP_LINK
#define ULINKER_WINTOOLS_PUBLISHER ULINKER_MANUFACTURER
#define ULINKER_WINTOOLS_TARGET_DIR ULINKER_WINTOOLS_DISPLAY_NAME
#endif
//------------------------------------------------
// if you don't have a specific PID for storage, don't change following define of storage mode.
//
// begin: don't change
#ifndef ULINKER_STORAGE_VID
#define ULINKER_STORAGE_VID 0x0BDA
#define ULINKER_STORAGE_PID 0x8197
#endif
#define ULINKER_STORAGE_VID_STR "USB Ether "
#define ULINKER_STORAGE_PID_DISK_STR "Driver DISC"
#define ULINKER_STORAGE_PID_CDROM_STR "Driver CDROM"
#define ULINKER_WINTOOLS_DRIVER_PATH "Driver"
// end: don't change
//------------------------------------------------
//----------------------------------------------------------------------
#if defined(CONFIG_RTL_ULINKER)
#define ULINKER_DEVINIT
#define ULINKER_DEVINITDATA
#define ULINKER_DEVINITCONST
#define ULINKER_DEVEXIT
#define ULINKER_DEVEXITDATA
#define ULINKER_DEVEXITCONST
#else
#define ULINKER_DEVINIT __devinit
#define ULINKER_DEVINITDATA __devinitdata
#define ULINKER_DEVINITCONST __devinitconst
#define ULINKER_DEVEXIT __devexit
#define ULINKER_DEVEXITDATA __devexitdata
#define ULINKER_DEVEXITCONST __devexitconst
#endif
#endif /* __LINUX_USB_ULINKER_H */

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lib/fwlib/ram_lib/wlan/realtek/wlan_ram_map/rom/rom_wlan_ram_map.h Normal file
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#ifndef ROM_WLAN_RAM_MAP_H
#define ROM_WLAN_RAM_MAP_H
struct _rom_wlan_ram_map {
unsigned char * (*rtw_malloc)(unsigned int sz);
void (*rtw_mfree)(unsigned char *pbuf, unsigned int sz);
};
#endif /* ROM_WLAN_RAM_MAP_H */