mirror of
https://github.com/pvvx/RTL00ConsoleROM.git
synced 2024-11-25 19:44:15 +00:00
107 lines
4.6 KiB
C
107 lines
4.6 KiB
C
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#ifndef _RTL8710_SYS_H_
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#define _RTL8710_SYS_H_
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#include <stdint.h>
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// ~/programming/rtl8710/doc/registers/8195a/fwlib/rtl8195a/rtl8195a_sys_on.h
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typedef struct{
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volatile uint16_t PWR_CTRL; // 0x0000
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volatile uint16_t ISO_CTRL; // 0x0002
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uint32_t RESERVED1[1];
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volatile uint32_t FUNC_EN; // 0x0008
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uint32_t RESERVED2[1];
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volatile uint32_t CLK_CTRL0; // 0x0010
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volatile uint32_t CLK_CTRL1; // 0x0014
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uint32_t RESERVED3[2];
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volatile uint32_t EFUSE_SYSCFG0; // 0x0020
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volatile uint32_t EFUSE_SYSCFG1; // 0x0024
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volatile uint32_t EFUSE_SYSCFG2; // 0x0028
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volatile uint32_t EFUSE_SYSCFG3; // 0x002C
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volatile uint32_t EFUSE_SYSCFG4; // 0x0030
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volatile uint32_t EFUSE_SYSCFG5; // 0x0034
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volatile uint32_t EFUSE_SYSCFG6; // 0x0038
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volatile uint32_t EFUSE_SYSCFG7; // 0x003C
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volatile uint32_t REGU_CTRL0; // 0x0040
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uint32_t RESERVED4[1];
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volatile uint32_t SWR_CTRL0; // 0x0048
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volatile uint32_t SWR_CTRL1; // 0x004C
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uint32_t RESERVED5[4];
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volatile uint32_t XTAL_CTRL0; // 0x0060
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volatile uint32_t XTAL_CTRL1; // 0x0064
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uint32_t RESERVED6[2];
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volatile uint32_t SYSPLL_CTRL0; // 0x0070
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volatile uint32_t SYSPLL_CTRL1; // 0x0074
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volatile uint32_t SYSPLL_CTRL2; // 0x0078
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uint32_t RESERVED7[5];
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volatile uint32_t ANA_TIM_CTRL; // 0x0090
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volatile uint32_t DSLP_TIM_CTRL; // 0x0094
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volatile uint32_t DSLP_TIM_CAL_CTRL; // 0x0098
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uint32_t RESERVED8[1];
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volatile uint32_t DEBUG_CTRL; // 0x00A0
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volatile uint32_t PINMUX_CTRL; // 0x00A4
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volatile uint32_t GPIO_DSTBY_WAKE_CTRL0; // 0x00A8
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volatile uint32_t GPIO_DSTBY_WAKE_CTRL1; // 0x00AC
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uint32_t RESERVED9[3];
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volatile uint32_t DEBUG_REG; // 0x00BC
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uint32_t RESERVED10[8];
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volatile uint32_t EEPROM_CTRL0; // 0x00E0
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volatile uint32_t EEPROM_CTRL1; // 0x00E4
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volatile uint32_t EFUSE_CTRL; // 0x00E8
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volatile uint32_t EFUSE_TEST; // 0x00EC
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volatile uint32_t DSTBY_INFO0; // 0x00F0
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volatile uint32_t DSTBY_INFO1; // 0x00F4
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volatile uint32_t DSTBY_INFO2; // 0x00F8
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volatile uint32_t DSTBY_INFO3; // 0x00FC
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volatile uint32_t SLP_WAKE_EVENT_MSK0; // 0x0100
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volatile uint32_t SLP_WAKE_EVENT_MSK1; // 0x0104
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volatile uint32_t SLP_WAKE_EVENT_STATUS0; // 0x0108
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volatile uint32_t SLP_WAKE_EVENT_STATUS1; // 0x010C
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volatile uint32_t SNF_WAKE_EVENT_MSK0; // 0x0110
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volatile uint32_t SNF_WAKE_EVENT_STATUS; // 0x0114
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volatile uint32_t PWRMGT_CTRL; // 0x0118
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uint32_t RESERVED11[1];
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volatile uint32_t PWRMGT_OPTION; // 0x0120
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volatile uint32_t PWRMGT_OPTION_EXT; // 0x0124
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uint32_t RESERVED12[2];
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volatile uint32_t DSLP_WEVENT; // 0x0130
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volatile uint32_t PERI_MONITOR; // 0x0134
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uint32_t RESERVED13[46];
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volatile uint32_t SYSTEM_CFG0; // 0x01F0
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volatile uint32_t SYSTEM_CFG1; // 0x01F4
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volatile uint32_t SYSTEM_CFG2; // 0x01F8
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}__attribute__((packed)) SYS_TypeDef;
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#define SYS ((SYS_TypeDef *)0x40000000)
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// SYS_PWR_CTRL
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#define SYS_PWR_CTRL_PEON_EN (((uint16_t)0x01) << 0)
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#define SYS_PWR_CTRL_RET_MEM_EN (((uint16_t)0x01) << 1)
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#define SYS_PWR_CTRL_SOC_EN (((uint16_t)0x01) << 2)
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// SYS_ISO_CTRL
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#define SYS_ISO_CTRL_PEON (((uint16_t)0x01) << 0)
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#define SYS_ISO_CTRL_RET_MEM (((uint16_t)0x01) << 1)
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#define SYS_ISO_CTRL_SOC (((uint16_t)0x01) << 2)
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#define SYS_ISO_CTRL_SYSPLL (((uint16_t)0x01) << 7)
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// SYS_FUNC_EN
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#define SYS_FUNC_EN_FEN_EELDR (((uint32_t)0x01) << 0)
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#define SYS_FUNC_EN_SOC_SYSPEON_EN (((uint32_t)0x01) << 4)
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#define SYS_FUNC_EN_FEN_SIC (((uint32_t)0x01) << 24)
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#define SYS_FUNC_EN_FEN_SIC_MST (((uint32_t)0x01) << 25)
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#define SYS_FUNC_EN_PWRON_TRAP_SHTDN_N (((uint32_t)0x01) << 30)
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#define SYS_FUNC_EN_AMACRO_EN (((uint32_t)0x01) << 31)
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// SYS_CLK_CTRL0
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#define SYS_CLK_CTRL0_CK_SYSREG_EN (((uint32_t)0x01) << 0)
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#define SYS_CLK_CTRL0_CK_EELDR_EN (((uint32_t)0x01) << 1)
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#define SYS_CLK_CTRL0_SOC_OCP_IOBUS_CK_EN (((uint32_t)0x01) << 2)
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// SYS_CLK_CTRL1
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#define SYS_CLK_CTRL1_PESOC_EELDR_CK_SEL (((uint32_t)0x01) << 0)
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#define SYS_CLK_CTRL1_PESOC_OCP_CPU_CK_SEL (((uint32_t)0x07) << 4)
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#endif
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