mirror of
https://github.com/Ai-Thinker-Open/Ai-Thinker-Open_RTL8710BX_ALIOS_SDK.git
synced 2024-12-04 19:40:27 +00:00
104 lines
4.5 KiB
Python
Executable file
104 lines
4.5 KiB
Python
Executable file
#!/usr/bin/python
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import sys
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import re
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def get_mem_info(map_file):
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total_ram = 0
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total_rom = 0
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map_lines = []
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with open(map_file, 'r') as f:
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s = f.read()
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# find the memory configuration
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mem_config_list = re.findall('Memory Configuration\r?\n\r?\nName Origin Length Attributes\r?\n([\s\S]+)\r?\nLinker script and memory map', s)
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mem_config_text = '' if not mem_config_list else mem_config_list[0]
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if not mem_config_text:
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print 'Can\'t parse memory configure, memory info get fail!'
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return
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# find the ROM configuration
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rom_config_text = re.findall('\w+\s+(0x\w+)\s+(0x\w+)\s+(?:xr|r)\r?\n',mem_config_text)
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# get every ROM configuration's start - end address
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rom_config = []
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for rom in rom_config_text:
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rom_config += [{'start':int(rom[0], 16), 'end':int(rom[0], 16) + int(rom[1], 16)}]
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# find the RAM configuration
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ram_config_text = re.findall('\w+\s+(0x\w+)\s+(0x\w+)\s+(?:xrw|rw)\r?\n',mem_config_text)
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if (len(ram_config_text)+len(rom_config_text)) == 0:
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ram_config_text = re.findall('\*default\*\s+(0x\w+)\s+(0x\w+)\r?\n',mem_config_text)
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print ('no definite address hint,using default mem configuration')
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# get every RAM configuration's start - end address
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ram_config = []
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for ram in ram_config_text:
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ram_config += [{'start':int(ram[0], 16), 'end':int(ram[0], 16) + int(ram[1], 16)}]
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# find memory map (without discard and debug sections)
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mem_map_list = re.findall('Linker script and memory map([\s\S]+?)OUTPUT\('+map_file.replace('.map','.elf'), s)
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mem_map = '' if not mem_map_list else mem_map_list[0]
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if not mem_map:
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print 'Can\'t parse memory info, memory info get fail!'
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return
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mem_map = mem_map.replace('\r', '')
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modules = []
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for l in mem_map.split('\n'):
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m = re.search('0x\w+\s+0x\w+\s+.+?([^/\\\]+\.[ao])\((.+\.o)\)', l)
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if m == None:
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continue
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modules.append(m.groups()[0])
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modules = list(set(modules))
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# find sections address - length in memory map
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# modules = list(set(item[0] for item in re.findall('0x\w+\s+0x\w+\s+.+?([^/\\\]+\.[ao])(\(.+\.o\))?\r?\n', mem_map)))
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modules.sort(key = lambda x : x.upper())
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modules += ['*fill*']
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for module in modules:
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rom_size = 0
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ram_size = 0
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module = module.replace('+', '\+')
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# get module's sections's address and size
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if(module == '*fill*'):
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sections = map(lambda arg : {'address':int(arg[0], 16), 'size':int(arg[1], 16)}, re.findall('\*fill\*[ \t]+(0x\w+)[ \t]+(0x\w+)[ \t]+\r?\n', mem_map))
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else:
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sections = map(lambda arg : {'address':int(arg[0], 16), 'size':int(arg[1], 16)}, re.findall('(0x\w+)[ \t]+(0x\w+)[ \t]+.+[/\\\]'+module+'(\(.+\.o\))?\r?\n', mem_map))
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if(not sections):
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continue
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def ram_size_def(arg):
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for ram_info in ram_config:
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if(ram_info['start'] <= arg['address'] < ram_info['end']):
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return arg['size']
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return 0
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def rom_size_def(arg):
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for rom_info in rom_config:
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if(rom_info['start'] <= arg['address'] < rom_info['end']):
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return arg['size']
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return 0
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ram_size = reduce(lambda x,y:x+y, map(ram_size_def, sections))
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rom_size = reduce(lambda x,y:x+y, map(rom_size_def, sections))
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total_ram += ram_size
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total_rom += rom_size
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map_lines.append('| %-40s | %-8d | %-8d |'%(re.sub('\.[ao]','',module)[:40],rom_size,ram_size))
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print '\n AOS MEMORY MAP '
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print '|=================================================================|'
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print '| %-40s | %-8s | %-8s |'%('MODULE','ROM','RAM')
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print '|=================================================================|'
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for line in map_lines:
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print line
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print '|=================================================================|'
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print '| %-40s | %-8d | %-8d |'%('TOTAL (bytes)', total_rom, total_ram)
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print '|=================================================================|'
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def main():
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get_mem_info(sys.argv[1])
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if __name__ == "__main__":
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main()
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