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guocheng.kgc 2020-06-18 20:06:52 +08:00 • committed by shengdong.dsd
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301
Living_SDK/platform/mcu/bk7231u/aos/aos_debug.h Normal file
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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef AOS_DEBUG_H
#define AOS_DEBUG_H
#ifdef __cplusplus
extern "C" {
#endif
#define SHORT_FILE __FILENAME__
#define debug_print_assert(A,B,C,D,E,F)
#if (!defined(unlikely))
#define unlikely(EXPRESSSION) !!(EXPRESSSION)
#endif
/*
* Check that an expression is true (non-zero).
* If expression evalulates to false, this prints debugging information (actual expression string, file, line number,
* function name, etc.) using the default debugging output method.
*
* @param[in] X expression to be evaluated.
*/
#if (!defined(check))
#define check(X) \
do { \
if (unlikely(!(X))) { \
debug_print_assert(0, #X, NULL, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
} \
} while(1 == 0)
#endif
/*
* Check that an expression is true (non-zero) with an explanation.
* If expression evalulates to false, this prints debugging information (actual expression string, file, line number,
* function name, etc.) using the default debugging output method.
*
* @param[in] X expression to be evaluated.
* @param[in] STR If the expression evaluate to false, custom string to print.
*/
#if (!defined(check_string))
#define check_string(X, STR) \
do { \
if (unlikely(!(X))) { \
debug_print_assert(0, #X, STR, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
AOS_ASSERTION_FAIL_ACTION(); \
} \
} while(1 == 0)
#endif
/*
* Requires that an expression evaluate to true.
* If expression evalulates to false, this prints debugging information (actual expression string, file, line number,
* function name, etc.) using the default debugging output method then jumps to a label.
*
* @param[in] X expression to be evalulated.
* @param[in] LABEL if expression evaluate to false,jumps to the LABEL.
*/
#if (!defined(require))
#define require(X, LABEL) \
do { \
if (unlikely(!(X))) { \
debug_print_assert( 0, #X, NULL, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__ ); \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Requires that an expression evaluate to true with an explanation.
* If expression evalulates to false, this prints debugging information (actual expression string, file, line number,
* function name, etc.) and a custom explanation string using the default debugging output method then jumps to a label.
*
* @param[in] X expression to be evalulated.
* @param[in] LABEL if expression evaluate to false,jumps to the LABEL.
* @param[in] STR if expression evaluate to false,custom explanation string to print.
*/
#if (!defined(require_string))
#define require_string(X, LABEL, STR) \
do { \
if (unlikely(!(X))) { \
debug_print_assert(0, #X, STR, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Requires that an expression evaluate to true.
* If expression evalulates to false, this jumps to a label. No debugging information is printed.
*
* @param[in] X expression to be evalulated
* @param[in] LABEL if expression evaluate to false,jumps to the LABEL.
*/
#if (!defined(require_quiet))
#define require_quiet(X, LABEL) \
do { \
if (unlikely(!(X))) { \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Require that an error code is noErr (0).
* If the error code is non-0, this prints debugging information (actual expression string, file, line number,
* function name, etc.) using the default debugging output method then jumps to a label.
*
* @param[in] ERR error to be evaluated
* @param[in] LABEL If the error code is non-0,jumps to the LABEL.
*/
#if (!defined(require_noerr))
#define require_noerr(ERR, LABEL) \
do { \
int localErr; \
\
localErr = (int)(ERR); \
if (unlikely(localErr != 0)) { \
debug_print_assert(localErr, NULL, NULL, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
goto LABEL; \
} \
\
} while(1 == 0)
#endif
/*
* Require that an error code is noErr (0) with an explanation.
* If the error code is non-0, this prints debugging information (actual expression string, file, line number,
* function name, etc.), and a custom explanation string using the default debugging output method using the
* default debugging output method then jumps to a label.
*
* @param[in] ERR error to be evaluated
* @param[in] LABEL If the error code is non-0, jumps to the LABEL.
* @param[in] STR If the error code is non-0, custom explanation string to print
*/
#if (!defined(require_noerr_string))
#define require_noerr_string(ERR, LABEL, STR) \
do { \
int localErr; \
\
localErr = (int)(ERR); \
if (unlikely(localErr != 0)) { \
debug_print_assert(localErr, NULL, STR, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Require that an error code is noErr (0) with an explanation and action to execute otherwise.
* If the error code is non-0, this prints debugging information (actual expression string, file, line number,
* function name, etc.), and a custom explanation string using the default debugging output method using the
* default debugging output method then executes an action and jumps to a label.
*
* @param[in] ERR error to be evaluated.
* @param[in] LABEL If the error code is non-0, jumps to the LABEL.
* @param[in] ACTION If the error code is non-0, custom code to executes.
* @param[in] STR If the error code is non-0, custom explanation string to print.
*/
#if (!defined(require_noerr_action_string))
#define require_noerr_action_string(ERR, LABEL, ACTION, STR) \
do { \
int localErr; \
\
localErr = (int)(ERR); \
if (unlikely(localErr != 0)) { \
debug_print_assert(localErr, NULL, STR, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
{ ACTION; } \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Require that an error code is noErr (0).
* If the error code is non-0, this jumps to a label. No debugging information is printed.
*
* @param[in] ERR error to be evaluated.
* @param[in] LABEL If the error code is non-0, jumps to the LABEL.
*/
#if (!defined(require_noerr_quiet))
#define require_noerr_quiet(ERR, LABEL) \
do { \
if (unlikely((ERR) != 0)) { \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Require that an error code is noErr (0) with an action to execute otherwise.
* If the error code is non-0, this prints debugging information (actual expression string, file, line number,
* function name, etc.) using the default debugging output method then executes an action and jumps to a label.
*
* @param[in] ERR error to be evaluated.
* @param[in] LABEL If the error code is non-0, jumps to the LABEL.
* @param[in] ACTION If the error code is non-0, custom code to executes.
*/
#if (!defined(require_noerr_action))
#define require_noerr_action(ERR, LABEL, ACTION) \
do { \
int localErr; \
\
localErr = (int)(ERR); \
if (unlikely(localErr != 0)) { \
debug_print_assert(localErr, NULL, NULL, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
{ ACTION; } \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Require that an error code is noErr (0) with an action to execute otherwise.
* If the error code is non-0, this executes an action and jumps to a label. No debugging information is printed.
*
* @param[in] ERR error to be evaluated.
* @param[in] LABEL If the error code is non-0, jumps to the LABEL.
* @param[in] ACTION If the error code is non-0, custom code to executes.
*/
#if (!defined(require_noerr_action_quiet))
#define require_noerr_action_quiet(ERR, LABEL, ACTION) \
do { \
if (unlikely((ERR) != 0)) { \
{ ACTION; } \
goto LABEL; \
} \
} while(1 == 0)
#endif
/*
* Requires that an expression evaluate to true with an action to execute otherwise.
* If expression evalulates to false, this prints debugging information (actual expression string, file, line number,
* function name, etc.) using the default debugging output method then executes an action and jumps to a label.
*
* @param[in] X expression to be evaluated.
* @param[in] LABEL If the expression evaluate to false, jumps to the LABEL.
* @param[in] ACTION If the expression evaluate to false, custom code to executes.
*/
#if (!defined(require_action))
#define require_action(X, LABEL, ACTION) \
do { \
if (unlikely(!(X))) { \
debug_print_assert(0, #X, NULL, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
{ ACTION; } \
goto LABEL; \
} \
} while (1 == 0)
#endif
/*
* Requires that an expression evaluate to true with an explanation and action to execute otherwise.
* If expression evalulates to false, this prints debugging information (actual expression string, file, line number,
* function name, etc.) and a custom explanation string using the default debugging output method then executes an
* action and jumps to a label.
*
* @param[in] X expression to be evaluated.
* @param[in] LABEL If the expression evaluate to false, jumps to the LABEL.
* @param[in] ACTION If the expression evaluate to false, custom code to executes.
* @param[in] STR If the expression evaluate to false, custom string to print.
*/
#if (!defined(require_action_string))
#define require_action_string(X, LABEL, ACTION, STR) \
do { \
if (unlikely(!(X))) { \
debug_print_assert(0, #X, STR, SHORT_FILE, __LINE__, __PRETTY_FUNCTION__); \
{ ACTION; } \
goto LABEL; \
} \
} while (1 == 0)
#endif
/*
* Requires that an expression evaluate to true with an action to execute otherwise.
* If expression evalulates to false, this executes an action and jumps to a label.
* No debugging information is printed.
*
* @param[in] X expression to be evaluated.
* @param[in] LABEL If the expression evaluate to false, jumps to the LABEL.
* @param[in] ACTION If the expression evaluate to false, custom code to executes.
*/
#if (!defined(require_action_quiet))
#define require_action_quiet(X, LABEL, ACTION) \
do { \
if (unlikely(!(X))) { \
{ ACTION; } \
goto LABEL; \
} \
\
} while(1 == 0)
#endif
#ifdef __cplusplus
}
#endif
#endif /* AOS_DEBUG_H */

97
Living_SDK/platform/mcu/bk7231u/aos/aos_main.c Normal file
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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <aos_main.h>
#include <k_api.h>
#include <aos/kernel.h>
#include <aos/init.h>
#include <aos/aos.h>
#include "ate_app.h"
#include "cmd_evm.h"
#include "cmd_rx_sensitivity.h"
#include "board.h"
#include "uart_pub.h"
#include "ate_app.h"
#define AOS_START_STACK 2048
ktask_t *g_aos_init;
extern void board_init(void);
static kinit_t kinit = {
.argc = 0,
.argv = NULL,
.cli_enable = 1
};
#if ATE_APP_FUN
static void tx_evm_cmd_test(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int ret = do_evm(NULL, 0, argc, argv);
if(ret)
{
printf("tx_evm bad parameters\r\n");
}
}
static void rx_sens_cmd_test(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int ret = do_rx_sensitivity(NULL, 0, argc, argv);
if(ret)
{
printf("rx sensitivity bad parameters\r\n");
}
}
static const struct cli_command cli_cmd_rftest[] = {
{"txevm", "txevm [-m] [-c] [-l] [-r] [-w]", tx_evm_cmd_test},
{"rxsens", "rxsens [-m] [-d] [-c] [-l]", rx_sens_cmd_test},
};
#endif
static void sys_init(void)
{
int i = 0;
soc_system_init();
board_init();
#if (RHINO_CONFIG_CPU_PWR_MGMT > 0)
cpu_pwrmgmt_init();
#endif
#if ATE_APP_FUN
if(get_ate_mode_state())
{
#ifdef CONFIG_AOS_CLI
cli_service_init(&kinit);
#endif
aos_cli_register_commands(&cli_cmd_rftest[0],
sizeof(cli_cmd_rftest) / sizeof(struct cli_command));
}
else
#endif
{
aos_kernel_init(&kinit);
}
}
void sys_start(void)
{
uart_print_port = STDIO_UART;
ate_gpio_port = GPIO0;
aos_init();
soc_driver_init();
krhino_task_dyn_create(&g_aos_init, "aos-init", 0, AOS_DEFAULT_APP_PRI, 0, AOS_START_STACK, sys_init, 1);
aos_start();
}

15
Living_SDK/platform/mcu/bk7231u/aos/aos_main.h Normal file
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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef AOS_MAIN_H
#define AOS_MAIN_H
void soc_driver_init(void);
void soc_system_init(void);
void sys_start(void);
#endif /* AOS_MAIN_H */

48
Living_SDK/platform/mcu/bk7231u/aos/app_runtime/app_runtime.c Normal file
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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <aos/aos.h>
#include "hal/soc/soc.h"
#ifdef AOS_BINS
const int *syscall_ktbl = NULL;
const int *syscall_ftbl = NULL;
extern unsigned int _app_data_ram_begin;
extern unsigned int _app_data_ram_end;
extern unsigned int _app_data_flash_begin;
extern unsigned int _app_bss_start;
extern unsigned int _app_bss_end;
extern unsigned int _app_heap_start;
extern unsigned int _app_heap_end;
extern int application_start(int argc, char **argv);
int aos_application_init(void)
{
LOG("aos application init.");
return 0;
}
static void app_entry(void *ksyscall_tbl, void *fsyscall_tbl, int argc, char *argv[])
{
/* syscall_ktbl & syscall_ftbl assignment must be first */
syscall_ktbl = (int *)ksyscall_tbl;
syscall_ftbl = (int *)fsyscall_tbl;
aos_application_init();
application_start(argc, argv);
}
__attribute__ ((used, section(".app_info"))) struct app_info_t app_info = {
app_entry,
&_app_data_ram_begin,
&_app_data_ram_end,
&_app_data_flash_begin,
&_app_bss_start,
&_app_bss_end,
&_app_heap_start,
&_app_heap_end
};
#endif

9
Living_SDK/platform/mcu/bk7231u/aos/app_runtime/app_runtime.mk Normal file
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NAME := app_runtime
$(NAME)_TYPE := app
#GLOBAL_INCLUDES += include
# don't modify to L_CFLAGS, because CONFIG_CJSON_WITHOUT_DOUBLE should enable global
GLOBAL_LDFLAGS += -uapp_info
$(NAME)_SOURCES := app_runtime.c

49
Living_SDK/platform/mcu/bk7231u/aos/framework_runtime/framework_runtime.c Normal file
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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <aos/aos.h>
#include "hal/soc/soc.h"
#ifdef AOS_BINS
const int *syscall_ktbl = NULL;
extern void *syscall_ftbl[];
extern char app_info_addr;
struct app_info_t *app_info = (struct app_info_t *)&app_info_addr;
extern unsigned int _framework_data_ram_begin;
extern unsigned int _framework_data_ram_end;
extern unsigned int _framework_data_flash_begin;
extern unsigned int _framework_bss_start;
extern unsigned int _framework_bss_end;
extern unsigned int _framework_heap_start;
extern unsigned int _framework_heap_end;
static void framework_entry(void *syscall_tbl, int argc, char *argv[])
{
/* syscall_ktbl assignment must be first */
syscall_ktbl = (int *)syscall_tbl;
#ifdef AOS_FRAMEWORK_COMMON
aos_framework_init();
#endif
/*app_pre_init();*/
if (app_info->app_entry) {
app_info->app_entry(syscall_tbl, (void *)syscall_ftbl, 0, NULL);
}
}
__attribute__ ((used, section(".framework_info"))) struct framework_info_t framework_info = {
framework_entry,
&_framework_data_ram_begin,
&_framework_data_ram_end,
&_framework_data_flash_begin,
&_framework_bss_start,
&_framework_bss_end,
&_framework_heap_start,
&_framework_heap_end
};
#endif

9
Living_SDK/platform/mcu/bk7231u/aos/framework_runtime/framework_runtime.mk Normal file
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NAME := framework_runtime
$(NAME)_TYPE := framework
#GLOBAL_INCLUDES += include
# don't modify to L_CFLAGS, because CONFIG_CJSON_WITHOUT_DOUBLE should enable global
GLOBAL_LDFLAGS += -uframework_info
$(NAME)_SOURCES := framework_runtime.c

213
Living_SDK/platform/mcu/bk7231u/aos/soc_impl.c Normal file
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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <k_api.h>
#include <assert.h>
#if (RHINO_CONFIG_HW_COUNT > 0)
void soc_hw_timer_init(void)
{
}
hr_timer_t soc_hr_hw_cnt_get(void)
{
return *(volatile uint64_t *)0xc0000120;
}
lr_timer_t soc_lr_hw_cnt_get(void)
{
return 0;
}
#endif /* RHINO_CONFIG_HW_COUNT */
#if (RHINO_CONFIG_INTRPT_GUARD > 0)
void soc_intrpt_guard(void)
{
}
#endif
#if (RHINO_CONFIG_INTRPT_STACK_REMAIN_GET > 0)
size_t soc_intrpt_stack_remain_get(void)
{
return 0;
}
#endif
#if (RHINO_CONFIG_INTRPT_STACK_OVF_CHECK > 0)
void soc_intrpt_stack_ovf_check(void)
{
}
#endif
#if (RHINO_CONFIG_DYNTICKLESS > 0)
void soc_tick_interrupt_set(tick_t next_ticks,tick_t elapsed_ticks)
{
}
tick_t soc_elapsed_ticks_get(void)
{
return 0;
}
#endif
#include <k_api.h>
void soc_hw_timer_init()
{
}
#if (RHINO_CONFIG_USER_HOOK > 0)
void krhino_idle_pre_hook(void)
{
}
void krhino_init_hook(void)
{
}
void krhino_start_hook(void)
{
}
void krhino_task_create_hook(ktask_t *task)
{
(void)task;
}
void krhino_task_del_hook(ktask_t *task, res_free_t *arg)
{
(void)task;
}
void krhino_task_switch_hook(ktask_t *orgin, ktask_t *dest)
{
(void)orgin;
(void)dest;
}
void krhino_tick_hook(void)
{
}
void krhino_task_abort_hook(ktask_t *task)
{
(void)task;
}
void krhino_mm_alloc_hook(void *mem, size_t size)
{
(void)mem;
(void)size;
}
UINT32 global_tick = 0;
extern tick_t g_tick_count;
void krhino_idle_hook(void)
{
#if 0//(NX_POWERSAVE)
UINT32 mcu_ps_tick = 24;
UINT32 mcu_miss_tick = 0;
GLOBAL_INT_DECLARATION();
CPSR_ALLOC();
if (ke_evt_get() != 0)
{
return ;
}
if(!bmsg_is_empty())
{
return ;
}
GLOBAL_INT_DISABLE();
if((INT32)(global_tick + (UINT32)1 - g_tick_count) <= 0)
{
mcu_miss_tick = mcu_power_save(mcu_ps_tick);
#if 0
RHINO_CPU_INTRPT_DISABLE();
g_tick_count += mcu_miss_tick;
global_tick = g_tick_count;
RHINO_CPU_INTRPT_ENABLE();
#else
tick_list_update(mcu_miss_tick);
global_tick = g_tick_count;
#endif
}
GLOBAL_INT_RESTORE();
#endif //(NX_POWERSAVE)
}
#endif
extern void *heap_start;
extern void *heap_end;
extern void *heap_len;
k_mm_region_t g_mm_region[] = {(uint8_t*)&heap_start,(size_t)&heap_len};
int g_region_num = sizeof(g_mm_region)/sizeof(k_mm_region_t);
#if (RHINO_CONFIG_MM_LEAKCHECK > 0 )
extern int _bss_start, _bss_end, _data_ram_begin, _data_ram_end;
void aos_mm_leak_region_init(void)
{
krhino_mm_leak_region_init(&_bss_start, &_bss_end);
krhino_mm_leak_region_init(&_data_ram_begin, &_data_ram_end);
}
#endif
#if (RHINO_CONFIG_TASK_STACK_CUR_CHECK > 0)
size_t soc_get_cur_sp()
{
size_t sp = 0;
#if defined (__GNUC__)&&!defined(__CC_ARM)
asm volatile(
"mov %0,sp\n"
:"=r"(sp));
#endif
return sp;
}
#endif
static void soc_print_stack()
{
uint32_t offset = 0;
kstat_t rst = RHINO_SUCCESS;
void *cur, *end;
int i=0;
int *p;
end = krhino_cur_task_get()->task_stack_base + krhino_cur_task_get()->stack_size;
cur = soc_get_cur_sp();
p = (int*)cur;
while(p < (int*)end) {
if(i%4==0) {
printf("\r\n%08x:",(uint32_t)p);
}
printf("%08x ", *p);
i++;
p++;
}
printf("\r\n");
return;
}
void soc_err_proc(kstat_t err)
{
(void)err;
printf("panic %d!\r\n",err);
soc_print_stack();
assert(0);
}
krhino_err_proc_t g_err_proc = soc_err_proc;

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Living_SDK/platform/mcu/bk7231u/aos/trace_impl.c Normal file
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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <k_api.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <errno.h>
#include <sys/types.h>
#include <aos/network.h>
#include <hal/trace.h>
#include <aos/aos.h>
/* CLI Support */
#ifdef CONFIG_AOS_CLI
/* Trace Open*/
#if (RHINO_CONFIG_TRACE > 0)
#define TRACE_TASK_STACK_SIZE 512
extern struct k_fifo trace_fifo;
extern int32_t set_filter_task(const char * task_name);
extern void set_event_mask(const uint32_t mask);
extern void trace_deinit(void);
static ktask_t *trace_task;
static uint32_t trace_buf[1024];
static volatile int trace_is_started;
static char *filter_task;
static char *ip_addr;
static uint16_t ip_port = 8000;
static int sockfd;
void *trace_hal_init()
{
int fd;
struct sockaddr_in servaddr;
TRACE_INIT();
if ((fd = socket(AF_INET, SOCK_STREAM, 0)) < 0) {
aos_cli_printf("create socket (%s:%u) error: %s(errno: %d)\r\n", ip_addr, ip_port, strerror(errno),errno);
return 0;
}
memset(&servaddr, 0, sizeof(servaddr));
servaddr.sin_family = AF_INET;
servaddr.sin_port = htons(ip_port);
inet_aton(ip_addr, &servaddr.sin_addr);
if (connect(fd, (struct sockaddr*)&servaddr, sizeof(servaddr)) < 0) {
aos_cli_printf("connect (%s:%u) error: %s(errno: %d)\r\n", ip_addr, ip_port, strerror(errno),errno);
close(fd);
return 0;
}
aos_cli_printf("connected on (%s:%u)\r\n", ip_addr, ip_port);
return (void *)fd;
}
ssize_t trace_hal_send(void *handle, void *buf, size_t len)
{
int len_send = 0;
int len_total_send = 0;
while (1) {
len_send = send((int)handle, (buf + len_total_send) , len, 0);
if (len_send < 0) {
aos_cli_printf("send (%s:%u) msg error: %s(errno: %d)\r\n", ip_addr, ip_port, strerror(errno), errno);
return 0;
}
len_total_send += len_send;
len -= len_send;
if (len == 0) {
break;
}
}
return len_send;
}
ssize_t trace_hal_recv(void *handle, void *buf)
{
return 0;
}
void trace_hal_deinit(void *handle)
{
int fd;
fd = (int)handle;
close(fd);
*(int *)handle = -1;
sockfd = -1;
}
void trace_stop(void)
{
set_filter_task(NULL);
set_event_mask(0);
trace_deinit();
trace_hal_deinit((void *)sockfd);
aos_cli_printf("trace (%s:%u) stop....\r\n", ip_addr, ip_port);
if (ip_addr) {
aos_free(ip_addr);
ip_addr = NULL;
}
if (filter_task){
aos_free(filter_task);
filter_task = NULL;
}
}
static void trace_entry(void *arg)
{
uint32_t len;
while (1) {
if (trace_is_started == 0 ){
if (sockfd > 0) {
trace_stop();
}
krhino_task_sleep(200);
} else {
if (sockfd <= 0) {
sockfd = (int)trace_hal_init();
}
if (sockfd > 0) {
len = fifo_out_all(&trace_fifo, trace_buf);
if (len > 0) {
trace_hal_send((void *)sockfd, trace_buf, len);
}
}
krhino_task_sleep(20);
}
}
}
static void handle_trace_cmd(char *pwbuf, int blen, int argc, char **argv)
{
const char *rtype = argc > 1 ? argv[1] : "";
int ret = 0;
if (strcmp(rtype, "start") == 0) {
trace_is_started = 1;
if (argc == 3 || argc == 4) {
if (ip_addr == NULL) {
ip_addr = (char *) aos_malloc(strlen(argv[2])+1);
if (ip_addr == NULL) {
k_err_proc(RHINO_NO_MEM);
}
strncpy(ip_addr, argv[2], strlen(argv[2]));
ip_addr[strlen(argv[2])] = '\0';
}
if (argc ==4){
ip_port = atoi(argv[3]);
}
} else {
aos_cli_printf("trace must specify the host ip (port)... \r\n");
return ;
}
if (trace_task == NULL && krhino_task_dyn_create(&trace_task, "trace_task", NULL, 3,
0, TRACE_TASK_STACK_SIZE, trace_entry, 1) != RHINO_SUCCESS) {
aos_cli_printf("trace task creat fail \r\n");
}
} else if (strcmp(rtype, "task") == 0) {
if (argc != 3) {
return;
}
if (filter_task) {
aos_free(filter_task);
}
filter_task = (char *) aos_malloc(strlen(argv[2])+1);
if (filter_task == NULL) {
k_err_proc(RHINO_NO_MEM);
}
strncpy(filter_task, argv[2], strlen(argv[2]));
filter_task[strlen(argv[2])] = '\0';
set_filter_task(filter_task);
} else if (strcmp(rtype, "event") == 0) {
if (argc != 3) {
return;
}
set_event_mask(atoi(argv[2]));
} else if (strcmp(rtype, "stop") == 0) {
trace_is_started = 0;
}
}
static struct cli_command ncmd = {
.name = "trace",
.help = "trace [start ip (port) | task task_name| event event_id| stop]",
.function = handle_trace_cmd,
};
void trace_start(void)
{
aos_cli_register_command(&ncmd);
}
#else
void trace_start(void)
{
printf("trace config close!!!\r\n");
}
#endif /* Trace end*/
#else
void trace_start(void)
{
printf("trace should have cli to control!!!\r\n");
}
#endif /*Cli end*/

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/**
****************************************************************************************
*
* @file arch.h
*
* @brief This file contains the definitions of the macros and functions that are
* architecture dependent. The implementation of those is implemented in the
* appropriate architecture directory.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _ARCH_H_
#define _ARCH_H_
/*
* INCLUDE FILES
****************************************************************************************
*/
// required to define GLOBAL_INT_** macros as inline assembly
#include "boot.h"
#include "ll.h"
#include "compiler.h"
#include "generic.h"
/*
* CPU WORD SIZE
****************************************************************************************
*/
/// ARM is a 32-bit CPU
#define CPU_WORD_SIZE 4
/*
* CPU Endianness
****************************************************************************************
*/
/// ARM is little endian
#define CPU_LE 1
#define ASSERT_REC(cond)
#define ASSERT_REC_VAL(cond, ret)
#define ASSERT_REC_NO_RET(cond)
#define ASSERT_ERR(cond) ASSERT(cond)
#define ASSERT_ERR2(cond, param0, param1)
#define ASSERT_WARN(cond)
/// @}
/// @}
#endif // _ARCH_H_

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/**
****************************************************************************************
*
* @file boot.h
*
* @brief This file contains the declarations of the boot related variables.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _BOOT_H_
#define _BOOT_H_
// standard integer functions
#include "co_int.h"
#endif // _BOOT_H_

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/**
****************************************************************************************
*
* @file boot_handlers.s
*
* @brief ARM Exception Vector handler functions.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
.globl entry_main
.globl do_irq
.globl do_fiq
.globl do_swi
.globl boot_reset
.globl boot_swi
.globl boot_undefined
.globl boot_pabort
.globl boot_dabort
.globl boot_reserved
.globl irq_handler
.globl fiq_handler
.globl vPortStartFirstTask
.globl fiq_pre_proc
.globl fiq_end_proc
.globl print_exception_addr
.globl do_undefined
.globl do_pabort
.globl do_dabort
.globl do_reserved
/* ========================================================================
* Macros
* ======================================================================== */
#define _FIQ_STACK_SIZE_ 0x7F0
#define _IRQ_STACK_SIZE_ 0xFF0
#define _SVC_STACK_SIZE_ 0x3F0
#define _SYS_STACK_SIZE_ 0x3F0
#define _UNUSED_STACK_SIZE_ 0x010
#define BOOT_MODE_MASK 0x1F
#define BOOT_MODE_USR 0x10
#define BOOT_MODE_FIQ 0x11
#define BOOT_MODE_IRQ 0x12
#define BOOT_MODE_SVC 0x13
#define BOOT_MODE_ABT 0x17
#define BOOT_MODE_UND 0x1B
#define BOOT_MODE_SYS 0x1F
#define BOOT_FIQ_IRQ_MASK 0xC0
#define BOOT_IRQ_MASK 0x80
#define BOOT_COLOR_UNUSED 0xAAAAAAAA //Pattern to fill UNUSED stack
#define BOOT_COLOR_SVC 0xBBBBBBBB //Pattern to fill SVC stack
#define BOOT_COLOR_IRQ 0xCCCCCCCC //Pattern to fill IRQ stack
#define BOOT_COLOR_FIQ 0xDDDDDDDD //Pattern to fill FIQ stack
#define BOOT_COLOR_SYS 0xEEEEEEEE //Pattern to fill SYS stack
/* ========================================================================
Context save and restore macro definitions
* ======================================================================== */
/* ========================================================================*/
/* ========================================================================
/**
* Macro for switching ARM mode
*/
.macro BOOT_CHANGE_MODE, mode, mode_mask
MRS R0, CPSR
BIC R0, R0, #\mode_mask
ORR R0, R0, #\mode
MSR CPSR_c, R0
.endm
/* ========================================================================
/**
* Macro for setting the stack
*/
.macro BOOT_SET_STACK, stackStart, stackLen, color
LDR R0, \stackStart
LDR R1, \stackLen
ADD R1, R1, R0
MOV SP, R1 //Set stack pointer
LDR R2, =\color
3:
CMP R0, R1 //End of stack?
STRLT R2, [r0] //Colorize stack word
ADDLT R0, R0, #4
BLT 3b //branch to previous local label
.endm
/* ========================================================================
* Globals
* ======================================================================== */
boot_stack_base_UNUSED:
.word _stack_unused
boot_stack_len_UNUSED:
.word _UNUSED_STACK_SIZE_
boot_stack_base_IRQ:
.word _stack_irq
boot_stack_len_IRQ:
.word _IRQ_STACK_SIZE_
boot_stack_base_SVC:
.word _stack_svc
boot_stack_len_SVC:
.word _SVC_STACK_SIZE_
boot_stack_base_FIQ:
.word _stack_fiq
boot_stack_len_FIQ:
.word _FIQ_STACK_SIZE_
boot_stack_base_SYS:
.word _stack_sys
boot_stack_len_SYS:
.word _SYS_STACK_SIZE_
/* ========================================================================
* Functions
* ========================================================================
/* ========================================================================
* Function to handle reset vector
*/
.globl boot_reset
boot_reset:
//Disable IRQ and FIQ before starting anything
MRS R0, CPSR
ORR R0, R0, #0xC0
MSR CPSR_c, R0
//Setup all stacks //Note: Abt and Usr mode are not used
BOOT_CHANGE_MODE BOOT_MODE_SYS BOOT_MODE_MASK
BOOT_SET_STACK boot_stack_base_SYS boot_stack_len_SYS BOOT_COLOR_SYS
BOOT_CHANGE_MODE BOOT_MODE_ABT BOOT_MODE_MASK
BOOT_SET_STACK boot_stack_base_SVC boot_stack_len_SVC BOOT_COLOR_SVC
BOOT_CHANGE_MODE BOOT_MODE_UND BOOT_MODE_MASK
BOOT_SET_STACK boot_stack_base_SVC boot_stack_len_SVC BOOT_COLOR_SVC
BOOT_CHANGE_MODE BOOT_MODE_IRQ BOOT_MODE_MASK
BOOT_SET_STACK boot_stack_base_IRQ boot_stack_len_IRQ BOOT_COLOR_IRQ
BOOT_CHANGE_MODE BOOT_MODE_FIQ BOOT_MODE_MASK
BOOT_SET_STACK boot_stack_base_FIQ boot_stack_len_FIQ BOOT_COLOR_FIQ
//Clear FIQ banked registers while in FIQ mode
MOV R8, #0
MOV R9, #0
MOV R10, #0
MOV R11, #0
MOV R12, #0
BOOT_CHANGE_MODE BOOT_MODE_SVC BOOT_MODE_MASK
BOOT_SET_STACK boot_stack_base_SVC boot_stack_len_SVC BOOT_COLOR_SVC
//Stay in Supervisor Mode
//copy data from binary to ram
BL _sysboot_copy_data_to_ram
///*Init the BSS section*/
BL _sysboot_zi_init
//==================
//Clear Registers
MOV R0, #0
MOV R1, #0
MOV R2, #0
MOV R3, #0
MOV R4, #0
MOV R5, #0
MOV R6, #0
MOV R7, #0
MOV R8, #0
MOV R9, #0
MOV R10, #0
MOV R11, #0
MOV R12, #0
B entry_main
/*FUNCTION: _sysboot_copy_data_to_ram*/
/*DESCRIPTION: copy main stack code from FLASH/ROM to SRAM*/
_sysboot_copy_data_to_ram:
LDR R0, =_data_flash_begin
LDR R1, =_data_ram_begin
LDR R2, =_data_ram_end
4: CMP R1, R2
LDRLO R4, [R0], #4
STRLO R4, [R1], #4
BLO 4b
BX LR
/*FUNCTION: _sysboot_zi_init*/
/*DESCRIPTION: Initialise Zero-Init Data Segment*/
_sysboot_zi_init:
LDR R0, =_bss_start
LDR R1, =_bss_end
MOV R3, R1
MOV R4, R0
MOV R2, #0
5: CMP R4, R3
STRLO R2, [R4], #4
BLO 5b
BX LR
.align 5
do_undefined:
LDMFD SP!, {R0-R1}^
MOV R0, LR
MSR CPSR_c, #0xd3
MOV R1, LR
MOV R2, SP
B print_exception_addr
.align 5
boot_swi:
MOV R0, LR
MSR CPSR_c, #0xd3
MOV R1, LR
MOV R2, SP
B print_exception_addr
.align 5
do_pabort:
LDMFD SP!, {R0-R1}^
MOV R0, LR
MSR CPSR_c, #0xd3
MOV R1, LR
MOV R2, SP
B print_exception_addr
.align 5
do_dabort:
LDMFD SP!, {R0-R1}^
MOV R0, LR
MSR CPSR_c, #0xd3
MOV R1, LR
MOV R2, SP
B print_exception_addr
.align 5
do_reserved:
LDMFD SP!, {R0-R1}^
B boot_reserved
.align 5
boot_undefined:
STMFD sp!,{r0-r1}
LDR R1, =0x40000c
LDR r0, [R1]
BX r0
.align 5
boot_pabort:
STMFD sp!,{r0-r1}
LDR R1, =0x400010
LDR r0, [R1]
BX r0
.align 5
boot_dabort:
STMFD sp!,{r0-r1}
LDR R1, =0x400014
LDR r0, [R1]
BX r0
.align 5
boot_reserved:
STMFD sp!,{r0-r1}
LDR R1, =0x400018
LDR r0, [R1]
BX r0
.align 5
irq_handler:
STMFD sp!,{r0-r1}
LDR R1, =0x400000
LDR r0, [R1]
BX r0
.align 5
fiq_handler:
STMFD sp!,{r0-r1}
LDR R1, =0x400004
LDR r0, [R1]
BX r0
do_swi:
B do_swi
do_irq:
LDMFD SP!, {R0-R1}^
STMFD SP!, {R1-R3} @We will use R1-R3 as temporary registers
MOV R1, SP
ADD SP, SP, #12 @Adjust IRQ stack pointer
SUB R2, LR, #4 @Adjust PC for return address to task
MRS R3, SPSR @Copy SPSR (Task CPSR)
MSR CPSR_c, #0xd3 @Change to SVC mode with interrupt disabled
/* SAVE TASK'S CONTEXT ONTO OLD TASK'S STACK */
STMFD SP!, {R2} @Push task''s PC
STMFD SP!, {R4-R12, LR}
LDMFD R1!, {R4-R6} @Load Task''s R1-R3 from IRQ stack
STMFD SP!, {R4-R6} @Push Task''s R1-R3 to SVC stack
STMFD SP!, {R0} @Push Task''s R0 to SVC stack
STMFD SP!, {R3} @Push task''s CPSR
LDR R4,=g_active_task
LDR R5,[R4]
STR SP,[R5]
BL krhino_intrpt_enter
MSR CPSR_c,#0xd2 @Change to IRQ mode to use IRQ stack to handle interrupt with interrupt disbaled
BL intc_irq
MSR CPSR_c,#0xd3 @Change to SVC mode with interrupt disabled
BL krhino_intrpt_exit
LDMFD SP!,{R4} @POP the task''s CPSR
MSR SPSR_cxsf,R4
LDMFD SP!,{R0-R12,LR,PC}^ @POP new Task''s context
do_fiq:
LDMFD SP!, {R0-R1}^
MRS R8, spsr @R8 R9 is unique to fiq
MRS R9, spsr @save SPSR_fiq
AND R8, R8, #0x1f
CMP R8, #0x12
BNE 88f
STMFD SP!, {R0-R12, LR}
BL fiq_pre_proc
BL intc_fiq
BL fiq_end_proc
LDMFD SP!,{R0-R12,LR}
MSR SPSR_cxsf,R9 @restore SPSR_fiq
SUBS PC, LR,#4 @restore CPSR
88:
STMFD SP!, {R1-R3} @We will use R1-R3 as temporary registers
MOV R1, SP
ADD SP, SP, #12 @Adjust IRQ stack pointer
SUB R2, LR, #4 @Adjust PC for return address to task
MRS R3, SPSR @Copy SPSR (Task CPSR)
MSR CPSR_c, #0xd3 @Change to SVC mode with interrupt disabled
/* SAVE TASK'S CONTEXT ONTO OLD TASK'S STACK */
STMFD SP!, {R2} @Push task''s PC
STMFD SP!, {R4-R12, LR}
LDMFD R1!, {R4-R6} @Load Task''s R1-R3 from IRQ stack
STMFD SP!, {R4-R6} @Push Task''s R1-R3 to SVC stack
STMFD SP!, {R0} @Push Task''s R0 to SVC stack
STMFD SP!, {R3} @Push task''s CPSR
LDR R4,=g_active_task
LDR R5,[R4]
STR SP,[R5]
BL krhino_intrpt_enter
MSR CPSR_c,#0xd1 @Change to FIRQ mode to use IRQ stack to handle interrupt with interrupt disbaled
BL intc_fiq
MSR CPSR_c,#0xd3 @Change to SVC mode with interrupt disabled
BL krhino_intrpt_exit
LDMFD SP!,{R4} @POP the task''s CPSR
MSR SPSR_cxsf,R4
LDMFD SP!,{R0-R12,LR,PC}^ @POP new Task''s context
.code 32
.global WFI
.type WFI,%function
WFI:
MOV R0, #0
MCR p15, 0, R0, c7, c0, 4
BX LR
/*EOF*/

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/**
****************************************************************************************
*
* @file boot_vectors.s
*
* @brief ARM Exception Vectors table.
*
* Copyright (C) Beken Corp 2017-2026
*
****************************************************************************************
/*
*************************************************************************
*
* Symbol _vector_start is referenced elsewhere, so make it global
*
*************************************************************************
*/
.globl _vector_start
.globl _undefined_instruction
.globl _software_interrupt
.globl _prefetch_abort
.globl _data_abort
.globl _not_used
.globl _irq
.globl _fiq
.extern boot_reset
.extern boot_swi
.extern boot_undefined
.extern boot_pabort
.extern boot_dabort
.extern boot_reserved
.extern irq_handler
.extern fiq_handler
/*
*************************************************************************
*
* Vectors have their own section so linker script can map them easily
*
*************************************************************************
*/
.section ".vectors", "ax"
/*
*************************************************************************
*
* Exception vectors as described in ARM reference manuals
*
* Uses indirect branch to allow reaching handlers anywhere in memory.
*
*************************************************************************
*/
_vector_start:
b boot_reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
/*
*************************************************************************
*
* Indirect vectors table
*
* Symbols referenced here must be defined somewhere else
*
*************************************************************************
*/
_undefined_instruction: .word boot_undefined
_software_interrupt: .word boot_swi
_prefetch_abort: .word boot_pabort
_data_abort: .word boot_dabort
_not_used: .word boot_reserved
_irq: .word irq_handler
_fiq: .word fiq_handler
.balignl 16,0xdeadbeef
/* eof */

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NAME := entry
$(NAME)_TYPE := kernel
$(NAME)_CFLAGS += -marm
$(NAME)_SOURCES := boot_handlers.S \
boot_vectors.S \
ll.S

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;/**
; ****************************************************************************************
; *
; * @file arm.s
; *
; * @brief ARM low level functions.
; *
; * Copyright (C) RivieraWaves 2011-2016
; *
; ****************************************************************************************
; */
.text
.align 4

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/**
****************************************************************************************
*
* @file ll.h
*
* @brief Declaration of low level functions.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef LL_H_
#define LL_H_
#include "co_int.h"
#include "compiler.h"
extern uint32_t platform_is_in_interrupt_context( void );
extern uint32_t platform_is_in_fiq_context( void );
#define GLOBAL_INT_START portENABLE_INTERRUPTS
#define GLOBAL_INT_STOP portDISABLE_INTERRUPTS
#define portENABLE_INTERRUPTS() do{ \
if(!platform_is_in_interrupt_context())\
portENABLE_IRQ();\
if(!platform_is_in_fiq_context())\
portENABLE_FIQ();\
}while(0)
#define portDISABLE_INTERRUPTS() do{ \
portDISABLE_FIQ();\
portDISABLE_IRQ();\
}while(0)
#define GLOBAL_INT_DECLARATION() uint32_t fiq_tmp, irq_tmp
#define GLOBAL_INT_DISABLE() do{\
fiq_tmp = portDISABLE_FIQ();\
irq_tmp = portDISABLE_IRQ();\
}while(0)
#define GLOBAL_INT_RESTORE() do{ \
if(!fiq_tmp) \
{ \
portENABLE_FIQ(); \
} \
if(!irq_tmp) \
{ \
portENABLE_IRQ(); \
} \
}while(0)
#endif // LL_H_

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/*
* cc.h - Architecture environment, some compiler specific, some
* environment specific (probably should move env stuff
* to sys_arch.h.)
*
* Typedefs for the types used by lwip -
* u8_t, s8_t, u16_t, s16_t, u32_t, s32_t, mem_ptr_t
*
* Compiler hints for packing lwip's structures -
* PACK_STRUCT_FIELD(x)
* PACK_STRUCT_STRUCT
* PACK_STRUCT_BEGIN
* PACK_STRUCT_END
*
* Platform specific diagnostic output -
* LWIP_PLATFORM_DIAG(x) - non-fatal, print a message.
* LWIP_PLATFORM_ASSERT(x) - fatal, print message and abandon execution.
* Portability defines for printf formatters:
* U16_F, S16_F, X16_F, U32_F, S32_F, X32_F, SZT_F
*
* "lightweight" synchronization mechanisms -
* SYS_ARCH_DECL_PROTECT(x) - declare a protection state variable.
* SYS_ARCH_PROTECT(x) - enter protection mode.
* SYS_ARCH_UNPROTECT(x) - leave protection mode.
*
* If the compiler does not provide memset() this file must include a
* definition of it, or include a file which defines it.
*
* This file must either include a system-local <errno.h> which defines
* the standard *nix error codes, or it should #define LWIP_PROVIDE_ERRNO
* to make lwip/arch.h define the codes which are used throughout.
*/
#ifndef __CC_H__
#define __CC_H__
#include "typedef.h"
#include "uart_pub.h"
// for sys interrupt
#include "ll.h"
/*
* Typedefs for the types used by lwip -
* u8_t, s8_t, u16_t, s16_t, u32_t, s32_t, mem_ptr_t
*/
typedef unsigned char u8_t; /* Unsigned 8 bit quantity */
typedef signed char s8_t; /* Signed 8 bit quantity */
typedef unsigned short u16_t; /* Unsigned 16 bit quantity */
typedef signed short s16_t; /* Signed 16 bit quantity */
typedef unsigned long u32_t; /* Unsigned 32 bit quantity */
typedef signed long s32_t; /* Signed 32 bit quantity */
//typedef unsigned long mem_ptr_t; /* Unsigned 32 bit quantity */
typedef int intptr_t;
typedef unsigned int uintptr_t;
#define LWIP_MAILBOX_QUEUE 1
#define LWIP_TIMEVAL_PRIVATE 0
#define LWIP_NO_INTTYPES_H 1
#if defined(__GNUC__)
#define PACK_STRUCT_BEGIN
#define PACK_STRUCT_STRUCT __attribute__((packed))
#define PACK_STRUCT_FIELD(x) x
#elif defined(__ICCARM__)
#define PACK_STRUCT_BEGIN __packed
#define PACK_STRUCT_STRUCT
#define PACK_STRUCT_FIELD(x) x
#else
#define PACK_STRUCT_BEGIN
#define PACK_STRUCT_STRUCT
#define PACK_STRUCT_FIELD(x) x
#endif
/*
* Platform specific diagnostic output -
* LWIP_PLATFORM_DIAG(x) - non-fatal, print a message.
* LWIP_PLATFORM_ASSERT(x) - fatal, print message and abandon execution.
* Portability defines for printf formatters:
* U16_F, S16_F, X16_F, U32_F, S32_F, X32_F, SZT_F
*/
#ifndef LWIP_PLATFORM_ASSERT
#define LWIP_PLATFORM_ASSERT(x) \
do \
{ fatal_prf("Assertion \"%s\" failed at line %d in %s\n", x, __LINE__, __FILE__); \
} while(0)
#endif
#ifndef LWIP_PLATFORM_DIAG
#define LWIP_PLATFORM_DIAG(x) do {fatal_prf x ;} while(0)
#endif
#if LWIP_NO_INTTYPES_H
#define U8_F "2d"
#define X8_F "2x"
#define U16_F "4d"
#define S16_F "4d"
#define X16_F "4x"
#define U32_F "8ld"
#define S32_F "8ld"
#define X32_F "8lx"
#define SZT_F U32_F
#endif
/*
* unknow defination
*/
// cup byte order
#ifndef BYTE_ORDER
#define BYTE_ORDER LITTLE_ENDIAN
#endif
#define LWIP_RAND() ((uint32_t)rand())
#endif
// eof

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#ifndef __ETHERNETIF_H__
#define __ETHERNETIF_H__
#include "lwip/err.h"
#include "lwip/netif.h"
void ethernetif_recv(struct netif *netif, int total_len);
err_t ethernetif_init(struct netif *netif);
#endif

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#ifndef __LWIP_INTF_H__
#define __LWIP_INTF_H__
#define LWIP_INTF_DEBUG
#ifdef LWIP_INTF_DEBUG
#define LWIP_INTF_PRT warning_prf
#define LWIP_INTF_WARN warning_prf
#define LWIP_INTF_FATAL fatal_prf
#else
#define LWIP_INTF_PRT null_prf
#define LWIP_INTF_WARN null_prf
#define LWIP_INTF_FATAL null_prf
#endif
#endif
// eof

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#ifndef _LWIP_NETIF_ADDR_H_
#define _LWIP_NETIF_ADDR_H_
/** MLAN BSS type */
typedef enum _wifi_interface_type
{
WIFI_INTERFACE_TYPE_STA = 0,
WIFI_INTERFACE_TYPE_UAP = 1,
WIFI_INTERFACE_TYPE_ANY = 0xff,
} wifi_interface_type;
#define ADDR_TYPE_STATIC 1
#define ADDR_TYPE_DHCP 0
/** This data structure represents an IPv4 address */
struct ipv4_config {
/** DHCP_Disable DHCP_CLIENT DHCP_Server */
unsigned addr_type;
/** The system's IP address in network order. */
unsigned address;
/** The system's default gateway in network order. */
unsigned gw;
/** The system's subnet mask in network order. */
unsigned netmask;
/** The system's primary dns server in network order. */
unsigned dns1;
/** The system's secondary dns server in network order. */
unsigned dns2;
};
/** Network IP configuration.
*
* This data structure represents the network IP configuration
* for IPv4 as well as IPv6 addresses
*/
struct wlan_ip_config {
#ifdef CONFIG_IPV6
/** The network IPv6 address configuration that should be
* associated with this interface. */
struct ipv6_config ipv6[MAX_IPV6_ADDRESSES];
#endif
/** The network IPv4 address configuration that should be
* associated with this interface. */
struct ipv4_config ipv4;
};
#endif

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/*
* Copyright (c) 2001-2003 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIPOPTS_H__
#define __LWIPOPTS_H__
/**
* Loopback demo related options.
*/
#define LWIP_NETIF_LOOPBACK 1
#define LWIP_HAVE_LOOPIF 1
#define LWIP_NETIF_LOOPBACK_MULTITHREADING 1
#define LWIP_LOOPBACK_MAX_PBUFS 8
#define TCPIP_THREAD_NAME "tcp/ip"
#define TCPIP_THREAD_STACKSIZE 3072
#define TCPIP_THREAD_PRIO 7
#define DEFAULT_THREAD_STACKSIZE 200
#define DEFAULT_THREAD_PRIO 1
/* Disable lwIP asserts */
#define LWIP_NOASSERT 1
#define LWIP_DEBUG 0
#define LWIP_DEBUG_TRACE 0
#define SOCKETS_DEBUG LWIP_DBG_OFF // | LWIP_DBG_MASK_LEVEL
#define IP_DEBUG LWIP_DBG_OFF
#define ETHARP_DEBUG LWIP_DBG_OFF
#define NETIF_DEBUG LWIP_DBG_OFF
#define PBUF_DEBUG LWIP_DBG_OFF
#define MEMP_DEBUG LWIP_DBG_OFF
#define API_LIB_DEBUG LWIP_DBG_OFF
#define API_MSG_DEBUG LWIP_DBG_OFF
#define ICMP_DEBUG LWIP_DBG_OFF
#define IGMP_DEBUG LWIP_DBG_OFF
#define INET_DEBUG LWIP_DBG_OFF
#define IP_REASS_DEBUG LWIP_DBG_OFF
#define RAW_DEBUG LWIP_DBG_OFF
#define MEM_DEBUG LWIP_DBG_OFF
#define SYS_DEBUG LWIP_DBG_OFF
#define TCP_DEBUG LWIP_DBG_OFF
#define TCP_INPUT_DEBUG LWIP_DBG_OFF
#define TCP_FR_DEBUG LWIP_DBG_OFF
#define TCP_RTO_DEBUG LWIP_DBG_OFF
#define TCP_CWND_DEBUG LWIP_DBG_OFF
#define TCP_WND_DEBUG LWIP_DBG_OFF
#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF
#define TCP_RST_DEBUG LWIP_DBG_OFF
#define TCP_QLEN_DEBUG LWIP_DBG_OFF
#define UDP_DEBUG LWIP_DBG_OFF
#define TCPIP_DEBUG LWIP_DBG_OFF
#define PPP_DEBUG LWIP_DBG_OFF
#define SLIP_DEBUG LWIP_DBG_OFF
#define DHCP_DEBUG LWIP_DBG_OFF
#define AUTOIP_DEBUG LWIP_DBG_OFF
#define SNMP_MSG_DEBUG LWIP_DBG_OFF
#define SNMP_MIB_DEBUG LWIP_DBG_OFF
#define DNS_DEBUG LWIP_DBG_OFF
//#define LWIP_COMPAT_MUTEX 1
/**
* SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
* critical regions during buffer allocation, deallocation and memory
* allocation and deallocation.
*/
#define SYS_LIGHTWEIGHT_PROT 1
/*
------------------------------------
---------- Memory options ----------
------------------------------------
*/
/**
* MEM_ALIGNMENT: should be set to the alignment of the CPU
* 4 byte alignment -> #define MEM_ALIGNMENT 4
* 2 byte alignment -> #define MEM_ALIGNMENT 2
*/
#define MEM_ALIGNMENT 4
#define MAX_SOCKETS_TCP 12
#define MAX_LISTENING_SOCKETS_TCP 4
#define MAX_SOCKETS_UDP 22
#define TCP_SND_BUF_COUNT 5
/* Value of TCP_SND_BUF_COUNT denotes the number of buffers and is set by
* CONFIG option available in the SDK
*/
/* Buffer size needed for TCP: Max. number of TCP sockets * Size of pbuf *
* Max. number of TCP sender buffers per socket
*
* Listening sockets for TCP servers do not require the same amount buffer
* space. Hence do not consider these sockets for memory computation
*/
#define TCP_MEM_SIZE (MAX_SOCKETS_TCP * \
PBUF_POOL_BUFSIZE * (TCP_SND_BUF/TCP_MSS))
/* Buffer size needed for UDP: Max. number of UDP sockets * Size of pbuf
*/
#define UDP_MEM_SIZE (MAX_SOCKETS_UDP * PBUF_POOL_BUFSIZE)
/**
* MEM_SIZE: the size of the heap memory. If the application will send
* a lot of data that needs to be copied, this should be set high.
*/
#define MEM_SIZE (64*1024)
/*
------------------------------------------------
---------- Internal Memory Pool Sizes ----------
------------------------------------------------
*/
/**
* MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF).
* If the application sends a lot of data out of ROM (or other static memory),
* this should be set high.
*/
#define MEMP_NUM_PBUF 10
/**
* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections.
* (requires the LWIP_TCP option)
*/
#define MEMP_NUM_TCP_PCB MAX_SOCKETS_TCP
#define MEMP_NUM_TCP_PCB_LISTEN MAX_LISTENING_SOCKETS_TCP
/**
* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments.
* (requires the LWIP_TCP option)
*/
//#define MEMP_NUM_TCP_SEG 12
/**
* MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used
* for incoming packets.
* (only needed if you use tcpip.c)
*/
#define MEMP_NUM_TCPIP_MSG_INPKT 16
/**
* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts.
* (requires NO_SYS==0)
*/
#define MEMP_NUM_SYS_TIMEOUT 12
/**
* MEMP_NUM_NETBUF: the number of struct netbufs.
* (only needed if you use the sequential API, like api_lib.c)
*/
#define MEMP_NUM_NETBUF 16
/**
* MEMP_NUM_NETCONN: the number of struct netconns.
* (only needed if you use the sequential API, like api_lib.c)
*
* This number corresponds to the maximum number of active sockets at any
* given point in time. This number must be sum of max. TCP sockets, max. TCP
* sockets used for listening, and max. number of UDP sockets
*/
#define MEMP_NUM_NETCONN (MAX_SOCKETS_TCP + \
MAX_LISTENING_SOCKETS_TCP + MAX_SOCKETS_UDP)
/**
* PBUF_POOL_SIZE: the number of buffers in the pbuf pool.
*/
#define PBUF_POOL_SIZE 10
/*
----------------------------------
---------- Pbuf options ----------
----------------------------------
*/
/**
* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is
* designed to accomodate single full size TCP frame in one pbuf, including
* TCP_MSS, IP header, and link header.
*/
#define PBUF_POOL_BUFSIZE 1580
/*
---------------------------------
---------- RAW options ----------
---------------------------------
*/
/**
* LWIP_RAW==1: Enable application layer to hook into the IP layer itself.
*/
#define LWIP_RAW 1
#define LWIP_IPV6 0
/* Enable IPv4 Auto IP */
#ifdef CONFIG_AUTOIP
#define LWIP_AUTOIP 1
#define LWIP_DHCP_AUTOIP_COOP 1
#define LWIP_DHCP_AUTOIP_COOP_TRIES 5
#endif
/*
------------------------------------
---------- Socket options ----------
------------------------------------
*/
/**
* LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
*/
#define LWIP_SOCKET 1
#define LWIP_NETIF_API 1
/**
* LWIP_RECV_CB==1: Enable callback when a socket receives data.
*/
#define LWIP_RECV_CB 1
/**
* SO_REUSE==1: Enable SO_REUSEADDR option.
*/
#define SO_REUSE 1
#define SO_REUSE_RXTOALL 1
/**
* Enable TCP_KEEPALIVE
*/
#define LWIP_TCP_KEEPALIVE 1
/*
----------------------------------------
---------- Statistics options ----------
----------------------------------------
*/
/**
* LWIP_STATS==1: Enable statistics collection in lwip_stats.
*/
#define LWIP_STATS 0
/**
* LWIP_STATS_DISPLAY==1: Compile in the statistics output functions.
*/
#define LWIP_STATS_DISPLAY 0
/*
----------------------------------
---------- DHCP options ----------
----------------------------------
*/
/**
* LWIP_DHCP==1: Enable DHCP module.
*/
#define LWIP_DHCP 1
#define LWIP_NETIF_STATUS_CALLBACK 1
/**
* DNS related options, revisit later to fine tune.
*/
#define LWIP_DNS 1
#define DNS_TABLE_SIZE 2 // number of table entries, default 4
//#define DNS_MAX_NAME_LENGTH 64 // max. name length, default 256
#define DNS_MAX_SERVERS 2 // number of DNS servers, default 2
#define DNS_DOES_NAME_CHECK 1 // compare received name with given,def 0
#define DNS_MSG_SIZE 512
#define MDNS_MSG_SIZE 512
#define MDNS_TABLE_SIZE 1 // number of mDNS table entries
#define MDNS_MAX_SERVERS 1 // number of mDNS multicast addresses
/* TODO: Number of active UDP PCBs is equal to number of active UDP sockets plus
* two. Need to find the users of these 2 PCBs
*/
#define MEMP_NUM_UDP_PCB (MAX_SOCKETS_UDP + 2)
/* NOTE: some times the socket() call for SOCK_DGRAM might fail if you dont
* have enough MEMP_NUM_UDP_PCB */
/*
----------------------------------
---------- IGMP options ----------
----------------------------------
*/
/**
* LWIP_IGMP==1: Turn on IGMP module.
*/
#define LWIP_IGMP 1
/**
* LWIP_SO_SNDTIMEO==1: Enable send timeout for sockets/netconns and
* SO_SNDTIMEO processing.
*/
#define LWIP_SO_SNDTIMEO 1
/**
* LWIP_SO_RCVTIMEO==1: Enable receive timeout for sockets/netconns and
* SO_RCVTIMEO processing.
*/
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
/**
* TCP_LISTEN_BACKLOG==1: Handle backlog connections.
*/
#define TCP_LISTEN_BACKLOG 1
#define LWIP_PROVIDE_ERRNO 1
#include <errno.h>
#define ERRNO 1
//#define LWIP_SNMP 1
/*
------------------------------------------------
---------- Network Interfaces options ----------
------------------------------------------------
*/
/**
* LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname
* field.
*/
#define LWIP_NETIF_HOSTNAME 1
/*
The STM32F107 allows computing and verifying the IP, UDP, TCP and ICMP checksums by hardware:
- To use this feature let the following define uncommented.
- To disable it and process by CPU comment the the checksum.
*/
//#define CHECKSUM_BY_HARDWARE
#ifdef CHECKSUM_BY_HARDWARE
/* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/
#define CHECKSUM_GEN_IP 0
/* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/
#define CHECKSUM_GEN_UDP 0
/* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/
#define CHECKSUM_GEN_TCP 0
/* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/
#define CHECKSUM_CHECK_IP 0
/* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/
#define CHECKSUM_CHECK_UDP 0
/* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/
#define CHECKSUM_CHECK_TCP 0
#else
/* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
#define CHECKSUM_GEN_IP 1
/* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
#define CHECKSUM_GEN_UDP 1
/* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
#define CHECKSUM_GEN_TCP 1
/* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
#define CHECKSUM_CHECK_IP 1
/* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
#define CHECKSUM_CHECK_UDP 1
/* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
#define CHECKSUM_CHECK_TCP 1
#endif
/**
* TCP_RESOURCE_FAIL_RETRY_LIMIT: limit for retrying sending of tcp segment
* on resource failure error returned by driver.
*/
#define TCP_RESOURCE_FAIL_RETRY_LIMIT 50
//#ifdef CONFIG_ENABLE_MXCHIP
/* save memory */
#define PBUF_POOL_SIZE 10
#define TCP_MSS (1500 - 40)
/* TCP receive window. */
#define TCP_WND (10*TCP_MSS)
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF (10*TCP_MSS)
#define TCP_SND_QUEUELEN (20)
/* ARP before DHCP causes multi-second delay - turn it off */
#define DHCP_DOES_ARP_CHECK (0)
#define TCP_MAX_ACCEPT_CONN 5
#define MEMP_NUM_TCP_SEG (TCP_SND_QUEUELEN*2)
#define IP_REASS_MAX_PBUFS 0
#define IP_REASSEMBLY 0
#define IP_REASS_MAX_PBUFS 0
#define IP_REASSEMBLY 0
#define MEMP_NUM_REASSDATA 0
#define IP_FRAG 0
#define MEM_LIBC_MALLOC (1)
#define DEFAULT_UDP_RECVMBOX_SIZE 3 //each udp socket max buffer 3 packets.
#define MEMP_MEM_MALLOC (1)
#define TCP_MSL (TCP_TMR_INTERVAL)
#define LWIP_COMPAT_MUTEX_ALLOWED (1)
#define TCPIP_MBOX_SIZE 16
#define DEFAULT_ACCEPTMBOX_SIZE 8
#define DEFAULT_RAW_RECVMBOX_SIZE 4
#define DEFAULT_UDP_RECVMBOX_SIZE 8
#define DEFAULT_TCP_RECVMBOX_SIZE 8
#ifdef CONFIG_AOS_MESH
#define LWIP_DECLARE_HOOK \
struct netif *lwip_hook_ip6_route(const ip6_addr_t *src, const ip6_addr_t *dest); \
int lwip_hook_mesh_is_mcast_subscribed(const ip6_addr_t *dest);
#define LWIP_HOOK_IP6_ROUTE(src, dest) lwip_hook_ip6_route(src, dest)
#define LWIP_HOOK_MESH_IS_MCAST_SUBSCRIBED(dest) lwip_hook_mesh_is_mcast_subscribed(dest)
#define LWIP_ICMP6 1
#define CHECKSUM_CHECK_ICMP6 0
#define LWIP_MULTICAST_PING 1
#endif
#define LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS 1
#define TCP_QUEUE_OOSEQ 1
#define ETHARP_SUPPORT_STATIC_ENTRIES 1
#endif /* __LWIPOPTS_H__ */

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#ifndef _NET_H_
#define _NET_H_
extern void uap_ip_down(void);
extern void uap_ip_start(void);
extern void sta_ip_down(void);
extern void sta_ip_start(void);
extern uint32_t uap_ip_is_start(void);
extern uint32_t sta_ip_is_start(void);
extern void *net_get_sta_handle(void);
extern void *net_get_uap_handle(void);
extern void net_wlan_remove_netif(void *mac);
extern int net_get_if_macaddr(void *macaddr, void *intrfc_handle);
extern int net_get_if_addr(struct wlan_ip_config *addr, void *intrfc_handle);
extern void ip_address_set(int iface, int dhcp, char *ip, char *mask, char*gw, char*dns);
#endif // _NET_H_
// eof

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#include "bk7011_cal_pub.h"
#include "mac_config.h"
#include "drv_model_pub.h"
#include "uart_pub.h"
#include "net_param_pub.h"
#define MAC_EFUSE 0
#define MAC_ITEM 1
#define MAC_RF_OTP_FLASH 2
#define WIFI_MAC_POS MAC_ITEM
#if ((CFG_SOC_NAME == SOC_BK7231) && (WIFI_MAC_POS == MAC_EFUSE))
#error "BK7231 not support efuse!"
#endif
#define DEFAULT_MAC_ADDR "\xC8\x47\x8C\x00\x00\x18"
uint8_t system_mac[] = DEFAULT_MAC_ADDR;
void cfg_load_mac(u8 *mac)
{
#if (WIFI_MAC_POS == MAC_EFUSE)
if(!wifi_get_mac_address_from_efuse((UINT8 *)mac))
#elif (WIFI_MAC_POS == MAC_RF_OTP_FLASH)
if(!manual_cal_get_macaddr_from_flash((UINT8 *)mac))
#elif (WIFI_MAC_POS == MAC_ITEM)
uint8_t tmp_mac[8] = {0};
if(get_info_item(WIFI_MAC_ITEM, (UINT8 *)tmp_mac, NULL, NULL))
{
os_memcpy(mac, tmp_mac, 6);
}
else
#endif
{
os_memcpy(mac, DEFAULT_MAC_ADDR, 6);
if(mac[0] & 0x01)
{
os_printf("cfg_load_mac failed, MAC[0]&0x1 == 1\r\n");
}
}
}
void wifi_get_mac_address(char *mac, u8 type)
{
static int mac_inited = 0;
if (mac_inited == 0)
{
cfg_load_mac(system_mac);
mac_inited = 1;
}
if(type == CONFIG_ROLE_AP)
{
u8 mac_mask = (0xff & (2/*NX_VIRT_DEV_MAX*/ - 1));
u8 mac_low;
os_memcpy(mac, system_mac, 6);
mac_low = mac[5];
// if NX_VIRT_DEV_MAX == 4.
// if support AP+STA, mac addr should be equal with each other in byte0-4 & byte5[7:2],
// byte5[1:0] can be different
// ie: mac[5]= 0xf7, so mac[5] can be 0xf4, f5, f6. here wre chose 0xf4
mac[5] &= ~mac_mask;
mac_low = ((mac_low & mac_mask) ^ mac_mask );
mac[5] |= mac_low;
}
else if(type == CONFIG_ROLE_STA)
{
os_memcpy(mac, system_mac, 6);
}
}
uint8_t wifi_get_vif_index_by_mac(char *mac)
{
return rwm_mgmt_vif_mac2idx(mac);
}
int wifi_set_mac_address(char *mac)
{
if(mac[0]&0x01)
{
os_printf("set failed,can be a bc/mc address\r\n");
return 0;
}
os_memcpy(system_mac, mac, 6);
#if (WIFI_MAC_POS == MAC_EFUSE)
//wifi_set_mac_address_to_efuse((UINT8 *)system_mac);
#elif (WIFI_MAC_POS == MAC_RF_OTP_FLASH)
manual_cal_write_macaddr_to_flash((UINT8 *)system_mac);
#elif (WIFI_MAC_POS == MAC_ITEM)
save_info_item(WIFI_MAC_ITEM, (UINT8 *)system_mac, NULL, NULL);
#endif
return 0;
}
#if (CFG_SOC_NAME != SOC_BK7231)
#include "sys_ctrl_pub.h"
int wifi_set_mac_address_to_efuse(UINT8 *mac)
{
EFUSE_OPER_ST efuse;
int i = 0, ret;
if(!mac)
return 0;
for(i=0; i<EFUSE_MAC_LEN; i++) {
efuse.addr = EFUSE_MAC_START_ADDR + i;
efuse.data = mac[i];
if(i == 0) {
// ensure mac[0]-bit0 in efuse not '1'
efuse.data &= ~(0x01);
}
ret = sddev_control(SCTRL_DEV_NAME, CMD_EFUSE_WRITE_BYTE, &efuse);
if(ret != 0) {
os_printf("efuse set MAC failed\r\n");
return 0;
}
}
os_printf("efuse set MAC ok\r\n");
return 1;
}
int wifi_get_mac_address_from_efuse(UINT8 *mac)
{
EFUSE_OPER_ST efuse;
int i = 0, ret;
if(!mac)
return 0;
for(i=0; i<EFUSE_MAC_LEN; i++) {
efuse.addr = EFUSE_MAC_START_ADDR + i;
efuse.data = 0;
ret = sddev_control(SCTRL_DEV_NAME, CMD_EFUSE_READ_BYTE, &efuse);
if(ret == 0) {
mac[i] = efuse.data;
} else {
mac[i] = 0;
os_printf("efuse get MAC -1\r\n");
return 0;
}
}
os_printf("efuse get MAC:%02x:%02x:%02x:%02x:%02x:%02x\r\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
if((mac[0] == 0) && (mac[1] == 0) && (mac[2] == 0) &&
(mac[3] == 0) && (mac[4] == 0) && (mac[5] == 0)){
os_printf("efuse MAC all zero, see as error\r\n");
return 0;
}
return 1;
}
int wifi_write_efuse(UINT8 addr, UINT8 data)
{
EFUSE_OPER_ST efuse;
int i = 0, ret;
if(addr > EFUSE_CTRL_ADDR) {
os_printf("efuse addr:0x%x out of range(0-0x1F)\r\n", addr);
return 0;
}
efuse.addr = addr;
efuse.data = data;
ret = sddev_control(SCTRL_DEV_NAME, CMD_EFUSE_WRITE_BYTE, &efuse);
if(ret != 0) {
os_printf("efuse write failed, aready write this addr 0x%x\r\n", addr);
return 0;
}
return 1;
}
UINT8 wifi_read_efuse(UINT8 addr)
{
EFUSE_OPER_ST efuse;
int i = 0, ret;
if(addr > EFUSE_CTRL_ADDR) {
os_printf("efuse addr:0x%x out of range(0-0x1F)\r\n", addr);
return 0;
}
efuse.addr = addr;
efuse.data = 0;
ret = sddev_control(SCTRL_DEV_NAME, CMD_EFUSE_READ_BYTE, &efuse);
if(ret == 0) {
return efuse.data;
} else {
os_printf("efuse get MAC -1\r\n");
return 0xff;
}
}
#endif // #if (CFG_SOC_NAME != SOC_BK7231)

22
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#ifndef _MAC_CONFIG_H_
#define _MAC_CONFIG_H_
#define CONFIG_ROLE_NULL 0
#define CONFIG_ROLE_AP 1
#define CONFIG_ROLE_STA 2
#define CONFIG_ROLE_COEXIST 3
extern uint8_t system_mac[];
void cfg_load_mac(u8 *mac);
uint32_t cfg_param_init(void);
void wifi_get_mac_address(char *mac, u8 type);
int wifi_set_mac_address(char *mac);
int wifi_set_mac_address_to_efuse(UINT8 *mac);
int wifi_get_mac_address_from_efuse(UINT8 *mac);
int wifi_write_efuse(UINT8 addr, UINT8 data);
UINT8 wifi_read_efuse(UINT8 addr);
#endif /*_MAC_CONFIG_H_*/

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#ifndef _ERROR_H_
#define _ERROR_H_
#define kNoErr 0 //! No error occurred.
#define kGeneralErr -1 //! General error.
#define kInProgressErr 1 //! Operation in progress.
// Generic error codes are in the range -6700 to -6779.
#define kGenericErrorBase -6700 //! Starting error code for all generic errors.
#define kUnknownErr -6700 //! Unknown error occurred.
#define kOptionErr -6701 //! Option was not acceptable.
#define kSelectorErr -6702 //! Selector passed in is invalid or unknown.
#define kExecutionStateErr -6703 //! Call made in the wrong execution state (e.g. called at interrupt time).
#define kPathErr -6704 //! Path is invalid, too long, or otherwise not usable.
#define kParamErr -6705 //! Parameter is incorrect, missing, or not appropriate.
#define kUserRequiredErr -6706 //! User interaction is required.
#define kCommandErr -6707 //! Command invalid or not supported.
#define kIDErr -6708 //! Unknown, invalid, or inappropriate identifier.
#define kStateErr -6709 //! Not in appropriate state to perform operation.
#define kRangeErr -6710 //! Index is out of range or not valid.
#define kRequestErr -6711 //! Request was improperly formed or not appropriate.
#define kResponseErr -6712 //! Response was incorrect or out of sequence.
#define kChecksumErr -6713 //! Checksum does not match the actual data.
#define kNotHandledErr -6714 //! Operation was not handled (or not handled completely).
#define kVersionErr -6715 //! Version is not correct or not compatible.
#define kSignatureErr -6716 //! Signature did not match what was expected.
#define kFormatErr -6717 //! Unknown, invalid, or inappropriate file/data format.
#define kNotInitializedErr -6718 //! Action request before needed services were initialized.
#define kAlreadyInitializedErr -6719 //! Attempt made to initialize when already initialized.
#define kNotInUseErr -6720 //! Object not in use (e.g. cannot abort if not already in use).
#define kAlreadyInUseErr -6721 //! Object is in use (e.g. cannot reuse active param blocks).
#define kTimeoutErr -6722 //! Timeout occurred.
#define kCanceledErr -6723 //! Operation canceled (successful cancel).
#define kAlreadyCanceledErr -6724 //! Operation has already been canceled.
#define kCannotCancelErr -6725 //! Operation could not be canceled (maybe already done or invalid).
#define kDeletedErr -6726 //! Object has already been deleted.
#define kNotFoundErr -6727 //! Something was not found.
#define kNoMemoryErr -6728 //! Not enough memory was available to perform the operation.
#define kNoResourcesErr -6729 //! Resources unavailable to perform the operation.
#define kDuplicateErr -6730 //! Duplicate found or something is a duplicate.
#define kImmutableErr -6731 //! Entity is not changeable.
#define kUnsupportedDataErr -6732 //! Data is unknown or not supported.
#define kIntegrityErr -6733 //! Data is corrupt.
#define kIncompatibleErr -6734 //! Data is not compatible or it is in an incompatible format.
#define kUnsupportedErr -6735 //! Feature or option is not supported.
#define kUnexpectedErr -6736 //! Error occurred that was not expected.
#define kValueErr -6737 //! Value is not appropriate.
#define kNotReadableErr -6738 //! Could not read or reading is not allowed.
#define kNotWritableErr -6739 //! Could not write or writing is not allowed.
#define kBadReferenceErr -6740 //! An invalid or inappropriate reference was specified.
#define kFlagErr -6741 //! An invalid, inappropriate, or unsupported flag was specified.
#define kMalformedErr -6742 //! Something was not formed correctly.
#define kSizeErr -6743 //! Size was too big, too small, or not appropriate.
#define kNameErr -6744 //! Name was not correct, allowed, or appropriate.
#define kNotPreparedErr -6745 //! Device or service is not ready.
#define kReadErr -6746 //! Could not read.
#define kWriteErr -6747 //! Could not write.
#define kMismatchErr -6748 //! Something does not match.
#define kDateErr -6749 //! Date is invalid or out-of-range.
#define kUnderrunErr -6750 //! Less data than expected.
#define kOverrunErr -6751 //! More data than expected.
#define kEndingErr -6752 //! Connection, session, or something is ending.
#define kConnectionErr -6753 //! Connection failed or could not be established.
#define kAuthenticationErr -6754 //! Authentication failed or is not supported.
#define kOpenErr -6755 //! Could not open file, pipe, device, etc.
#define kTypeErr -6756 //! Incorrect or incompatible type (e.g. file, data, etc.).
#define kSkipErr -6757 //! Items should be or was skipped.
#define kNoAckErr -6758 //! No acknowledge.
#define kCollisionErr -6759 //! Collision occurred (e.g. two on bus at same time).
#define kBackoffErr -6760 //! Backoff in progress and operation intentionally failed.
#define kNoAddressAckErr -6761 //! No acknowledge of address.
#define kInternalErr -6762 //! An error internal to the implementation occurred.
#define kNoSpaceErr -6763 //! Not enough space to perform operation.
#define kCountErr -6764 //! Count is incorrect.
#define kEndOfDataErr -6765 //! Reached the end of the data (e.g. recv returned 0).
#define kWouldBlockErr -6766 //! Would need to block to continue (e.g. non-blocking read/write).
#define kLookErr -6767 //! Special case that needs to be looked at (e.g. interleaved data).
#define kSecurityRequiredErr -6768 //! Security is required for the operation (e.g. must use encryption).
#define kOrderErr -6769 //! Order is incorrect.
#define kUpgradeErr -6770 //! Must upgrade.
#define kAsyncNoErr -6771 //! Async operation successfully started and is now in progress.
#define kDeprecatedErr -6772 //! Operation or data is deprecated.
#define kPermissionErr -6773 //! Permission denied.
#define kGenericErrorEnd -6779 //! Last generic error code (inclusive)
#endif
// eof

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#ifndef _MEM_PUB_H_
#define _MEM_PUB_H_
#include <stdarg.h>
#include <aos/kernel.h>
INT32 os_memcmp(const void *s1, const void *s2, UINT32 n);
void *os_memmove(void *out, const void *in, UINT32 n);
void *os_memcpy(void *out, const void *in, UINT32 n);
void *os_memset(void *b, int c, UINT32 len);
void os_mem_init(void);
void *os_realloc(void *ptr, size_t size);
int os_memcmp_const(const void *a, const void *b, size_t len);
#if OSMALLOC_STATISTICAL
#define os_malloc aos_malloc
#define os_free aos_free
#define os_zalloc aos_zalloc
#else
void *os_malloc(size_t size);
void os_free(void *ptr);
void *os_zalloc(size_t size);
#endif
#endif // _MEM_PUB_H_
// EOF

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#ifndef __RTOS_PUB__
#define __RTOS_PUB__
#include "include.h"
#include "typedef.h"
#include "error.h"
#pragma once
#define RTOS_SUCCESS (1)
#define RTOS_FAILURE (0)
#define BEKEN_DEFAULT_WORKER_PRIORITY (6)
#define BEKEN_APPLICATION_PRIORITY (7)
#define kNanosecondsPerSecond 1000000000UUL
#define kMicrosecondsPerSecond 1000000UL
#define kMillisecondsPerSecond 1000
#define BEKEN_NEVER_TIMEOUT (0xFFFFFFFF)
#define BEKEN_WAIT_FOREVER (0xFFFFFFFF)
#define BEKEN_NO_WAIT (0)
#define NANOSECONDS 1000000UL
#define MICROSECONDS 1000
#define MILLISECONDS (1)
#define SECONDS (1000)
#define MINUTES (60 * SECONDS)
#define HOURS (60 * MINUTES)
#define DAYS (24 * HOURS)
#if FreeRTOS_VERSION_MAJOR == 7
#define _xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ) xTaskCreate( pvTaskCode, (signed char*)pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask )
#define _xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ) xTimerCreate( (signed char*)pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction )
#else
#define _xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ) xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask )
#define _xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ) xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction )
#endif
typedef int OSStatus;
typedef void (*timer_handler_t)( void*);
typedef OSStatus (*event_handler_t)( void* arg );
typedef void * beken_thread_arg_t;
typedef uint8_t beken_bool_t;
typedef uint32_t beken_time_t; /**< Time value in milliseconds */
typedef uint32_t beken_utc_time_t; /**< UTC Time in seconds */
typedef uint64_t beken_utc_time_ms_t; /**< UTC Time in milliseconds */
typedef uint32_t beken_event_flags_t;
typedef void * beken_semaphore_t;
typedef void * beken_mutex_t;
typedef void * beken_thread_t;
typedef void * beken_queue_t;
typedef void * beken_event_t; // OS event: beken_semaphore_t, beken_mutex_t or beken_queue_t
typedef enum
{
WAIT_FOR_ANY_EVENT,
WAIT_FOR_ALL_EVENTS,
} beken_event_flags_wait_option_t;
typedef struct
{
void * handle;
timer_handler_t function;
void * arg;
}beken_timer_t;
typedef struct
{
beken_thread_t thread;
beken_queue_t event_queue;
} beken_worker_thread_t;
typedef struct
{
event_handler_t function;
void* arg;
beken_timer_t timer;
beken_worker_thread_t* thread;
} beken_timed_event_t;
typedef void (*timer_2handler_t)( void* Larg, void* Rarg);
#define BEKEN_MAGIC_WORD (0xBABA7231)
typedef struct
{
void * handle;
timer_2handler_t function;
void * left_arg;
void * right_arg;
uint32_t beken_magic;
}beken2_timer_t;
typedef void (*beken_thread_function_t)( beken_thread_arg_t arg );
extern beken_worker_thread_t beken_hardware_io_worker_thread;
extern beken_worker_thread_t beken_worker_thread;
/** @brief Enter a critical session, all interrupts are disabled
*
* @return none
*/
void rtos_enter_critical( void );
/** @brief Exit a critical session, all interrupts are enabled
*
* @return none
*/
void rtos_exit_critical( void );
/**
* @}
*/
/** @defgroup BEKEN_RTOS_Thread _BK_ RTOS Thread Management Functions
* @brief Provide thread creation, delete, suspend, resume, and other RTOS management API
* @verbatim
* _BK_ thread priority table
*
* +----------+-----------------+
* | Priority | Thread |
* |----------|-----------------|
* | 0 | _BK_ | Highest priority
* | 1 | Network |
* | 2 | |
* | 3 | Network worker |
* | 4 | |
* | 5 | Default Library |
* | | Default worker |
* | 6 | |
* | 7 | Application |
* | 8 | |
* | 9 | Idle | Lowest priority
* +----------+-----------------+
* @endverbatim
* @{
*/
/** @brief Creates and starts a new thread
*
* @param thread : Pointer to variable that will receive the thread handle (can be null)
* @param priority : A priority number.
* @param name : a text name for the thread (can be null)
* @param function : the main thread function
* @param stack_size : stack size for this thread
* @param arg : argument which will be passed to thread function
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_create_thread( beken_thread_t* thread, uint8_t priority, const char* name, beken_thread_function_t function, uint32_t stack_size, beken_thread_arg_t arg );
/** @brief Deletes a terminated thread
*
* @param thread : the handle of the thread to delete, , NULL is the current thread
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_delete_thread( beken_thread_t* thread );
/** @brief Creates a worker thread
*
* Creates a worker thread
* A worker thread is a thread in whose context timed and asynchronous events
* execute.
*
* @param worker_thread : a pointer to the worker thread to be created
* @param priority : thread priority
* @param stack_size : thread's stack size in number of bytes
* @param event_queue_size : number of events can be pushed into the queue
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_create_worker_thread( beken_worker_thread_t* worker_thread, uint8_t priority, uint32_t stack_size, uint32_t event_queue_size );
/** @brief Deletes a worker thread
*
* @param worker_thread : a pointer to the worker thread to be created
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_delete_worker_thread( beken_worker_thread_t* worker_thread );
/** @brief Suspend a thread
*
* @param thread : the handle of the thread to suspend, NULL is the current thread
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
void rtos_suspend_thread(beken_thread_t* thread);
/** @brief Suspend all other thread
*
* @param none
*
* @return none
*/
void rtos_suspend_all_thread(void);
/** @brief Rresume all other thread
*
* @param none
*
* @return none
*/
long rtos_resume_all_thread(void);
/** @brief Sleeps until another thread has terminated
*
* @Details Causes the current thread to sleep until the specified other thread
* has terminated. If the processor is heavily loaded with higher priority
* tasks, this thread may not wake until significantly after the thread termination.
*
* @param thread : the handle of the other thread which will terminate
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_thread_join( beken_thread_t* thread );
/** @brief Forcibly wakes another thread
*
* @Details Causes the specified thread to wake from suspension. This will usually
* cause an error or timeout in that thread, since the task it was waiting on
* is not complete.
*
* @param thread : the handle of the other thread which will be woken
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_thread_force_awake( beken_thread_t* thread );
/** @brief Checks if a thread is the current thread
*
* @Details Checks if a specified thread is the currently running thread
*
* @param thread : the handle of the other thread against which the current thread
* will be compared
*
* @return true : specified thread is the current thread
* @return false : specified thread is not currently running
*/
bool rtos_is_current_thread( beken_thread_t* thread );
/** @brief Get current thread handler
*
* @return Current RTOS thread handler
*/
beken_thread_t* rtos_get_current_thread( void );
/** @brief Suspend current thread for a specific time
*
* @param seconds : A time interval (Unit: seconds)
*
* @return None.
*/
void rtos_thread_sleep(uint32_t seconds);
/** @brief Suspend current thread for a specific time
*
* @param milliseconds : A time interval (Unit: millisecond)
*
* @return None.
*/
void rtos_thread_msleep(uint32_t milliseconds);
/** @brief Suspend current thread for a specific time
*
* @param num_ms : A time interval (Unit: millisecond)
*
* @return kNoErr.
*/
OSStatus rtos_delay_milliseconds( uint32_t num_ms );
/** @brief Print Thread status into buffer
*
* @param buffer, point to buffer to store thread status
* @param length, length of the buffer
*
* @return none
*/
OSStatus rtos_print_thread_status( char* buffer, int length );
/**
* @}
*/
/** @defgroup BEKEN_RTOS_SEM _BK_ RTOS Semaphore Functions
* @brief Provide management APIs for semaphore such as init,set,get and dinit.
* @{
*/
/** @brief Initialises a counting semaphore and set count to 0
*
* @param semaphore : a pointer to the semaphore handle to be initialised
* @param maxCount : the max count number of this semaphore
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_init_semaphore( beken_semaphore_t* semaphore, int maxCount );
/** @brief Set (post/put/increment) a semaphore
*
* @param semaphore : a pointer to the semaphore handle to be set
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_set_semaphore( beken_semaphore_t* semaphore );
/** @brief Get (wait/decrement) a semaphore
*
* @Details Attempts to get (wait/decrement) a semaphore. If semaphore is at zero already,
* then the calling thread will be suspended until another thread sets the
* semaphore with @ref rtos_set_semaphore
*
* @param semaphore : a pointer to the semaphore handle
* @param timeout_ms: the number of milliseconds to wait before returning
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_get_semaphore( beken_semaphore_t* semaphore, uint32_t timeout_ms );
int rtos_get_sema_count( beken_semaphore_t* semaphore );
/** @brief De-initialise a semaphore
*
* @Details Deletes a semaphore created with @ref rtos_init_semaphore
*
* @param semaphore : a pointer to the semaphore handle
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_deinit_semaphore( beken_semaphore_t* semaphore );
/**
* @}
*/
/** @defgroup BEKEN_RTOS_MUTEX _BK_ RTOS Mutex Functions
* @brief Provide management APIs for Mutex such as init,lock,unlock and dinit.
* @{
*/
/** @brief Initialises a mutex
*
* @Details A mutex is different to a semaphore in that a thread that already holds
* the lock on the mutex can request the lock again (nested) without causing
* it to be suspended.
*
* @param mutex : a pointer to the mutex handle to be initialised
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_init_mutex( beken_mutex_t* mutex );
/** @brief Obtains the lock on a mutex
*
* @Details Attempts to obtain the lock on a mutex. If the lock is already held
* by another thead, the calling thread will be suspended until the mutex
* lock is released by the other thread.
*
* @param mutex : a pointer to the mutex handle to be locked
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_lock_mutex( beken_mutex_t* mutex );
/** @brief Releases the lock on a mutex
*
* @Details Releases a currently held lock on a mutex. If another thread
* is waiting on the mutex lock, then it will be resumed.
*
* @param mutex : a pointer to the mutex handle to be unlocked
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_unlock_mutex( beken_mutex_t* mutex );
/** @brief De-initialise a mutex
*
* @Details Deletes a mutex created with @ref rtos_init_mutex
*
* @param mutex : a pointer to the mutex handle
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_deinit_mutex( beken_mutex_t* mutex );
/**
* @}
*/
/** @defgroup BEKEN_RTOS_QUEUE _BK_ RTOS FIFO Queue Functions
* @brief Provide management APIs for FIFO such as init,push,pop and dinit.
* @{
*/
/** @brief Initialises a FIFO queue
*
* @param queue : a pointer to the queue handle to be initialised
* @param name : a text string name for the queue (NULL is allowed)
* @param message_size : size in bytes of objects that will be held in the queue
* @param number_of_messages : depth of the queue - i.e. max number of objects in the queue
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_init_queue( beken_queue_t* queue, const char* name, uint32_t message_size, uint32_t number_of_messages );
/** @brief Pushes an object onto a queue
*
* @param queue : a pointer to the queue handle
* @param message : the object to be added to the queue. Size is assumed to be
* the size specified in @ref rtos_init_queue
* @param timeout_ms: the number of milliseconds to wait before returning
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error or timeout occurred
*/
OSStatus rtos_push_to_queue( beken_queue_t* queue, void* message, uint32_t timeout_ms );
/** @brief Pops an object off a queue
*
* @param queue : a pointer to the queue handle
* @param message : pointer to a buffer that will receive the object being
* popped off the queue. Size is assumed to be
* the size specified in @ref rtos_init_queue , hence
* you must ensure the buffer is long enough or memory
* corruption will result
* @param timeout_ms: the number of milliseconds to wait before returning
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error or timeout occurred
*/
OSStatus rtos_pop_from_queue( beken_queue_t* queue, void* message, uint32_t timeout_ms );
/** @brief De-initialise a queue created with @ref rtos_init_queue
*
* @param queue : a pointer to the queue handle
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_deinit_queue( beken_queue_t* queue );
/** @brief Check if a queue is empty
*
* @param queue : a pointer to the queue handle
*
* @return true : queue is empty.
* @return false : queue is not empty.
*/
bool rtos_is_queue_empty( beken_queue_t* queue );
/** @brief Check if a queue is full
*
* @param queue : a pointer to the queue handle
*
* @return true : queue is empty.
* @return false : queue is not empty.
*/
bool rtos_is_queue_full( beken_queue_t* queue );
/**
* @}
*/
/** @defgroup BEKEN_RTOS_EVENT _BK_ RTOS Event Functions
* @{
*/
/**
* @brief Sends an asynchronous event to the associated worker thread
*
* @param worker_thread :the worker thread in which context the callback should execute from
* @param function : the callback function to be called from the worker thread
* @param arg : the argument to be passed to the callback function
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_send_asynchronous_event( beken_worker_thread_t* worker_thread, event_handler_t function, void* arg );
/** Requests a function be called at a regular interval
*
* This function registers a function that will be called at a regular
* interval. Since this is based on the RTOS time-slice scheduling, the
* accuracy is not high, and is affected by processor load.
*
* @param event_object : pointer to a event handle which will be initialised
* @param worker_thread : pointer to the worker thread in whose context the
* callback function runs on
* @param function : the callback function that is to be called regularly
* @param time_ms : the time period between function calls in milliseconds
* @param arg : an argument that will be supplied to the function when
* it is called
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_register_timed_event( beken_timed_event_t* event_object, beken_worker_thread_t* worker_thread, event_handler_t function, uint32_t time_ms, void* arg );
/** Removes a request for a regular function execution
*
* This function de-registers a function that has previously been set-up
* with @ref rtos_register_timed_event.
*
* @param event_object : the event handle used with @ref rtos_register_timed_event
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_deregister_timed_event( beken_timed_event_t* event_object );
/**
* @}
*/
/** @defgroup BEKEN_RTOS_TIMER _BK_ RTOS Timer Functions
* @brief Provide management APIs for timer such as init,start,stop,reload and dinit.
* @{
*/
/**
* @brief Gets time in miiliseconds since RTOS start
*
* @note: Since this is only 32 bits, it will roll over every 49 days, 17 hours.
*
* @returns Time in milliseconds since RTOS started.
*/
uint32_t rtos_get_time(void);
/**
* @brief Initialize a RTOS timer
*
* @note Timer does not start running until @ref beken_start_timer is called
*
* @param timer : a pointer to the timer handle to be initialised
* @param time_ms : Timer period in milliseconds
* @param function : the callback handler function that is called each time the
* timer expires
* @param arg : an argument that will be passed to the callback function
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_init_timer( beken_timer_t* timer, uint32_t time_ms, timer_handler_t function, void* arg );
/** @brief Starts a RTOS timer running
*
* @note Timer must have been previously initialised with @ref rtos_init_timer
*
* @param timer : a pointer to the timer handle to start
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_start_timer( beken_timer_t* timer );
/** @brief Stops a running RTOS timer
*
* @note Timer must have been previously started with @ref rtos_init_timer
*
* @param timer : a pointer to the timer handle to stop
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_stop_timer( beken_timer_t* timer );
/** @brief Reloads a RTOS timer that has expired
*
* @note This is usually called in the timer callback handler, to
* reschedule the timer for the next period.
*
* @param timer : a pointer to the timer handle to reload
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_reload_timer( beken_timer_t* timer );
/** @brief De-initialise a RTOS timer
*
* @note Deletes a RTOS timer created with @ref rtos_init_timer
*
* @param timer : a pointer to the RTOS timer handle
*
* @return kNoErr : on success.
* @return kGeneralErr : if an error occurred
*/
OSStatus rtos_deinit_timer( beken_timer_t* timer );
/** @brief Check if an RTOS timer is running
*
* @param timer : a pointer to the RTOS timer handle
*
* @return true : if running.
* @return false : if not running
*/
bool rtos_is_timer_init( beken_timer_t* timer );
bool rtos_is_timer_running( beken_timer_t* timer );
/** @brief Initialize an endpoint for a RTOS event, a file descriptor
* will be created, can be used for select
*
* @param event_handle : beken_semaphore_t, beken_mutex_t or beken_queue_t
*
* @retval On success, a file descriptor for RTOS event is returned.
* On error, -1 is returned.
*/
int rtos_init_event_fd(beken_event_t event_handle);
/** @brief De-initialise an endpoint created from a RTOS event
*
* @param fd : file descriptor for RTOS event
*
* @retval 0 for success. On error, -1 is returned.
*/
int rtos_deinit_event_fd(int fd);
/**
* @}
*/
OSStatus rtos_init_oneshot_timer( beken2_timer_t* timer, uint32_t time_ms, timer_2handler_t function, void* larg, void* rarg );
OSStatus rtos_start_oneshot_timer( beken2_timer_t* timer );
OSStatus rtos_stop_oneshot_timer( beken2_timer_t* timer );
OSStatus rtos_deinit_oneshot_timer( beken2_timer_t* timer );
bool rtos_is_oneshot_timer_init( beken2_timer_t* timer );
#endif // __RTOS_PUB__
// EOF

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#ifndef _STR_PUB_H_
#define _STR_PUB_H_
#include <stdarg.h>
UINT32 os_strlen(const char *str);
INT32 os_strcmp(const char *s1, const char *s2);
INT32 os_strncmp(const char *s1, const char *s2, const UINT32 n);
INT32 os_snprintf(char *buf, UINT32 size, const char *fmt, ...);
INT32 os_vsnprintf(char *buf, UINT32 size, const char *fmt, va_list ap);
char *os_strncpy(char *out, const char *in, const UINT32 n);
UINT32 os_strtoul(const char *nptr, char **endptr, int base);
char *os_strcpy(char *out, const char *in);
char *os_strchr(const char *s, int c);
char *os_strdup(const char *s);
int os_strcasecmp(const char *s1, const char *s2);
int os_strncasecmp(const char *s1, const char *s2, size_t n);
char *os_strrchr(const char *s, int c);
char *os_strstr(const char *haystack, const char *needle);
size_t os_strlcpy(char *dest, const char *src, size_t siz);
#endif // _STR_PUB_H_
// EOF

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#ifndef _SYS_RTOS_H_
#define _SYS_RTOS_H_
#include "include.h"
#endif // _SYS_RTOS_H_

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#ifndef _ATE_APP_H_
#define _ATE_APP_H_
#define ATE_APP_FUN 1
#if ATE_APP_FUN
#include "gpio_pub.h"
#include "uart_pub.h"
#define ATE_DEBUG
#ifdef ATE_DEBUG
#define ATE_PRT os_printf
#define ATE_WARN warning_prf
#define ATE_FATAL fatal_prf
#else
#define ATE_PRT null_prf
#define ATE_WARN null_prf
#define ATE_FATAL null_prf
#endif
extern int ate_gpio_port;
void ate_gpio_init(void);
uint32_t ate_mode_check(void);
void ate_app_init(void);
uint32_t get_ate_mode_state(void);
void ate_start(void);
#endif /*ATE_APP_FUN */
#endif // _ATE_APP_H_
// eof

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#ifndef _ARCH_CONFIG_H_
#define _ARCH_CONFIG_H_
#include "mac.h"
#if (CFG_SUPPORT_ALIOS)
#include "mac_config.h"
#endif
#define PARAM_CFG_DEBUG
#ifdef PARAM_CFG_DEBUG
#define PARAM_CFG_PRT os_printf
#define PARAM_CFG_WARN warning_prf
#define PARAM_CFG_FATAL fatal_prf
#else
#define PARAM_CFG_PRT null_prf
#define PARAM_CFG_WARN null_prf
#define PARAM_CFG_FATAL null_prf
#endif
#if (CFG_OS_FREERTOS)
#define CONFIG_ROLE_NULL 0
#define CONFIG_ROLE_AP 1
#define CONFIG_ROLE_STA 2
#define CONFIG_ROLE_COEXIST 3
#define MAC_EFUSE 0
#define MAC_ITEM 1
#define MAC_RF_OTP_FLASH 2
#define WIFI_MAC_POS MAC_RF_OTP_FLASH
#endif
#define DEFAULT_CHANNEL_AP 11
typedef struct fast_connect_param
{
uint8_t bssid[6];
uint8_t chann;
} fast_connect_param_t;
typedef struct general_param
{
uint8_t role;
uint8_t dhcp_enable;
uint32_t ip_addr;
uint32_t ip_mask;
uint32_t ip_gw;
} general_param_t;
typedef struct ap_param
{
struct mac_addr bssid;
struct mac_ssid ssid;
uint8_t chann;
uint8_t cipher_suite;
uint8_t key[65];
uint8_t key_len;
} ap_param_t;
typedef struct sta_param
{
struct mac_addr own_mac;
struct mac_ssid ssid;
uint8_t cipher_suite;
uint8_t key[65];
uint8_t key_len;
uint8_t fast_connect_set;
fast_connect_param_t fast_connect;
} sta_param_t;
extern general_param_t *g_wlan_general_param;
extern ap_param_t *g_ap_param_ptr;
extern sta_param_t *g_sta_param_ptr;
uint32_t cfg_param_init(void);
#if (CFG_OS_FREERTOS)
extern uint8_t system_mac[];
void cfg_load_mac(u8 *mac);
void wifi_get_mac_address(char *mac, u8 type);
int wifi_set_mac_address(char *mac);
int wifi_set_mac_address_to_efuse(UINT8 *mac);
int wifi_get_mac_address_from_efuse(UINT8 *mac);
int wifi_write_efuse(UINT8 addr, UINT8 data);
UINT8 wifi_read_efuse(UINT8 addr);
#endif
#endif

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#ifndef _SYS_CONFIG_H_
#define _SYS_CONFIG_H_
/* CFG_RF_OTA_TEST enable, and disable CFG_RC of rw_config.h*/
#define CFG_RF_OTA_TEST 0
/*SUMMARY: macro--1: OPEN; --0:CLOSE*/
/* uart2 for debug, and generally, uart1 is used for communication.
what is more, uart1 maybe is not bound out*/
#define CFG_USE_UART1 1
#define CFG_JTAG_ENABLE 0
#define OSMALLOC_STATISTICAL 0
/*section 0-----app macro config-----*/
#define CFG_IEEE80211N 1
/*section 1-----OS macro config-----*/
#define CFG_OS_FREERTOS 0
#define THD_APPLICATION_PRIORITY 3
#define THD_CORE_PRIORITY 2
#define THD_UMP3_PRIORITY 4
#define THD_UBG_PRIORITY 5
#define THD_LWIP_PRIORITY 4
#define THD_INIT_PRIORITY 4
#define THD_RECONNECT_PRIORITY 4
#define THD_MEDIA_PRIORITY 4
#define THD_WPAS_PRIORITY 5
#define THD_EXTENDED_APP_PRIORITY 5
#define THD_HOSTAPD_PRIORITY 5
#define THDD_KEY_SCAN_PRIORITY 7
/*section 2-----function macro config-----*/
#define CFG_TX_EVM_TEST 1
#define CFG_RX_SENSITIVITY_TEST 1
#define CFG_ROLE_LAUNCH 0
#define CFG_ENABLE_BUTTON 0
#define CFG_UDISK_MP3 0
#define CFG_EASY_FLASH 0
/*section 3-----driver macro config-----*/
#define CFG_MAC_PHY_BAPASS 1
#define CFG_SDIO 0
#define CFG_SDIO_TRANS 0
#define CFG_REAL_SDIO 0
#if CFG_REAL_SDIO
#define FOR_SDIO_BLK_512 0
#endif
#define CFG_MSDU_RESV_HEAD_LEN 96
#define CFG_MSDU_RESV_TAIL_LEN 16
#define CFG_USE_USB_HOST 0
#define CFG_USB 0
#if CFG_USB
#define CFG_SUPPORT_MSD 1
#define CFG_SUPPORT_HID 0
#define CFG_SUPPORT_CCD 0
#define CFG_SUPPORT_UVC 0
#endif
#define CFG_USE_USB_CHARGE 0
/*section 4-----DEBUG macro config-----*/
#define CFG_UART_DEBUG 0
#define CFG_UART_DEBUG_COMMAND_LINE 1
#define CFG_BACKGROUND_PRINT 0
#define CFG_SUPPORT_BKREG 1
#define CFG_ENABLE_WPA_LOG 0
#define CFG_IPERF_TEST 0
#define CFG_TCP_SERVER_TEST 0
#define CFG_AIRKISS_TEST 0
#define CFG_ENABLE_DEMO_TEST 0
/*section 5-----PRODUCT macro config-----*/
#define CFG_RELEASE_FIRMWARE 0
/*section 6-----for platform*/
#define SOC_PLATFORM 1
#define FPGA_PLATFORM 0
#define CFG_RUNNING_PLATFORM SOC_PLATFORM
#define SOC_BK7231 1
#define SOC_BK7231U 2
#define SOC_BK7221U 3
#define CFG_SOC_NAME SOC_BK7231U
/*section 7-----calibration*/
#if (CFG_RUNNING_PLATFORM == FPGA_PLATFORM)
#define CFG_SUPPORT_CALIBRATION 0
#define CFG_SUPPORT_MANUAL_CALI 0
#else
#define CFG_SUPPORT_CALIBRATION 1
#define CFG_SUPPORT_MANUAL_CALI 1
//tpc rf pa map power for bk7231u
#define CFG_SUPPORT_TPC_PA_MAP 1
#endif
/*section 8-----for netstack*/
#define CFG_USE_LWIP_NETSTACK 1
/*section 9-----for DHCP servicers and client*/
#define CFG_USE_DHCP 1
/*section 10-----patch*/
/*section 11-----temperature detect*/
#define CFG_USE_TEMPERATURE_DETECT 1
/*section 12-----for SPIDMA interface*/
#define CFG_USE_SPIDMA 0
#define CFG_USE_CAMERA_INTF 0
/*section 13-----for GENERRAL DMA */
#define CFG_GENERAL_DMA 1
/*section 14-----for FTPD UPGRADE*/
#define CFG_USE_FTPD_UPGRADE 0
/*section 15-----support customer macro*/
#define CFG_SUPPORT_TIANZHIHENG_DRONE 0
/*section 16-----support mcu & deep sleep*/
#define CFG_USE_MCU_PS 1
#if (CFG_SUPPORT_ALIOS)
#define CFG_USE_MCU_PS RHINO_CONFIG_CPU_PWR_MGMT
#endif
#define CFG_USE_DEEP_PS 1
#define CFG_USE_BLE_PS 0
/*section 17-----support sta power sleep*/
#if CFG_RF_OTA_TEST
#define CFG_USE_STA_PS 0
#else
#define CFG_USE_STA_PS 1
#endif
/*section 18-----AP support stas in power save*/
#define CFG_USE_AP_PS 0
/*section 19-----for SDCARD HOST*/
#define CFG_USE_SDCARD_HOST 0
/*section 20 ----- support mp3 decoder*/
#define CONFIG_APP_MP3PLAYER 0
/*section 21 ----- support ota*/
#define CFG_SUPPORT_OTA_HTTP 0
#define CFG_SUPPORT_OTA_TFTP 0
/*section 22 ----- support adc calibrate*/
#define CFG_SARADC_CALIBRATE 0
/*section 23 ----- support reduce nomal power*/
#define CFG_SYS_REDUCE_NORMAL_POWER 0
/*section 24 ----- less memery in rwnx*/
#define CFG_LESS_MEMERY_IN_RWNX 0
/*section 25 ----- use audio*/
#define CFG_USE_AUDIO 0
#define CFG_USE_AUD_DAC 0
#define CFG_USE_AUD_ADC 0
#define CFG_SUPPORT_BLE 1
#define CFG_RF_USER_BLE 1
#define CFG_RF_USER_WIFI 2
#define CFG_DEFAULT_RF_USER CFG_RF_USER_WIFI
#endif // _SYS_CONFIG_H_

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#ifndef _DOUBLY_LIST_H
#define _DOUBLY_LIST_H
#ifndef offsetof
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
#endif
#define list_entry(ptr, type, member) ((type *)((char *)ptr - offsetof(type,member)))
/*
* Simple doubly linked list implementation.
*
* Some of the internal functions ("__xxx") are useful when
* manipulating whole lists rather than single entries, as
* sometimes we already know the next/prev entries and we can
* generate better code by using them directly rather than
* using the generic single-entry routines.
*/
typedef struct list_head
{
struct list_head *next, *prev;
}LIST_HEADER_T;
#define LIST_HEAD_INIT(name) { &(name), &(name) }
#define LIST_HEAD_DEFINE(name) \
struct list_head name = LIST_HEAD_INIT(name)
#define INIT_LIST_HEAD(ptr) do { \
(ptr)->next = (ptr); (ptr)->prev = (ptr); \
} while (0)
/*
* Insert a new_node entry between two known consecutive entries.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
__INLINE void __list_add(struct list_head *new_node, struct list_head *prev, struct list_head *next)
{
next->prev = new_node;
new_node->next = next;
new_node->prev = prev;
prev->next = new_node;
}
/**
* list_add - add a new_node entry
* @new_node: new_node entry to be added
* @head: list head to add it after
*
* Insert a new_node entry after the specified head.
* This is good for implementing stacks.
*/
__INLINE void list_add_head(struct list_head *new_node, struct list_head *head)
{
__list_add(new_node, head, head->next);
}
/**
* list_add_tail - add a new_node entry
* @new_node: new_node entry to be added
* @head: list head to add it before
*
* Insert a new_node entry before the specified head.
* This is useful for implementing queues.
*/
__INLINE void list_add_tail(struct list_head *new_node, struct list_head *head)
{
__list_add(new_node, head->prev, head);
}
/*
* Delete a list entry by making the prev/next entries
* point to each other.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
__INLINE void __list_del(struct list_head * prev, struct list_head * next)
{
next->prev = prev;
prev->next = next;
}
/**
* list_del - deletes entry from list.
* @entry: the element to delete from the list.
* Note: list_empty on entry does not return true after this, the entry is
* in an undefined state.
*/
__INLINE void list_del(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
}
/**
* list_del_init - deletes entry from list and reinitialize it.
* @entry: the element to delete from the list.
*/
__INLINE void list_del_init(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
INIT_LIST_HEAD(entry);
}
/**
* list_move - delete from one list and add as another's head
* @list: the entry to move
* @head: the head that will precede our entry
*/
__INLINE void list_move(struct list_head *list, struct list_head *head)
{
__list_del(list->prev, list->next);
list_add_head(list, head);
}
/**
* list_move_tail - delete from one list and add as another's tail
* @list: the entry to move
* @head: the head that will follow our entry
*/
__INLINE void list_move_tail(struct list_head *list,
struct list_head *head)
{
__list_del(list->prev, list->next);
list_add_tail(list, head);
}
/**
* list_empty - tests whether a list is empty
* @head: the list to test.
*/
__INLINE unsigned int list_empty(const struct list_head *head)
{
return head->next == head;
}
__INLINE void __list_splice(struct list_head *list,
struct list_head *head)
{
struct list_head *first = list->next;
struct list_head *last = list->prev;
struct list_head *at = head->next;
first->prev = head;
head->next = first;
last->next = at;
at->prev = last;
}
/**
* list_splice - join two lists
* @list: the new_node list to add.
* @head: the place to add it in the first list.
*/
__INLINE void list_splice(struct list_head *list, struct list_head *head)
{
if (!list_empty(list))
__list_splice(list, head);
}
/**
* list_splice_init - join two lists and reinitialise the emptied list.
* @list: the new_node list to add.
* @head: the place to add it in the first list.
*
* The list at @list is reinitialised
*/
__INLINE void list_splice_init(struct list_head *list,
struct list_head *head)
{
if (!list_empty(list)) {
__list_splice(list, head);
INIT_LIST_HEAD(list);
}
}
__INLINE void list_switch(struct list_head **list1,
struct list_head ** list2)
{
struct list_head * temp;
temp = *list1;
*list1 = *list2;
*list2 = temp;
}
/**
* list_for_each - iterate over a list
* @pos: the &struct list_head to use as a loop counter.
* @head: the head for your list.
*/
#define list_for_each(pos, head) \
for (pos = (head)->next; pos != (head); pos = pos->next)
/**
* list_for_each_safe - iterate over a list safe against removal of list entry
* @pos: the &struct list_head to use as a loop counter.
* @n: another &struct list_head to use as temporary storage
* @head: the head for your list.
*/
#define list_for_each_safe(pos, n, head) \
for (pos = (head)->next, n = pos->next; pos != (head); \
pos = n, n = pos->next)
/**
* list_size
* @head: the head for your list.
*/
__INLINE unsigned int list_size(struct list_head *list) {
unsigned int num_of_list=0;
struct list_head *n, *pos;
list_for_each_safe(pos, n, list)
num_of_list++;
return num_of_list;
}
#endif /* _DOUBLY_LIST_H */

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#ifndef _FIFO_H_
#define _FIFO_H_
#include "include.h"
#include "generic.h"
#include "mem_pub.h"
#include "mem_pub.h"
typedef struct kfifo
{
unsigned int in;
unsigned int out;
unsigned int mask;
unsigned int size;
unsigned char *buffer;
}KFIFO_T, *KFIFO_PTR;
/**
* kfifo_init - allocates a new FIFO using a preallocated buffer
* @buffer: the preallocated buffer to be used.
* @size: the size of the internal buffer, this have to be a power of 2.
* @gfp_mask: get_free_pages mask, passed to ke_malloc()
* @lock: the lock to be used to protect the fifo buffer
*
* Do NOT pass the kfifo to kfifo_free() after use ! Simply free the
* struct kfifo with ke_free().
*/
__INLINE struct kfifo *kfifo_init(unsigned char *buffer, unsigned int size)
{
struct kfifo *fifo;
/* size must be a power of 2 */
BUG_ON(size & (size - 1));
fifo = os_malloc(sizeof(struct kfifo));
if (!fifo)
return NULLPTR;
fifo->buffer = buffer;
fifo->size = size;
fifo->in = 0;
fifo->out = 0;
fifo->mask = fifo->size - 1;
return fifo;
}
/**
* kfifo_alloc - allocates a new FIFO and its internal buffer
* @size: the size of the internal buffer to be allocated.
* @gfp_mask: get_free_pages mask, passed to ke_malloc()
* @lock: the lock to be used to protect the fifo buffer
*
* The size will be rounded-up to a power of 2.
*/
__INLINE struct kfifo *kfifo_alloc(unsigned int size)
{
unsigned char *buffer;
struct kfifo *ret;
buffer = os_malloc(size);
if (!buffer)
return 0;
ret = kfifo_init(buffer, size);
if (!(ret))
os_free(buffer);
return ret;
}
/**
* kfifo_free - frees the FIFO
* @fifo: the fifo to be freed.
*/
__INLINE void kfifo_free(struct kfifo *fifo)
{
os_free(fifo->buffer);
fifo->buffer = 0;
os_free(fifo);
}
/**
* __kfifo_put - puts some data into the FIFO, no locking version
* @fifo: the fifo to be used.
* @buffer: the data to be added.
* @len: the length of the data to be added.
*
* This function copies at most 'len' bytes from the 'buffer' into
* the FIFO depending on the free space, and returns the number of
* bytes copied.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these functions.
*/
__INLINE unsigned int kfifo_put(struct kfifo *fifo,
unsigned char *buffer, unsigned int len)
{
unsigned int l;
GLOBAL_INT_DECLARATION();
GLOBAL_INT_DISABLE();
len = min(len, fifo->size - fifo->in + fifo->out);
/* first put the data starting from fifo->in to buffer end */
l = min(len, fifo->size - (fifo->in & (fifo->size - 1)));
os_memcpy(fifo->buffer + (fifo->in & (fifo->size - 1)), buffer, l);
/* then put the rest (if any) at the beginning of the buffer */
os_memcpy(fifo->buffer, buffer + l, len - l);
fifo->in += len;
GLOBAL_INT_RESTORE();
return len;
}
/**
* __kfifo_get - gets some data from the FIFO, no locking version
* @fifo: the fifo to be used.
* @buffer: where the data must be copied.
* @len: the size of the destination buffer.
*
* This function copies at most 'len' bytes from the FIFO into the
* 'buffer' and returns the number of copied bytes.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these functions.
*/
__INLINE unsigned int kfifo_get(struct kfifo *fifo,
unsigned char *buffer, unsigned int len)
{
unsigned int l;
GLOBAL_INT_DECLARATION();
GLOBAL_INT_DISABLE();
len = min(len, fifo->in - fifo->out);
/* first get the data from fifo->out until the end of the buffer */
l = min(len, fifo->size - (fifo->out & (fifo->size - 1)));
os_memcpy(buffer, fifo->buffer + (fifo->out & (fifo->size - 1)), l);
/* then get the rest (if any) from the beginning of the buffer */
os_memcpy(buffer + l, fifo->buffer, len - l);
fifo->out += len;
GLOBAL_INT_RESTORE();
return len;
}
__INLINE unsigned int kfifo_data_size(struct kfifo *fifo)
{
return (fifo->in - fifo->out);
}
__INLINE unsigned int kfifo_unused(struct kfifo *fifo)
{
return (fifo->mask + 1) - (fifo->in - fifo->out);
}
__INLINE void kfifo_copy_out(struct kfifo *fifo, void *dst,
unsigned int len, unsigned int off)
{
unsigned int size = fifo->mask + 1;
unsigned int l;
off &= fifo->mask;
l = min(len, size - off);
os_memcpy(dst, (void *)(fifo->buffer + off), l);
os_memcpy((void *)((unsigned int)dst + l), (void *)fifo->buffer, len - l);
/*
* make sure that the data is copied before
* incrementing the fifo->out index counter
*/
}
__INLINE unsigned int kfifo_out_peek(struct kfifo *fifo,
unsigned char *buffer, unsigned int len)
{
unsigned int l;
l = fifo->in - fifo->out;
if (len > l)
len = l;
kfifo_copy_out(fifo, buffer, len, fifo->out);
return len;
}
#endif // _FIFO_H_
// eof

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#ifndef _GENERIC_H_
#define _GENERIC_H_
#include <stdbool.h>
#include "include.h"
typedef void (*FUNCPTR)(void);
typedef void (*FUNC_1PARAM_PTR)(void *ctxt);
typedef void (*FUNC_2PARAM_PTR)(void *arg, uint8_t vif_idx);
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
#define MIN(x, y) (((x) < (y)) ? (x) : (y))
#define max(x, y) (((x) > (y)) ? (x) : (y))
#define min(x, y) (((x) < (y)) ? (x) : (y))
extern void bk_printf(const char *fmt, ...);
#define as_printf (bk_printf("%s:%d\r\n",__FUNCTION__,__LINE__))
#if (0 == CFG_RELEASE_FIRMWARE)
#define ASSERT_EQ(a, b) \
{ \
if ((a) != (b)) \
{ \
bk_printf("%s:%d %d!=%d\r\n",__FUNCTION__,__LINE__, (a), (b)); \
while(1); \
} \
}
#define ASSERT_NE(a, b) \
{ \
if ((a) == (b)) \
{ \
bk_printf("%s:%d %d==%d\r\n",__FUNCTION__,__LINE__, (a), (b)); \
while(1); \
} \
}
#define ASSERT_GT(a, b) \
{ \
if ((a) <= (b)) \
{ \
bk_printf("%s:%d %d<=%d\r\n",__FUNCTION__,__LINE__, (a), (b)); \
while(1); \
} \
}
#define ASSERT_GE(a, b) \
{ \
if ((a) < (b)) \
{ \
bk_printf("%s:%d %d<%d\r\n",__FUNCTION__,__LINE__, (a), (b)); \
while(1); \
} \
}
#define ASSERT_LT(a, b) \
{ \
if ((a) >= (b)) \
{ \
bk_printf("%s:%d %d>=%d\r\n",__FUNCTION__,__LINE__, (a), (b)); \
while(1); \
} \
}
#define ASSERT_LE(a, b) \
{ \
if ((a) > (b)) \
{ \
bk_printf("%s:%d %d>%d\r\n",__FUNCTION__,__LINE__, (a), (b)); \
while(1); \
} \
}
#define ASSERT(exp) \
{ \
if ( !(exp) ) \
{ \
as_printf; \
while(1); \
} \
}
#else
#define ASSERT_EQ(exp)
#define ASSERT_NE(exp)
#define ASSERT_GT(exp)
#define ASSERT_GE(exp)
#define ASSERT_LT(exp)
#define ASSERT_LE(exp)
#define ASSERT(exp)
#endif
#define BUG_ON(exp) ASSERT(!(exp))
#ifndef NULL
#define NULL (0L)
#endif
#ifndef NULLPTR
#define NULLPTR ((void *)0)
#endif
#define BIT(i) (1UL << (i))
static inline __uint16_t __bswap16(__uint16_t _x)
{
return ((__uint16_t)((_x >> 8) | ((_x << 8) & 0xff00)));
}
static inline __uint32_t __bswap32(__uint32_t _x)
{
return ((__uint32_t)((_x >> 24) | ((_x >> 8) & 0xff00) |
((_x << 8) & 0xff0000) | ((_x << 24) & 0xff000000)));
}
static inline __uint64_t __bswap64(__uint64_t _x)
{
return ((__uint64_t)((_x >> 56) | ((_x >> 40) & 0xff00) |
((_x >> 24) & 0xff0000) | ((_x >> 8) & 0xff000000) |
((_x << 8) & ((__uint64_t)0xff << 32)) |
((_x << 24) & ((__uint64_t)0xff << 40)) |
((_x << 40) & ((__uint64_t)0xff << 48)) | ((_x << 56))));
}
#define __swab16(x) __bswap16((__u8 *)&(x))
#define __swab32(x) __bswap32((__u8 *)&(x))
#define cpu_to_le16(x) (x)
#define cpu_to_le32(x) (x)
#define __cpu_to_be32(x) __swab32((x))
#define __be32_to_cpu(x) __swab32((x))
#define __cpu_to_be16(x) __swab16((x))
#define __be16_to_cpu(x) __swab16((x))
#define __htonl(_x) __bswap32(_x)
#define __htons(_x) __bswap16(_x)
#define __ntohl(_x) __bswap32(_x)
#define __ntohs(_x) __bswap16(_x)
#define ___htonl(x) __cpu_to_be32(x)
#define ___htons(x) __cpu_to_be16(x)
#define ___ntohl(x) __be32_to_cpu(x)
#define ___ntohs(x) __be16_to_cpu(x)
#if (!CFG_SUPPORT_RTT)
#define htons(x) __htons(x)
#define ntohs(x) __ntohs(x)
#define htonl(x) __htonl(x)
#define ntohl(x) __ntohl(x)
#endif
#endif // _GENERIC_H_

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#ifndef _INCLUDES_H_
#define _INCLUDES_H_
#include "sys_config.h"
#include "typedef.h"
#include "generic.h"
#include "compiler.h"
#include "arch.h"
#if CFG_ENABLE_DEMO_TEST
#include "demos_config.h"
#endif
#endif // _INCLUDES_H_
// eof

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#ifndef _TYPEDEF_H_
#define _TYPEDEF_H_
#include <stdint.h>
typedef unsigned char uint8; /* unsigned 8 bit quantity */
typedef signed char int8; /* signed 8 bit quantity */
typedef unsigned short uint16; /* unsigned 16 bit quantity */
typedef signed short int16; /* signed 16 bit quantity */
typedef unsigned int uint32; /* unsigned 32 bit quantity */
typedef signed int int32; /* signed 32 bit quantity */
typedef unsigned long long uint64; /* unsigned 32 bit quantity */
typedef signed long long int64; /* signed 32 bit quantity */
typedef unsigned char UINT8; /* Unsigned 8 bit quantity */
typedef signed char INT8; /* Signed 8 bit quantity */
typedef unsigned short UINT16; /* Unsigned 16 bit quantity */
typedef signed short INT16; /* Signed 16 bit quantity */
typedef unsigned int UINT32; /* Unsigned 32 bit quantity */
typedef signed int INT32; /* Signed 32 bit quantity */
typedef unsigned long long UINT64; /* Unsigned 32 bit quantity */
typedef signed long long INT64; /* Signed 32 bit quantity */
typedef float FP32; /* Single precision floating point */
typedef double FP64; /* Double precision floating point */
typedef unsigned int size_t;
typedef unsigned char BOOLEAN;
typedef unsigned char BOOL;
//typedef unsigned char bool;
#define LPVOID void *
#define VOID void
typedef volatile signed long VS32;
typedef volatile signed short VS16;
typedef volatile signed char VS8;
typedef volatile signed long const VSC32;
typedef volatile signed short const VSC16;
typedef volatile signed char const VSC8;
typedef volatile unsigned long VU32;
typedef volatile unsigned short VU16;
typedef volatile unsigned char VU8;
typedef volatile unsigned long const VUC32;
typedef volatile unsigned short const VUC16;
typedef volatile unsigned char const VUC8;
#ifndef HAVE_UTYPES
typedef unsigned char u8;
typedef signed char s8;
typedef unsigned short u16;
typedef signed short s16;
typedef unsigned int u32;
typedef signed int s32;
#endif /* HAVE_UTYPES */
typedef unsigned long long u64;
typedef long long s64;
typedef unsigned int __u32;
typedef int __s32;
typedef unsigned short __u16;
typedef signed short __s16;
typedef unsigned char __u8;
#endif // _TYPEDEF_H_
// eof

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Living_SDK/platform/mcu/bk7231u/beken/driver/ble/ble_lib.a Normal file
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/**
****************************************************************************************
*
* @file gnuarm/compiler.h
*
* @brief Definitions of compiler specific directives.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _COMPILER_H_
#define _COMPILER_H_
/// define the force inlining attribute for this compiler gcc: __attribute__((always_inline))
#define __INLINE static inline
/// function returns struct in registers (4 words max, var with gnuarm)
#define __VIR __value_in_regs
/// function has no side effect and return depends only on arguments
#define __PURE __pure
/// Align instantiated lvalue or struct member on 4 bytes
#define __ALIGN4 __attribute__((aligned(4)))
/// Pack a structure field
#define __PACKED16 __attribute__( ( packed ) )
#define __PACKED __attribute__( ( packed ) )
#endif // _COMPILER_H_

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#ifndef __DD_H_
#define __DD_H_
typedef struct _dd_init_s_
{
char *dev_name;
void (*init)(void);
void (*exit)(void);
} DD_INIT_S;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void g_dd_init(void);
extern void g_dd_exit(void);
#endif // __DD_H_

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#ifndef _DRV_MODEL_H_
#define _DRV_MODEL_H_
#define DD_MAX_DEV (8)
#define DD_MAX_SDEV (16)
#define DD_MAX_DEV_MASK (DD_MAX_DEV - 1)
#define DD_MAX_NAME_LEN (16)
typedef enum _dd_state_
{
DD_STATE_NODEVICE = 0, // find no such device when you open
DD_STATE_CLOSED, //
DD_STATE_OPENED, //
DD_STATE_BREAK, //
DD_STATE_SUCCESS //
} DD_STATE;
typedef struct _drv_dev_
{
char *name;
UINT32 use_cnt;
DD_STATE state;
DD_OPERATIONS *op;
DD_OPEN_METHOD method;
void *private;
} DRV_DEV_S, *DRV_DEV_PTR;
typedef struct _drv_sdev_
{
char *name;
UINT32 use_cnt;
DD_STATE state;
SDD_OPERATIONS *op;
DD_OPEN_METHOD method;
void *private;
} DRV_SDEV_S, *DRV_SDEV_PTR;
#endif // _DRV_MODEL_H_

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Living_SDK/platform/mcu/bk7231u/beken/driver/common/reg/_reg_agc.h Normal file
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#ifndef __REG_AGC_H_
#define __REG_AGC_H_
#define REG_AGC_SIZE 172
#define REG_AGC_BASE_ADDR 0x01000000
#endif // __REG_AGC_H_

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Living_SDK/platform/mcu/bk7231u/beken/driver/common/reg/_reg_dma.h Normal file
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#ifndef __REG_DMA_H_
#define __REG_DMA_H_
#define REG_DMA_SIZE 196
#define REG_DMA_BASE_ADDR 0x10A00000
#endif // __REG_DMA_H_

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#ifndef __REG_INTC_H_
#define __REG_INTC_H_
#define REG_INTC_SIZE 68
#define REG_INTC_BASE_ADDR 0x10910000
#endif // __REG_INTC_H_

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Living_SDK/platform/mcu/bk7231u/beken/driver/common/reg/_reg_la.h Normal file
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#ifndef __REG_LA_H_
#define __REG_LA_H_
#define REG_LA_SIZE 64
#define REG_LA_OFFSET 0x00800000
#define REG_LA_BASE_ADDR 0x10E00000
#endif // __REG_LA_H_

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Living_SDK/platform/mcu/bk7231u/beken/driver/common/reg/_reg_mac_core.h Normal file
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#ifndef __REG_MAC_CORE_H_
#define __REG_MAC_CORE_H_
#define REG_MAC_CORE_SIZE 1376
#define REG_MAC_CORE_BASE_ADDR 0xC0000000
#endif // __REG_MAC_CORE_H_

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#ifndef __REG_MAC_PL_H_
#define __REG_MAC_PL_H_
#define REG_MAC_PL_SIZE 1404
#define REG_MAC_PL_BASE_ADDR 0xC0008000
#endif // __REG_MAC_PL_H_

8
Living_SDK/platform/mcu/bk7231u/beken/driver/common/reg/_reg_mdm_cfg.h Normal file
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#ifndef __REG_MDM_CFG_H_
#define __REG_MDM_CFG_H_
#define REG_MDM_CFG_SIZE 152
#define REG_MDM_CFG_BASE_ADDR 0x01000000
#endif // __REG_MDM_CFG_H_
// eof

10
Living_SDK/platform/mcu/bk7231u/beken/driver/common/reg/_reg_mdm_stat.h Normal file
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#ifndef __REG_MDM_STAT_H_
#define __REG_MDM_STAT_H_
#define REG_MDM_STAT_SIZE 108
#define REG_MDM_STAT_BASE_ADDR 0x01000000
#endif // __REG_MDM_STAT_H_

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Living_SDK/platform/mcu/bk7231u/beken/driver/common/reg/_reg_rc.h Normal file
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#ifndef __REG_RC_H_
#define __REG_RC_H_
#define REG_RC_SIZE 428
#define REG_RC_BASE_ADDR 0x01050000
#endif // __REG_RC_H_

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/**
****************************************************************************************
*
* @file reg_access.h
*
* @brief File implementing the basic primitives for register accesses
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef REG_ACCESS_H_
#define REG_ACCESS_H_
/**
****************************************************************************************
* @defgroup REG REG
* @ingroup PLATFORM_DRIVERS
*
* @brief Basic primitives for register access.
*
* @{
****************************************************************************************
*/
/*
* MACROS
****************************************************************************************
*/
/// Macro to read a platform register
#define REG_PL_RD(addr) (*(volatile uint32_t *)(addr))
/// Macro to write a platform register
#define REG_PL_WR(addr, value) (*(volatile uint32_t *)(addr)) = (value)
/// @} REG
#endif // REG_ACCESS_H_

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#ifndef _REG_DMA_H_
#define _REG_DMA_H_
#include "co_int.h"
#include "_reg_dma.h"
#include "compiler.h"
#include "arch.h"
#include "reg_access.h"
#define REG_DMA_COUNT 49
#define REG_DMA_DECODING_MASK 0x000000FF
/**
* @brief CH_LLI_ROOT register definition
*/
__INLINE uint32_t dma_ch_lli_root_get(int reg_idx)
{
return 0;
}
__INLINE void dma_ch_lli_root_set(int reg_idx, uint32_t value)
{
}
/**
* @brief DMA_STATUS register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 29 DOWN_STREAM_BSY 0
* 28 UP_STREAM_BSY 0
* 27 ARB_Q3_VALID 0
* 26 ARB_Q2_VALID 0
* 25 ARB_Q1_VALID 0
* 24 ARB_Q0_VALID 0
* 23:20 REQUEST_STATE 0x0
* 19 CH3_STOPPED 0
* 18 CH2_STOPPED 0
* 17 CH1_STOPPED 0
* 16 CH0_STOPPED 0
* 15:00 OFT_FREE 0x0
* </pre>
*/
#define DMA_DMA_STATUS_ADDR 0x10A00010
#define DMA_DMA_STATUS_OFFSET 0x00000010
#define DMA_DMA_STATUS_INDEX 0x00000004
#define DMA_DMA_STATUS_RESET 0x00000000
__INLINE uint32_t dma_dma_status_get(void)
{
return 0;
}
// field definitions
#define DMA_DOWN_STREAM_BSY_BIT ((uint32_t)0x20000000)
#define DMA_DOWN_STREAM_BSY_POS 29
#define DMA_UP_STREAM_BSY_BIT ((uint32_t)0x10000000)
#define DMA_UP_STREAM_BSY_POS 28
#define DMA_ARB_Q3_VALID_BIT ((uint32_t)0x08000000)
#define DMA_ARB_Q3_VALID_POS 27
#define DMA_ARB_Q2_VALID_BIT ((uint32_t)0x04000000)
#define DMA_ARB_Q2_VALID_POS 26
#define DMA_ARB_Q1_VALID_BIT ((uint32_t)0x02000000)
#define DMA_ARB_Q1_VALID_POS 25
#define DMA_ARB_Q0_VALID_BIT ((uint32_t)0x01000000)
#define DMA_ARB_Q0_VALID_POS 24
#define DMA_REQUEST_STATE_MASK ((uint32_t)0x00F00000)
#define DMA_REQUEST_STATE_LSB 20
#define DMA_REQUEST_STATE_WIDTH ((uint32_t)0x00000004)
#define DMA_CH3_STOPPED_BIT ((uint32_t)0x00080000)
#define DMA_CH3_STOPPED_POS 19
#define DMA_CH2_STOPPED_BIT ((uint32_t)0x00040000)
#define DMA_CH2_STOPPED_POS 18
#define DMA_CH1_STOPPED_BIT ((uint32_t)0x00020000)
#define DMA_CH1_STOPPED_POS 17
#define DMA_CH0_STOPPED_BIT ((uint32_t)0x00010000)
#define DMA_CH0_STOPPED_POS 16
#define DMA_OFT_FREE_MASK ((uint32_t)0x0000FFFF)
#define DMA_OFT_FREE_LSB 0
#define DMA_OFT_FREE_WIDTH ((uint32_t)0x00000010)
#define DMA_DOWN_STREAM_BSY_RST 0x0
#define DMA_UP_STREAM_BSY_RST 0x0
#define DMA_ARB_Q3_VALID_RST 0x0
#define DMA_ARB_Q2_VALID_RST 0x0
#define DMA_ARB_Q1_VALID_RST 0x0
#define DMA_ARB_Q0_VALID_RST 0x0
#define DMA_REQUEST_STATE_RST 0x0
#define DMA_CH3_STOPPED_RST 0x0
#define DMA_CH2_STOPPED_RST 0x0
#define DMA_CH1_STOPPED_RST 0x0
#define DMA_CH0_STOPPED_RST 0x0
#define DMA_OFT_FREE_RST 0x0
__INLINE void dma_dma_status_unpack(uint8_t *downstreambsy, uint8_t *upstreambsy, uint8_t *arbq3valid, uint8_t *arbq2valid, uint8_t *arbq1valid, uint8_t *arbq0valid, uint8_t *requeststate, uint8_t *ch3stopped, uint8_t *ch2stopped, uint8_t *ch1stopped, uint8_t *ch0stopped, uint16_t *oftfree)
{
}
__INLINE uint8_t dma_dma_status_down_stream_bsy_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_up_stream_bsy_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q3_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q2_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q1_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q0_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_request_state_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch3_stopped_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch2_stopped_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch1_stopped_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch0_stopped_getf(void)
{
return 0;
}
/**
* @brief INT_RAWSTATUS register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_RAWSTATUS_ADDR 0x10A00014
#define DMA_INT_RAWSTATUS_OFFSET 0x00000014
#define DMA_INT_RAWSTATUS_INDEX 0x00000005
#define DMA_INT_RAWSTATUS_RESET 0x00000000
__INLINE uint32_t dma_int_rawstatus_get(void)
{
return 0;
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_rawstatus_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_rawstatus_ch3_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_ch2_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_ch1_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_ch0_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_error_getf(void)
{
return 0;
}
__INLINE uint16_t dma_int_rawstatus_lli_irq_getf(void)
{
return 0;
}
/**
* @brief INT_UNMASK_SET register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_UNMASK_SET_ADDR 0x10A00018
#define DMA_INT_UNMASK_SET_OFFSET 0x00000018
#define DMA_INT_UNMASK_SET_INDEX 0x00000006
#define DMA_INT_UNMASK_SET_RESET 0x00000000
__INLINE uint32_t dma_int_unmask_get(void)
{
return 0;
}
__INLINE void dma_int_unmask_set(uint32_t value)
{
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_unmask_set_pack(uint8_t ch3eot, uint8_t ch2eot, uint8_t ch1eot, uint8_t ch0eot, uint8_t error, uint16_t lliirq)
{
}
__INLINE void dma_int_unmask_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_unmask_ch3_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch3_eot_setf(uint8_t ch3eot)
{
}
__INLINE uint8_t dma_int_unmask_ch2_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch2_eot_setf(uint8_t ch2eot)
{
}
__INLINE uint8_t dma_int_unmask_ch1_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch1_eot_setf(uint8_t ch1eot)
{
}
__INLINE uint8_t dma_int_unmask_ch0_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch0_eot_setf(uint8_t ch0eot)
{
}
__INLINE uint8_t dma_int_unmask_error_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_error_setf(uint8_t error)
{
}
__INLINE uint16_t dma_int_unmask_lli_irq_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_lli_irq_setf(uint16_t lliirq)
{
}
/**
* @brief INT_UNMASK_CLEAR register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_UNMASK_CLEAR_ADDR 0x10A0001C
#define DMA_INT_UNMASK_CLEAR_OFFSET 0x0000001C
#define DMA_INT_UNMASK_CLEAR_INDEX 0x00000007
#define DMA_INT_UNMASK_CLEAR_RESET 0x00000000
__INLINE void dma_int_unmask_clear(uint32_t value)
{
}
// fields defined in symmetrical set/clear register
__INLINE void dma_int_unmask_clear_pack(uint8_t ch3eot, uint8_t ch2eot, uint8_t ch1eot, uint8_t ch0eot, uint8_t error, uint16_t lliirq)
{
}
__INLINE void dma_int_unmask_ch3_eot_clearf(uint8_t ch3eot)
{
}
__INLINE void dma_int_unmask_ch2_eot_clearf(uint8_t ch2eot)
{
}
__INLINE void dma_int_unmask_ch1_eot_clearf(uint8_t ch1eot)
{
}
__INLINE void dma_int_unmask_ch0_eot_clearf(uint8_t ch0eot)
{
}
__INLINE void dma_int_unmask_error_clearf(uint8_t error)
{
}
__INLINE void dma_int_unmask_lli_irq_clearf(uint16_t lliirq)
{
}
/**
* @brief INT_ACK register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_ACK_ADDR 0x10A00020
#define DMA_INT_ACK_OFFSET 0x00000020
#define DMA_INT_ACK_INDEX 0x00000008
#define DMA_INT_ACK_RESET 0x00000000
__INLINE uint32_t dma_int_ack_get(void)
{
return 0;
}
__INLINE void dma_int_ack_clear(uint32_t value)
{
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_ack_pack(uint8_t ch3eot, uint8_t ch2eot, uint8_t ch1eot, uint8_t ch0eot, uint8_t error, uint16_t lliirq)
{
}
__INLINE void dma_int_ack_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_ack_ch3_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch3_eot_clearf(uint8_t ch3eot)
{
}
__INLINE uint8_t dma_int_ack_ch2_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch2_eot_clearf(uint8_t ch2eot)
{
}
__INLINE uint8_t dma_int_ack_ch1_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch1_eot_clearf(uint8_t ch1eot)
{
}
__INLINE uint8_t dma_int_ack_ch0_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch0_eot_clearf(uint8_t ch0eot)
{
}
__INLINE uint8_t dma_int_ack_error_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_error_clearf(uint8_t error)
{
}
__INLINE uint16_t dma_int_ack_lli_irq_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_lli_irq_clearf(uint16_t lliirq)
{
}
/**
* @brief INT_STATUS register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_STATUS_ADDR 0x10A00024
#define DMA_INT_STATUS_OFFSET 0x00000024
#define DMA_INT_STATUS_INDEX 0x00000009
#define DMA_INT_STATUS_RESET 0x00000000
__INLINE uint32_t dma_int_status_get(void)
{
return REG_PL_RD(DMA_INT_STATUS_ADDR);
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_status_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_status_ch3_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_ch2_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_ch1_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_ch0_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_error_getf(void)
{
return 0;
}
__INLINE uint16_t dma_int_status_lli_irq_getf(void)
{
return 0;
}
/**
* @brief CHANNEL_PRIORITY register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 16 INTERLEAVE_ENABLED 0
* 13:12 CH3_PRIORITY 0x0
* 09:08 CH2_PRIORITY 0x0
* 05:04 CH1_PRIORITY 0x0
* 01:00 CH0_PRIORITY 0x0
* </pre>
*/
#define DMA_CHANNEL_PRIORITY_ADDR 0x10A00034
#define DMA_CHANNEL_PRIORITY_OFFSET 0x00000034
#define DMA_CHANNEL_PRIORITY_INDEX 0x0000000D
#define DMA_CHANNEL_PRIORITY_RESET 0x00000000
__INLINE uint32_t dma_channel_priority_get(void)
{
return 0;
}
__INLINE void dma_channel_priority_set(uint32_t value)
{
REG_PL_WR(DMA_CHANNEL_PRIORITY_ADDR, value);
}
// field definitions
#define DMA_INTERLEAVE_ENABLED_BIT ((uint32_t)0x00010000)
#define DMA_INTERLEAVE_ENABLED_POS 16
#define DMA_CH3_PRIORITY_MASK ((uint32_t)0x00003000)
#define DMA_CH3_PRIORITY_LSB 12
#define DMA_CH3_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_CH2_PRIORITY_MASK ((uint32_t)0x00000300)
#define DMA_CH2_PRIORITY_LSB 8
#define DMA_CH2_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_CH1_PRIORITY_MASK ((uint32_t)0x00000030)
#define DMA_CH1_PRIORITY_LSB 4
#define DMA_CH1_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_CH0_PRIORITY_MASK ((uint32_t)0x00000003)
#define DMA_CH0_PRIORITY_LSB 0
#define DMA_CH0_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_INTERLEAVE_ENABLED_RST 0x0
#define DMA_CH3_PRIORITY_RST 0x0
#define DMA_CH2_PRIORITY_RST 0x0
#define DMA_CH1_PRIORITY_RST 0x0
#define DMA_CH0_PRIORITY_RST 0x0
__INLINE void dma_channel_priority_pack(uint8_t interleaveenabled, uint8_t ch3priority, uint8_t ch2priority, uint8_t ch1priority, uint8_t ch0priority)
{
}
__INLINE void dma_channel_priority_unpack(uint8_t *interleaveenabled, uint8_t *ch3priority, uint8_t *ch2priority, uint8_t *ch1priority, uint8_t *ch0priority)
{
}
__INLINE uint8_t dma_channel_priority_interleave_enabled_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_interleave_enabled_setf(uint8_t interleaveenabled)
{
}
__INLINE uint8_t dma_channel_priority_ch3_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch3_priority_setf(uint8_t ch3priority)
{
}
__INLINE uint8_t dma_channel_priority_ch2_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch2_priority_setf(uint8_t ch2priority)
{
}
__INLINE uint8_t dma_channel_priority_ch1_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch1_priority_setf(uint8_t ch1priority)
{
}
__INLINE uint8_t dma_channel_priority_ch0_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch0_priority_setf(uint8_t ch0priority)
{
}
/**
* @brief CHANNEL_MUTEX_SET register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 03 CH3_MUTEX 0
* 02 CH2_MUTEX 0
* 01 CH1_MUTEX 0
* 00 CH0_MUTEX 0
* </pre>
*/
#define DMA_CHANNEL_MUTEX_SET_ADDR 0x10A00038
#define DMA_CHANNEL_MUTEX_SET_OFFSET 0x00000038
#define DMA_CHANNEL_MUTEX_SET_INDEX 0x0000000E
#define DMA_CHANNEL_MUTEX_SET_RESET 0x00000000
__INLINE uint32_t dma_channel_mutex_get(void)
{
return 0;
}
__INLINE void dma_channel_mutex_set(uint32_t value)
{
}
// field definitions
#define DMA_CH3_MUTEX_BIT ((uint32_t)0x00000008)
#define DMA_CH3_MUTEX_POS 3
#define DMA_CH2_MUTEX_BIT ((uint32_t)0x00000004)
#define DMA_CH2_MUTEX_POS 2
#define DMA_CH1_MUTEX_BIT ((uint32_t)0x00000002)
#define DMA_CH1_MUTEX_POS 1
#define DMA_CH0_MUTEX_BIT ((uint32_t)0x00000001)
#define DMA_CH0_MUTEX_POS 0
#define DMA_CH3_MUTEX_RST 0x0
#define DMA_CH2_MUTEX_RST 0x0
#define DMA_CH1_MUTEX_RST 0x0
#define DMA_CH0_MUTEX_RST 0x0
__INLINE void dma_channel_mutex_set_pack(uint8_t ch3mutex, uint8_t ch2mutex, uint8_t ch1mutex, uint8_t ch0mutex)
{
}
__INLINE void dma_channel_mutex_unpack(uint8_t *ch3mutex, uint8_t *ch2mutex, uint8_t *ch1mutex, uint8_t *ch0mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch3_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch3_mutex_setf(uint8_t ch3mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch2_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch2_mutex_setf(uint8_t ch2mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch1_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch1_mutex_setf(uint8_t ch1mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch0_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch0_mutex_setf(uint8_t ch0mutex)
{
}
/**
* @brief CHANNEL_MUTEX_CLEAR register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 03 CH3_MUTEX 0
* 02 CH2_MUTEX 0
* 01 CH1_MUTEX 0
* 00 CH0_MUTEX 0
* </pre>
*/
#define DMA_CHANNEL_MUTEX_CLEAR_ADDR 0x10A0003C
#define DMA_CHANNEL_MUTEX_CLEAR_OFFSET 0x0000003C
#define DMA_CHANNEL_MUTEX_CLEAR_INDEX 0x0000000F
#define DMA_CHANNEL_MUTEX_CLEAR_RESET 0x00000000
__INLINE void dma_channel_mutex_clear(uint32_t value)
{
}
// fields defined in symmetrical set/clear register
__INLINE void dma_channel_mutex_clear_pack(uint8_t ch3mutex, uint8_t ch2mutex, uint8_t ch1mutex, uint8_t ch0mutex)
{
}
__INLINE void dma_channel_mutex_ch3_mutex_clearf(uint8_t ch3mutex)
{
}
__INLINE void dma_channel_mutex_ch2_mutex_clearf(uint8_t ch2mutex)
{
}
__INLINE void dma_channel_mutex_ch1_mutex_clearf(uint8_t ch1mutex)
{
}
__INLINE void dma_channel_mutex_ch0_mutex_clearf(uint8_t ch0mutex)
{
}
// field definitions
#define DMA_COUNTER_MASK ((uint32_t)0x0000FFFF)
#define DMA_COUNTER_LSB 0
#define DMA_COUNTER_WIDTH ((uint32_t)0x00000010)
#define DMA_COUNTER_RST 0x0
/**
* @brief DUMMY register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 00 DUMMY 0
* </pre>
*/
#define DMA_DUMMY_ADDR 0x10A000C0
#define DMA_DUMMY_OFFSET 0x000000C0
#define DMA_DUMMY_INDEX 0x00000030
#define DMA_DUMMY_RESET 0x00000000
__INLINE uint32_t dma_dummy_get(void)
{
return 0;
}
__INLINE void dma_dummy_set(uint32_t value)
{
}
// field definitions
#define DMA_DUMMY_BIT ((uint32_t)0x00000001)
#define DMA_DUMMY_POS 0
#define DMA_DUMMY_RST 0x0
__INLINE uint8_t dma_dummy_getf(void)
{
return 0;
}
__INLINE void dma_dummy_setf(uint8_t dummy)
{
}
#endif // _REG_DMA_H_

238
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@ -0,0 +1,238 @@
/**
* @file reg_intc.h
* @brief Definitions of the INTC HW block registers and register access functions.
*
* @defgroup REG_INTC REG_INTC
* @ingroup REG
* @{
*
* @brief Definitions of the INTC HW block registers and register access functions.
*/
#ifndef _REG_INTC_H_
#define _REG_INTC_H_
#include "co_int.h"
#include "_reg_intc.h"
#include "compiler.h"
#include "arch.h"
#include "reg_access.h"
/** @brief Number of registers in the REG_INTC peripheral.
*/
#define REG_INTC_COUNT 17
/** @brief Decoding mask of the REG_INTC peripheral registers from the CPU point of view.
*/
#define REG_INTC_DECODING_MASK 0x0000007F
/**
* @name IRQ_STATUS register definitions
*
* @{
*/
/// Address of the IRQ_STATUS register
#define INTC_IRQ_STATUS_ADDR 0x10910000
/// Offset of the IRQ_STATUS register from the base address
#define INTC_IRQ_STATUS_OFFSET 0x00000000
/// Index of the IRQ_STATUS register
#define INTC_IRQ_STATUS_INDEX 0x00000000
/// Reset value of the IRQ_STATUS register
#define INTC_IRQ_STATUS_RESET 0x00000000
/// Number of elements of the IRQ_STATUS register array
#define INTC_IRQ_STATUS_COUNT 2
/**
* @brief Returns the current value of the IRQ_STATUS register.
* The IRQ_STATUS register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_STATUS register.
*/
__INLINE uint32_t intc_irq_status_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_STATUS_ADDR + reg_idx * 4);
}
/// @}
/**
* @name IRQ_RAW_STATUS register definitions
*
* @{
*/
/// Address of the IRQ_RAW_STATUS register
#define INTC_IRQ_RAW_STATUS_ADDR 0x10910008
/// Offset of the IRQ_RAW_STATUS register from the base address
#define INTC_IRQ_RAW_STATUS_OFFSET 0x00000008
/// Index of the IRQ_RAW_STATUS register
#define INTC_IRQ_RAW_STATUS_INDEX 0x00000002
/// Reset value of the IRQ_RAW_STATUS register
#define INTC_IRQ_RAW_STATUS_RESET 0x00000000
/// Number of elements of the IRQ_RAW_STATUS register array
#define INTC_IRQ_RAW_STATUS_COUNT 2
/**
* @brief Returns the current value of the IRQ_RAW_STATUS register.
* The IRQ_RAW_STATUS register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_RAW_STATUS register.
*/
__INLINE uint32_t intc_irq_raw_status_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_RAW_STATUS_ADDR + reg_idx * 4);
}
/// @}
/**
* @name IRQ_UNMASK_SET register definitions
*
* @{
*/
/// Address of the IRQ_UNMASK_SET register
#define INTC_IRQ_UNMASK_SET_ADDR 0x10910010
/// Offset of the IRQ_UNMASK_SET register from the base address
#define INTC_IRQ_UNMASK_SET_OFFSET 0x00000010
/// Index of the IRQ_UNMASK_SET register
#define INTC_IRQ_UNMASK_SET_INDEX 0x00000004
/// Reset value of the IRQ_UNMASK_SET register
#define INTC_IRQ_UNMASK_SET_RESET 0x00000000
/// Number of elements of the IRQ_UNMASK_SET register array
#define INTC_IRQ_UNMASK_SET_COUNT 2
/**
* @brief Returns the current value of the IRQ_UNMASK_SET register.
* The IRQ_UNMASK_SET register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_UNMASK_SET register.
*/
__INLINE uint32_t intc_irq_unmask_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_UNMASK_SET_ADDR + reg_idx * 4);
}
/**
* @brief Sets the IRQ_UNMASK_SET register to a value.
* The IRQ_UNMASK_SET register will be written.
* @param[in] reg_idx Index of the register
* @param value - The value to write.
*/
__INLINE void intc_irq_unmask_set(int reg_idx, uint32_t value)
{
ASSERT_ERR(reg_idx <= 1);
REG_PL_WR(INTC_IRQ_UNMASK_SET_ADDR + reg_idx * 4, value);
}
/// @}
/**
* @name IRQ_UNMASK_CLEAR register definitions
*
* @{
*/
/// Address of the IRQ_UNMASK_CLEAR register
#define INTC_IRQ_UNMASK_CLEAR_ADDR 0x10910018
/// Offset of the IRQ_UNMASK_CLEAR register from the base address
#define INTC_IRQ_UNMASK_CLEAR_OFFSET 0x00000018
/// Index of the IRQ_UNMASK_CLEAR register
#define INTC_IRQ_UNMASK_CLEAR_INDEX 0x00000006
/// Reset value of the IRQ_UNMASK_CLEAR register
#define INTC_IRQ_UNMASK_CLEAR_RESET 0x00000000
/// Number of elements of the IRQ_UNMASK_CLEAR register array
#define INTC_IRQ_UNMASK_CLEAR_COUNT 2
/**
* @brief Sets the IRQ_UNMASK_CLEAR register to a value.
* The IRQ_UNMASK_CLEAR register will be written.
* @param[in] reg_idx Index of the register
* @param value - The value to write.
*/
__INLINE void intc_irq_unmask_clear(int reg_idx, uint32_t value)
{
ASSERT_ERR(reg_idx <= 1);
REG_PL_WR(INTC_IRQ_UNMASK_CLEAR_ADDR + reg_idx * 4, value);
}
/// @}
/**
* @name IRQ_POLARITY register definitions
*
* @{
*/
/// Address of the IRQ_POLARITY register
#define INTC_IRQ_POLARITY_ADDR 0x10910020
/// Offset of the IRQ_POLARITY register from the base address
#define INTC_IRQ_POLARITY_OFFSET 0x00000020
/// Index of the IRQ_POLARITY register
#define INTC_IRQ_POLARITY_INDEX 0x00000008
/// Reset value of the IRQ_POLARITY register
#define INTC_IRQ_POLARITY_RESET 0x00000000
/// Number of elements of the IRQ_POLARITY register array
#define INTC_IRQ_POLARITY_COUNT 2
/**
* @brief Returns the current value of the IRQ_POLARITY register.
* The IRQ_POLARITY register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_POLARITY register.
*/
__INLINE uint32_t intc_irq_polarity_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_POLARITY_ADDR + reg_idx * 4);
}
/**
* @brief Sets the IRQ_POLARITY register to a value.
* The IRQ_POLARITY register will be written.
* @param[in] reg_idx Index of the register
* @param value - The value to write.
*/
__INLINE void intc_irq_polarity_set(int reg_idx, uint32_t value)
{
ASSERT_ERR(reg_idx <= 1);
REG_PL_WR(INTC_IRQ_POLARITY_ADDR + reg_idx * 4, value);
}
/// @}
/**
* @name IRQ_INDEX register definitions
*
* @{
*/
/// Address of the IRQ_INDEX register
#define INTC_IRQ_INDEX_ADDR 0x10910040
/// Offset of the IRQ_INDEX register from the base address
#define INTC_IRQ_INDEX_OFFSET 0x00000040
/// Index of the IRQ_INDEX register
#define INTC_IRQ_INDEX_INDEX 0x00000010
/// Reset value of the IRQ_INDEX register
#define INTC_IRQ_INDEX_RESET 0x00000000
/**
* @brief Returns the current value of the IRQ_INDEX register.
* The IRQ_INDEX register will be read and its value returned.
* @return The current value of the IRQ_INDEX register.
*/
__INLINE uint32_t intc_irq_index_get(void)
{
return REG_PL_RD(INTC_IRQ_INDEX_ADDR);
}
/// @}
#endif // _REG_INTC_H_
/// @}

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#ifndef _ARM_ARCH_H_
#define _ARM_ARCH_H_
/**
* RD an 8-bit register from the core
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @return 8-bit datum
*/
#define REG_RD8(_pBase, _offset) *((volatile UINT8 *)(_pBase + _offset))
/**
* RD a 16-bit register from the core
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @return 16-bit datum
*/
#define REG_RD16(_pBase, _offset) *((volatile UINT16 *)(_pBase + _offset))
/**
* RD a 32-bit register from the core
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @return 32-bit datum
*/
#define REG_RD32(_pBase, _offset) *((volatile UINT32 *)(_pBase + _offset))
/**
* WR an 8-bit core register
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @param _data 8-bit datum
*/
#define REG_WR8(_pBase, _offset, _data) \
(*((volatile UINT8 *)(_pBase + _offset)) = _data)
/**
* WR a 16-bit core register
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @param _data 16-bit datum
*/
#define REG_WR16(_pBase, _offset, _data) \
(*((volatile UINT16 *)(_pBase + _offset)) = _data)
/**
* WR a 32-bit core register
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @param _data 32-bit datum
*/
#define REG_WR32(_pBase, _offset, _data) \
(*((volatile UINT32 *)(_pBase + _offset)) = _data)
#define REG_READ(addr) (*((volatile UINT32 *)(addr)))
#define REG_WRITE(addr, _data) (*((volatile UINT32 *)(addr)) = (_data))
#endif

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#ifndef _BK_TIMER_PUB_H_
#define _BK_TIMER_PUB_H_
#define TIMER_DEV_NAME "bk_timer"
#define TIMER_CMD_MAGIC (0xe340000)
enum
{
CMD_TIMER_UNIT_ENABLE = TIMER_CMD_MAGIC + 1,
CMD_TIMER_UNIT_DISABLE,
CMD_TIMER_INIT_PARAM
};
typedef void (*TFUNC)(UINT8);
typedef struct
{
UINT8 channel;
UINT8 div;
UINT32 period;
TFUNC t_Int_Handler;
} timer_param_t;
void bk_timer_init(void);
void bk_timer_exit(void);
void bk_timer_isr(void);
#endif //_TIMER_PUB_H_

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#ifndef _BLE_API_H_
#define _BLE_API_H_
#define MAX_ADV_DATA_LEN (0x1F)
#define ABIT(n) (1 << n)
#define BK_PERM_SET(access, right) \
(((BK_PERM_RIGHT_ ## right) << (access ## _POS)) & (access ## _MASK))
#define BK_PERM_GET(perm, access)\
(((perm) & (access ## _MASK)) >> (access ## _POS))
typedef enum
{
/// Stop notification/indication
PRF_STOP_NTFIND = 0x0000,
/// Start notification
PRF_START_NTF,
/// Start indication
PRF_START_IND,
} prf_conf;
/**
* 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
* +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
* |EXT | WS | I | N | WR | WC | RD | B | NP | IP | WP | RP |
* +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
*
* Bit [0-1] : Read Permission (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
* Bit [2-3] : Write Permission (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
* Bit [4-5] : Indication Permission (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
* Bit [6-7] : Notification Permission (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
*
* Bit [8] : Broadcast permission
* Bit [9] : Read Command accepted
* Bit [10] : Write Command accepted
* Bit [11] : Write Request accepted
* Bit [12] : Send Notification
* Bit [13] : Send Indication
* Bit [14] : Write Signed accepted
* Bit [15] : Extended properties present
*/
typedef enum
{
/// Read Permission Mask
RP_MASK = 0x0003,
RP_POS = 0,
/// Write Permission Mask
WP_MASK = 0x000C,
WP_POS = 2,
/// Indication Access Mask
IP_MASK = 0x0030,
IP_POS = 4,
/// Notification Access Mask
NP_MASK = 0x00C0,
NP_POS = 6,
/// Broadcast descriptor present
BROADCAST_MASK = 0x0100,
BROADCAST_POS = 8,
/// Read Access Mask
RD_MASK = 0x0200,
RD_POS = 9,
/// Write Command Enabled attribute Mask
WRITE_COMMAND_MASK = 0x0400,
WRITE_COMMAND_POS = 10,
/// Write Request Enabled attribute Mask
WRITE_REQ_MASK = 0x0800,
WRITE_REQ_POS = 11,
/// Notification Access Mask
NTF_MASK = 0x1000,
NTF_POS = 12,
/// Indication Access Mask
IND_MASK = 0x2000,
IND_POS = 13,
/// Write Signed Enabled attribute Mask
WRITE_SIGNED_MASK = 0x4000,
WRITE_SIGNED_POS = 14,
/// Extended properties descriptor present
EXT_MASK = 0x8000,
EXT_POS = 15,
} bk_perm_mask;
/**
* Attribute Extended permissions
*
* Extended Value permission bit field
*
* 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
* +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
* | RI |UUID_LEN |EKS | Reserved |
* +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
*
* Bit [0-11] : Reserved
* Bit [12] : Encryption key Size must be 16 bytes
* Bit [13-14]: UUID Length (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)
* Bit [15] : Trigger Read Indication (0 = Value present in Database, 1 = Value not present in Database)
*/
typedef enum
{
/// Check Encryption key size Mask
EKS_MASK = 0x1000,
EKS_POS = 12,
/// UUID Length
UUID_LEN_MASK = 0x6000,
UUID_LEN_POS = 13,
/// Read trigger Indication
RI_MASK = 0x8000,
RI_POS = 15,
}bk_ext_perm_mask;
/// Attribute & Service access mode
enum
{
/// Disable access
BK_PERM_RIGHT_DISABLE = 0,
/// Enable access
BK_PERM_RIGHT_ENABLE = 1,
};
/// Attribute & Service access rights
enum
{
/// No Authentication
BK_PERM_RIGHT_NO_AUTH = 0,
/// Access Requires Unauthenticated link
BK_PERM_RIGHT_UNAUTH = 1,
/// Access Requires Authenticated link
BK_PERM_RIGHT_AUTH = 2,
/// Access Requires Secure Connection link
BK_PERM_RIGHT_SEC_CON = 3,
};
/// Attribute & Service UUID Length
enum
{
/// 16 bits UUID
BK_PERM_RIGHT_UUID_16 = 0,
/// 32 bits UUID
BK_PERM_RIGHT_UUID_32 = 1,
/// 128 bits UUID
BK_PERM_RIGHT_UUID_128 = 2,
/// Invalid
BK_PERM_RIGHT_UUID_RFU = 3,
};
typedef enum
{
ERR_SUCCESS = 0,
ERR_STACK_FAIL,
ERR_MEM_FAIL,
ERR_INVALID_ADV_DATA,
ERR_ADV_FAIL,
ERR_STOP_ADV_FAIL,
ERR_GATT_INDICATE_FAIL,
ERR_GATT_NOTIFY_FAIL,
ERR_SCAN_FAIL,
ERR_STOP_SCAN_FAIL,
ERR_CONN_FAIL,
ERR_STOP_CONN_FAIL,
ERR_DISCONN_FAIL,
ERR_READ_FAIL,
ERR_WRITE_FAIL,
ERR_REQ_RF,
ERR_PROFILE,
ERR_CREATE_DB,
ERR_CMD_NOT_SUPPORT,
/* Add more BLE error code hereafter */
} ble_err_t;
typedef enum
{
ADV_NAME_SHORT = 0x8,
ADV_NAME_FULL
} adv_name_type_t;
typedef enum
{
AD_LIMITED = ABIT(0), /* Limited Discoverable */
AD_GENERAL = ABIT(1), /* General Discoverable */
AD_NO_BREDR = ABIT(2) /* BR/EDR not supported */
} adv_flag_t;
typedef struct
{
uint8_t advData[MAX_ADV_DATA_LEN];
uint8_t advDataLen;
uint8_t respData[MAX_ADV_DATA_LEN];
uint8_t respDataLen;
uint8_t channel_map;
uint16_t interval_min;
uint16_t interval_max;
/* Subject to add more hereafter in the future */
} adv_info_t;
typedef struct
{
uint8_t filter_en;
uint8_t channel_map;
uint16_t interval;
uint16_t window;
} scan_info_t;
typedef enum
{
BLE_STACK_OK,
BLE_STACK_FAIL,
BLE_CONNECT,
BLE_DISCONNECT,
BLE_MTU_CHANGE,
BLE_CFG_NOTIFY,
BLE_CFG_INDICATE,
BLE_TX_DONE,
BLE_GEN_DH_KEY,
BLE_GET_KEY,
BLE_ATT_INFO_REQ,
BLE_CREATE_DB_OK,
BLE_CREATE_DB_FAIL,
} ble_event_t;
typedef struct
{
uint16_t prf_id;
uint8_t att_idx;
uint16_t length;
uint8_t status;
} att_info_req_t;
typedef struct
{
uint16_t prf_id;
uint8_t att_idx;
uint8_t *value;
uint16_t len;
} write_req_t;
typedef struct
{
uint16_t prf_id;
uint8_t att_idx;
uint8_t *value;
uint16_t size;
} read_req_t;
struct ble_get_key_ind
{
uint8_t *pri_key;
uint8_t pri_len;
/// X coordinate
uint8_t *pub_key_x;
uint8_t pub_x_len;
/// Y coordinate
uint8_t *pub_key_y;
uint8_t pub_y_len;
};
struct ble_gen_dh_key_ind
{
/// Result (32 bytes)
uint8_t *result;
uint8_t len;
};
typedef struct
{
/// 16 bits UUID LSB First
uint16_t uuid;
/// Attribute Permissions (@see enum attm_perm_mask)
uint16_t perm;
/// Attribute Extended Permissions (@see enum attm_value_perm_mask)
uint16_t ext_perm;
/// Attribute Max Size
/// note: for characteristic declaration contains handle offset
/// note: for included service, contains target service handle
uint16_t max_size;
}bk_attm_desc_t;
struct bk_ble_db_cfg
{
uint16_t prf_task_id;
///Service uuid
uint16_t uuid;
///Number of db
uint8_t att_db_nb;
///Start handler, 0 means autoalloc
uint16_t start_hdl;
///Attribute database
bk_attm_desc_t* att_db;
///Service config
uint8_t svc_perm;
};
typedef void (*ble_event_cb_t)(ble_event_t event, void *param);
typedef void (*ble_recv_adv_cb_t)(uint8_t *buf, uint8_t len);
typedef uint8_t (*bk_ble_read_cb_t)(read_req_t *read_req);
typedef void (*bk_ble_write_cb_t)(write_req_t *write_req);
extern ble_event_cb_t ble_event_cb;
extern ble_recv_adv_cb_t ble_recv_adv_cb;
extern bk_ble_read_cb_t bk_ble_read_cb;
extern bk_ble_write_cb_t bk_ble_write_cb;
extern adv_info_t adv_info;
extern scan_info_t scan_info;
void ble_activate(char *ble_name);
void ble_set_write_cb(bk_ble_write_cb_t func);
void ble_set_event_cb(ble_event_cb_t func);
void ble_set_read_cb(bk_ble_read_cb_t func);
void ble_set_recv_adv_cb(ble_recv_adv_cb_t func);
ble_err_t bk_ble_create_db (struct bk_ble_db_cfg* ble_db_cfg);
ble_err_t bk_ble_send_ntf_value(uint32_t len, uint8_t *buf, uint16_t prf_id, uint16_t att_idx);
ble_err_t bk_ble_send_ind_value(uint32_t len, uint8_t *buf, uint16_t prf_id, uint16_t att_idx);
#endif

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#ifndef _BLE_PUB_H_
#define _BLE_PUB_H_
#include "rtos_pub.h"
#define BLE_DEV_NAME "ble"
#define BLE_CMD_MAGIC (0xe2a0000)
enum
{
CMD_BLE_REG_INIT = BLE_CMD_MAGIC + 1,
CMD_BLE_REG_DEINIT,
CMD_BLE_SET_CHANNEL,
CMD_BLE_AUTO_CHANNEL_ENABLE,
CMD_BLE_AUTO_CHANNEL_DISABLE,
CMD_BLE_AUTO_SYNCWD_ENABLE,
CMD_BLE_AUTO_SYNCWD_DISABLE,
CMD_BLE_SET_PN9_TRX,
CMD_BLE_SET_GFSK_SYNCWD,
CMD_BLE_HOLD_PN9_ESTIMATE,
CMD_BLE_STOP_COUNTING,
CMD_BLE_START_COUNTING
};
enum
{
PN9_RX = 0,
PN9_TX
};
enum
{
BLE_MSG_POLL = 0,
BLE_MSG_SLEEP,
BLE_MSG_EXIT,
BLE_MSG_NULL,
};
void ble_init(void);
void ble_exit(void);
void ble_dut_start(void);
UINT8 ble_is_start(void);
UINT8* ble_get_mac_addr(void);
UINT8* ble_get_name(void);
uint8_t if_ble_sleep(void);
void rf_wifi_used_clr(void);
void rf_wifi_used_set(void);
UINT32 if_rf_wifi_used(void );
void rf_not_share_for_ble(void);
void rf_can_share_for_ble(void);
#endif /* _BLE_PUB_H_ */

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#ifndef _DRIVER_CODEC_ES8374_PUB_H_
#define _DRIVER_CODEC_ES8374_PUB_H_
extern void es8374_codec_init(void);
extern void es8374_codec_configure(unsigned int fs, unsigned char datawidth);
extern void es8374_codec_close(void);
extern void es8374_codec_volume_control(unsigned char volume);
extern void es8374_codec_mute_control(BOOL enable);
#endif

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#ifndef _DRIVER_PUB_H_
#define _DRIVER_PUB_H_
extern UINT32 driver_init(void);
#endif // _DRIVER_PUB_H_
// eof

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Living_SDK/platform/mcu/bk7231u/beken/driver/include/drv_model_pub.h Normal file
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#ifndef _DRV_MODEL_PUB_H_
#define _DRV_MODEL_PUB_H_
#define DRV_FAILURE ((UINT32)-5)
#define DRV_SUCCESS (0)
#define DD_HANDLE_MAGIC_WORD (0xA5A50000)
#define DD_HANDLE_MAGIC_MASK (0xFFFF0000)
#define DD_HANDLE_ID_MASK (0x0000FFFF)
#define DD_HANDLE_UNVALID ((UINT32)-1)
#define DD_ID_UNVALID ((UINT32)-1)
typedef UINT32 DD_HANDLE;
typedef struct _dd_operations_
{
UINT32 (*open) (UINT32 op_flag);
UINT32 (*close) (void);
UINT32 (*read) (char *user_buf, UINT32 count, UINT32 op_flag);
UINT32 (*write) (char *user_buf, UINT32 count, UINT32 op_flag);
UINT32 (*control) (UINT32 cmd, void *parm);
} DD_OPERATIONS;
typedef struct _sdd_operations_
{
UINT32 (*control) (UINT32 cmd, void *parm);
} SDD_OPERATIONS;
typedef enum _DD_OPEN_METHOD_
{
DD_OPEN_METHOD_ONE_TIME = 0, // open one time only
DD_OPEN_METHOD_MUTI_TIME // open multi times
} DD_OPEN_METHOD;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern UINT32 drv_model_init(void);
extern UINT32 drv_model_uninit(void);
extern DD_HANDLE ddev_open(char *dev_name, UINT32 *status, UINT32 op_flag);
extern UINT32 ddev_close(DD_HANDLE handle);
extern UINT32 ddev_read(DD_HANDLE handle, char *user_buf , UINT32 count, UINT32 op_flag);
extern UINT32 ddev_write(DD_HANDLE handle, char *user_buf , UINT32 count, UINT32 op_flag);
extern UINT32 ddev_control(DD_HANDLE handle, UINT32 cmd, VOID *param);
extern UINT32 sddev_control(char *dev_name, UINT32 cmd, VOID *param);
extern UINT32 ddev_register_dev(char *dev_name, DD_OPERATIONS *optr);
extern UINT32 sddev_register_dev(char *dev_name, SDD_OPERATIONS *optr);
extern UINT32 ddev_unregister_dev(char *dev_name);
extern UINT32 sddev_unregister_dev(char *dev_name);
#endif //_DRV_MODEL_PUB_H_

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#ifndef _FFT_PUB_H_
#define _FFT_PUB_H_
#define FFT_FAILURE (1)
#define FFT_SUCCESS (0)
#define FFT_DEV_NAME "fft"
#define FFT_CMD_MAGIC (0xe260000)
enum
{
CMD_FFT_BUSY = FFT_CMD_MAGIC + 1,
CMD_FFT_ENABLE,
CMD_FIR_SIGNLE_ENABLE
};
enum
{
FFT_MODE_FFT,
FFT_MODE_IFFT
};
typedef struct
{
int mode;
INT16 *inbuf;
INT16 *outbuf;
UINT16 size;
} input_fft_t;
typedef struct
{
UINT8 fir_len;
UINT8 fir_cwidth;
UINT8 fir_dwidth;
INT16 *coef;
INT16 *input;
INT32 *mac;
} input_fir_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void fft_init(void);
void fft_exit(void);
void fft_isr(void);
#endif //_FFT_PUB_H_

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#ifndef _FLASH_PUB_H
#define _FLASH_PUB_H
#define FLASH_DEV_NAME ("flash")
#define FLASH_FAILURE (1)
#define FLASH_SUCCESS (0)
#define FLASH_CMD_MAGIC (0xe240000)
enum
{
CMD_FLASH_SET_CLK = FLASH_CMD_MAGIC + 1,
CMD_FLASH_SET_DCO,
CMD_FLASH_SET_DPLL,
CMD_FLASH_WRITE_ENABLE,
CMD_FLASH_WRITE_DISABLE,
CMD_FLASH_READ_SR,
CMD_FLASH_WRITE_SR,
CMD_FLASH_READ_QE,
CMD_FLASH_SET_QE,
CMD_FLASH_SET_QWFR,
CMD_FLASH_CLR_QWFR,
CMD_FLASH_SET_WSR,
CMD_FLASH_GET_ID,
CMD_FLASH_READ_MID,
CMD_FLASH_ERASE_SECTOR,
CMD_FLASH_SET_HPM,
CMD_FLASH_GET_PROTECT,
CMD_FLASH_SET_PROTECT
};
typedef enum
{
FLASH_PROTECT_NONE,
FLASH_PROTECT_ALL,
FLASH_PROTECT_HALF,
FLASH_UNPROTECT_LAST_BLOCK
} PROTECT_TYPE;
typedef enum
{
FLASH_XTX_16M_SR_WRITE_DISABLE,
FLASH_XTX_16M_SR_WRITE_ENABLE
} XTX_FLASH_MODE;
typedef struct
{
UINT8 byte;
UINT16 value;
} flash_sr_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void flash_init(void);
extern void flash_exit(void);
extern UINT8 flash_get_line_mode(void);
extern void flash_set_line_mode(UINT8 );
#endif //_FLASH_PUB_H

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#ifndef __GDMA_PUB_H__
#define __GDMA_PUB_H__
#if CFG_GENERAL_DMA
#define GDMA_FAILURE (1)
#define GDMA_SUCCESS (0)
#define GDMA_DEV_NAME "generaldma"
#define GDMA_CMD_MAGIC (0x0e809000)
enum
{
CMD_GDMA_SET_DMA_ENABLE = GDMA_CMD_MAGIC + 1,
CMD_GDMA_CFG_FIN_INT_ENABLE,
CMD_GDMA_CFG_HFIN_INT_ENABLE,
CMD_GDMA_CFG_WORK_MODE,
CMD_GDMA_CFG_SRCDATA_WIDTH,
CMD_GDMA_CFG_DSTDATA_WIDTH,
CMD_GDMA_CFG_SRCADDR_INCREASE,
CMD_GDMA_CFG_DSTADDR_INCREASE,
CMD_GDMA_CFG_SRCADDR_LOOP,
CMD_GDMA_CFG_DSTADDR_LOOP,
CMD_GDMA_SET_CHNL_PRIO,
CMD_GDMA_SET_TRANS_LENGTH,
CMD_GDMA_SET_DST_START_ADDR,
CMD_GDMA_SET_SRC_START_ADDR,
CMD_GDMA_SET_DST_LOOP_ENDADDR,
CMD_GDMA_SET_DST_LOOP_STARTADDR,
CMD_GDMA_SET_SRC_LOOP_ENDADDR,
CMD_GDMA_SET_SRC_LOOP_STARTADDR,
CMD_GDMA_SET_DST_REQ_MUX,
CMD_GDMA_SET_SRC_REQ_MUX,
CMD_GDMA_SET_DTCM_WRITE_WORD,
CMD_GDMA_GET_REMAIN_LENGTH,
CMD_GDMA_SET_FIN_CNT,
CMD_GDMA_SET_HFIN_CNT,
CMD_GDMA_SET_PRIO_MODE,
CMD_GDMA_GET_FIN_INT_STATUS,
CMD_GDMA_CLR_FIN_INT_STATUS,
CMD_GDMA_GET_HFIN_INT_STATUS,
CMD_GDMA_CLR_HFIN_INT_STATUS,
CMD_GDMA_CFG_TYPE0,
CMD_GDMA_CFG_TYPE1,
CMD_GDMA_CFG_TYPE2,
CMD_GDMA_CFG_TYPE3,
CMD_GDMA_CFG_TYPE4,
CMD_GDMA_CFG_TYPE5,
CMD_GDMA_CFG_TYPE6,
CMD_GDMA_ENABLE,
CMD_GDMA_GET_LEFT_LEN,
CMD_GDMA_SET_SRC_PAUSE_ADDR,
CMD_GDMA_GET_SRC_PAUSE_ADDR,
CMD_GDMA_SET_DST_PAUSE_ADDR,
CMD_GDMA_GET_DST_PAUSE_ADDR,
CMD_GDMA_GET_SRC_READ_ADDR,
CMD_GDMA_GET_DST_WRITE_ADDR,
};
#define GDMA_X_DST_DTCM_WR_REQ (0x0)
#define GDMA_X_DST_HSSPI_TX_REQ (0x1)
#define GDMA_X_DST_AUDIO_RX_REQ (0x2)
#define GDMA_X_DST_SDIO_TX_REQ (0x3)
#define GDMA_X_DST_UART1_TX_REQ (0x4)
#define GDMA_X_DST_UART2_TX_REQ (0x5)
#define GDMA_X_DST_I2S_TX_REQ (0x6)
#define GDMA_X_DST_GSPI_TX_REQ (0x7)
#define GDMA_X_DST_PSRAM_V_WR_REQ (0x9)
#define GDMA_X_DST_PSRAM_A_WR_REQ (0xA)
#define GDMA_X_SRC_DTCM_RD_REQ (0x0)
#define GDMA_X_SRC_HSSPI_RX_REQ (0x1)
#define GDMA_X_SRC_AUDIO_TX_REQ (0x2)
#define GDMA_X_SRC_SDIO_RX_REQ (0x3)
#define GDMA_X_SRC_UART1_RX_REQ (0x4)
#define GDMA_X_SRC_UART2_RX_REQ (0x5)
#define GDMA_X_SRC_I2S_RX_REQ (0x6)
#define GDMA_X_SRC_GSPI_RX_REQ (0x7)
#define GDMA_X_SRC_JPEG_WR_REQ (0x8)
#define GDMA_X_SRC_PSRAM_V_RD_REQ (0x9)
#define GDMA_X_SRC_PSRAM_A_RD_REQ (0xA)
#define GDMA_X_SRC_DST_RESERVE (0xB)
enum
{
GDMA_CHANNEL_0 = 0,
GDMA_CHANNEL_1,
GDMA_CHANNEL_2,
GDMA_CHANNEL_3,
#if (CFG_SOC_NAME == SOC_BK7231)
GDMA_CHANNEL_MAX,
#else
GDMA_CHANNEL_4,
GDMA_CHANNEL_5,
GDMA_CHANNEL_MAX
#endif // (CFG_SOC_NAME == SOC_BK7231)
};
#define GDMA_TYPE_0 (0U) // no loop src, no loop dst, no register
#define GDMA_TYPE_1 (1U) // loop src, no loop dst, no register
#define GDMA_TYPE_2 (2U) // no loop src, loop dst, no register
#define GDMA_TYPE_3 (3U) // loop src, loop dst, no register
#define GDMA_TYPE_4 (4U) // loop src, no loop dst, register
#define GDMA_TYPE_5 (5U) // no loop src, loop dst, register
#define GDMA_TYPE_6 (6U) // loop src, loop dst, register
typedef struct gdmacfg_types_st
{
UINT32 channel;
UINT32 prio;
UINT8 dstptr_incr;
UINT8 srcptr_incr;
UINT8 dstdat_width;
UINT8 srcdat_width;
void *src_start_addr;
void *dst_start_addr;
UINT8 src_module;
UINT8 dst_module;
void (*fin_handler)(UINT32);
void (*half_fin_handler)(UINT32);
union
{
struct
{
void *src_loop_start_addr;
void *src_loop_end_addr;
} type1; // loop src, no loop dst, no register
struct
{
void *dst_loop_start_addr;
void *dst_loop_end_addr;
} type2; // no loop src, loop dst, no register
struct
{
void *src_loop_start_addr;
void *src_loop_end_addr;
void *dst_loop_start_addr;
void *dst_loop_end_addr;
} type3; // loop src, loop dst, no register
struct
{
void *src_loop_start_addr;
void *src_loop_end_addr;
} type4; // loop src, no loop dst, register
struct
{
void *dst_loop_start_addr;
void *dst_loop_end_addr;
} type5; // no loop src, loop dst, register
struct
{
void *src_loop_start_addr;
void *src_loop_end_addr;
void *dst_loop_start_addr;
void *dst_loop_end_addr;
} type6; // loop src, loop dst, register
} u;
} GDMACFG_TPYES_ST, *GDMACFG_TPYES_PTR;
typedef struct gdma_do_st
{
UINT32 channel;
void *src_addr;
void *dst_addr;
UINT32 length;
} GDMA_DO_ST, *GDMA_DO_PTR;
typedef struct generdam_cfg_st
{
UINT32 param;
UINT32 channel;
} GDMA_CFG_ST, *GDMA_CFG_PTR;
void gdma_init(void);
void gdma_exit(void);
void *gdma_memcpy(void *out, const void *in, UINT32 n);
#endif // CFG_GENERAL_DMA
#endif

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#ifndef _GPIO_PUB_H_
#define _GPIO_PUB_H_
#include "generic.h"
#include "drv_model_pub.h"
#define GPIO_FAILURE (1)
#define GPIO_SUCCESS (0)
#define GPIO_DEV_NAME "gpio"
#define GPIO_CFG_PARAM(id, mode) (id + ((mode & 0xff) << 8))
#define GPIO_CFG_PARAM_DEMUX_ID(param) (param & 0xff)
#define GPIO_CFG_PARAM_DEMUX_MODE(param) ((param >> 8) & 0xff)
#define GPIO_OUTPUT_PARAM(id, val) (id + ((val & 0xff) << 8))
#define GPIO_OUTPUT_DEMUX_ID(param) (param & 0xff)
#define GPIO_OUTPUT_DEMUX_VAL(param) ((param >> 8) & 0xff)
#define GPIO_CMD_MAGIC (0xcaa0000)
enum
{
CMD_GPIO_CFG = GPIO_CMD_MAGIC + 0,
CMD_GPIO_OUTPUT_REVERSE = GPIO_CMD_MAGIC + 1,
CMD_GPIO_ENABLE_SECOND = GPIO_CMD_MAGIC + 2,
CMD_GPIO_INPUT = GPIO_CMD_MAGIC + 3,
CMD_GPIO_OUTPUT = GPIO_CMD_MAGIC + 4,
CMD_GPIO_CLR_DPLL_UNLOOK_INT_BIT = GPIO_CMD_MAGIC + 5,
CMD_GPIO_EN_DPLL_UNLOOK_INT = GPIO_CMD_MAGIC + 6,
CMD_GPIO_INT_ENABLE = GPIO_CMD_MAGIC + 7,
CMD_GPIO_INT_DISABLE = GPIO_CMD_MAGIC + 8,
CMD_GPIO_INT_CLEAR = GPIO_CMD_MAGIC + 9,
CMD_GPIO_EN_USB_PLUG_IN_INT = GPIO_CMD_MAGIC + 10,
CMD_GPIO_EN_USB_PLUG_OUT_INT = GPIO_CMD_MAGIC + 11,
};
enum
{
GMODE_INPUT_PULLDOWN = 0,
GMODE_OUTPUT,
GMODE_SECOND_FUNC,
GMODE_INPUT_PULLUP,
GMODE_INPUT,
GMODE_SECOND_FUNC_PULL_UP,//Special for uart1
GMODE_OUTPUT_PULLUP,
GMODE_HIGH_Z
};
typedef enum
{
GPIO0 = 0,
GPIO1,
GPIO2,
GPIO3,
GPIO4,
GPIO5,
GPIO6,
GPIO7,
GPIO8,
GPIO9,
GPIO10,
GPIO11,
GPIO12,
GPIO13,
GPIO14,
GPIO15,
GPIO16,
GPIO17,
GPIO18,
GPIO19,
GPIO20,
GPIO21,
GPIO22,
GPIO23,
GPIO24,
GPIO25,
GPIO26,
GPIO27,
GPIO28,
GPIO29,
GPIO30,
GPIO31,
GPIO32,
GPIO33,
GPIO34,
GPIO35,
GPIO36,
GPIO37,
GPIO38,
GPIO39,
GPIONUM
} GPIO_INDEX ;
enum
{
GFUNC_MODE_UART2 = 0,
GFUNC_MODE_I2C2,
GFUNC_MODE_I2S,
GFUNC_MODE_ADC1,
GFUNC_MODE_ADC2,
GFUNC_MODE_CLK13M,
GFUNC_MODE_PWM0,
GFUNC_MODE_PWM1,
GFUNC_MODE_PWM2,
GFUNC_MODE_PWM3,
GFUNC_MODE_WIFI_ACTIVE,
GFUNC_MODE_BT_ACTIVE,
GFUNC_MODE_BT_PRIORITY,
GFUNC_MODE_UART1,
GFUNC_MODE_SD_DMA,
GFUNC_MODE_SD_HOST,
GFUNC_MODE_SPI_DMA,
GFUNC_MODE_SPI,
GFUNC_MODE_PWM4,
GFUNC_MODE_PWM5,
GFUNC_MODE_I2C1,
GFUNC_MODE_JTAG,
GFUNC_MODE_CLK26M,
GFUNC_MODE_ADC3,
GFUNC_MODE_DCMI,
GFUNC_MODE_ADC4,
GFUNC_MODE_ADC5,
GFUNC_MODE_ADC6,
GFUNC_MODE_ADC7,
GFUNC_MODE_SD1_HOST,
GFUNC_MODE_SPI1,
GFUNC_MODE_SPI_DMA1,
};
enum
{
GPIO_INT_LEVEL_LOW = 0,
GPIO_INT_LEVEL_HIGH = 1,
GPIO_INT_LEVEL_RISING = 2,
GPIO_INT_LEVEL_FALLING = 3
};
typedef struct gpio_int_st
{
UINT32 id;
UINT32 mode;
void * phandler;
}GPIO_INT_ST;
__inline static void bk_gpio_config_input(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_INPUT);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_config_input_pup(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_INPUT_PULLUP);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_config_input_pdwn(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_INPUT_PULLDOWN);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static uint32_t bk_gpio_input(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param = id;
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_INPUT, &param);
return ret;
}
__inline static void bk_gpio_config_output(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_OUTPUT);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_output(GPIO_INDEX id,UINT32 val)
{
UINT32 ret;
UINT32 param;
param = GPIO_OUTPUT_PARAM(id, val);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_OUTPUT, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_output_reverse(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param = id;
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_OUTPUT_REVERSE, &param);
ASSERT(GPIO_SUCCESS == ret);
}
#if ((SOC_BK7231U == CFG_SOC_NAME) || (SOC_BK7221U == CFG_SOC_NAME))
#define GPIO_USB_DP_PIN GPIO25
#define GPIO_USB_DN_PIN GPIO28
extern void gpio_usb_second_function(void);
#endif
#if(SOC_BK7221U == CFG_SOC_NAME)
#define USB_PLUG_NO_EVENT 0
#define USB_PLUG_IN_EVENT 1
#define USB_PLUG_OUT_EVENT 2
typedef void (*usb_plug_inout_handler)(void *usr_data, UINT32 event);
typedef struct usb_plug_inout {
usb_plug_inout_handler handler;
void *usr_data;
}USB_PLUG_INOUT_ST;
extern USB_PLUG_INOUT_ST usb_plug;
void usb_plug_inout_isr(void);
UINT32 usb_is_plug_in(void);
#endif
extern UINT32 gpio_ctrl(UINT32 cmd, void *param);
extern UINT32 gpio_input(UINT32 id);
extern void gpio_init(void);
extern void gpio_exit(void);
void gpio_int_disable(UINT32 index);
void gpio_int_enable(UINT32 index, UINT32 mode, void (*p_Int_Handler)(unsigned char));
void gpio_config( UINT32 index, UINT32 mode ) ;
void gpio_output(UINT32 id, UINT32 val);
#endif // _GPIO_PUB_H_
// EOF

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#ifndef _I2S_PUB_H_
#define _I2S_PUB_H_
#define I2S_FAILURE (1)
#define I2S_SUCCESS (0)
#define I2S_DEV_NAME "i2s"
#define I2S_CMD_MAGIC (0xe280000)
enum
{
I2S_HW_SET = I2S_CMD_MAGIC + 1,
I2S_CMD_SET_FREQ_DATAWIDTH,
I2S_CMD_ACTIVE,
I2S_CMD_RXACTIVE,
I2S_CMD_SELECT_MODE,
I2S_CMD_SET_LEVEL
};
enum
{
I2S_MODE_I2S = 0,
I2S_MODE_LEFT_JUST = 1,
I2S_MODE_RIGHT_JUST = 2,
I2S_MODE_SHORT_SYNC = 4,
I2S_MODE_LONG_SYNC = 5,
I2S_MODE_NORMAL_2B_D = 6,
I2S_MODE_DELAY_2B_D = 7
};
typedef struct
{
UINT8 rx_level;
UINT8 tx_level;
} i2s_level_t;
typedef struct
{
UINT32 freq;
UINT16 datawidth;
} i2s_rate_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void i2s_init(void);
void i2s_exit(void);
void i2s_isr(void);
UINT8 is_i2s_active(void);
#endif //_I2S_PUB_H_

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#ifndef _ICU_PUB_H_
#define _ICU_PUB_H_
#define ICU_FAILURE (1)
#define ICU_SUCCESS (0)
#define ICU_DEV_NAME "icu"
#define ICU_CMD_MAGIC (0xe220000)
enum
{
CMD_ICU_CLKGATING_DISABLE = ICU_CMD_MAGIC + 1,
CMD_ICU_CLKGATING_ENABLE,
CMD_ICU_INT_DISABLE,
CMD_ICU_INT_ENABLE,
CMD_ICU_GLOBAL_INT_DISABLE,
CMD_ICU_GLOBAL_INT_ENABLE,
CMD_GET_INTR_STATUS,
CMD_CLR_INTR_STATUS,
CMD_GET_INTR_RAW_STATUS,
CMD_CLR_INTR_RAW_STATUS,
CMD_CLK_PWR_DOWN,
CMD_CLK_PWR_UP,
CMD_CONF_PWM_PCLK,
CMD_CONF_PWM_LPOCLK,
CMD_TL410_CLK_PWR_DOWN,
CMD_TL410_CLK_PWR_UP,
CMD_CONF_PCLK_26M,
CMD_CONF_PCLK_DCO,
CMD_SET_JTAG_MODE,
CMD_GET_JTAG_MODE,
CMD_ARM_WAKEUP
};
/*CMD_CONF_PCLK*/
#define PCLK_POSI (0)
#define PCLK_POSI_UART1 (1 << 0)
#define PCLK_POSI_UART2 (1 << 1)
#define PCLK_POSI_I2C1 (1 << 2)
#define PCLK_POSI_IRDA (1 << 3)
#define PCLK_POSI_I2C2 (1 << 4)
#define PCLK_POSI_SARADC (1 << 5)
#define PCLK_POSI_SPI (1 << 6)
#define PCLK_POSI_PWMS (1 << 7)
#define PCLK_POSI_SDIO (1 << 8)
#define PCLK_POSI_SARADC_AUD (1 << 9)
/*CMD_CONF_PWM_PCLK, CMD_CONF_PWM_LPOCLK*/
#define PWM_MUX_POSI (0)
#define PWM_MUX_LPO (1)
#define PWM_MUX_PCLK (0)
// *param = channel_id
/*CMD_CLK_PWR_DOWN CMD_CLK_PWR_UP*/
#define PWD_JEPG_CLK_BIT (1 << 22)
#if (CFG_SOC_NAME != SOC_BK7231)
#define PWD_TIMER_32K_CLK_BIT (1 << 21)
#define PWD_TIMER_26M_CLK_BIT (1 << 20)
#endif
#define PWD_FFT_CLK_BIT (1 << 19)
#define PWD_USB_CLK_BIT (1 << 18)
#define PWD_SDIO_CLK_BIT (1 << 17)
#define PWD_TL410_WATCHDOG_BIT (1 << 16)
#define PWD_AUDIO_CLK_BIT (1 << 15)
#define PWD_PWM5_CLK_BIT (1 << 14)
#define PWD_PWM4_CLK_BIT (1 << 13)
#define PWD_PWM3_CLK_BIT (1 << 12)
#define PWD_PWM2_CLK_BIT (1 << 11)
#define PWD_PWM1_CLK_BIT (1 << 10)
#define PWD_PWM0_CLK_BIT (1 << 9)
#define PWD_ARM_WATCHDOG_CLK_BIT (1 << 8)
#define PWD_SARADC_CLK_BIT (1 << 7)
#define PWD_SPI_CLK_BIT (1 << 6)
#define PWD_I2C2_CLK_BIT (1 << 5)
#define PWD_I2S_PCM_CLK_BIT (1 << 4)
#define PWD_IRDA_CLK_BIT (1 << 3)
#define PWD_I2C1_CLK_BIT (1 << 2)
#define PWD_UART2_CLK_BIT (1 << 1)
#define PWD_UART1_CLK_BIT (1 << 0)
/* CMD_ICU_CLKGATING_DISABLE CMD_ICU_CLKGATING_ENABLE*/
#define CLKGATE_MAC_AHB_BIT (1 << 16)
#define CLKGATE_FFT_AHB_BIT (1 << 15)
#define CLKGATE_USB_AHB_BIT (1 << 14)
#define CLKGATE_SDIO_AHB_BIT (1 << 13)
#define CLKGATE_SARADC_APB_BIT (1 << 12)
#define CLKGATE_AUDIO_APB_BIT (1 << 11)
#define CLKGATE_PWM_APB_BIT (1 << 10)
#define CLKGATE_WATCHDOG_APB_BIT (1 << 9)
#define CLKGATE_GPIO_APB_BIT (1 << 8)
#define CLKGATE_SPI_APB_BIT (1 << 7)
#define CLKGATE_I2C2_APB_BIT (1 << 6)
#define CLKGATE_I2S_PCM_APB_BIT (1 << 5)
#define CLKGATE_IRDA_APB_BIT (1 << 4)
#define CLKGATE_I2C1_APB_BIT (1 << 3)
#define CLKGATE_UART2_APB_BIT (1 << 2)
#define CLKGATE_UART1_APB_BIT (1 << 1)
#define CLKGATE_ICU_APB_BIT (1 << 0)
/* CMD ICU_TL410_CLK_PWD*/
#define PWD_TL410_CLK_BIT (1 << 0)
#define PWD_BLE_CLK_BIT (1 << 1)
/* ICU_JTAG_SELECT */
#define JTAG_ARM_MODE 0
#define JTAG_TL410_MODE 1
/*CMD_ICU_INT_DISABLE CMD_ICU_INT_ENABLE*/
#define FIQ_JPEG_DECODER_BIT (1 << 29)
#define FIQ_DPLL_UNLOCK_BIT (1 << 28)
#define FIQ_SPI_DMA_BIT (1 << 27)
#define FIQ_MAC_WAKEUP_BIT (1 << 26)
#if (CFG_SOC_NAME == SOC_BK7221U)
#define FIQ_SECURITY_BIT (1 << 25)
#define FIQ_USB_PLUG_INOUT_BIT (1 << 24)
#else
#define FIQ_MAILBOX1_BIT (1 << 25)
#define FIQ_MAILBOX0_BIT (1 << 24)
#endif // (CFG_SOC_NAME == SOC_BK7221U)
#define FIQ_SDIO_DMA_BIT (1 << 23)
#define FIQ_MAC_GENERAL_BIT (1 << 22)
#define FIQ_MAC_PROT_TRIGGER_BIT (1 << 21)
#define FIQ_MAC_TX_TRIGGER_BIT (1 << 20)
#define FIQ_MAC_RX_TRIGGER_BIT (1 << 19)
#define FIQ_MAC_TX_RX_MISC_BIT (1 << 18)
#define FIQ_MAC_TX_RX_TIMER_BIT (1 << 17)
#define FIQ_MODEM_BIT (1 << 16)
#define IRQ_GDMA_BIT (1 << 15)
#define IRQ_FFT_BIT (1 << 14)
#define IRQ_USB_BIT (1 << 13)
#define IRQ_SDIO_BIT (1 << 12)
#define IRQ_SARADC_BIT (1 << 11)
#define IRQ_AUDIO_BIT (1 << 10)
#define IRQ_PWM_BIT (1 << 9)
#define IRQ_TL410_WATCHDOG_BIT (1 << 8)
#define IRQ_GPIO_BIT (1 << 7)
#define IRQ_SPI_BIT (1 << 6)
#define IRQ_I2C2_BIT (1 << 5)
#define IRQ_I2S_PCM_BIT (1 << 4)
#define IRQ_IRDA_BIT (1 << 3)
#define IRQ_I2C1_BIT (1 << 2)
#define IRQ_UART2_BIT (1 << 1)
#define IRQ_UART1_BIT (1 << 0)
/* CMD_ICU_GLOBAL_INT_DISABLE CMD_ICU_GLOBAL_INT_ENABLE*/
#define GINTR_FIQ_BIT (1 << 1)
#define GINTR_IRQ_BIT (1 << 0)
/* CMD_ARM_WAKEUP */
#if (CFG_SOC_NAME == SOC_BK7231)
#define TL410_WATCHDOG_ARM_WAKEUP_EN_BIT (1 << 8)
#else
#define TIMER_ARM_WAKEUP_EN_BIT (1 << 8)
#endif
#define BLE_ARM_WAKEUP_EN_BIT (1 << 30)
#define MAC_ARM_WAKEUP_EN_BIT (1 << 26)
#define MAC_GENERAL_ARM_WAKEUP_EN_BIT (1 << 22)
#define GENERDMA_ARM_WAKEUP_EN_BIT (1 << 15)
#define AUDIO_ARM_WAKEUP_EN_BIT (1 << 10)
#define GPIO_ARM_WAKEUP_EN_BIT (1 << 7)
#define PWM_ARM_WAKEUP_EN_BIT (1 << 9)
#define UART2_ARM_WAKEUP_EN_BIT (1 << 1)
#define UART1_ARM_WAKEUP_EN_BIT (1 << 0)
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void icu_init(void);
extern void icu_exit(void);
extern UINT32 icu_ctrl(UINT32 cmd, void *param);
#endif //_ICU_PUB_H_

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#ifndef _INTC_PUB_H_
#define _INTC_PUB_H_
#include "generic.h"
#if 1
#define FIQ_PSRAM (31)
#define FIQ_BLE (30)
#define FIQ_JPEG_ENCODER (29)
#define FIQ_DPLL_UNLOCK (28)
#define FIQ_SPI_DMA (27)
#define FIQ_MAC_WAKEUP (26)
#if (CFG_SOC_NAME == SOC_BK7221U)
#define FIQ_SECURITY (25)
#define FIQ_USB_PLUG_INOUT (24)
#else
#define FIQ_MAILBOX1 (25)
#define FIQ_MAILBOX0 (24)
#endif
#define FIQ_SDIO_DMA (23)
#define FIQ_MAC_GENERAL (22)
#define FIQ_MAC_PROT_TRIGGER (21)
#define FIQ_MAC_TX_TRIGGER (20)
#define FIQ_MAC_RX_TRIGGER (19)
#define FIQ_MAC_TX_RX_MISC (18)
#define FIQ_MAC_TX_RX_TIMER (17)
#define FIQ_MODEM (16)
#define IRQ_GENERDMA (15)
#define IRQ_FFT (14)
#define IRQ_USB (13)
#define IRQ_SD (12)
#define IRQ_SARADC (11)
#define IRQ_AUDIO (10)
#define IRQ_PWM (9)
#if (CFG_SOC_NAME == SOC_BK7231)
#define IRQ_TL410_WATCHDOG (8)
#else
#define IRQ_TIMER (8)
#endif
#define IRQ_GPIO (7)
#define IRQ_SPI (6)
#define IRQ_I2C2 (5)
#define IRQ_I2S_PCM (4)
#define IRQ_IRDA (3)
#define IRQ_I2C1 (2)
#define IRQ_UART2 (1)
#define IRQ_UART1 (0)
#endif
#if 2
#define PRI_FIQ_BLE (31)
#define PRI_FIQ_JPEG_DECODER (30)
#define PRI_FIQ_DPLL_UNLOCK (29)
#define PRI_FIQ_SPI_DMA (7)
#define PRI_FIQ_MAC_WAKEUP (9)
#if (CFG_SOC_NAME == SOC_BK7221U)
#define PRI_FIQ_SECURITY (12)
#define PRI_FIQ_USB_PLUG_INOUT (11)
#else
#define PRI_FIQ_MAILBOX1 (12)
#define PRI_FIQ_MAILBOX0 (11)
#endif
#define PRI_FIQ_SDIO_DMA (8)
#define PRI_FIQ_MAC_GENERAL (1)
#define PRI_FIQ_MAC_PROT_TRIGGER (6)
#define PRI_FIQ_MAC_TX_TRIGGER (3)
#define PRI_FIQ_MAC_RX_TRIGGER (4)
#define PRI_FIQ_MAC_TX_RX_MISC (5)
#define PRI_FIQ_MAC_TX_RX_TIMER (2)
#define PRI_FIQ_MODEM (10)
#define PRI_IRQ_GENERDMA (28)
#define PRI_IRQ_FFT (13)
#define PRI_IRQ_USB (14)
#define PRI_IRQ_SD (15)
#define PRI_IRQ_SARADC (16)
#define PRI_IRQ_AUDIO (27)
#define PRI_IRQ_PWM (17)
#if (CFG_SOC_NAME == SOC_BK7231)
#define PRI_IRQ_TL410_WATCHDOG (18)
#else
#define PRI_IRQ_TIMER (18)
#endif
#define PRI_IRQ_GPIO (19)
#define PRI_IRQ_SPI (20)
#define PRI_IRQ_I2C2 (21)
#define PRI_IRQ_I2S_PCM (22)
#define PRI_IRQ_IRDA (23)
#define PRI_IRQ_I2C1 (24)
#define PRI_IRQ_UART2 (25)
#define PRI_IRQ_UART1 (26)
#endif
extern void intc_service_register(UINT8 int_num, UINT8 int_pri, FUNCPTR isr);
extern void intc_spurious(void);
extern void intc_enable(int index);
extern void intc_disable(int index);
#endif // _INTC_PUB_H_
// eof

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#ifndef _IRDA_PUB_H_
#define _IRDA_PUB_H_
#define IRDA_FAILURE (1)
#define IRDA_SUCCESS (0)
#define IRDA_DEV_NAME "irda"
#define IRDA_CMD_MAGIC (0xe290000)
enum
{
IRDA_CMD_ACTIVE = IRDA_CMD_MAGIC + 1,
IRDA_CMD_SET_POLARITY,
IRDA_CMD_SET_CLK,
IRDA_CMD_GET_KEY
};
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void irda_init(void);
void irda_exit(void);
void irda_isr(void);
#endif //_IRDA_PUB_H_

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#ifndef _MAC_PHY_BYPASS_PUB_H_
#define _MAC_PHY_BYPASS_PUB_H_
#define MPB_DEV_NAME "mac_phy_bypass"
#define MPB_CMD_MAGIC (0xcbe0000)
enum
{
MCMD_RX_MODE_BYPASS_MAC = MPB_CMD_MAGIC + 0,
MCMD_TX_MODE_BYPASS_MAC = MPB_CMD_MAGIC + 1,
MCMD_TX_LEGACY_SET_LEN,
MCMD_TX_HT_VHT_SET_LEN,
MCMD_STOP_BYPASS_MAC,
MCMD_START_BYPASS_MAC,
MCMD_SET_BANDWIDTH,
MCMD_SET_GI,
MCMD_BYPASS_TX_SET_RATE_MFORMAT,
MCMD_SET_TXDELAY,
};
/*MCMD_TX_BYPASS_MAC_RATE*/
#define PPDU_RATE_POSI (4)
#define PPDU_RATE_MASK (0xF)
#define PPDU_BANDWIDTH_POSI (6)
#define PPDU_BANDWIDTH_MASK (0x1)
#define PPDU_LEG_RATE_1MBPS (0x00)
#define PPDU_LEG_RATE_2MBPS (0x01)
#define PPDU_LEG_RATE_5_5MBPS (0x02)
#define PPDU_LEG_RATE_11MBPS (0x03)
#define PPDU_LEG_RATE_6MBPS (0x0B)
#define PPDU_LEG_RATE_9MBPS (0x0F)
#define PPDU_LEG_RATE_12MBPS (0x0A)
#define PPDU_LEG_RATE_18MBPS (0x0E)
#define PPDU_LEG_RATE_24MBPS (0x09)
#define PPDU_LEG_RATE_36MBPS (0x0D)
#define PPDU_LEG_RATE_48MBPS (0x08)
#define PPDU_LEG_RATE_54MBPS (0x0C)
typedef struct mbps_txs_mfr_st {
UINT32 mod_format;
UINT32 rate;
}MBPS_TXS_MFR_ST, *MBPS_TXS_MFR_PTR;
extern void mpb_init(void);
extern void mpb_exit(void);
#endif // _MAC_PHY_BYPASS_PUB_H_

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#ifndef _PWM_PUB_H_
#define _PWM_PUB_H_
#define PWM_FAILURE (1)
#define PWM_SUCCESS (0)
#define PWM_DEV_NAME "pwm"
#define PWM_CMD_MAGIC (0xe230000)
enum
{
CMD_PWM_UNIT_ENABLE = PWM_CMD_MAGIC + 1,
CMD_PWM_UINT_DISABLE,
CMD_PWM_IR_ENABLE,
CMD_PWM_IR_DISABLE,
CMD_PWM_IR_CLEAR,
CMD_PWM_INIT_PARAM,
CMD_PWM_CAP_GET,
CMD_PWM_DEINIT_PARAM
};
enum
{
PWM0 = 0,
PWM1,
PWM2,
PWM3,
PWM4,
PWM5,
PWM_COUNT
};
typedef void (*PFUNC)(UINT8);
#define PWM_ENABLE (0x01)
#define PWM_DISABLE (0x00)
#define PWM_INT_EN (0x01)
#define PWM_INT_DIS (0x00)
#define PMODE_PWM (0x00)
#define PMODE_TIMER (0x01)
#define PMODE_CAP_POS (0x02)
#define PMODE_CAP_NEG (0x03)
#define PWM_CLK_32K (0x00)
#define PWM_CLK_26M (0x01)
typedef struct
{
UINT8 channel;
/* cfg--PWM config
* bit[0]: PWM enable
* 0: PWM disable
* 1: PWM enable
* bit[1]: PWM interrupt enable
* 0: PWM interrupt disable
* 1: PWM interrupt enable
* bit[3:2]: PWM mode selection
* 00: PWM mode
* 01: TIMER
* 10: Capture Posedge
* 11: Capture Negedge
* bit[5:4]: PWM clock select
* 00: PWM clock 32KHz
* 01: PWM clock 26MHz
* 10/11: PWM clock DPLL
* bit[7:6]: reserved
*/
union
{
UINT8 val;
struct
{
UINT8 en: 1;
UINT8 int_en: 1;
UINT8 mode: 2;
UINT8 clk: 2;
UINT8 rsv: 2;
} bits;
} cfg;
#if (CFG_SOC_NAME == SOC_BK7231)
UINT16 end_value;
UINT16 duty_cycle;
#else
UINT32 end_value;
UINT32 duty_cycle;
#endif
PFUNC p_Int_Handler;
} pwm_param_t;
typedef struct
{
UINT32 ucChannel;
UINT16 value;
} pwm_capture_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void pwm_init(void);
extern void pwm_exit(void);
extern void pwm_isr(void);
#endif //_PWM_PUB_H_

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#ifndef _RC_BEKEN_PUB_H_
#define _RC_BEKEN_PUB_H_
#endif // _RC_BEKEN_PUB_H_

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#ifndef _SARADC_PUB_H_
#define _SARADC_PUB_H_
#define SARADC_FAILURE (1)
#define SARADC_SUCCESS (0)
#define SARADC_DEV_NAME "saradc"
#define SARADC_CMD_MAGIC (0xe290000)
enum
{
SARADC_CMD_SET_MODE = SARADC_CMD_MAGIC + 1,
SARADC_CMD_SET_CHANNEL,
SARADC_CMD_SET_SAMPLE_RATE,
SARADC_CMD_SET_WAITING_TIME,
SARADC_CMD_SET_VALID_MODE,
SARADC_CMD_CLEAR_INT,
SARADC_CMD_SET_CLK_RATE,
SARADC_CMD_RUN_OR_STOP_ADC,
SARADC_CMD_SET_CAL_VAL
};
typedef enum
{
SARADC_CALIBRATE_LOW,
SARADC_CALIBRATE_HIGH
} SARADC_MODE;
#define ADC_CONFIG_MODE_SLEEP (0x00UL)
#define ADC_CONFIG_MODE_STEP (0x01UL)
#define ADC_CONFIG_MODE_SOFT_CTRL (0x02UL)
#define ADC_CONFIG_MODE_CONTINUE (0x03UL)
#define ADC_CONFIG_MODE_4CLK_DELAY (0x0UL)
#define ADC_CONFIG_MODE_8CLK_DELAY (0x1UL)
typedef struct
{
UINT16 *pData;
volatile UINT8 current_sample_data_cnt;
UINT8 current_read_data_cnt;
UINT8 data_buff_size;
UINT8 has_data; /* 0: has data 1: no data*/
UINT8 channel;
/* mode: ADC mode
* bit[0:1]: ADC operation mode
* 00: ADC power down mode
* 01: ADC one-step mode
* 10: ADC software control mode
* 11: ADC continuous mode
* bit[2:2]: delay clk(adc setting)
* 0: delay 4 clk
* 1: delay 8 clk
* bit[7:3]: reserved
*/
UINT8 mode;
void (*p_Int_Handler)(void);
unsigned char pre_div; // ADC pre-divide clk
unsigned char samp_rate; // ADC sample rate
unsigned char filter; //ADC filter
} saradc_desc_t;
typedef struct
{
UINT8 enable;
UINT8 channel;
} saradc_chan_t;
typedef struct
{
unsigned short val;
SARADC_MODE mode;
} saradc_cal_val_t;
typedef struct _saradc_calibrate_val_
{
unsigned short low;
unsigned short high;
} saradc_calibrate_val;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void saradc_init(void);
void saradc_exit(void);
void saradc_isr(void);
float saradc_calculate(UINT16 adc_val);
void saradc_config_param_init(saradc_desc_t * adc_config);
extern saradc_calibrate_val saradc_val;
#endif //_SARADC_PUB_H_

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#ifndef _SDIO_PUB_H_
#define _SDIO_PUB_H_
#include "doubly_list.h"
//#define SDIO_TEST
#define SDIO_DEV_NAME "sdio"
#define SDIO_FAILURE ((UINT32)-1)
#define SDIO_SUCCESS (0)
#define BLOCK_LEN (512 * 8)
#define H2S_RD_SYNC (1)
#define H2S_WR_SYNC (2)
#define H2S_RD_SPECIAL (5)
#define S2H_WR_SPECIAL (6)
#define S2H_RD_SYNC (3)
#define S2H_WR_SYNC (4)
#define SDIO_DUMMY_BUFF_ADDR (0x100)
#define SDIO_DUMMY_LENGTH (0x100)
#define SDIO_CMD_GET_FREE_NODE (0xBB)
#define SDIO_CMD_REG_RX_CALLBACK (0xBC)
#define SDIO_CMD_PUSH_FREE_NODE (0xBD)
#define SDIO_CMD_GET_CNT_FREE_NODE (0xBE)
#define SDIO_CMD_CLEAR_TX_VALID (0xC0)
#define SDIO_CMD_SET_TX_VALID (0xC1)
#define SDIO_CMD_PEEK_H2S_COUNT (0xC2)
#define SDIO_CMD_PEEK_S2H_COUNT (0xC3)
typedef void (*SDIO_FUNC)(void *Lparam, void *Rparam);
typedef struct _sdio_mem_node_
{
LIST_HEADER_T node_list;
UINT8 *orig_addr;
UINT8 *addr;
UINT32 length;
SDIO_FUNC callback;
void *Lparam;
void *Rparam;
} SDIO_NODE_T, *SDIO_NODE_PTR;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void sdio_init(void);
extern void sdio_exit(void);
#endif // _SDIO_PUB_H_

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#ifndef _SEC_PUB_H_
#define _SEC_PUB_H_
#define SEC_DEV_NAME "sec"
void hal_sha_update( void *ctx, const unsigned char *input,size_t ilen );
void hal_sha_finish( void *ctx, unsigned char output[32] );
extern void bk_secrity_init(void);
extern void bk_secrity_exit(void);
/********************************************************/
//sha256
/* @brief sha256_init
* @retval ctx
*/
void * hal_sha256_init(void);
/**
* @brief Append SHA256 data to calculate.
* @param ct: from hal_sha256_init
* @param input: the data needed to calculate sha256.
* @param ilen: size of data.
*/
#define hal_sha256_update hal_sha_update
/**
* @brief Calculate the SHA256 of all appended data.
* @param ct: from hal_sha256_init
* @param output: Store the result of calculation of SHA1, result
* need 32 bytes space.
*/
#define hal_sha256_finish hal_sha_finish
//sha1
/* @brief sha1_init
* @retval ctx
*/
void * hal_sha1_init(void);
/**
* @brief Append SHA1 data to calculate.
* @param ct: from hal_sha1_init
* @param input: the data needed to calculate sha1.
* @param ilen: size of data.
*/
#define hal_sha1_update hal_sha_update
/**
* @brief Calculate the SHA1 of all appended data.
* @param ct: from hal_sha1_init
* @param output: Store the result of calculation of SHA1, result
* need 20 bytes space.
*/
#define hal_sha1_finish hal_sha_finish
//aes
/* @brief aes context init
* @param key: the aes key
* @param key: the aes key len,must be 32,24,16.
* @retval ctx
*/
void *hal_aes_init(const u8 *key, size_t key_size);
/* @brief aes_encrypt
* @param ctx: from hal_aes_init
* @param plain: plain data which is need to be encrypt.
* @param cipher: cipher data which is store the encrpyted data.
*/
void hal_aes_encrypt(void *ctx, const u8 *plain, u8 *cipher);
/* @brief aes_decrypt
* @param ctx: from hal_aes_init
* @param cipher: cipher data which is needed to be decrypted.
* @param plain: plain data which store the decrypted data.
*/
void hal_aes_decrypt(void *ctx, const u8 *cipher, u8 *plain);
/* @brief deinit free ctx
* @param ctx: from hal_aes_init
*/
void hal_aes_deinit(void *ctx);
/********************************************************/
#endif

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#ifndef _SPI_PUB_H_
#define _SPI_PUB_H_
#define SPI_FAILURE (1)
#define SPI_SUCCESS (0)
#define SPI_DEV_NAME "spi"
#define SPI_CMD_MAGIC (0xe250000)
enum
{
CMD_SPI_UNIT_ENABLE = SPI_CMD_MAGIC + 1,
CMD_SPI_SET_MSTEN,
CMD_SPI_SET_CKPHA,
CMD_SPI_SET_CKPOL,
CMD_SPI_SET_BITWIDTH,
CMD_SPI_SET_NSSID,
CMD_SPI_SET_CKR,
CMD_SPI_RXINT_EN,
CMD_SPI_TXINT_EN,
CMD_SPI_RXOVR_EN,
CMD_SPI_TXOVR_EN,
CMD_SPI_RXFIFO_CLR,
CMD_SPI_TXFIFO_CLR,
CMD_SPI_RXINT_MODE,
CMD_SPI_TXINT_MODE,
CMD_SPI_START_TRANS,
CMD_SPI_INIT_MSTEN,
CMD_SPI_GET_BUSY
};
typedef struct
{
UINT8 tx_remain_data_cnt;
UINT8 rx_remain_data_cnt;
UINT8 *p_tx_buf;
UINT8 *p_rx_buf;
UINT8 trans_done;
} spi_trans_t;
typedef enum
{
slave,
master
} spi_msten;
extern volatile spi_trans_t spi_trans;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void spi_init(void);
void spi_exit(void);
void spi_isr(void);
#endif //_SPI_PUB_H_

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#ifndef _SCTRL_PUB_H_
#define _SCTRL_PUB_H_
#define SCTRL_DEV_NAME "sys_ctrl"
#define SCTRL_FAILURE ((UINT32)-1)
#define SCTRL_SUCCESS (0)
#define SCTRL_CMD_MAGIC (0xC123000)
enum
{
CMD_GET_CHIP_ID = SCTRL_CMD_MAGIC + 1,
CMD_GET_DEVICE_ID = SCTRL_CMD_MAGIC + 2,
CMD_GET_SCTRL_CONTROL,
CMD_SET_SCTRL_CONTROL,
CMD_SCTRL_MCLK_SELECT,
CMD_SCTRL_MCLK_DIVISION,
CMD_SCTRL_RESET_SET,
CMD_SCTRL_RESET_CLR,
CMD_SCTRL_MODEM_CORE_RESET,
CMD_SCTRL_MPIF_CLK_INVERT,
CMD_SCTRL_MODEM_SUBCHIP_RESET,
CMD_SCTRL_MAC_SUBSYS_RESET,
CMD_SCTRL_USB_SUBSYS_RESET,
CMD_SCTRL_DSP_SUBSYS_RESET,
CMD_SCTRL_BLK_ENABLE,
CMD_SCTRL_BLK_DISABLE,
CMD_SCTRL_DSP_POWERDOWN,
CMD_SCTRL_DSP_POWERUP,
CMD_SCTRL_USB_POWERDOWN,
CMD_SCTRL_USB_POWERUP,
CMD_SCTRL_MAC_POWERDOWN,
CMD_SCTRL_MAC_POWERUP,
CMD_SCTRL_MODEM_POWERDOWN,
CMD_SCTRL_MODEM_POWERUP,
CMD_SCTRL_BLE_POWERDOWN,
CMD_SCTRL_BLE_POWERUP,
CMD_SCTRL_CALI_DPLL,
CMD_SCTRL_BIAS_REG_SET,
CMD_SCTRL_BIAS_REG_CLEAN,
CMD_SCTRL_BIAS_REG_READ,
CMD_SCTRL_BIAS_REG_WRITE,
CMD_SCTRL_ANALOG_CTRL4_SET,
CMD_SCTRL_ANALOG_CTRL4_CLEAN,
CMD_SCTRL_SET_FLASH_DCO,
CMD_SCTRL_SET_FLASH_DPLL,
CMD_SCTRL_NORMAL_SLEEP,
CMD_SCTRL_NORMAL_WAKEUP,
CMD_SCTRL_RTOS_IDLE_SLEEP,
CMD_SCTRL_RTOS_IDLE_WAKEUP,
CMD_SCTRL_RTOS_DEEP_SLEEP,
#if (CFG_SOC_NAME != SOC_BK7231)
CMD_SCTRL_SET_XTALH_CTUNE,
CMD_SCTRL_GET_XTALH_CTUNE,
CMD_BLE_RF_BIT_SET,
CMD_BLE_RF_BIT_CLR,
CMD_BLE_RF_BIT_GET,
CMD_EFUSE_WRITE_BYTE,
CMD_EFUSE_READ_BYTE,
#endif // (CFG_SOC_NAME != SOC_BK7231)
#if (CFG_SOC_NAME == SOC_BK7221U)
CMD_SCTRL_OPEN_DAC_ANALOG,
CMD_SCTRL_CLOSE_DAC_ANALOG,
CMD_SCTRL_OPEN_ADC_MIC_ANALOG,
CMD_SCTRL_CLOSE_ADC_MIC_ANALOG,
CMD_SCTRL_ENALBLE_ADC_LINE_IN,
CMD_SCTRL_DISALBLE_ADC_LINE_IN,
CMD_SCTRL_SET_DAC_VOLUME_ANALOG,
CMD_SCTRL_SET_LINEIN_VOLUME_ANALOG,
CMD_SCTRL_SET_VOLUME_PORT,
CMD_SCTRL_SET_AUD_DAC_MUTE,
CMD_SCTRL_USB_CHARGE_CAL,
CMD_SCTRL_USB_CHARGE_START,
CMD_SCTRL_USB_CHARGE_STOP,
#endif // (CFG_SOC_NAME == SOC_BK7221)
CMD_SCTRL_SET_LOW_PWR_CLK,
CMD_SCTRL_SET_VDD_VALUE,
};
/*CMD_SCTRL_MCLK_SELECT*/
#define MCLK_SELECT_DCO (0x0)
#define MCLK_SELECT_26M_XTAL (0x1)
#define MCLK_SELECT_DPLL (0x2)
#define MCLK_SELECT_LPO (0x3)
/*CMD_SCTRL_BLK_ENABLE CMD_SCTRL_BLK_DISABLE*/
#define BLK_BIT_LINEIN (1 << 19)
#define BLK_BIT_MIC_R_CHANNEL (1 << 18)
#define BLK_BIT_MIC_L_CHANNEL (1 << 17)
#define BLK_BIT_AUDIO_R_CHANNEL (1 << 16)
#define BLK_BIT_AUDIO_L_CHANNEL (1 << 15)
#define BLK_BIT_USB (1 << 14)
#define BLK_BIT_SARADC (1 << 13)
#define BLK_BIT_TEMPRATURE_SENSOR (1 << 12)
#define BLK_BIT_26M_XTAL_LOW_POWER (1 << 11)
#define BLK_BIT_XTAL2RF (1 << 10)
#define BLK_BIT_IO_LDO_LOW_POWER (1 << 09)
#define BLK_BIT_ANALOG_SYS_LDO (1 << 08)
#define BLK_BIT_DIGITAL_CORE_LDO_LOW_POWER (1 << 07)
#define BLK_BIT_NC0 (1 << 06)
#define BLK_BIT_DPLL_480M (1 << 05)
#define BLK_BIT_32K_XTAL (1 << 04)
#define BLK_BIT_26M_XTAL (1 << 03)
#define BLK_BIT_ROSC32K (1 << 02)
#define BLK_BIT_DCO (1 << 01)
#define BLK_BIT_FLASH (1 << 00)
/* CMD_SCTRL_RESET _SET/_CLR*/
#define PARAM_MODEM_CORE_RESET_BIT (1 << 6)
#define PARAM_TL410_EXT_WAIT_BIT (1 << 5)
#define PARAM_USB_SUBSYS_RESET_BIT (1 << 4)
#define PARAM_TL410_BOOT_BIT (1 << 3)
#define PARAM_MAC_SUBSYS_RESET_BIT (1 << 2)
#define PARAM_DSP_SUBSYS_RESET_BIT (1 << 1)
#define PARAM_MODEM_SUBCHIP_RESET_BIT (1 << 0)
/* CMD_GET_SCTRL_CONTROL CMD_SET_SCTRL_CONTROL*/
#define MCLK_MODE_DCO (0x0)
#define MCLK_MODE_26M_XTAL (0x1)
#define MCLK_MODE_DPLL (0x2)
#define MCLK_MODE_LPO (0x3)
/*CMD_SCTRL_BIAS_REG_SET CMD_SCTRL_BIAS_REG_CLEAN*/
#define PARAM_BIAS_CAL_OUT_POSI (16)
#define PARAM_BIAS_CAL_OUT_MASK (0x1F)
#define PARAM_LDO_VAL_MANUAL_POSI (8)
#define PARAM_LDO_VAL_MANUAL_MASK (0x1F)
#define PARAM_BIAS_CAL_MANUAL_BIT (1 << 4)
#define PARAM_BIAS_CAL_TRIGGER_BIT (1 << 0)
/*CMD_SCTRL_ANALOG_CTRL4_SET CMD_SCTRL_ANALOG_CTRL4_CLEAN*/
#define PARAM_VSEL_SYS_LDO_POSI (27)
#define PARAM_VSEL_SYS_LDO_MASK (0x3)
#if (CFG_SOC_NAME == SOC_BK7231U)
#define DEFAULT_TXID_XTAL (0x19)
#elif (CFG_SOC_NAME == SOC_BK7221U)
#define DEFAULT_TXID_XTAL (0x08)
#endif // (CFG_SOC_NAME == SOC_BK7231U)
#if (CFG_SOC_NAME != SOC_BK7231)
#define PARAM_XTALH_CTUNE_MASK (0x3F)
#define PARAM_AUD_DAC_GAIN_MASK (0x1F)
#endif // (CFG_SOC_NAME != SOC_BK7231)
/*CMD_SCTRL_SET_LOW_PWR_CLK*/
#define LPO_SELECT_ROSC (0x0)
#define LPO_SELECT_32K_XTAL (0x1)
#define LPO_SELECT_32K_DIV (0x2)
typedef union
{
UINT32 val;
struct
{
UINT32 mclk_mux: 2;
UINT32 resv0: 2;
UINT32 mclk_div: 4;
UINT32 flash_26m_select: 1;
UINT32 hclk_div2_en: 1;
UINT32 modem_clk480m_pwd: 1;
UINT32 mac_clk480m_pwd: 1;
UINT32 mpif_clk_inv: 1;
UINT32 sdio_clk_inv: 1;
UINT32 resv1: 18;
} bits;
} SYS_CTRL_U;
typedef struct efuse_oper_st
{
UINT8 addr;
UINT8 data;
} EFUSE_OPER_ST, *EFUSE_OPER_PTR;
typedef struct charge_oper_st
{
UINT8 type;
UINT8 oper;
UINT8 cal[3];
} CHARGE_OPER_ST, *CHARGE_OPER_PTR;
#define AUDIO_DAC_VOL_DIFF_MODE (0)
#define AUDIO_DAC_VOL_SINGLE_MODE (1)
#define AUDIO_DAC_ANALOG_UNMUTE (0)
#define AUDIO_DAC_ANALOG_MUTE (1)
#define EFUSE_ENCRYPT_WORD_ADDR (0)
#define EFUSE_ENCRYPT_WORD_LEN (16)
#define EFUSE_UID_ADDR (16)
#define EFUSE_UID_LEN (8)
#define EFUSE_MAC_START_ADDR (24)
#define EFUSE_MAC_LEN (6)
#define EFUSE_USER_AREA_ADDR (30)
#define EFUSE_USER_AREA_LEN (1)
#define EFUSE_CTRL_ADDR (31)
#define EFUSE_USER_AREA_LEN (1)
#define EFUSE_INIT_VAL (0x0)
#define EFUSE_CTRL_JTAG_DISABLE (1 << 7)
#define EFUSE_CTRL_FLASH_DOWNLOAD_DISABLE (1 << 6)
#define EFUSE_CTRL_ENCRYPT_EN (1 << 5)
#define EFUSE_CTRL_ENCRYPT_DISABLE_READ (1 << 4)
#define EFUSE_CTRL_ENCRYPT_DISABLE_WRITE (1 << 3)
#define EFUSE_CTRL_UID_DISABLE_WRITE (1 << 2)
#define EFUSE_CTRL_MAC_DISABLE_WRITE (1 << 1)
#define EFUSE_CTRL_ALL_AREA_DISABLE_WRITE (1 << 0)
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void sctrl_init(void);
extern void sctrl_exit(void);
extern void sctrl_normal_exit_sleep(void);
extern void sctrl_normal_enter_sleep(UINT32 peri_clk);
extern void sctrl_mcu_exit(void);
extern void sctrl_mcu_init(void);
extern void sctrl_mcu_sleep(UINT32 );
extern UINT32 sctrl_mcu_wakeup(void);
extern void sctrl_ps_dump();
extern void sctrl_sta_rf_sleep(void);
extern void sctrl_sta_rf_wakeup(void);
extern void sctrl_sta_ps_init(void);
extern void sctrl_flash_select_dco(void);
extern UINT8 sctrl_if_rf_sleep(void);
extern UINT32 charger_is_full(void);
extern UINT32 usb_is_pluged(void);
#endif // _SCTRL_PUB_H_

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#ifndef _UART_PUB_H
#define _UART_PUB_H
#include <stdio.h>
#if CFG_RELEASE_FIRMWARE
#define os_printf os_null_printf
#else
#if CFG_BACKGROUND_PRINT
#define os_printf os_null_printf
#else
#ifdef KEIL_SIMULATOR
#define os_printf os_null_printf
#else
#define os_printf bk_printf
#endif // KEIL_SIMULATOR
#endif // CFG_BACKGROUND_PRINT
#endif // CFG_RELEASE_FIRMWARE
#define warning_prf bk_printf
#define fatal_prf bk_printf
#define null_prf os_null_printf
#define UART_SUCCESS (0)
#define UART_FAILURE ((UINT32)-1)
#define UART2_DEV_NAME ("uart2") /*debug purpose*/
#define UART1_DEV_NAME ("uart1") /*comm purpose*/
#define UART_CMD_MAGIC (0xC124000)
#define UART1_PORT 0
#define UART2_PORT 1
enum
{
CMD_SEND_BACKGROUND = UART_CMD_MAGIC + 0,
CMD_UART_RESET = UART_CMD_MAGIC + 1,
CMD_RX_COUNT,
CMD_RX_PEEK,
CMD_UART_INIT,
CMD_UART_SET_RX_CALLBACK,
CMD_UART_SET_TX_CALLBACK,
CMD_SET_STOP_END,
CMD_UART_SET_TX_FIFO_NEEDWR_CALLBACK,
CMD_SET_TX_FIFO_NEEDWR_INT,
};
/* CMD_RX_PEEK*/
#define URX_PEEK_SIG (0x0ee)
typedef struct _peek_rx_
{
UINT32 sig;
UINT32 len;
void *ptr;
} UART_PEEK_RX_T, *UART_PEEK_RX_PTR;
typedef void (*uart_callback)(int uport, void *param);
typedef struct uart_callback_des
{
uart_callback callback;
void *param;
}UART_CALLBACK_RX_T, *UART_CALLBACK_RX_PTR;
/**
* UART data width
*/
typedef enum
{
BK_DATA_WIDTH_5BIT,
BK_DATA_WIDTH_6BIT,
BK_DATA_WIDTH_7BIT,
BK_DATA_WIDTH_8BIT
} uart_data_width_t;
/**
* UART stop bits
*/
typedef enum
{
BK_STOP_BITS_1,
BK_STOP_BITS_2,
} uart_stop_bits_t;
/**
* UART flow control
*/
typedef enum
{
FLOW_CTRL_DISABLED,
FLOW_CTRL_CTS,
FLOW_CTRL_RTS,
FLOW_CTRL_RTS_CTS
} uart_flow_control_t;
/**
* UART parity
*/
typedef enum
{
BK_PARITY_NO,
BK_PARITY_ODD,
BK_PARITY_EVEN,
} uart_parity_t;
typedef struct
{
uint32_t baud_rate;
uart_data_width_t data_width;
uart_parity_t parity;
uart_stop_bits_t stop_bits;
uart_flow_control_t flow_control;
uint8_t flags; /**< if set, UART can wake up MCU from stop mode, reference: @ref UART_WAKEUP_DISABLE and @ref UART_WAKEUP_ENABLE*/
} bk_uart_config_t;
extern int uart_print_port;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void uart1_init(void);
extern void uart1_exit(void);
extern void uart1_isr(void);
extern void uart2_init(void);
extern void uart2_exit(void);
extern void uart2_isr(void);
extern INT32 os_null_printf(const char *fmt, ...);
extern void fatal_print(const char *fmt, ...);
extern INT32 uart_printf(const char *fmt, ...);
extern void bk_printf(const char *fmt, ...);
extern void uart_send_byte(UINT8 ch, UINT8 data);
extern void bk_send_string(UINT8 uport, const char *string);
extern UINT32 uart_wait_tx_over();
extern UINT8 uart_is_tx_fifo_empty(UINT8 uport);
extern UINT8 uart_is_tx_fifo_full(UINT8 uport);
extern int uart_read_byte(int uport);
extern int uart_write_byte(int uport, char c);
#endif // _UART_PUB_H

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#ifndef _USB_PUB_H_
#define _USB_PUB_H_
#include "include.h"
#define UVC_DEMO_SUPPORT102
#define USB_FAILURE (1)
#define USB_SUCCESS (0)
#define USB_DEV_NAME "usb"
typedef void (*USB_FPTR)(void *, void *);
#define USB_CMD_MAGIC (0xe550000)
enum
{
UCMD_RESET = USB_CMD_MAGIC + 1,
UCMD_MSC_REGISTER_FIDDLE_CB,
UCMD_UVC_REGISTER_CONFIG_NOTIFY_CB,
UCMD_UVC_REGISTER_RX_VSTREAM_CB,
UCMD_UVC_REGISTER_RX_VSTREAM_BUF_PTR,
UCMD_UVC_REGISTER_RX_VSTREAM_BUF_LEN,
UCMD_UVC_SET_PARAM,
UCMD_UVC_START_STREAM,
UCMD_UVC_STOP_STREAM,
UCMD_UVC_GET_CONNECT_STATUS,
UCMD_UVC_RECEIVE_VSTREAM,
UCMD_UVC_ENABLE_MJPEG,
UCMD_UVC_ENABLE_H264,
UCMD_USB_CONNECTED_REGISTER_CB
};
/*UCMD_UVC_SET_PARAM*/
#define UVC_MUX_PARAM(resolution_id, fps) (fps + (resolution_id << 16))
#define UVC_DEMUX_FPS(param) (param & 0xffff)
#define UVC_DEMUX_ID(param) ((param >> 16) & 0xffff)
typedef enum
{
USB_HOST_MODE = 0,
USB_DEVICE_MODE = 1
} USB_MODE;
/*
* The value is defined in field wWidth and wHeight in 'Video Streaming MJPEG
Frame Type Descriptor'
*/
#ifdef UVC_DEMO_SUPPORT100
typedef enum
{
U2_FRAME_640_480 = 1,
U2_FRAME_640_360 = 2,
U2_FRAME_320_240 = 3,
U2_FRAME_168_120 = 4,
} E_FRAME_ID_USB20;
typedef enum
{
U1_FRAME_640_480 = 1,
U1_FRAME_160_120 = 2,
} E_FRAME_ID_USB11;
#elif defined(UVC_DEMO_SUPPORT102)
typedef enum
{
UVC_FRAME_352_288 = 0,
UVC_FRAME_320_240 = 1,
UVC_FRAME_640_360 = 2,
UVC_FRAME_640_480 = 3,
UVC_FRAME_COUNT
} E_FRAME_ID_USB20;
#endif
typedef enum
{
FPS_30 = 30,
FPS_25 = 25,
FPS_20 = 20,
FPS_15 = 15,
FPS_10 = 10,
FPS_5 = 5,
} E_FRAME_RATE_ID;
/*
* Finish DRC interrupt processing
*/
enum
{
BSR_NONE_EVENT = 0,
BSR_ERROR_EVENT,
BSR_CONNECT_EVENT,
BSR_CONNECTED_EVENT,
BSR_DISCONNECT_EVENT,
BSR_READ_OK_EVENT
};
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void usb_init(void);
extern void usb_exit(void);
extern uint32_t MUSB_HfiRead( uint32_t first_block, uint32_t block_num, uint8_t
*dest);
extern uint32_t MUSB_HfiWrite( uint32_t first_block, uint32_t block_num, uint8_t
*dest);
extern void MGC_RegisterCBTransferComplete(FUNCPTR func);
extern uint8_t MUSB_GetConnect_Flag(void);
#if (CFG_SOC_NAME == SOC_BK7221U)
#define USB_PLUG_FAILURE (1)
#define USB_PLUG_SUCCESS (0)
#define USB_PLUG_DEV_NAME "usb_plug"
#include "gpio_pub.h"
void usb_plug_inout_init(void);
void usb_plug_inout_exit(void);
#endif // (CFG_SOC_NAME == SOC_BK7221U)
#endif //_USB_PUB_H_

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#ifndef _WDT_PUB_H_
#define _WDT_PUB_H_
#define WDT_FAILURE (1)
#define WDT_SUCCESS (0)
#define WDT_DEV_NAME "wdt"
#define WDT_CMD_MAGIC (0xe330000)
enum
{
WCMD_POWER_UP = WDT_CMD_MAGIC + 1,
WCMD_SET_PERIOD,
WCMD_RELOAD_PERIOD,
WCMD_POWER_DOWN
};
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void wdt_init(void);
extern void wdt_exit(void);
#endif //_WDT_PUB_H_

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#ifndef _APP_MUSIC_PUB_H_
#define _APP_MUSIC_PUB_H_
extern void media_thread_init(void);
extern void media_msg_sender(void const *param_ptr);
extern void key_init(void);
#endif

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#ifndef _BK7011_CAL_PUB_H_
#define _BK7011_CAL_PUB_H_
#include "typedef.h"
#include "sys_config.h"
#define CFG_TEMP_DETECT_VERSION0 0U
#define CFG_TEMP_DETECT_VERSION1 1U
#define CFG_TEMP_DIFF_PWR_FREQOFFSET 1
#if (CFG_SOC_NAME == SOC_BK7231)
#define CFG_TEMP_DETECT_VERSION CFG_TEMP_DETECT_VERSION0
#else
#define CFG_TEMP_DETECT_VERSION CFG_TEMP_DETECT_VERSION1
#endif
#if CFG_TEMP_DETECT_VERSION == CFG_TEMP_DETECT_VERSION1
typedef struct tmp_pwr_st {
unsigned trx0x0c_12_15 : 4;
signed p_index_delta : 6;
signed p_index_delta_g : 6;
signed p_index_delta_ble : 6;
unsigned xtal_c_dlta : 6;
} TMP_PWR_ST, *TMP_PWR_PTR;
#else
typedef struct tmp_pwr_st {
UINT8 mod;
UINT8 pa;
UINT16 pwr_idx_shift;
} TMP_PWR_ST, *TMP_PWR_PTR;
#endif
struct temp_cal_pwr_st {
UINT8 idx;
UINT8 mode;
INT16 shift;
INT16 shift_g;
};
extern void calibration_main(void);
extern INT32 rwnx_cal_load_trx_rcbekn_reg_val(void);
extern void rwnx_cal_set_txpwr_by_rate(INT32 rate, UINT32 test_mode);
extern void rwnx_cal_set_txpwr_by_channel(UINT32 channel);
extern INT32 rwnx_cal_save_trx_rcbekn_reg_val(void);
extern void do_calibration_in_temp_dect(void);
extern void bk7011_cal_bias(void);
extern void bk7011_cal_dpll(void);
extern void rwnx_cal_set_txpwr(UINT32 pwr_gain, UINT32 grate);
extern UINT32 manual_cal_get_pwr_idx_shift(UINT32 rate, UINT32 bandwidth, UINT32 *pwr_gain);
extern int manual_cal_get_txpwr(UINT32 rate, UINT32 channel, UINT32 bandwidth, UINT32 *pwr_gain);
extern void manual_cal_save_txpwr(UINT32 rate, UINT32 channel, UINT32 pwr_gain);
#if (CFG_SOC_NAME == SOC_BK7231U)
extern void manual_cal_11b_2_ble(void);
#endif
extern UINT32 manual_cal_fitting_txpwr_tab(void);
extern void manual_cal_show_txpwr_tab(void);
extern UINT32 manual_cal_load_txpwr_tab_flash(void);
extern int manual_cal_save_txpwr_tab_to_flash(void);
extern int manual_cal_save_chipinfo_tab_to_flash(void);
extern UINT8 manual_cal_wirte_otp_flash(UINT32 addr, UINT32 len, UINT8 *buf);
extern UINT8 manual_cal_read_otp_flash(UINT32 addr, UINT32 len, UINT8 *buf);
extern UINT32 manual_cal_load_default_txpwr_tab(UINT32 is_ready_flash);
extern void manual_cal_set_dif_g_n40(UINT32 diff);
extern void manual_cal_set_dif_g_n20(UINT32 diff);
extern void manual_cal_get_current_temperature(void);
extern int manual_cal_write_macaddr_to_flash(UINT8 *mac_ptr);
extern int manual_cal_get_macaddr_from_flash(UINT8 *mac_ptr);
extern void manual_cal_show_otp_flash(void);
extern void manual_cal_clear_otp_flash(void);
extern void manual_cal_set_xtal(UINT32 xtal);
extern void manual_cal_set_lpf_iq(UINT32 lpf_i, UINT32 lpf_q);
extern void manual_cal_load_lpf_iq_tag_flash(void);
extern void manual_cal_load_xtal_tag_flash(void);
#if CFG_TEMP_DETECT_VERSION == CFG_TEMP_DETECT_VERSION1
void manual_cal_do_xtal_temp_delta_set(INT8 shift);
#endif
extern void manual_cal_do_xtal_cali(UINT16 cur_val, UINT16 *last, UINT16 thre, UINT16 init_val);
extern UINT32 manual_cal_get_xtal(void);
extern INT8 manual_cal_get_dbm_by_rate(UINT32 rate, UINT32 bandwidth);
extern INT8 manual_cal_get_cur_txpwr_dbm(void);
extern int manual_cal_load_temp_tag_from_flash(void);
extern int manual_cal_load_xtal_tag_from_flash(void);
extern void manual_cal_load_differ_tag_from_flash(void);
extern void bk7011_micopwr_config_tssi_read_prepare(void);
extern void bk7011_micopwr_tssi_read(void);
extern void bk7011_micopwr_tssi_show(void);
extern void rwnx_cal_set_reg_adda_ldo(UINT32 val);
extern void rwnx_cal_set_reg_rx_ldo(void);
extern void manual_cal_tmp_pwr_init(UINT16 init_temp, UINT16 init_thre, UINT16 init_dist);
extern void manual_cal_tmp_pwr_init_reg(UINT16 reg_mod, UINT16 reg_pa);
extern void manual_cal_temp_pwr_unint(void);
extern void manual_cal_set_tmp_pwr_flag(UINT8 flag);
extern TMP_PWR_PTR manual_cal_set_tmp_pwr(UINT16 cur_val, UINT16 thre, UINT16 *last);
extern UINT32 manual_cal_load_temp_tag_flash(void);
extern UINT32 manual_cal_load_adc_cali_flash(void);
extern void manual_cal_do_single_temperature(void);
extern void rwnx_cal_set_reg_mod_pa(UINT16 reg_mod, UINT16 reg_pa);
extern void rwnx_cal_do_temp_detect(UINT16 cur_val, UINT16 thre, UINT16 *last);
extern void rwnx_cal_set_lpfcap_iq(UINT32 lpfcap_i, UINT32 lpfcap_q);
extern void rwnx_cal_set_40M_extra_setting(UINT8 val);
extern void rwnx_cal_set_40M_setting(void);
extern void rwnx_cal_set_txpwr_for_ble_boardcast(void);
extern void rwnx_cal_recover_txpwr_for_wifi(void);
extern void rwnx_cal_initial_calibration(void);
extern UINT32 rwnx_tpc_pwr_idx_translate(UINT32 pwr_gain, UINT32 rate, UINT32 print_log );
extern UINT32 rwnx_tpc_get_pwridx_by_rate(UINT32 rate, UINT32 print_log);
extern void rwnx_use_tpc_set_pwr(void);
extern void rwnx_no_use_tpc_set_pwr(void);
extern UINT32 rwnx_is_tpc_bit_on(void);
extern UINT32 rwnx_sys_is_enable_hw_tpc(void);
extern void bk7011_set_rf_config_tssithred(int tssi_thred);
extern int bk7011_is_rfcali_mode_auto(void);
extern void bk7011_set_rfcali_mode(int mode);
extern void bk7011_cal_dcormod_show(void);
extern void rwnx_cal_ble_set_rfconfig(void);
extern void rwnx_cal_ble_recover_rfconfig(void);
#endif // _BK7011_CAL_PUB_H_

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#ifndef DRIVER_AUDIO_IF_PUB_H
#define DRIVER_AUDIO_IF_PUB_H
extern void aud_open(void);
extern void aud_close(void);
extern uint8_t aud_get_channel(void);
extern uint16_t aud_get_buffer_size(void);
extern void aud_fill_buffer( uint8_t *buff, uint16_t len );
extern uint16_t aud_get_buffer_length(uint8_t *buff, uint16_t len);
extern void aud_initial(uint32_t freq, uint32_t channels, uint32_t bits_per_sample);
extern uint16_t aud_get_fill_size(void);
extern int32_t aud_hw_init(void);
extern uint8_t is_aud_opened(void);
#endif

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#ifndef _DRIVER_CODEC_ES8374_PUB_H_
#define _DRIVER_CODEC_ES8374_PUB_H_
extern void es8374_codec_init(void);
extern void es8374_codec_configure(unsigned int fs, unsigned char datawidth);
extern void es8374_codec_close(void);
extern void es8374_codec_volume_control(unsigned char volume);
extern void es8374_codec_mute_control(BOOL enable);
#endif

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Living_SDK/platform/mcu/bk7231u/beken/func/include/fake_clock_pub.h Normal file
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#ifndef _FAKE_CLOCK_PUB_H_
#define _FAKE_CLOCK_PUB_H_
#include "include.h"
#define FCLK_PWM_ID PWM0
#if (CFG_SUPPORT_RTT)
#define FCLK_DURATION_MS (1000 / RT_TICK_PER_SECOND)
#define FCLK_SECOND (RT_TICK_PER_SECOND)
#else
#define FCLK_DURATION_MS 2
#define FCLK_SECOND (1000/FCLK_DURATION_MS)
#define TICK_PER_SECOND FCLK_SECOND
#endif
#define BK_MS_TO_TICKS(x) ((x) / (FCLK_DURATION_MS))
#define BK_TICKS_TO_MS(x) ((x) * (FCLK_DURATION_MS))
extern UINT64 fclk_get_tick(void);
extern UINT32 fclk_get_second(void);
extern void fclk_reset_count(void);
extern void fclk_init(void);
extern UINT32 fclk_from_sec_to_tick(UINT32 sec);
extern UINT32 fclk_cal_endvalue(UINT32 mode);
#endif // _FAKE_CLOCK_PUB_H_
// eof

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#ifndef _FUNC_PUB_H_
#define _FUNC_PUB_H_
#define FUNC_DEBUG
#ifdef FUNC_DEBUG
#define FUNC_PRT os_printf
#define FUNC_WPRT warning_prf
#else
#define FUNC_PRT os_null_printf
#define FUNC_WPRT os_null_printf
#endif
extern UINT32 func_init_extended(void);
extern UINT32 func_init_basic(void);
#endif // _FUNC_PUB_H_
// eof

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#ifndef _FUSB_PUB_H_
#define _FUSB_PUB_H_
//#define FMSC_TEST
//#define FHID_TEST
//#define FUVC_TEST
#define FUSB_FAILURE ((UINT32)-1)
#define FUSB_SUCCESS (0)
extern UINT32 fusb_init(void);
void fmsc_fiddle_process(void);
#endif
// eof

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#ifndef _HOSTAPD_INTF_PUB_H_
#define _HOSTAPD_INTF_PUB_H_
extern int hapd_intf_ioctl(unsigned long arg);
extern void hapd_intf_ke_rx_handle(INT32 dummy);
extern int hapd_intf_set_ap(void *beacon, int bcn_len, int head_len);
extern void wpa_buffer_scan_results(void);
extern void wpa_clear_scan_results(void);
extern void wpa_enable_traffic_port_at_opensystem(void);
#endif
// eof

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Living_SDK/platform/mcu/bk7231u/beken/func/include/manual_ps_pub.h Normal file
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#ifndef _MANUAL_PS_PUB_H_
#define _MANUAL_PS_PUB_H_
typedef enum {
PS_DEEP_WAKEUP_GPIO = 0,
PS_DEEP_WAKEUP_RTC = 1,
} PS_DEEP_WAKEUP_WAY;
typedef struct ps_deep_ctrl{
PS_DEEP_WAKEUP_WAY deep_wkway;
UINT32 gpio_lv;
UINT32 param;
}PS_DEEP_CTRL_PARAM;
typedef enum {
MANUAL_MODE_NORMAL = 0,
MANUAL_MODE_IDLE = 1,
} MANUAL_MODE;
#define PS_SUPPORT_MANUAL_SLEEP 0
typedef void (*ps_wakeup_cb)(void);
extern void deep_sleep_wakeup_with_gpio(UINT32 gpio_index_map,UINT32 gpio_edge_map);
extern void bk_wlan_ps_wakeup_with_timer(MANUAL_MODE mode,UINT32 sleep_time);
extern void bk_wlan_ps_wakeup_with_peri( UINT8 uart2_wk, UINT32 gpio_index_map,UINT32 gpio_edge_map);
extern void bk_wlan_ps_wakeup_with_gpio(MANUAL_MODE mode,UINT32 gpio_index_map,UINT32 gpio_edge_map);
#endif

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#ifndef _MCU_PS_PUB_H_
#define _MCU_PS_PUB_H_
#include "typedef.h"
#define CFG_MCU_PS_SELECT_120M 1
typedef struct mcu_ps
{
UINT8 mcu_ps_on;
int peri_busy_count;
UINT32 mcu_prevent;
} MCU_PS_INFO;
typedef struct sctrl_mcu_ps
{
UINT8 hw_sleep ;
UINT8 first_sleep ;
UINT8 mcu_use_dco;
} SCTRL_MCU_PS_INFO;
#define MCU_PS_CONNECT CO_BIT(0)
#define MCU_PS_ADD_KEY CO_BIT(1)
#define CHIP_U_MCU_WKUP_USE_TIMER 1
#define PS_USE_UART_WAKE_ARM 1
extern void vTaskStepTick( const TickType_t );
extern void mcu_ps_init(void);
extern void mcu_ps_exit(void);
extern UINT32 mcu_power_save(UINT32 );
extern void mcu_prevent_clear(UINT32 );
extern void mcu_prevent_set(UINT32 );
extern void peri_busy_count_dec(void );
extern void peri_busy_count_add(void );
extern UINT32 peri_busy_count_get(void );
extern UINT32 mcu_prevent_get(void );
extern UINT32 fclk_update_tick(UINT32 tick);
extern void mcu_ps_dump(void);
extern void ps_pwm0_reconfig(UINT32 , UINT8 );
extern void ps_pwm0_resume_tick(void);
extern void ps_pwm0_suspend_tick(UINT32 );
extern void ps_pwm0_disable(void );
extern void ps_pwm0_enable(void);
extern UINT32 ps_timer3_disable(void);
extern void ps_timer3_enable(UINT32 );
extern UINT32 ps_pwm0_int_status(void );
extern UINT32 rtt_update_tick(UINT32 tick);
extern UINT32 ps_timer3_measure_prepare(void);
extern UINT32 mcu_ps_tsf_cal(UINT64);
extern UINT32 mcu_ps_machw_cal(void);
extern UINT32 mcu_ps_machw_reset(void);
extern UINT32 mcu_ps_machw_init(void);
#endif

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#ifndef _MSG_PUB_H_
#define _MSG_PUB_H_
#define MSG_SUCCESS_RET (0)
#define MSG_FAILURE_RET (-1)
//-------按键触发状态定义---------
#define KEY_SHORT_UP 0x00
#define KEY_HOLD 0x4000
#define KEY_LONG 0x8000
#define KEY_LONG_UP 0xc000
#define KEY_DOUBLE_CLICK 0x2000
#define KEY_IRDA_LONG 0x1000
#define KEY_IRDA_SHORT 0x800
/* message table*/
#define KEY_MSG_GP (0x00000000) /* Attention: special msg*/
#define SDMUSIC_MSG_GP (0x10000000)
#define UDISK_MSG_GP (0x20000000)
#define LINEIN_MSG_GP (0x30000000)
#define OTHER_MSG_GP (0x40000000)
/* Name format: MSG_module_messageInformation
assume: message number is less than 65535 at one module
*/
enum
{
MSG_NULL = 0,
/* Attention: special msg for key press, from 0x00000000--0x00000fff*/
//-------按键消息值定义---------
MSG_KEY_0 = MSG_NULL + 0x1,
MSG_KEY_1,
MSG_KEY_2,
MSG_KEY_3,
MSG_KEY_4,
MSG_KEY_5,
MSG_KEY_6,
MSG_KEY_7,
MSG_KEY_8,
MSG_KEY_9,
MSG_BT_MIX_KEY,
MSG_KEY_PLAY,
MSG_KEY_STOP,
MSG_KEY_PLUS,
MSG_KEY_MINUS,
MSG_KEY_PREV,
MSG_KEY_NEXT,
MSG_KEY_VOL_DOWN,
MSG_KEY_VOL_UP,
MSG_KEY_MODE,
MSG_KEY_POWER,
MSG_KEY_CALL,
MSG_NO_KEY = 0xff,
/*sd music msg*/
MSG_SD_INIT = SDMUSIC_MSG_GP + 0x0000,
MSG_SD_ATTACH, /* sd attach or detach*/
MSG_SD_DETACH,
/*usb disk msg*/
MSG_UDISK_INIT = UDISK_MSG_GP + 0x0000,
MSG_USB_ATTACH,
MSG_USB_DETATCH,
/*linein msg*/
MSG_LINEIN_INIT = LINEIN_MSG_GP + 0x0000,
MSG_LINEIN_ATTACH,
MSG_LINEIN_DETACH,
/*other msg*/
MSG_LED_INIT = OTHER_MSG_GP + 0x0000,
MSG_DEBUG_UART_RX, /* debug uart gets datum*/
MSG_SDADC, /* sdadc*/
MSG_MUSIC_PLAY,
MSG_MUSIC_STOP,
MSG_POWER_DOWN,
MSG_POWER_UP,
MSG_IRDA_RX,
MSG_LOWPOWER_DETECT,
MSG_MEDIA_READ_ERR, /* mp3-mode,SD/Udisk read Err */
MSG_INPUT_TIMEOUT,
MSG_HALF_SECOND,
MSG_1S_TIMER
};
#endif
// EOF

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#ifndef _CFG_INFO_PUB_H
#define _CFG_INFO_PUB_H
#define INFO_TLV_HEADER (0x00564c54) // ASCII TLV
typedef enum{
AUTO_CONNECT_ITEM = 0x11111111,
WIFI_MODE_ITEM = 0x22222222,
DHCP_MODE_ITEM = 0x33333333,
WIFI_MAC_ITEM = 0x44444444,
SSID_KEY_ITEM = 0x55555555,
IP_CONFIG_ITEM = 0x66666666,
RF_CFG_TSSI_ITEM = 0x77777777,
RF_CFG_DIST_ITEM = 0x88888888,
RF_CFG_MODE_ITEM = 0x99999999,
CHARGE_CONFIG_ITEM = 0xaaaaaaaa,
}NET_INFO_ITEM;
typedef struct info_item_st
{
UINT32 type;
UINT32 len;
}INFO_ITEM_ST,TLV_HEADER_ST,*INFO_ITEM_ST_PTR;
typedef struct item_common_st
{
INFO_ITEM_ST head;
UINT32 value;
}ITEM_COMM_ST,*ITEM_COMM_ST_PTR;
typedef struct item_mac_addr_st
{
INFO_ITEM_ST head;
char mac[6];
char reserved[2];// 4bytes boundary
}ITEM_MAC_ADDR_ST,*ITEM_MAC_ADDR_ST_PTR;
typedef struct item_charge_st
{
INFO_ITEM_ST head;
char chrg[3];
char reserved[1];
}ITEM_CHARGE_ST,*ITEM_CHARGE_ST_PTR;
typedef struct item_ssidkey_st
{
INFO_ITEM_ST head;
char wifi_ssid[32];
char wifi_key[64];
}ITEM_SSIDKEY_ST,*ITEM_SSIDKEY_ST_PTR;
typedef struct item_ip_config_st
{
INFO_ITEM_ST head;
char local_ip_addr[16];
char net_mask[16];
char gateway_ip_addr[16];
}ITEM_IP_CONFIG_ST,*ITEM_IP_CONFIG_ST_PTR;
UINT32 test_get_whole_tbl(UINT8 *ptr);
UINT32 save_info_item(NET_INFO_ITEM item,UINT8 *ptr0,UINT8*ptr1,UINT8 *ptr2);
UINT32 get_info_item(NET_INFO_ITEM item,UINT8 *ptr0,UINT8 *ptr1, UINT8 *ptr2);
#endif

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#ifndef _POWER_SAVE_PUB_H_
#define _POWER_SAVE_PUB_H_
#include "arch.h"
#include "rtos_pub.h"
#include "rw_pub.h"
#include "wlan_ui_pub.h"
//#define PS_DEBUG
#ifdef PS_DEBUG
#define PS_PRT os_printf
#define PS_WPRT os_printf
#define PS_DBG os_printf
#else
#define PS_PRT os_null_printf
#define PS_WPRT os_null_printf
#define PS_DBG os_null_printf
#endif
#define PS_USE_KEEP_TIMER 0
#define PS_USE_WAIT_TIMER 0
#define PS_WAKEUP_MOTHOD_RW 1
typedef enum
{
PS_BMSG_IOCTL_RF_ENABLE = 0,
PS_BMSG_IOCTL_RF_DISANABLE = 1,
PS_BMSG_IOCTL_MCU_ENABLE = 2,
PS_BMSG_IOCTL_MCU_DISANABLE = 3,
PS_BMSG_IOCTL_RF_TD_SET = 4,
#if PS_USE_KEEP_TIMER
PS_BMSG_IOCTL_RF_KP_SET = 5,
PS_BMSG_IOCTL_RF_KP_HANDLER = 6,
PS_BMSG_IOCTL_RF_KP_STOP = 7,
#endif
#if PS_USE_WAIT_TIMER
PS_BMSG_IOCTL_WAIT_TM_SET = 8,
PS_BMSG_IOCTL_WAIT_TM_HANDLER = 9,
#endif
} PS_BMSG_IOCTL_CMD;
#define ICU_BASE (0x00802000)
#define ICU_INTERRUPT_ENABLE (ICU_BASE + 16 * 4)
#define ICU_PERI_CLK_PWD (ICU_BASE + 2 * 4)
#define ICU_ARM_WAKEUP_EN (ICU_BASE + 20 * 4)
enum
{
NEED_DISABLE = 0,
NEED_ME_DISABLE = 1,
NEED_REBOOT = 2,
};
#define NEED_DISABLE_BIT CO_BIT(NEED_DISABLE)
#define NEED_ME_DISABLE_BIT CO_BIT(NEED_ME_DISABLE)
#define NEED_REBOOT_BIT CO_BIT(NEED_REBOOT)
typedef enum
{
PS_FORBID_NO_ON = 1,
PS_FORBID_PREVENT = 2,
PS_FORBID_VIF_PREVENT = 3,
PS_FORBID_IN_DOZE = 4,
PS_FORBID_KEEVT_ON = 5,
PS_FORBID_BMSG_ON = 6,
PS_FORBID_TXING = 7,
PS_FORBID_HW_TIMER = 8,
PS_FORBID_RXING = 9,
} PS_FORBID_STATUS;
typedef enum
{
PS_NO_PS_MODE = 0,
PS_MCU_PS_MODE = 1,
PS_DTIM_PS_MODE = 2,
} PS_MODE_STATUS;
#define PRINT_LR_REGISTER() \
{ \
\
uint32_t value; \
\
__asm volatile( \
"MOV %0,lr\n" \
:"=r" (value) \
: \
:"memory" \
); \
\
os_printf("lr:%x\r\n", value); \
}
extern UINT8 power_save_if_ps_can_sleep(void);
extern UINT16 power_save_forbid_trace(PS_FORBID_STATUS forbid);
extern UINT16 power_save_beacon_len_get(void);
extern void power_save_dump(void);
extern UINT8 power_save_if_rf_sleep();
extern UINT16 power_save_radio_wkup_get(void);
extern void power_save_radio_wkup_set(UINT16);
extern UINT8 power_save_set_dtim_multi(UINT8);
extern UINT8 power_save_sm_set_all_bcmc(UINT8 );
extern void power_save_wkup_event_set(UINT32);
extern UINT8 power_save_if_ps_rf_dtim_enabled(void);
extern int power_save_dtim_enable();
extern int power_save_dtim_disable();
extern void power_save_rf_dtim_manual_do_wakeup(void);
extern void power_save_rf_ps_wkup_semlist_set(void);
extern bool power_save_rf_sleep_check( void );
extern void ps_set_key_prevent(void);
extern void ps_clear_key_prevent(void);
extern void ps_set_data_prevent(void);
extern void txl_cntrl_dec_pck_cnt(void);
extern void txl_cntrl_inc_pck_cnt(void);
extern int bmsg_is_empty(void);
extern void power_save_beacon_len_set(UINT16 );
extern void power_save_beacon_state_update(void);
extern void power_save_cal_bcn_liston_int(UINT16);
extern void power_save_delay_sleep_check(void);
extern int power_save_dtim_disable_handler(void);
extern int power_save_dtim_enable_handler(void);
extern INT8 power_save_if_sleep_at_first(void);
extern UINT8 power_save_if_sleep_first(void);
extern PS_MODE_STATUS power_save_ps_mode_get(void);
extern void power_save_ps_mode_set(PS_MODE_STATUS );
extern void power_save_rf_ps_wkup_semlist_init(void);
extern void * power_save_rf_ps_wkup_semlist_insert(void);
extern void power_save_rf_ps_wkup_semlist_wait(void *);
extern void power_save_set_dtim_count(UINT8 );
extern void power_save_set_dtim_period(UINT8 );
extern void power_save_sleep_status_set(void);
extern bool power_save_sleep(void);
extern void power_save_wkup_event_clear(UINT32 );
extern void power_save_wkup_event_set(UINT32 );
extern UINT32 power_save_wkup_event_get(void);
extern UINT8 power_save_get_liston_int(void);
extern int power_save_get_wkup_less_time();
extern void power_save_dtim_wake(UINT32 );
#if PS_USE_WAIT_TIMER
extern void power_save_wait_timer_real_handler(void );
extern void power_save_wait_timer_start(void);
extern void power_save_wait_timer_set(void );
#endif
#if PS_USE_KEEP_TIMER
extern void power_save_keep_timer_set(void);
extern void power_save_keep_timer_real_handler();
extern void power_save_keep_timer_stop(void);
extern void power_save_set_keep_timer_time(UINT32);
#endif
extern UINT32 power_save_get_sleep_count(void);
extern void power_save_set_reseted_flag(void);
extern UINT32 power_save_get_rf_ps_dtim_time(void);
/***************************************************************************/
#if ((1 == CFG_USE_STA_PS))
#define CHECK_STA_BLE_RF_IF_IN_SLEEP() \
do { \
ps_set_rf_prevent(); \
power_save_rf_dtim_manual_do_wakeup(); \
\
if (sctrl_if_rf_sleep()) \
{ \
sctrl_rf_wakeup(); \
}
#endif
#define CHECK_RF_REG_IF_IN_SLEEP_END() \
ps_clear_rf_prevent(); \
} while(0)
#define CHECK_RF_IF_IN_SLEEP() \
do { \
ps_set_rf_prevent(); \
\
if (sctrl_if_rf_sleep()) \
{ \
sctrl_rf_wakeup(); \
}
#if CFG_USE_BLE_PS
#define CHECK_BLE_RF_IF_IN_SLEEP() CHECK_RF_IF_IN_SLEEP()
#endif
/***************************************************************************/
#if((0 == CFG_USE_BLE_PS) && (0 == CFG_USE_STA_PS))
#define CHECK_OPERATE_RF_REG_IF_IN_SLEEP()
#define CHECK_OPERATE_RF_REG_IF_IN_SLEEP_END()
#elif (CFG_USE_BLE_PS && (0 == CFG_USE_STA_PS))
#define CHECK_OPERATE_RF_REG_IF_IN_SLEEP() CHECK_BLE_RF_IF_IN_SLEEP()
#define CHECK_OPERATE_RF_REG_IF_IN_SLEEP_END() CHECK_RF_REG_IF_IN_SLEEP_END()
#elif ((1 == CFG_USE_STA_PS))
#define CHECK_NEED_WAKE_IF_STA_IN_SLEEP() CHECK_STA_BLE_RF_IF_IN_SLEEP()
#define CHECK_NEED_WAKE_IF_STA_IN_SLEEP_END() CHECK_RF_REG_IF_IN_SLEEP_END()
#define CHECK_OPERATE_RF_REG_IF_IN_SLEEP() CHECK_RF_IF_IN_SLEEP()
#define CHECK_OPERATE_RF_REG_IF_IN_SLEEP_END() CHECK_RF_REG_IF_IN_SLEEP_END()
#endif
#endif // _POWER_SAVE_PUB_H_
// eof

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