rel_1.6.0 init

This commit is contained in:
guocheng.kgc 2020-06-18 20:06:52 +08:00 committed by shengdong.dsd
commit 27b3e2883d
19359 changed files with 8093121 additions and 0 deletions

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <aos_main.h>
#include <k_api.h>
#include <aos/kernel.h>
#include <aos/init.h>
#define AOS_START_STACK 2048
ktask_t *g_aos_init;
extern void board_init(void);
static kinit_t kinit = {
.argc = 0,
.argv = NULL,
.cli_enable = 1
};
static void sys_init(void)
{
int i = 0;
soc_system_init();
#ifdef BOOTLOADER
main();
#else
board_init();
aos_kernel_init(&kinit);
#endif
}
void sys_start(void)
{
aos_init();
soc_driver_init();
krhino_task_dyn_create(&g_aos_init, "aos-init", 0, AOS_DEFAULT_APP_PRI, 0, AOS_START_STACK, sys_init, 1);
aos_start();
}

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef AOS_MAIN_H
#define AOS_MAIN_H
void soc_driver_init(void);
void soc_system_init(void);
void sys_start(void);
#endif /* AOS_MAIN_H */

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <aos/aos.h>
#include "hal/soc/soc.h"
#ifdef AOS_BINS
const int *syscall_ktbl = NULL;
const int *syscall_ftbl = NULL;
extern unsigned int _app_data_ram_begin;
extern unsigned int _app_data_ram_end;
extern unsigned int _app_data_flash_begin;
extern unsigned int _app_bss_start;
extern unsigned int _app_bss_end;
extern unsigned int _app_heap_start;
extern unsigned int _app_heap_end;
extern int application_start(int argc, char **argv);
int aos_application_init(void)
{
LOG("aos application init.");
return 0;
}
static void app_entry(void *ksyscall_tbl, void *fsyscall_tbl, int argc, char *argv[])
{
/* syscall_ktbl & syscall_ftbl assignment must be first */
syscall_ktbl = (int *)ksyscall_tbl;
syscall_ftbl = (int *)fsyscall_tbl;
aos_application_init();
application_start(argc, argv);
}
__attribute__ ((used, section(".app_info"))) struct app_info_t app_info = {
app_entry,
&_app_data_ram_begin,
&_app_data_ram_end,
&_app_data_flash_begin,
&_app_bss_start,
&_app_bss_end,
&_app_heap_start,
&_app_heap_end
};
#endif

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NAME := app_runtime
$(NAME)_TYPE := app
#GLOBAL_INCLUDES += include
# don't modify to L_CFLAGS, because CONFIG_CJSON_WITHOUT_DOUBLE should enable global
GLOBAL_LDFLAGS += -uapp_info
$(NAME)_SOURCES := app_runtime.c

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <aos/aos.h>
#include "hal/soc/soc.h"
#ifdef AOS_BINS
const int *syscall_ktbl = NULL;
extern void *syscall_ftbl[];
extern char app_info_addr;
struct app_info_t *app_info = (struct app_info_t *)&app_info_addr;
extern unsigned int _framework_data_ram_begin;
extern unsigned int _framework_data_ram_end;
extern unsigned int _framework_data_flash_begin;
extern unsigned int _framework_bss_start;
extern unsigned int _framework_bss_end;
extern unsigned int _framework_heap_start;
extern unsigned int _framework_heap_end;
static void framework_entry(void *syscall_tbl, int argc, char *argv[])
{
/* syscall_ktbl assignment must be first */
syscall_ktbl = (int *)syscall_tbl;
#ifdef AOS_FRAMEWORK_COMMON
aos_framework_init();
#endif
/*app_pre_init();*/
if (app_info->app_entry) {
app_info->app_entry(syscall_tbl, (void *)syscall_ftbl, 0, NULL);
}
}
__attribute__ ((used, section(".framework_info"))) struct framework_info_t framework_info = {
framework_entry,
&_framework_data_ram_begin,
&_framework_data_ram_end,
&_framework_data_flash_begin,
&_framework_bss_start,
&_framework_bss_end,
&_framework_heap_start,
&_framework_heap_end
};
#endif

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NAME := framework_runtime
$(NAME)_TYPE := framework
#GLOBAL_INCLUDES += include
# don't modify to L_CFLAGS, because CONFIG_CJSON_WITHOUT_DOUBLE should enable global
GLOBAL_LDFLAGS += -uframework_info
$(NAME)_SOURCES := framework_runtime.c

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <k_api.h>
#include <assert.h>
#if (RHINO_CONFIG_HW_COUNT > 0)
void soc_hw_timer_init(void)
{
}
hr_timer_t soc_hr_hw_cnt_get(void)
{
return *(volatile uint64_t *)0xc0000120;
}
lr_timer_t soc_lr_hw_cnt_get(void)
{
return 0;
}
#endif /* RHINO_CONFIG_HW_COUNT */
#if (RHINO_CONFIG_INTRPT_GUARD > 0)
void soc_intrpt_guard(void)
{
}
#endif
#if (RHINO_CONFIG_INTRPT_STACK_REMAIN_GET > 0)
size_t soc_intrpt_stack_remain_get(void)
{
return 0;
}
#endif
#if (RHINO_CONFIG_INTRPT_STACK_OVF_CHECK > 0)
void soc_intrpt_stack_ovf_check(void)
{
}
#endif
#if (RHINO_CONFIG_DYNTICKLESS > 0)
void soc_tick_interrupt_set(tick_t next_ticks,tick_t elapsed_ticks)
{
}
tick_t soc_elapsed_ticks_get(void)
{
return 0;
}
#endif
#include <k_api.h>
void soc_hw_timer_init()
{
}
#if (RHINO_CONFIG_USER_HOOK > 0)
void krhino_idle_pre_hook(void)
{
}
void krhino_init_hook(void)
{
}
void krhino_start_hook(void)
{
}
void krhino_task_create_hook(ktask_t *task)
{
(void)task;
}
void krhino_task_del_hook(ktask_t *task, res_free_t *arg)
{
(void)task;
}
void krhino_task_switch_hook(ktask_t *orgin, ktask_t *dest)
{
(void)orgin;
(void)dest;
}
void krhino_tick_hook(void)
{
}
void krhino_task_abort_hook(ktask_t *task)
{
(void)task;
}
void krhino_mm_alloc_hook(void *mem, size_t size)
{
(void)mem;
(void)size;
}
UINT32 global_tick = 0;
extern tick_t g_tick_count;
void krhino_idle_hook(void)
{
UINT32 mcu_ps_tick = 24;
UINT32 mcu_miss_tick = 0;
#if (NX_POWERSAVE)
GLOBAL_INT_DECLARATION();
CPSR_ALLOC();
if (ke_evt_get() != 0)
{
return ;
}
if(!bmsg_is_empty())
{
return ;
}
GLOBAL_INT_DISABLE();
if((INT32)(global_tick + (UINT32)1 - g_tick_count) <= 0)
{
mcu_miss_tick = mcu_power_save(mcu_ps_tick);
#if 0
RHINO_CPU_INTRPT_DISABLE();
g_tick_count += mcu_miss_tick;
global_tick = g_tick_count;
RHINO_CPU_INTRPT_ENABLE();
#else
tick_list_update(mcu_miss_tick);
global_tick = g_tick_count;
#endif
}
GLOBAL_INT_RESTORE();
#endif //(NX_POWERSAVE)
}
#endif
extern void *heap_start;
extern void *heap_end;
extern void *heap_len;
k_mm_region_t g_mm_region[] = {(uint8_t*)&heap_start,(size_t)&heap_len};
int g_region_num = sizeof(g_mm_region)/sizeof(k_mm_region_t);
#if (RHINO_CONFIG_MM_LEAKCHECK > 0 )
extern int _bss_start, _bss_end, _data_ram_begin, _data_ram_end;
void aos_mm_leak_region_init(void)
{
krhino_mm_leak_region_init(&_bss_start, &_bss_end);
krhino_mm_leak_region_init(&_data_ram_begin, &_data_ram_end);
}
#endif
#if (RHINO_CONFIG_TASK_STACK_CUR_CHECK > 0)
size_t soc_get_cur_sp()
{
size_t sp = 0;
#if defined (__GNUC__)&&!defined(__CC_ARM)
asm volatile(
"mov %0,sp\n"
:"=r"(sp));
#endif
return sp;
}
#endif
static void soc_print_stack()
{
uint32_t offset = 0;
kstat_t rst = RHINO_SUCCESS;
void *cur, *end;
int i=0;
int *p;
end = krhino_cur_task_get()->task_stack_base + krhino_cur_task_get()->stack_size;
cur = soc_get_cur_sp();
p = (int*)cur;
while(p < (int*)end) {
if(i%4==0) {
printf("\r\n%08x:",(uint32_t)p);
}
printf("%08x ", *p);
i++;
p++;
}
printf("\r\n");
return;
}
void soc_err_proc(kstat_t err)
{
(void)err;
printf("panic %d!\r\n",err);
soc_print_stack();
assert(0);
}
krhino_err_proc_t g_err_proc = soc_err_proc;

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <k_api.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <errno.h>
#include <sys/types.h>
#include <aos/network.h>
#include <hal/trace.h>
#include <aos/aos.h>
/* CLI Support */
#ifdef CONFIG_AOS_CLI
/* Trace Open*/
#if (RHINO_CONFIG_TRACE > 0)
#define TRACE_TASK_STACK_SIZE 512
extern struct k_fifo trace_fifo;
extern int32_t set_filter_task(const char * task_name);
extern void set_event_mask(const uint32_t mask);
extern void trace_deinit(void);
static ktask_t *trace_task;
static uint32_t trace_buf[1024];
static volatile int trace_is_started;
static char *filter_task;
static char *ip_addr;
static uint16_t ip_port = 8000;
static int sockfd;
void *trace_hal_init()
{
int fd;
struct sockaddr_in servaddr;
TRACE_INIT();
if ((fd = socket(AF_INET, SOCK_STREAM, 0)) < 0) {
aos_cli_printf("create socket (%s:%u) error: %s(errno: %d)\r\n", ip_addr, ip_port, strerror(errno),errno);
return 0;
}
memset(&servaddr, 0, sizeof(servaddr));
servaddr.sin_family = AF_INET;
servaddr.sin_port = htons(ip_port);
inet_aton(ip_addr, &servaddr.sin_addr);
if (connect(fd, (struct sockaddr*)&servaddr, sizeof(servaddr)) < 0) {
aos_cli_printf("connect (%s:%u) error: %s(errno: %d)\r\n", ip_addr, ip_port, strerror(errno),errno);
close(fd);
return 0;
}
aos_cli_printf("connected on (%s:%u)\r\n", ip_addr, ip_port);
return (void *)fd;
}
ssize_t trace_hal_send(void *handle, void *buf, size_t len)
{
int len_send = 0;
int len_total_send = 0;
while (1) {
len_send = send((int)handle, (buf + len_total_send) , len, 0);
if (len_send < 0) {
aos_cli_printf("send (%s:%u) msg error: %s(errno: %d)\r\n", ip_addr, ip_port, strerror(errno), errno);
return 0;
}
len_total_send += len_send;
len -= len_send;
if (len == 0) {
break;
}
}
return len_send;
}
ssize_t trace_hal_recv(void *handle, void *buf)
{
return 0;
}
void trace_hal_deinit(void *handle)
{
int fd;
fd = (int)handle;
close(fd);
*(int *)handle = -1;
sockfd = -1;
}
void trace_stop(void)
{
set_filter_task(NULL);
set_event_mask(0);
trace_deinit();
trace_hal_deinit((void *)sockfd);
aos_cli_printf("trace (%s:%u) stop....\r\n", ip_addr, ip_port);
if (ip_addr) {
aos_free(ip_addr);
ip_addr = NULL;
}
if (filter_task){
aos_free(filter_task);
filter_task = NULL;
}
}
static void trace_entry(void *arg)
{
uint32_t len;
while (1) {
if (trace_is_started == 0 ){
if (sockfd > 0) {
trace_stop();
}
krhino_task_sleep(200);
} else {
if (sockfd <= 0) {
sockfd = (int)trace_hal_init();
}
if (sockfd > 0) {
len = fifo_out_all(&trace_fifo, trace_buf);
if (len > 0) {
trace_hal_send((void *)sockfd, trace_buf, len);
}
}
krhino_task_sleep(20);
}
}
}
static void handle_trace_cmd(char *pwbuf, int blen, int argc, char **argv)
{
const char *rtype = argc > 1 ? argv[1] : "";
int ret = 0;
if (strcmp(rtype, "start") == 0) {
trace_is_started = 1;
if (argc == 3 || argc == 4) {
if (ip_addr == NULL) {
ip_addr = (char *) aos_malloc(strlen(argv[2])+1);
if (ip_addr == NULL) {
k_err_proc(RHINO_NO_MEM);
}
strncpy(ip_addr, argv[2], strlen(argv[2]));
ip_addr[strlen(argv[2])] = '\0';
}
if (argc ==4){
ip_port = atoi(argv[3]);
}
} else {
aos_cli_printf("trace must specify the host ip (port)... \r\n");
return ;
}
if (trace_task == NULL && krhino_task_dyn_create(&trace_task, "trace_task", NULL, 3,
0, TRACE_TASK_STACK_SIZE, trace_entry, 1) != RHINO_SUCCESS) {
aos_cli_printf("trace task creat fail \r\n");
}
} else if (strcmp(rtype, "task") == 0) {
if (argc != 3) {
return;
}
if (filter_task) {
aos_free(filter_task);
}
filter_task = (char *) aos_malloc(strlen(argv[2])+1);
if (filter_task == NULL) {
k_err_proc(RHINO_NO_MEM);
}
strncpy(filter_task, argv[2], strlen(argv[2]));
filter_task[strlen(argv[2])] = '\0';
set_filter_task(filter_task);
} else if (strcmp(rtype, "event") == 0) {
if (argc != 3) {
return;
}
set_event_mask(atoi(argv[2]));
} else if (strcmp(rtype, "stop") == 0) {
trace_is_started = 0;
}
}
static struct cli_command ncmd = {
.name = "trace",
.help = "trace [start ip (port) | task task_name| event event_id| stop]",
.function = handle_trace_cmd,
};
void trace_start(void)
{
aos_cli_register_command(&ncmd);
}
#else
void trace_start(void)
{
printf("trace config close!!!\r\n");
}
#endif /* Trace end*/
#else
void trace_start(void)
{
printf("trace should have cli to control!!!\r\n");
}
#endif /*Cli end*/

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#ifndef _ARCH_CONFIG_H_
#define _ARCH_CONFIG_H_
#include "mac.h"
#define PARAM_CFG_DEBUG
#ifdef PARAM_CFG_DEBUG
#define PARAM_CFG_PRT os_printf
#define PARAM_CFG_WARN warning_prf
#define PARAM_CFG_FATAL fatal_prf
#else
#define PARAM_CFG_PRT null_prf
#define PARAM_CFG_WARN null_prf
#define PARAM_CFG_FATAL null_prf
#endif
#define CONFIG_ROLE_NULL 0
#define CONFIG_ROLE_AP 1
#define CONFIG_ROLE_STA 2
#define CONFIG_ROLE_COEXIST 3
#define DEFAULT_CHANNEL_AP 11
typedef struct fast_connect_param
{
uint8_t bssid[6];
uint8_t chann;
}fast_connect_param_t;
typedef struct general_param
{
uint8_t role;
uint8_t dhcp_enable;
uint32_t ip_addr;
uint32_t ip_mask;
uint32_t ip_gw;
} general_param_t;
typedef struct ap_param
{
struct mac_addr bssid;
struct mac_ssid ssid;
uint8_t chann;
uint8_t cipher_suite;
uint8_t key[65];
uint8_t key_len;
} ap_param_t;
typedef struct sta_param
{
struct mac_addr own_mac;
struct mac_ssid ssid;
uint8_t cipher_suite;
uint8_t key[65];
uint8_t key_len;
uint8_t fast_connect_set;
fast_connect_param_t fast_connect;
} sta_param_t;
extern general_param_t *g_wlan_general_param;
extern ap_param_t *g_ap_param_ptr;
extern sta_param_t *g_sta_param_ptr;
extern uint8_t system_mac[6];
uint32_t cfg_param_init(void);
void wifi_get_mac_address(char *mac, u8 type);
int wifi_set_mac_address(char *mac);
#endif

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#ifndef _SYS_CONFIG_H_
#define _SYS_CONFIG_H_
//#define KEIL_SIMULATOR
/*SUMMARY: macro--1: OPEN; --0:CLOSE*/
/* uart2 for debug, and generally, uart1 is used for communication.
what is more, uart1 maybe is not bound out*/
#define CFG_USE_UART1 1
#define CFG_JTAG_ENABLE 1
/*section 0-----app macro config-----*/
#define CFG_IEEE80211N 1
/*section 1-----OS macro config-----*/
#define THD_APPLICATION_PRIORITY 3
#define THD_CORE_PRIORITY 2
#define THD_LWIP_PRIORITY 4
#define THD_INIT_PRIORITY 4
#define THD_RECONNECT_PRIORITY 4
#define THD_MEDIA_PRIORITY 4
#define THD_WPAS_PRIORITY 5
#define THD_HOSTAPD_PRIORITY 5
#define THDD_KEY_SCAN_PRIORITY 7
/*section 2-----function macro config-----*/
#define CFG_TX_EVM_TEST 1
#define CFG_RX_SENSITIVITY_TEST 1
#define CFG_ROLE_LAUNCH 0
/*section 3-----driver macro config-----*/
#define CFG_MAC_PHY_BAPASS 1
#define CFG_SDIO 0
#define CFG_SDIO_TRANS 0
#define CFG_REAL_SDIO 0
#if CFG_REAL_SDIO
#define FOR_SDIO_BLK_512 0
#endif
#define CFG_MSDU_RESV_HEAD_LEN 96
#define CFG_MSDU_RESV_TAIL_LEN 16
#define CFG_USB 0
#if CFG_USB
#define CFG_SUPPORT_MSD 0
#define CFG_SUPPORT_HID 0
#define CFG_SUPPORT_CCD 0
#define CFG_SUPPORT_UVC 1
#endif
/*section 4-----DEBUG macro config-----*/
#define CFG_UART_DEBUG 0
#define CFG_UART_DEBUG_COMMAND_LINE 1
#define CFG_BACKGROUND_PRINT 0
#define CFG_SUPPORT_BKREG 1
#define CFG_ENABLE_WPA_LOG 0
/*section 5-----PRODUCT macro config-----*/
#define CFG_RELEASE_FIRMWARE 0
/*section 6-----for platform*/
#define SOC_PLATFORM 1
#define FPGA_PLATFORM 0
#define CFG_RUNNING_PLATFORM SOC_PLATFORM
/*section 7-----calibration*/
#if (CFG_RUNNING_PLATFORM == FPGA_PLATFORM)
#define CFG_SUPPORT_CALIBRATION 0
#define CFG_SUPPORT_MANUAL_CALI 0
#else
#define CFG_SUPPORT_CALIBRATION 1
#define CFG_SUPPORT_MANUAL_CALI 1
#endif
/*section 8-----for netstack*/
#define CFG_USE_LWIP_NETSTACK 1
/*section 9-----for DHCP servicers and client*/
#define CFG_USE_DHCP 1
/*section 10-----patch*/
#define CFG_BK7221_MDM_WATCHDOG_PATCH 0
/*section 11-----temperature detect*/
#define CFG_USE_TEMPERATURE_DETECT 1
/*section 12-----for SPIDMA interface*/
#define CFG_USE_SPIDMA 0
/*section 13-----for GENERRAL DMA */
#define CFG_GENERAL_DMA 0
/*section 15-----support customer macro*/
#define CFG_SUPPORT_TIANZHIHENG_DRONE 0
/*section 17-----support sta power sleep*/
#define CFG_USE_STA_PS 1
/*section 18-----AP support stas in power save*/
#define CFG_USE_AP_PS 0
/*section 19-----for SDCARD HOST*/
#define CFG_USE_SDCARD_HOST 0
/*section 20 ----- support mp3 decoder*/
#define CONFIG_APP_MP3PLAYER 0
#endif // _SYS_CONFIG_H_

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/**
****************************************************************************************
*
* @file arch.h
*
* @brief This file contains the definitions of the macros and functions that are
* architecture dependent. The implementation of those is implemented in the
* appropriate architecture directory.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _ARCH_H_
#define _ARCH_H_
/**
****************************************************************************************
* @defgroup PLATFORM_DRIVERS PLATFORM_DRIVERS
* @ingroup MACSW
* @brief Declaration of the ATMEL AT91SAM261 architecture API.
* @{
****************************************************************************************
*/
/**
****************************************************************************************
* @defgroup ARCH_AT91SAM9261 ARCH_AT91SAM9261
* @ingroup PLATFORM_DRIVERS
* @brief Declaration of the ATMEL AT91SAM261 architecture API.
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
// required to define GLOBAL_INT_** macros as inline assembly
#include "boot.h"
#include "ll.h"
#include "compiler.h"
#include "rwnx_config.h"
#include "generic.h"
/*
* CPU WORD SIZE
****************************************************************************************
*/
/// ARM is a 32-bit CPU
#define CPU_WORD_SIZE 4
/*
* CPU Endianness
****************************************************************************************
*/
/// ARM is little endian
#define CPU_LE 1
#define ASSERT_REC(cond)
#define ASSERT_REC_VAL(cond, ret)
#define ASSERT_REC_NO_RET(cond)
#define ASSERT_ERR(cond) ASSERT(cond)
#define ASSERT_ERR2(cond, param0, param1)
#define ASSERT_WARN(cond)
/// @}
/// @}
#endif // _ARCH_H_

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/**
****************************************************************************************
*
* @file boot.h
*
* @brief This file contains the declarations of the boot related variables.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _BOOT_H_
#define _BOOT_H_
// standard integer functions
#include "co_int.h"
#endif // _BOOT_H_

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#ifndef _DOUBLY_LIST_H
#define _DOUBLY_LIST_H
#ifndef offsetof
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
#endif
#define list_entry(ptr, type, member) ((type *)((char *)ptr - offsetof(type,member)))
/*
* Simple doubly linked list implementation.
*
* Some of the internal functions ("__xxx") are useful when
* manipulating whole lists rather than single entries, as
* sometimes we already know the next/prev entries and we can
* generate better code by using them directly rather than
* using the generic single-entry routines.
*/
typedef struct list_head
{
struct list_head *next, *prev;
}LIST_HEADER_T;
#define LIST_HEAD_INIT(name) { &(name), &(name) }
#define LIST_HEAD_DEFINE(name) \
struct list_head name = LIST_HEAD_INIT(name)
#define INIT_LIST_HEAD(ptr) do { \
(ptr)->next = (ptr); (ptr)->prev = (ptr); \
} while (0)
/*
* Insert a new_node entry between two known consecutive entries.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
__INLINE void __list_add(struct list_head *new_node, struct list_head *prev, struct list_head *next)
{
next->prev = new_node;
new_node->next = next;
new_node->prev = prev;
prev->next = new_node;
}
/**
* list_add - add a new_node entry
* @new_node: new_node entry to be added
* @head: list head to add it after
*
* Insert a new_node entry after the specified head.
* This is good for implementing stacks.
*/
__INLINE void list_add_head(struct list_head *new_node, struct list_head *head)
{
__list_add(new_node, head, head->next);
}
/**
* list_add_tail - add a new_node entry
* @new_node: new_node entry to be added
* @head: list head to add it before
*
* Insert a new_node entry before the specified head.
* This is useful for implementing queues.
*/
__INLINE void list_add_tail(struct list_head *new_node, struct list_head *head)
{
__list_add(new_node, head->prev, head);
}
/*
* Delete a list entry by making the prev/next entries
* point to each other.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
__INLINE void __list_del(struct list_head * prev, struct list_head * next)
{
next->prev = prev;
prev->next = next;
}
/**
* list_del - deletes entry from list.
* @entry: the element to delete from the list.
* Note: list_empty on entry does not return true after this, the entry is
* in an undefined state.
*/
__INLINE void list_del(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
}
/**
* list_del_init - deletes entry from list and reinitialize it.
* @entry: the element to delete from the list.
*/
__INLINE void list_del_init(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
INIT_LIST_HEAD(entry);
}
/**
* list_move - delete from one list and add as another's head
* @list: the entry to move
* @head: the head that will precede our entry
*/
__INLINE void list_move(struct list_head *list, struct list_head *head)
{
__list_del(list->prev, list->next);
list_add_head(list, head);
}
/**
* list_move_tail - delete from one list and add as another's tail
* @list: the entry to move
* @head: the head that will follow our entry
*/
__INLINE void list_move_tail(struct list_head *list,
struct list_head *head)
{
__list_del(list->prev, list->next);
list_add_tail(list, head);
}
/**
* list_empty - tests whether a list is empty
* @head: the list to test.
*/
__INLINE unsigned int list_empty(const struct list_head *head)
{
return head->next == head;
}
__INLINE void __list_splice(struct list_head *list,
struct list_head *head)
{
struct list_head *first = list->next;
struct list_head *last = list->prev;
struct list_head *at = head->next;
first->prev = head;
head->next = first;
last->next = at;
at->prev = last;
}
/**
* list_splice - join two lists
* @list: the new_node list to add.
* @head: the place to add it in the first list.
*/
__INLINE void list_splice(struct list_head *list, struct list_head *head)
{
if (!list_empty(list))
__list_splice(list, head);
}
/**
* list_splice_init - join two lists and reinitialise the emptied list.
* @list: the new_node list to add.
* @head: the place to add it in the first list.
*
* The list at @list is reinitialised
*/
__INLINE void list_splice_init(struct list_head *list,
struct list_head *head)
{
if (!list_empty(list)) {
__list_splice(list, head);
INIT_LIST_HEAD(list);
}
}
__INLINE void list_switch(struct list_head **list1,
struct list_head ** list2)
{
struct list_head * temp;
temp = *list1;
*list1 = *list2;
*list2 = temp;
}
/**
* list_for_each - iterate over a list
* @pos: the &struct list_head to use as a loop counter.
* @head: the head for your list.
*/
#define list_for_each(pos, head) \
for (pos = (head)->next; pos != (head); pos = pos->next)
/**
* list_for_each_safe - iterate over a list safe against removal of list entry
* @pos: the &struct list_head to use as a loop counter.
* @n: another &struct list_head to use as temporary storage
* @head: the head for your list.
*/
#define list_for_each_safe(pos, n, head) \
for (pos = (head)->next, n = pos->next; pos != (head); \
pos = n, n = pos->next)
/**
* list_size
* @head: the head for your list.
*/
__INLINE unsigned int list_size(struct list_head *list) {
unsigned int num_of_list=0;
struct list_head *n, *pos;
list_for_each_safe(pos, n, list)
num_of_list++;
return num_of_list;
}
#endif /* _DOUBLY_LIST_H */

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#ifndef _FIFO_H_
#define _FIFO_H_
#include "include.h"
#include "generic.h"
#include "mem_pub.h"
#include "mem_pub.h"
typedef struct kfifo
{
unsigned int in;
unsigned int out;
unsigned int mask;
unsigned int size;
unsigned char *buffer;
}KFIFO_T, *KFIFO_PTR;
/**
* kfifo_init - allocates a new FIFO using a preallocated buffer
* @buffer: the preallocated buffer to be used.
* @size: the size of the internal buffer, this have to be a power of 2.
* @gfp_mask: get_free_pages mask, passed to ke_malloc()
* @lock: the lock to be used to protect the fifo buffer
*
* Do NOT pass the kfifo to kfifo_free() after use ! Simply free the
* struct kfifo with ke_free().
*/
__INLINE struct kfifo *kfifo_init(unsigned char *buffer, unsigned int size)
{
struct kfifo *fifo;
/* size must be a power of 2 */
BUG_ON(size & (size - 1));
fifo = os_malloc(sizeof(struct kfifo));
if (!fifo)
return NULLPTR;
fifo->buffer = buffer;
fifo->size = size;
fifo->in = 0;
fifo->out = 0;
fifo->mask = fifo->size - 1;
return fifo;
}
/**
* kfifo_alloc - allocates a new FIFO and its internal buffer
* @size: the size of the internal buffer to be allocated.
* @gfp_mask: get_free_pages mask, passed to ke_malloc()
* @lock: the lock to be used to protect the fifo buffer
*
* The size will be rounded-up to a power of 2.
*/
__INLINE struct kfifo *kfifo_alloc(unsigned int size)
{
unsigned char *buffer;
struct kfifo *ret;
buffer = os_malloc(size);
if (!buffer)
return 0;
ret = kfifo_init(buffer, size);
if (!(ret))
os_free(buffer);
return ret;
}
/**
* kfifo_free - frees the FIFO
* @fifo: the fifo to be freed.
*/
__INLINE void kfifo_free(struct kfifo *fifo)
{
os_free(fifo->buffer);
fifo->buffer = 0;
os_free(fifo);
}
/**
* __kfifo_put - puts some data into the FIFO, no locking version
* @fifo: the fifo to be used.
* @buffer: the data to be added.
* @len: the length of the data to be added.
*
* This function copies at most 'len' bytes from the 'buffer' into
* the FIFO depending on the free space, and returns the number of
* bytes copied.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these functions.
*/
__INLINE unsigned int kfifo_put(struct kfifo *fifo,
unsigned char *buffer, unsigned int len)
{
unsigned int l;
len = min(len, fifo->size - fifo->in + fifo->out);
/* first put the data starting from fifo->in to buffer end */
l = min(len, fifo->size - (fifo->in & (fifo->size - 1)));
os_memcpy(fifo->buffer + (fifo->in & (fifo->size - 1)), buffer, l);
/* then put the rest (if any) at the beginning of the buffer */
os_memcpy(fifo->buffer, buffer + l, len - l);
fifo->in += len;
return len;
}
/**
* __kfifo_get - gets some data from the FIFO, no locking version
* @fifo: the fifo to be used.
* @buffer: where the data must be copied.
* @len: the size of the destination buffer.
*
* This function copies at most 'len' bytes from the FIFO into the
* 'buffer' and returns the number of copied bytes.
*
* Note that with only one concurrent reader and one concurrent
* writer, you don't need extra locking to use these functions.
*/
__INLINE unsigned int kfifo_get(struct kfifo *fifo,
unsigned char *buffer, unsigned int len)
{
unsigned int l;
len = min(len, fifo->in - fifo->out);
/* first get the data from fifo->out until the end of the buffer */
l = min(len, fifo->size - (fifo->out & (fifo->size - 1)));
os_memcpy(buffer, fifo->buffer + (fifo->out & (fifo->size - 1)), l);
/* then get the rest (if any) from the beginning of the buffer */
os_memcpy(buffer + l, fifo->buffer, len - l);
fifo->out += len;
return len;
}
__INLINE unsigned int kfifo_data_size(struct kfifo *fifo)
{
return (fifo->in - fifo->out);
}
__INLINE unsigned int kfifo_unused(struct kfifo *fifo)
{
return (fifo->mask + 1) - (fifo->in - fifo->out);
}
__INLINE void kfifo_copy_out(struct kfifo *fifo, void *dst,
unsigned int len, unsigned int off)
{
unsigned int size = fifo->mask + 1;
unsigned int l;
off &= fifo->mask;
l = min(len, size - off);
os_memcpy(dst, (void *)(fifo->buffer + off), l);
os_memcpy((void *)((unsigned int)dst + l), (void *)fifo->buffer, len - l);
/*
* make sure that the data is copied before
* incrementing the fifo->out index counter
*/
}
__INLINE unsigned int kfifo_out_peek(struct kfifo *fifo,
unsigned char *buffer, unsigned int len)
{
unsigned int l;
l = fifo->in - fifo->out;
if (len > l)
len = l;
kfifo_copy_out(fifo, buffer, len, fifo->out);
return len;
}
#endif // _FIFO_H_
// eof

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#ifndef _GENERIC_H_
#define _GENERIC_H_
#include <stdbool.h>
#include "include.h"
typedef void (*FUNCPTR)(void);
typedef void (*FUNC_1PARAM_PTR)(void *ctxt);
typedef void (*FUNC_2PARAM_PTR)(void *arg, uint8_t vif_idx);
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
#define MIN(x, y) (((x) < (y)) ? (x) : (y))
#define max(x, y) (((x) > (y)) ? (x) : (y))
#define min(x, y) (((x) < (y)) ? (x) : (y))
extern void bk_printf(const char *fmt, ...);
#define as_printf (bk_printf("%s:%d\r\n",__FUNCTION__,__LINE__))
#if (0 == CFG_RELEASE_FIRMWARE)
#define ASSERT(exp) \
{ \
if ( !(exp) ) \
{ \
as_printf; \
while(1); \
} \
}
#else
#define ASSERT(exp)
#endif
#define BUG_ON(exp) ASSERT(!(exp))
#ifndef NULL
#define NULL (0L)
#endif
#ifndef NULLPTR
#define NULLPTR ((void *)0)
#endif
#define BIT(i) (1UL << (i))
static inline __uint16_t __bswap16(__uint16_t _x)
{
return ((__uint16_t)((_x >> 8) | ((_x << 8) & 0xff00)));
}
static inline __uint32_t __bswap32(__uint32_t _x)
{
return ((__uint32_t)((_x >> 24) | ((_x >> 8) & 0xff00) |
((_x << 8) & 0xff0000) | ((_x << 24) & 0xff000000)));
}
static inline __uint64_t __bswap64(__uint64_t _x)
{
return ((__uint64_t)((_x >> 56) | ((_x >> 40) & 0xff00) |
((_x >> 24) & 0xff0000) | ((_x >> 8) & 0xff000000) |
((_x << 8) & ((__uint64_t)0xff << 32)) |
((_x << 24) & ((__uint64_t)0xff << 40)) |
((_x << 40) & ((__uint64_t)0xff << 48)) | ((_x << 56))));
}
#define __swab16(x) __bswap16((__u8 *)&(x))
#define __swab32(x) __bswap32((__u8 *)&(x))
#define cpu_to_le16(x) (x)
#define cpu_to_le32(x) (x)
#define __cpu_to_be32(x) __swab32((x))
#define __be32_to_cpu(x) __swab32((x))
#define __cpu_to_be16(x) __swab16((x))
#define __be16_to_cpu(x) __swab16((x))
#define __htonl(_x) __bswap32(_x)
#define __htons(_x) __bswap16(_x)
#define __ntohl(_x) __bswap32(_x)
#define __ntohs(_x) __bswap16(_x)
#define ___htonl(x) __cpu_to_be32(x)
#define ___htons(x) __cpu_to_be16(x)
#define ___ntohl(x) __be32_to_cpu(x)
#define ___ntohs(x) __be16_to_cpu(x)
#define htons(x) __htons(x)
#define ntohs(x) __ntohs(x)
#define htonl(x) __htonl(x)
#define ntohl(x) __ntohl(x)
#endif // _GENERIC_H_

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#ifndef _INCLUDES_H_
#define _INCLUDES_H_
#include "sys_config.h"
#include "typedef.h"
#include "generic.h"
#include "compiler.h"
#endif // _INCLUDES_H_

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#ifndef _TYPEDEF_H_
#define _TYPEDEF_H_
#include <stdint.h>
//#include <stddef.h>
typedef unsigned char uint8; /* unsigned 8 bit quantity */
typedef signed char int8; /* signed 8 bit quantity */
typedef unsigned short uint16; /* unsigned 16 bit quantity */
typedef signed short int16; /* signed 16 bit quantity */
typedef unsigned int uint32; /* unsigned 32 bit quantity */
typedef signed int int32; /* signed 32 bit quantity */
typedef unsigned long long uint64; /* unsigned 32 bit quantity */
typedef signed long long int64; /* signed 32 bit quantity */
typedef unsigned char UINT8; /* Unsigned 8 bit quantity */
typedef signed char INT8; /* Signed 8 bit quantity */
typedef unsigned short UINT16; /* Unsigned 16 bit quantity */
typedef signed short INT16; /* Signed 16 bit quantity */
typedef unsigned int UINT32; /* Unsigned 32 bit quantity */
typedef signed int INT32; /* Signed 32 bit quantity */
typedef unsigned long long UINT64; /* Unsigned 32 bit quantity */
typedef signed long long INT64; /* Signed 32 bit quantity */
typedef float FP32; /* Single precision floating point */
typedef double FP64; /* Double precision floating point */
typedef unsigned int size_t;
typedef unsigned char BOOLEAN;
typedef unsigned char BOOL;
//typedef unsigned char bool;
#define LPVOID void *
#define VOID void
typedef volatile signed long VS32;
typedef volatile signed short VS16;
typedef volatile signed char VS8;
typedef volatile signed long const VSC32;
typedef volatile signed short const VSC16;
typedef volatile signed char const VSC8;
typedef volatile unsigned long VU32;
typedef volatile unsigned short VU16;
typedef volatile unsigned char VU8;
typedef volatile unsigned long const VUC32;
typedef volatile unsigned short const VUC16;
typedef volatile unsigned char const VUC8;
typedef unsigned char u8;
typedef signed char s8;
typedef unsigned short u16;
typedef signed short s16;
typedef unsigned int u32;
typedef signed int s32;
typedef unsigned long long u64;
typedef long long s64;
typedef unsigned int __u32;
typedef int __s32;
typedef unsigned short __u16;
typedef signed short __s16;
typedef unsigned char __u8;
#endif // _TYPEDEF_H_
// eof

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/**
****************************************************************************************
*
* @file gnuarm/compiler.h
*
* @brief Definitions of compiler specific directives.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _COMPILER_H_
#define _COMPILER_H_
/// define the force inlining attribute for this compiler gcc: __attribute__((always_inline))
#define __INLINE static inline
/// function returns struct in registers (4 words max, var with gnuarm)
#define __VIR __value_in_regs
/// function has no side effect and return depends only on arguments
#define __PURE __pure
/// Align instantiated lvalue or struct member on 4 bytes
#define __ALIGN4 __attribute__((aligned(4)))
/// Pack a structure field
#define __PACKED16 __attribute__( ( packed ) )
#define __PACKED __attribute__( ( packed ) )
#endif // _COMPILER_H_

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#ifndef __DD_H_
#define __DD_H_
typedef struct _dd_init_s_
{
char *dev_name;
void (*init)(void);
void (*exit)(void);
} DD_INIT_S;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void g_dd_init(void);
extern void g_dd_exit(void);
#endif // __DD_H_

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#ifndef _DRV_MODEL_H_
#define _DRV_MODEL_H_
#define DD_MAX_DEV (8)
#define DD_MAX_SDEV (16)
#define DD_MAX_DEV_MASK (DD_MAX_DEV - 1)
#define DD_MAX_NAME_LEN (16)
typedef enum _dd_state_
{
DD_STATE_NODEVICE = 0, // find no such device when you open
DD_STATE_CLOSED, //
DD_STATE_OPENED, //
DD_STATE_BREAK, //
DD_STATE_SUCCESS //
} DD_STATE;
typedef struct _drv_dev_
{
char *name;
UINT32 use_cnt;
DD_STATE state;
DD_OPERATIONS *op;
DD_OPEN_METHOD method;
void *private;
} DRV_DEV_S, *DRV_DEV_PTR;
typedef struct _drv_sdev_
{
char *name;
UINT32 use_cnt;
DD_STATE state;
SDD_OPERATIONS *op;
DD_OPEN_METHOD method;
void *private;
} DRV_SDEV_S, *DRV_SDEV_PTR;
#endif // _DRV_MODEL_H_

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#ifndef __REG_AGC_H_
#define __REG_AGC_H_
#define REG_AGC_SIZE 172
#define REG_AGC_BASE_ADDR 0x01000000
#endif // __REG_AGC_H_

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#ifndef __REG_DMA_H_
#define __REG_DMA_H_
#define REG_DMA_SIZE 196
#define REG_DMA_BASE_ADDR 0x10A00000
#endif // __REG_DMA_H_

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#ifndef __REG_INTC_H_
#define __REG_INTC_H_
#define REG_INTC_SIZE 68
#define REG_INTC_BASE_ADDR 0x10910000
#endif // __REG_INTC_H_

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#ifndef __REG_LA_H_
#define __REG_LA_H_
#define REG_LA_SIZE 64
#define REG_LA_OFFSET 0x00800000
#define REG_LA_BASE_ADDR 0x10E00000
#endif // __REG_LA_H_

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#ifndef __REG_MAC_CORE_H_
#define __REG_MAC_CORE_H_
#define REG_MAC_CORE_SIZE 1376
#define REG_MAC_CORE_BASE_ADDR 0xC0000000
#endif // __REG_MAC_CORE_H_

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#ifndef __REG_MAC_PL_H_
#define __REG_MAC_PL_H_
#define REG_MAC_PL_SIZE 1404
#define REG_MAC_PL_BASE_ADDR 0xC0008000
#endif // __REG_MAC_PL_H_

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#ifndef __REG_MDM_CFG_H_
#define __REG_MDM_CFG_H_
#define REG_MDM_CFG_SIZE 152
#define REG_MDM_CFG_BASE_ADDR 0x01000000
#endif // __REG_MDM_CFG_H_

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#ifndef __REG_MDM_STAT_H_
#define __REG_MDM_STAT_H_
#define REG_MDM_STAT_SIZE 108
#define REG_MDM_STAT_BASE_ADDR 0x01000000
#endif // __REG_MDM_STAT_H_

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#ifndef __REG_RC_H_
#define __REG_RC_H_
#define REG_RC_SIZE 428
#define REG_RC_BASE_ADDR 0x01050000
#endif // __REG_RC_H_

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/**
****************************************************************************************
*
* @file reg_access.h
*
* @brief File implementing the basic primitives for register accesses
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef REG_ACCESS_H_
#define REG_ACCESS_H_
/**
****************************************************************************************
* @defgroup REG REG
* @ingroup PLATFORM_DRIVERS
*
* @brief Basic primitives for register access.
*
* @{
****************************************************************************************
*/
/*
* MACROS
****************************************************************************************
*/
/// Macro to read a platform register
#define REG_PL_RD(addr) (*(volatile uint32_t *)(addr))
/// Macro to write a platform register
#define REG_PL_WR(addr, value) (*(volatile uint32_t *)(addr)) = (value)
/// @} REG
#endif // REG_ACCESS_H_

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#ifndef _REG_DMA_H_
#define _REG_DMA_H_
#include "co_int.h"
#include "_reg_dma.h"
#include "compiler.h"
#include "arch.h"
#include "reg_access.h"
#define REG_DMA_COUNT 49
#define REG_DMA_DECODING_MASK 0x000000FF
/**
* @brief CH_LLI_ROOT register definition
*/
__INLINE uint32_t dma_ch_lli_root_get(int reg_idx)
{
return 0;
}
__INLINE void dma_ch_lli_root_set(int reg_idx, uint32_t value)
{
}
/**
* @brief DMA_STATUS register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 29 DOWN_STREAM_BSY 0
* 28 UP_STREAM_BSY 0
* 27 ARB_Q3_VALID 0
* 26 ARB_Q2_VALID 0
* 25 ARB_Q1_VALID 0
* 24 ARB_Q0_VALID 0
* 23:20 REQUEST_STATE 0x0
* 19 CH3_STOPPED 0
* 18 CH2_STOPPED 0
* 17 CH1_STOPPED 0
* 16 CH0_STOPPED 0
* 15:00 OFT_FREE 0x0
* </pre>
*/
#define DMA_DMA_STATUS_ADDR 0x10A00010
#define DMA_DMA_STATUS_OFFSET 0x00000010
#define DMA_DMA_STATUS_INDEX 0x00000004
#define DMA_DMA_STATUS_RESET 0x00000000
__INLINE uint32_t dma_dma_status_get(void)
{
return 0;
}
// field definitions
#define DMA_DOWN_STREAM_BSY_BIT ((uint32_t)0x20000000)
#define DMA_DOWN_STREAM_BSY_POS 29
#define DMA_UP_STREAM_BSY_BIT ((uint32_t)0x10000000)
#define DMA_UP_STREAM_BSY_POS 28
#define DMA_ARB_Q3_VALID_BIT ((uint32_t)0x08000000)
#define DMA_ARB_Q3_VALID_POS 27
#define DMA_ARB_Q2_VALID_BIT ((uint32_t)0x04000000)
#define DMA_ARB_Q2_VALID_POS 26
#define DMA_ARB_Q1_VALID_BIT ((uint32_t)0x02000000)
#define DMA_ARB_Q1_VALID_POS 25
#define DMA_ARB_Q0_VALID_BIT ((uint32_t)0x01000000)
#define DMA_ARB_Q0_VALID_POS 24
#define DMA_REQUEST_STATE_MASK ((uint32_t)0x00F00000)
#define DMA_REQUEST_STATE_LSB 20
#define DMA_REQUEST_STATE_WIDTH ((uint32_t)0x00000004)
#define DMA_CH3_STOPPED_BIT ((uint32_t)0x00080000)
#define DMA_CH3_STOPPED_POS 19
#define DMA_CH2_STOPPED_BIT ((uint32_t)0x00040000)
#define DMA_CH2_STOPPED_POS 18
#define DMA_CH1_STOPPED_BIT ((uint32_t)0x00020000)
#define DMA_CH1_STOPPED_POS 17
#define DMA_CH0_STOPPED_BIT ((uint32_t)0x00010000)
#define DMA_CH0_STOPPED_POS 16
#define DMA_OFT_FREE_MASK ((uint32_t)0x0000FFFF)
#define DMA_OFT_FREE_LSB 0
#define DMA_OFT_FREE_WIDTH ((uint32_t)0x00000010)
#define DMA_DOWN_STREAM_BSY_RST 0x0
#define DMA_UP_STREAM_BSY_RST 0x0
#define DMA_ARB_Q3_VALID_RST 0x0
#define DMA_ARB_Q2_VALID_RST 0x0
#define DMA_ARB_Q1_VALID_RST 0x0
#define DMA_ARB_Q0_VALID_RST 0x0
#define DMA_REQUEST_STATE_RST 0x0
#define DMA_CH3_STOPPED_RST 0x0
#define DMA_CH2_STOPPED_RST 0x0
#define DMA_CH1_STOPPED_RST 0x0
#define DMA_CH0_STOPPED_RST 0x0
#define DMA_OFT_FREE_RST 0x0
__INLINE void dma_dma_status_unpack(uint8_t *downstreambsy, uint8_t *upstreambsy, uint8_t *arbq3valid, uint8_t *arbq2valid, uint8_t *arbq1valid, uint8_t *arbq0valid, uint8_t *requeststate, uint8_t *ch3stopped, uint8_t *ch2stopped, uint8_t *ch1stopped, uint8_t *ch0stopped, uint16_t *oftfree)
{
}
__INLINE uint8_t dma_dma_status_down_stream_bsy_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_up_stream_bsy_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q3_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q2_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q1_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_arb_q0_valid_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_request_state_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch3_stopped_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch2_stopped_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch1_stopped_getf(void)
{
return 0;
}
__INLINE uint8_t dma_dma_status_ch0_stopped_getf(void)
{
return 0;
}
/**
* @brief INT_RAWSTATUS register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_RAWSTATUS_ADDR 0x10A00014
#define DMA_INT_RAWSTATUS_OFFSET 0x00000014
#define DMA_INT_RAWSTATUS_INDEX 0x00000005
#define DMA_INT_RAWSTATUS_RESET 0x00000000
__INLINE uint32_t dma_int_rawstatus_get(void)
{
return 0;
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_rawstatus_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_rawstatus_ch3_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_ch2_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_ch1_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_ch0_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_rawstatus_error_getf(void)
{
return 0;
}
__INLINE uint16_t dma_int_rawstatus_lli_irq_getf(void)
{
return 0;
}
/**
* @brief INT_UNMASK_SET register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_UNMASK_SET_ADDR 0x10A00018
#define DMA_INT_UNMASK_SET_OFFSET 0x00000018
#define DMA_INT_UNMASK_SET_INDEX 0x00000006
#define DMA_INT_UNMASK_SET_RESET 0x00000000
__INLINE uint32_t dma_int_unmask_get(void)
{
return 0;
}
__INLINE void dma_int_unmask_set(uint32_t value)
{
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_unmask_set_pack(uint8_t ch3eot, uint8_t ch2eot, uint8_t ch1eot, uint8_t ch0eot, uint8_t error, uint16_t lliirq)
{
}
__INLINE void dma_int_unmask_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_unmask_ch3_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch3_eot_setf(uint8_t ch3eot)
{
}
__INLINE uint8_t dma_int_unmask_ch2_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch2_eot_setf(uint8_t ch2eot)
{
}
__INLINE uint8_t dma_int_unmask_ch1_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch1_eot_setf(uint8_t ch1eot)
{
}
__INLINE uint8_t dma_int_unmask_ch0_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_ch0_eot_setf(uint8_t ch0eot)
{
}
__INLINE uint8_t dma_int_unmask_error_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_error_setf(uint8_t error)
{
}
__INLINE uint16_t dma_int_unmask_lli_irq_getf(void)
{
return 0;
}
__INLINE void dma_int_unmask_lli_irq_setf(uint16_t lliirq)
{
}
/**
* @brief INT_UNMASK_CLEAR register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_UNMASK_CLEAR_ADDR 0x10A0001C
#define DMA_INT_UNMASK_CLEAR_OFFSET 0x0000001C
#define DMA_INT_UNMASK_CLEAR_INDEX 0x00000007
#define DMA_INT_UNMASK_CLEAR_RESET 0x00000000
__INLINE void dma_int_unmask_clear(uint32_t value)
{
}
// fields defined in symmetrical set/clear register
__INLINE void dma_int_unmask_clear_pack(uint8_t ch3eot, uint8_t ch2eot, uint8_t ch1eot, uint8_t ch0eot, uint8_t error, uint16_t lliirq)
{
}
__INLINE void dma_int_unmask_ch3_eot_clearf(uint8_t ch3eot)
{
}
__INLINE void dma_int_unmask_ch2_eot_clearf(uint8_t ch2eot)
{
}
__INLINE void dma_int_unmask_ch1_eot_clearf(uint8_t ch1eot)
{
}
__INLINE void dma_int_unmask_ch0_eot_clearf(uint8_t ch0eot)
{
}
__INLINE void dma_int_unmask_error_clearf(uint8_t error)
{
}
__INLINE void dma_int_unmask_lli_irq_clearf(uint16_t lliirq)
{
}
/**
* @brief INT_ACK register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_ACK_ADDR 0x10A00020
#define DMA_INT_ACK_OFFSET 0x00000020
#define DMA_INT_ACK_INDEX 0x00000008
#define DMA_INT_ACK_RESET 0x00000000
__INLINE uint32_t dma_int_ack_get(void)
{
return 0;
}
__INLINE void dma_int_ack_clear(uint32_t value)
{
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_ack_pack(uint8_t ch3eot, uint8_t ch2eot, uint8_t ch1eot, uint8_t ch0eot, uint8_t error, uint16_t lliirq)
{
}
__INLINE void dma_int_ack_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_ack_ch3_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch3_eot_clearf(uint8_t ch3eot)
{
}
__INLINE uint8_t dma_int_ack_ch2_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch2_eot_clearf(uint8_t ch2eot)
{
}
__INLINE uint8_t dma_int_ack_ch1_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch1_eot_clearf(uint8_t ch1eot)
{
}
__INLINE uint8_t dma_int_ack_ch0_eot_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_ch0_eot_clearf(uint8_t ch0eot)
{
}
__INLINE uint8_t dma_int_ack_error_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_error_clearf(uint8_t error)
{
}
__INLINE uint16_t dma_int_ack_lli_irq_getf(void)
{
return 0;
}
__INLINE void dma_int_ack_lli_irq_clearf(uint16_t lliirq)
{
}
/**
* @brief INT_STATUS register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 23 CH3_EOT 0
* 22 CH2_EOT 0
* 21 CH1_EOT 0
* 20 CH0_EOT 0
* 16 ERROR 0
* 15:00 LLI_IRQ 0x0
* </pre>
*/
#define DMA_INT_STATUS_ADDR 0x10A00024
#define DMA_INT_STATUS_OFFSET 0x00000024
#define DMA_INT_STATUS_INDEX 0x00000009
#define DMA_INT_STATUS_RESET 0x00000000
__INLINE uint32_t dma_int_status_get(void)
{
return REG_PL_RD(DMA_INT_STATUS_ADDR);
}
// field definitions
#define DMA_CH3_EOT_BIT ((uint32_t)0x00800000)
#define DMA_CH3_EOT_POS 23
#define DMA_CH2_EOT_BIT ((uint32_t)0x00400000)
#define DMA_CH2_EOT_POS 22
#define DMA_CH1_EOT_BIT ((uint32_t)0x00200000)
#define DMA_CH1_EOT_POS 21
#define DMA_CH0_EOT_BIT ((uint32_t)0x00100000)
#define DMA_CH0_EOT_POS 20
#define DMA_ERROR_BIT ((uint32_t)0x00010000)
#define DMA_ERROR_POS 16
#define DMA_LLI_IRQ_MASK ((uint32_t)0x0000FFFF)
#define DMA_LLI_IRQ_LSB 0
#define DMA_LLI_IRQ_WIDTH ((uint32_t)0x00000010)
#define DMA_CH3_EOT_RST 0x0
#define DMA_CH2_EOT_RST 0x0
#define DMA_CH1_EOT_RST 0x0
#define DMA_CH0_EOT_RST 0x0
#define DMA_ERROR_RST 0x0
#define DMA_LLI_IRQ_RST 0x0
__INLINE void dma_int_status_unpack(uint8_t *ch3eot, uint8_t *ch2eot, uint8_t *ch1eot, uint8_t *ch0eot, uint8_t *error, uint16_t *lliirq)
{
}
__INLINE uint8_t dma_int_status_ch3_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_ch2_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_ch1_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_ch0_eot_getf(void)
{
return 0;
}
__INLINE uint8_t dma_int_status_error_getf(void)
{
return 0;
}
__INLINE uint16_t dma_int_status_lli_irq_getf(void)
{
return 0;
}
/**
* @brief CHANNEL_PRIORITY register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 16 INTERLEAVE_ENABLED 0
* 13:12 CH3_PRIORITY 0x0
* 09:08 CH2_PRIORITY 0x0
* 05:04 CH1_PRIORITY 0x0
* 01:00 CH0_PRIORITY 0x0
* </pre>
*/
#define DMA_CHANNEL_PRIORITY_ADDR 0x10A00034
#define DMA_CHANNEL_PRIORITY_OFFSET 0x00000034
#define DMA_CHANNEL_PRIORITY_INDEX 0x0000000D
#define DMA_CHANNEL_PRIORITY_RESET 0x00000000
__INLINE uint32_t dma_channel_priority_get(void)
{
return 0;
}
__INLINE void dma_channel_priority_set(uint32_t value)
{
REG_PL_WR(DMA_CHANNEL_PRIORITY_ADDR, value);
}
// field definitions
#define DMA_INTERLEAVE_ENABLED_BIT ((uint32_t)0x00010000)
#define DMA_INTERLEAVE_ENABLED_POS 16
#define DMA_CH3_PRIORITY_MASK ((uint32_t)0x00003000)
#define DMA_CH3_PRIORITY_LSB 12
#define DMA_CH3_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_CH2_PRIORITY_MASK ((uint32_t)0x00000300)
#define DMA_CH2_PRIORITY_LSB 8
#define DMA_CH2_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_CH1_PRIORITY_MASK ((uint32_t)0x00000030)
#define DMA_CH1_PRIORITY_LSB 4
#define DMA_CH1_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_CH0_PRIORITY_MASK ((uint32_t)0x00000003)
#define DMA_CH0_PRIORITY_LSB 0
#define DMA_CH0_PRIORITY_WIDTH ((uint32_t)0x00000002)
#define DMA_INTERLEAVE_ENABLED_RST 0x0
#define DMA_CH3_PRIORITY_RST 0x0
#define DMA_CH2_PRIORITY_RST 0x0
#define DMA_CH1_PRIORITY_RST 0x0
#define DMA_CH0_PRIORITY_RST 0x0
__INLINE void dma_channel_priority_pack(uint8_t interleaveenabled, uint8_t ch3priority, uint8_t ch2priority, uint8_t ch1priority, uint8_t ch0priority)
{
}
__INLINE void dma_channel_priority_unpack(uint8_t *interleaveenabled, uint8_t *ch3priority, uint8_t *ch2priority, uint8_t *ch1priority, uint8_t *ch0priority)
{
}
__INLINE uint8_t dma_channel_priority_interleave_enabled_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_interleave_enabled_setf(uint8_t interleaveenabled)
{
}
__INLINE uint8_t dma_channel_priority_ch3_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch3_priority_setf(uint8_t ch3priority)
{
}
__INLINE uint8_t dma_channel_priority_ch2_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch2_priority_setf(uint8_t ch2priority)
{
}
__INLINE uint8_t dma_channel_priority_ch1_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch1_priority_setf(uint8_t ch1priority)
{
}
__INLINE uint8_t dma_channel_priority_ch0_priority_getf(void)
{
return 0;
}
__INLINE void dma_channel_priority_ch0_priority_setf(uint8_t ch0priority)
{
}
/**
* @brief CHANNEL_MUTEX_SET register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 03 CH3_MUTEX 0
* 02 CH2_MUTEX 0
* 01 CH1_MUTEX 0
* 00 CH0_MUTEX 0
* </pre>
*/
#define DMA_CHANNEL_MUTEX_SET_ADDR 0x10A00038
#define DMA_CHANNEL_MUTEX_SET_OFFSET 0x00000038
#define DMA_CHANNEL_MUTEX_SET_INDEX 0x0000000E
#define DMA_CHANNEL_MUTEX_SET_RESET 0x00000000
__INLINE uint32_t dma_channel_mutex_get(void)
{
return 0;
}
__INLINE void dma_channel_mutex_set(uint32_t value)
{
}
// field definitions
#define DMA_CH3_MUTEX_BIT ((uint32_t)0x00000008)
#define DMA_CH3_MUTEX_POS 3
#define DMA_CH2_MUTEX_BIT ((uint32_t)0x00000004)
#define DMA_CH2_MUTEX_POS 2
#define DMA_CH1_MUTEX_BIT ((uint32_t)0x00000002)
#define DMA_CH1_MUTEX_POS 1
#define DMA_CH0_MUTEX_BIT ((uint32_t)0x00000001)
#define DMA_CH0_MUTEX_POS 0
#define DMA_CH3_MUTEX_RST 0x0
#define DMA_CH2_MUTEX_RST 0x0
#define DMA_CH1_MUTEX_RST 0x0
#define DMA_CH0_MUTEX_RST 0x0
__INLINE void dma_channel_mutex_set_pack(uint8_t ch3mutex, uint8_t ch2mutex, uint8_t ch1mutex, uint8_t ch0mutex)
{
}
__INLINE void dma_channel_mutex_unpack(uint8_t *ch3mutex, uint8_t *ch2mutex, uint8_t *ch1mutex, uint8_t *ch0mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch3_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch3_mutex_setf(uint8_t ch3mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch2_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch2_mutex_setf(uint8_t ch2mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch1_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch1_mutex_setf(uint8_t ch1mutex)
{
}
__INLINE uint8_t dma_channel_mutex_ch0_mutex_getf(void)
{
return 0;
}
__INLINE void dma_channel_mutex_ch0_mutex_setf(uint8_t ch0mutex)
{
}
/**
* @brief CHANNEL_MUTEX_CLEAR register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 03 CH3_MUTEX 0
* 02 CH2_MUTEX 0
* 01 CH1_MUTEX 0
* 00 CH0_MUTEX 0
* </pre>
*/
#define DMA_CHANNEL_MUTEX_CLEAR_ADDR 0x10A0003C
#define DMA_CHANNEL_MUTEX_CLEAR_OFFSET 0x0000003C
#define DMA_CHANNEL_MUTEX_CLEAR_INDEX 0x0000000F
#define DMA_CHANNEL_MUTEX_CLEAR_RESET 0x00000000
__INLINE void dma_channel_mutex_clear(uint32_t value)
{
}
// fields defined in symmetrical set/clear register
__INLINE void dma_channel_mutex_clear_pack(uint8_t ch3mutex, uint8_t ch2mutex, uint8_t ch1mutex, uint8_t ch0mutex)
{
}
__INLINE void dma_channel_mutex_ch3_mutex_clearf(uint8_t ch3mutex)
{
}
__INLINE void dma_channel_mutex_ch2_mutex_clearf(uint8_t ch2mutex)
{
}
__INLINE void dma_channel_mutex_ch1_mutex_clearf(uint8_t ch1mutex)
{
}
__INLINE void dma_channel_mutex_ch0_mutex_clearf(uint8_t ch0mutex)
{
}
// field definitions
#define DMA_COUNTER_MASK ((uint32_t)0x0000FFFF)
#define DMA_COUNTER_LSB 0
#define DMA_COUNTER_WIDTH ((uint32_t)0x00000010)
#define DMA_COUNTER_RST 0x0
/**
* @brief DUMMY register definition
* <pre>
* Bits Field Name Reset Value
* ----- ------------------ -----------
* 00 DUMMY 0
* </pre>
*/
#define DMA_DUMMY_ADDR 0x10A000C0
#define DMA_DUMMY_OFFSET 0x000000C0
#define DMA_DUMMY_INDEX 0x00000030
#define DMA_DUMMY_RESET 0x00000000
__INLINE uint32_t dma_dummy_get(void)
{
return 0;
}
__INLINE void dma_dummy_set(uint32_t value)
{
}
// field definitions
#define DMA_DUMMY_BIT ((uint32_t)0x00000001)
#define DMA_DUMMY_POS 0
#define DMA_DUMMY_RST 0x0
__INLINE uint8_t dma_dummy_getf(void)
{
return 0;
}
__INLINE void dma_dummy_setf(uint8_t dummy)
{
}
#endif // _REG_DMA_H_

View file

@ -0,0 +1,238 @@
/**
* @file reg_intc.h
* @brief Definitions of the INTC HW block registers and register access functions.
*
* @defgroup REG_INTC REG_INTC
* @ingroup REG
* @{
*
* @brief Definitions of the INTC HW block registers and register access functions.
*/
#ifndef _REG_INTC_H_
#define _REG_INTC_H_
#include "co_int.h"
#include "_reg_intc.h"
#include "compiler.h"
#include "arch.h"
#include "reg_access.h"
/** @brief Number of registers in the REG_INTC peripheral.
*/
#define REG_INTC_COUNT 17
/** @brief Decoding mask of the REG_INTC peripheral registers from the CPU point of view.
*/
#define REG_INTC_DECODING_MASK 0x0000007F
/**
* @name IRQ_STATUS register definitions
*
* @{
*/
/// Address of the IRQ_STATUS register
#define INTC_IRQ_STATUS_ADDR 0x10910000
/// Offset of the IRQ_STATUS register from the base address
#define INTC_IRQ_STATUS_OFFSET 0x00000000
/// Index of the IRQ_STATUS register
#define INTC_IRQ_STATUS_INDEX 0x00000000
/// Reset value of the IRQ_STATUS register
#define INTC_IRQ_STATUS_RESET 0x00000000
/// Number of elements of the IRQ_STATUS register array
#define INTC_IRQ_STATUS_COUNT 2
/**
* @brief Returns the current value of the IRQ_STATUS register.
* The IRQ_STATUS register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_STATUS register.
*/
__INLINE uint32_t intc_irq_status_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_STATUS_ADDR + reg_idx * 4);
}
/// @}
/**
* @name IRQ_RAW_STATUS register definitions
*
* @{
*/
/// Address of the IRQ_RAW_STATUS register
#define INTC_IRQ_RAW_STATUS_ADDR 0x10910008
/// Offset of the IRQ_RAW_STATUS register from the base address
#define INTC_IRQ_RAW_STATUS_OFFSET 0x00000008
/// Index of the IRQ_RAW_STATUS register
#define INTC_IRQ_RAW_STATUS_INDEX 0x00000002
/// Reset value of the IRQ_RAW_STATUS register
#define INTC_IRQ_RAW_STATUS_RESET 0x00000000
/// Number of elements of the IRQ_RAW_STATUS register array
#define INTC_IRQ_RAW_STATUS_COUNT 2
/**
* @brief Returns the current value of the IRQ_RAW_STATUS register.
* The IRQ_RAW_STATUS register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_RAW_STATUS register.
*/
__INLINE uint32_t intc_irq_raw_status_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_RAW_STATUS_ADDR + reg_idx * 4);
}
/// @}
/**
* @name IRQ_UNMASK_SET register definitions
*
* @{
*/
/// Address of the IRQ_UNMASK_SET register
#define INTC_IRQ_UNMASK_SET_ADDR 0x10910010
/// Offset of the IRQ_UNMASK_SET register from the base address
#define INTC_IRQ_UNMASK_SET_OFFSET 0x00000010
/// Index of the IRQ_UNMASK_SET register
#define INTC_IRQ_UNMASK_SET_INDEX 0x00000004
/// Reset value of the IRQ_UNMASK_SET register
#define INTC_IRQ_UNMASK_SET_RESET 0x00000000
/// Number of elements of the IRQ_UNMASK_SET register array
#define INTC_IRQ_UNMASK_SET_COUNT 2
/**
* @brief Returns the current value of the IRQ_UNMASK_SET register.
* The IRQ_UNMASK_SET register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_UNMASK_SET register.
*/
__INLINE uint32_t intc_irq_unmask_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_UNMASK_SET_ADDR + reg_idx * 4);
}
/**
* @brief Sets the IRQ_UNMASK_SET register to a value.
* The IRQ_UNMASK_SET register will be written.
* @param[in] reg_idx Index of the register
* @param value - The value to write.
*/
__INLINE void intc_irq_unmask_set(int reg_idx, uint32_t value)
{
ASSERT_ERR(reg_idx <= 1);
REG_PL_WR(INTC_IRQ_UNMASK_SET_ADDR + reg_idx * 4, value);
}
/// @}
/**
* @name IRQ_UNMASK_CLEAR register definitions
*
* @{
*/
/// Address of the IRQ_UNMASK_CLEAR register
#define INTC_IRQ_UNMASK_CLEAR_ADDR 0x10910018
/// Offset of the IRQ_UNMASK_CLEAR register from the base address
#define INTC_IRQ_UNMASK_CLEAR_OFFSET 0x00000018
/// Index of the IRQ_UNMASK_CLEAR register
#define INTC_IRQ_UNMASK_CLEAR_INDEX 0x00000006
/// Reset value of the IRQ_UNMASK_CLEAR register
#define INTC_IRQ_UNMASK_CLEAR_RESET 0x00000000
/// Number of elements of the IRQ_UNMASK_CLEAR register array
#define INTC_IRQ_UNMASK_CLEAR_COUNT 2
/**
* @brief Sets the IRQ_UNMASK_CLEAR register to a value.
* The IRQ_UNMASK_CLEAR register will be written.
* @param[in] reg_idx Index of the register
* @param value - The value to write.
*/
__INLINE void intc_irq_unmask_clear(int reg_idx, uint32_t value)
{
ASSERT_ERR(reg_idx <= 1);
REG_PL_WR(INTC_IRQ_UNMASK_CLEAR_ADDR + reg_idx * 4, value);
}
/// @}
/**
* @name IRQ_POLARITY register definitions
*
* @{
*/
/// Address of the IRQ_POLARITY register
#define INTC_IRQ_POLARITY_ADDR 0x10910020
/// Offset of the IRQ_POLARITY register from the base address
#define INTC_IRQ_POLARITY_OFFSET 0x00000020
/// Index of the IRQ_POLARITY register
#define INTC_IRQ_POLARITY_INDEX 0x00000008
/// Reset value of the IRQ_POLARITY register
#define INTC_IRQ_POLARITY_RESET 0x00000000
/// Number of elements of the IRQ_POLARITY register array
#define INTC_IRQ_POLARITY_COUNT 2
/**
* @brief Returns the current value of the IRQ_POLARITY register.
* The IRQ_POLARITY register will be read and its value returned.
* @param[in] reg_idx Index of the register
* @return The current value of the IRQ_POLARITY register.
*/
__INLINE uint32_t intc_irq_polarity_get(int reg_idx)
{
ASSERT_ERR(reg_idx <= 1);
return REG_PL_RD(INTC_IRQ_POLARITY_ADDR + reg_idx * 4);
}
/**
* @brief Sets the IRQ_POLARITY register to a value.
* The IRQ_POLARITY register will be written.
* @param[in] reg_idx Index of the register
* @param value - The value to write.
*/
__INLINE void intc_irq_polarity_set(int reg_idx, uint32_t value)
{
ASSERT_ERR(reg_idx <= 1);
REG_PL_WR(INTC_IRQ_POLARITY_ADDR + reg_idx * 4, value);
}
/// @}
/**
* @name IRQ_INDEX register definitions
*
* @{
*/
/// Address of the IRQ_INDEX register
#define INTC_IRQ_INDEX_ADDR 0x10910040
/// Offset of the IRQ_INDEX register from the base address
#define INTC_IRQ_INDEX_OFFSET 0x00000040
/// Index of the IRQ_INDEX register
#define INTC_IRQ_INDEX_INDEX 0x00000010
/// Reset value of the IRQ_INDEX register
#define INTC_IRQ_INDEX_RESET 0x00000000
/**
* @brief Returns the current value of the IRQ_INDEX register.
* The IRQ_INDEX register will be read and its value returned.
* @return The current value of the IRQ_INDEX register.
*/
__INLINE uint32_t intc_irq_index_get(void)
{
return REG_PL_RD(INTC_IRQ_INDEX_ADDR);
}
/// @}
#endif // _REG_INTC_H_
/// @}

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#ifndef _ARM_ARCH_H_
#define _ARM_ARCH_H_
/**
* RD an 8-bit register from the core
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @return 8-bit datum
*/
#define REG_RD8(_pBase, _offset) *((volatile UINT8 *)(_pBase + _offset))
/**
* RD a 16-bit register from the core
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @return 16-bit datum
*/
#define REG_RD16(_pBase, _offset) *((volatile UINT16 *)(_pBase + _offset))
/**
* RD a 32-bit register from the core
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @return 32-bit datum
*/
#define REG_RD32(_pBase, _offset) *((volatile UINT32 *)(_pBase + _offset))
/**
* WR an 8-bit core register
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @param _data 8-bit datum
*/
#define REG_WR8(_pBase, _offset, _data) \
(*((volatile UINT8 *)(_pBase + _offset)) = _data)
/**
* WR a 16-bit core register
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @param _data 16-bit datum
*/
#define REG_WR16(_pBase, _offset, _data) \
(*((volatile UINT16 *)(_pBase + _offset)) = _data)
/**
* WR a 32-bit core register
* @param _pBase core base address in memory
* @param _offset offset into the core's register space
* @param _data 32-bit datum
*/
#define REG_WR32(_pBase, _offset, _data) \
(*((volatile UINT32 *)(_pBase + _offset)) = _data)
#define REG_READ(addr) (*((volatile UINT32 *)(addr)))
#define REG_WRITE(addr, _data) (*((volatile UINT32 *)(addr)) = (_data))
#endif

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#ifndef _DRIVER_CODEC_ES8374_PUB_H_
#define _DRIVER_CODEC_ES8374_PUB_H_
extern void es8374_codec_init(void);
extern void es8374_codec_configure(unsigned int fs, unsigned char datawidth);
extern void es8374_codec_close(void);
extern void es8374_codec_volume_control(unsigned char volume);
extern void es8374_codec_mute_control(BOOL enable);
#endif

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#ifndef _DRIVER_PUB_H_
#define _DRIVER_PUB_H_
extern UINT32 driver_init(void);
#endif // _DRIVER_PUB_H_
// eof

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#ifndef _DRV_MODEL_PUB_H_
#define _DRV_MODEL_PUB_H_
#define DRV_FAILURE ((UINT32)-5)
#define DRV_SUCCESS (0)
#define DD_HANDLE_MAGIC_WORD (0xA5A50000)
#define DD_HANDLE_MAGIC_MASK (0xFFFF0000)
#define DD_HANDLE_ID_MASK (0x0000FFFF)
#define DD_HANDLE_UNVALID ((UINT32)-1)
#define DD_ID_UNVALID ((UINT32)-1)
typedef UINT32 DD_HANDLE;
typedef struct _dd_operations_
{
UINT32 (*open) (UINT32 op_flag);
UINT32 (*close) (void);
UINT32 (*read) (char *user_buf, UINT32 count, UINT32 op_flag);
UINT32 (*write) (char *user_buf, UINT32 count, UINT32 op_flag);
UINT32 (*control) (UINT32 cmd, void *parm);
} DD_OPERATIONS;
typedef struct _sdd_operations_
{
UINT32 (*control) (UINT32 cmd, void *parm);
} SDD_OPERATIONS;
typedef enum _DD_OPEN_METHOD_
{
DD_OPEN_METHOD_ONE_TIME = 0, // open one time only
DD_OPEN_METHOD_MUTI_TIME // open multi times
} DD_OPEN_METHOD;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern UINT32 drv_model_init(void);
extern UINT32 drv_model_uninit(void);
extern DD_HANDLE ddev_open(char *dev_name, UINT32 *status, UINT32 op_flag);
extern UINT32 ddev_close(DD_HANDLE handle);
extern UINT32 ddev_read(DD_HANDLE handle, char *user_buf , UINT32 count, UINT32 op_flag);
extern UINT32 ddev_write(DD_HANDLE handle, char *user_buf , UINT32 count, UINT32 op_flag);
extern UINT32 ddev_control(DD_HANDLE handle, UINT32 cmd, VOID *param);
extern UINT32 sddev_control(char *dev_name, UINT32 cmd, VOID *param);
extern UINT32 ddev_register_dev(char *dev_name, DD_OPERATIONS *optr);
extern UINT32 sddev_register_dev(char *dev_name, SDD_OPERATIONS *optr);
extern UINT32 ddev_unregister_dev(char *dev_name);
extern UINT32 sddev_unregister_dev(char *dev_name);
#endif //_DRV_MODEL_PUB_H_

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#ifndef _FFT_PUB_H_
#define _FFT_PUB_H_
#define FFT_FAILURE (1)
#define FFT_SUCCESS (0)
#define FFT_DEV_NAME "fft"
#define FFT_CMD_MAGIC (0xe260000)
enum
{
CMD_FFT_BUSY = FFT_CMD_MAGIC + 1,
CMD_FFT_ENABLE,
CMD_FIR_SIGNLE_ENABLE
};
enum
{
FFT_MODE_FFT,
FFT_MODE_IFFT
};
typedef struct
{
int mode;
INT16 *inbuf;
INT16 *outbuf;
UINT16 size;
} input_fft_t;
typedef struct
{
UINT8 fir_len;
UINT8 fir_cwidth;
UINT8 fir_dwidth;
INT16 *coef;
INT16 *input;
INT32 *mac;
} input_fir_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void fft_init(void);
void fft_exit(void);
void fft_isr(void);
#endif //_FFT_PUB_H_

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#ifndef _FLASH_PUB_H
#define _FLASH_PUB_H
#define FLASH_DEV_NAME ("flash")
#define FLASH_FAILURE (1)
#define FLASH_SUCCESS (0)
#define FLASH_CMD_MAGIC (0xe240000)
enum
{
CMD_FLASH_SET_CLK = FLASH_CMD_MAGIC + 1,
CMD_FLASH_SET_DCO,
CMD_FLASH_SET_DPLL,
CMD_FLASH_WRITE_ENABLE,
CMD_FLASH_WRITE_DISABLE,
CMD_FLASH_READ_SR,
CMD_FLASH_WRITE_SR,
CMD_FLASH_READ_QE,
CMD_FLASH_SET_QE,
CMD_FLASH_SET_QWFR,
CMD_FLASH_CLR_QWFR,
CMD_FLASH_SET_WSR,
CMD_FLASH_GET_ID,
CMD_FLASH_READ_MID,
CMD_FLASH_ERASE_SECTOR,
CMD_FLASH_SET_HPM,
CMD_FLASH_SET_PROTECT
};
typedef struct
{
UINT8 byte;
UINT16 value;
} flash_sr_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void flash_init(void);
extern void flash_exit(void);
#endif //_FLASH_PUB_H

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#ifndef __GDMA_PUB_H__
#define __GDMA_PUB_H__
#if CFG_GENERAL_DMA
#define GDMA_FAILURE (1)
#define GDMA_SUCCESS (0)
#define GDMA_DEV_NAME "generaldma"
#define GDMA_CMD_MAGIC (0x0e809000)
enum
{
CMD_GDMA_SET_DMA_ENABLE = GDMA_CMD_MAGIC + 1,
CMD_GDMA_CFG_FIN_INT_ENABLE,
CMD_GDMA_CFG_HFIN_INT_ENABLE,
CMD_GDMA_CFG_SRCDATA_WIDTH,
CMD_GDMA_CFG_DSTDATA_WIDTH,
CMD_GDMA_CFG_SRCADDR_INCREASE,
CMD_GDMA_CFG_DSTADDR_INCREASE,
CMD_GDMA_CFG_SRCADDR_LOOP,
CMD_GDMA_CFG_DSTADDR_LOOP,
CMD_GDMA_SET_CHNL_PRIO,
CMD_GDMA_SET_TRANS_LENGTH,
CMD_GDMA_SET_DST_START_ADDR,
CMD_GDMA_SET_SRC_START_ADDR,
CMD_GDMA_SET_DST_LOOP_ENDADDR,
CMD_GDMA_SET_DST_LOOP_STARTADDR,
CMD_GDMA_SET_SRC_LOOP_ENDADDR,
CMD_GDMA_SET_SRC_LOOP_STARTADDR,
CMD_GDMA_GET_REMAIN_LENGTH,
CMD_GDMA_GET_FIN_INT_STATUS,
CMD_GDMA_CLR_FIN_INT_STATUS,
CMD_GDMA_GET_HFIN_INT_STATUS,
CMD_GDMA_CLR_HFIN_INT_STATUS,
CMD_GDMA_CFG_TYPE0,
CMD_GDMA_CFG_TYPE1,
CMD_GDMA_CFG_TYPE2,
CMD_GDMA_CFG_TYPE3,
CMD_GDMA_ENABLE
};
#define GDMA_CHANNEL_0 (0U)
#define GDMA_CHANNEL_1 (1U)
#define GDMA_CHANNEL_2 (2U)
#define GDMA_CHANNEL_3 (3U)
#define GDMA_TYPE_0 (0U) // no loop src, no loop dst
#define GDMA_TYPE_1 (1U) // loop src, no loop dst
#define GDMA_TYPE_2 (2U) // no loop src, loop dst
#define GDMA_TYPE_3 (3U) // loop src, loop dst
typedef struct gdmacfg_types_st
{
UINT32 channel;
UINT32 prio;
UINT8 dstptr_incr;
UINT8 srcptr_incr;
UINT8 dstdat_width;
UINT8 srcdat_width;
void *src_start_addr;
void *dst_start_addr;
union
{
struct
{
void *src_loop_start_addr;
void *src_loop_end_addr;
} type1; // loop src, no loop dst
struct
{
void *dst_loop_start_addr;
void *dst_loop_end_addr;
} type2; // no loop src, loop dst
struct
{
void *src_loop_start_addr;
void *src_loop_end_addr;
void *dst_loop_start_addr;
void *dst_loop_end_addr;
} type3; // loop src, loop dst
} u;
} GDMACFG_TPYES_ST, *GDMACFG_TPYES_PTR;
typedef struct gdma_do_st
{
UINT32 channel;
void *src_addr;
void *dst_addr;
UINT32 length;
} GDMA_DO_ST, *GDMA_DO_PTR;
typedef struct generdam_cfg_st
{
UINT32 param;
UINT32 channel;
} GDMA_CFG_ST, *GDMA_CFG_PTR;
void gdma_init(void);
void gdma_exit(void);
void *gdma_memcpy(void *out, const void *in, UINT32 n);
#endif // CFG_GENERAL_DMA
#endif

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#ifndef _GPIO_PUB_H_
#define _GPIO_PUB_H_
#include "generic.h"
#include "drv_model_pub.h"
#define GPIO_FAILURE (1)
#define GPIO_SUCCESS (0)
#define GPIO_DEV_NAME "gpio"
#define GPIO_CFG_PARAM(id, mode) (id + ((mode & 0xff) << 8))
#define GPIO_CFG_PARAM_DEMUX_ID(param) (param & 0xff)
#define GPIO_CFG_PARAM_DEMUX_MODE(param) ((param >> 8) & 0xff)
#define GPIO_OUTPUT_PARAM(id, val) (id + ((val & 0xff) << 8))
#define GPIO_OUTPUT_DEMUX_ID(param) (param & 0xff)
#define GPIO_OUTPUT_DEMUX_VAL(param) ((param >> 8) & 0xff)
#define GPIO_CMD_MAGIC (0xcaa0000)
enum
{
CMD_GPIO_CFG = GPIO_CMD_MAGIC + 0,
CMD_GPIO_OUTPUT_REVERSE = GPIO_CMD_MAGIC + 1,
CMD_GPIO_ENABLE_SECOND = GPIO_CMD_MAGIC + 2,
CMD_GPIO_INPUT = GPIO_CMD_MAGIC + 3,
CMD_GPIO_OUTPUT = GPIO_CMD_MAGIC + 4,
CMD_GPIO_CLR_DPLL_UNLOOK_INT = GPIO_CMD_MAGIC + 5,
CMD_GPIO_INT_ENABLE = GPIO_CMD_MAGIC + 6,
CMD_GPIO_INT_DISABLE = GPIO_CMD_MAGIC + 7,
CMD_GPIO_INT_CLEAR = GPIO_CMD_MAGIC + 8,
};
enum
{
GMODE_INPUT_PULLDOWN = 0,
GMODE_OUTPUT,
GMODE_SECOND_FUNC,
GMODE_INPUT_PULLUP,
GMODE_INPUT,
GMODE_SECOND_FUNC_PULL_UP,//Special for uart1
GMODE_OUTPUT_PULLUP
};
typedef enum
{
GPIO0 = 0,
GPIO1,
GPIO2,
GPIO3,
GPIO4,
GPIO5,
GPIO6,
GPIO7,
GPIO8,
GPIO9,
GPIO10,
GPIO11,
GPIO12,
GPIO13,
GPIO14,
GPIO15,
GPIO16,
GPIO17,
GPIO18,
GPIO19,
GPIO20,
GPIO21,
GPIO22,
GPIO23,
GPIO24,
GPIO25,
GPIO26,
GPIO27,
GPIO28,
GPIO29,
GPIO30,
GPIO31,
GPIONUM
} GPIO_INDEX ;
enum
{
GFUNC_MODE_UART2 = 0,
GFUNC_MODE_I2C2,
GFUNC_MODE_I2S,
GFUNC_MODE_ADC1,
GFUNC_MODE_ADC2,
GFUNC_MODE_CLK13M,
GFUNC_MODE_PWM0,
GFUNC_MODE_PWM1,
GFUNC_MODE_PWM2,
GFUNC_MODE_PWM3,
GFUNC_MODE_WIFI_ACTIVE,
GFUNC_MODE_BT_ACTIVE,
GFUNC_MODE_BT_PRIORITY,
GFUNC_MODE_UART1,
GFUNC_MODE_SD_DMA,
GFUNC_MODE_SD_HOST,
GFUNC_MODE_SPI_DMA,
GFUNC_MODE_SPI,
GFUNC_MODE_PWM4,
GFUNC_MODE_PWM5,
GFUNC_MODE_I2C1,
GFUNC_MODE_JTAG,
GFUNC_MODE_CLK26M,
GFUNC_MODE_ADC3
};
enum
{
GPIO_INT_LEVEL_LOW = 0,
GPIO_INT_LEVEL_HIGH = 1,
GPIO_INT_LEVEL_RISING = 2,
GPIO_INT_LEVEL_FALLING = 3
};
typedef struct gpio_int_st
{
UINT32 id;
UINT32 mode;
void * phandler;
}GPIO_INT_ST;
__inline static void bk_gpio_config_input(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_INPUT);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_config_input_pup(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_INPUT_PULLUP);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_config_input_pdwn(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_INPUT_PULLDOWN);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static uint32_t bk_gpio_input(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param = id;
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_INPUT, &param);
ASSERT(DRV_FAILURE != ret);
return ret;
}
__inline static void bk_gpio_config_output(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param;
param = GPIO_CFG_PARAM(id, GMODE_OUTPUT);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_output(GPIO_INDEX id,UINT32 val)
{
UINT32 ret;
UINT32 param;
param = GPIO_OUTPUT_PARAM(id, val);
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_OUTPUT, &param);
ASSERT(GPIO_SUCCESS == ret);
}
__inline static void bk_gpio_output_reverse(GPIO_INDEX id)
{
UINT32 ret;
UINT32 param = id;
ret = sddev_control(GPIO_DEV_NAME, CMD_GPIO_OUTPUT_REVERSE, &param);
ASSERT(GPIO_SUCCESS == ret);
}
extern void gpio_init(void);
extern void gpio_exit(void);
void gpio_int_disable(UINT32 index);
void gpio_int_enable(UINT32 index, UINT32 mode, void (*p_Int_Handler)(unsigned char));
#endif // _GPIO_PUB_H_
// EOF

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#ifndef _I2S_PUB_H_
#define _I2S_PUB_H_
#define I2S_FAILURE (1)
#define I2S_SUCCESS (0)
#define I2S_DEV_NAME "i2s"
#define I2S_CMD_MAGIC (0xe280000)
enum
{
I2S_HW_SET = I2S_CMD_MAGIC + 1,
I2S_CMD_SET_FREQ_DATAWIDTH,
I2S_CMD_ACTIVE,
I2S_CMD_RXACTIVE,
I2S_CMD_SELECT_MODE,
I2S_CMD_SET_LEVEL
};
enum
{
I2S_MODE_I2S = 0,
I2S_MODE_LEFT_JUST = 1,
I2S_MODE_RIGHT_JUST = 2,
I2S_MODE_SHORT_SYNC = 4,
I2S_MODE_LONG_SYNC = 5,
I2S_MODE_NORMAL_2B_D = 6,
I2S_MODE_DELAY_2B_D = 7
};
typedef struct
{
UINT8 rx_level;
UINT8 tx_level;
} i2s_level_t;
typedef struct
{
UINT32 freq;
UINT16 datawidth;
} i2s_rate_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void i2s_init(void);
void i2s_exit(void);
void i2s_isr(void);
UINT8 is_i2s_active(void);
#endif //_I2S_PUB_H_

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#ifndef _ICU_PUB_H_
#define _ICU_PUB_H_
#define ICU_FAILURE (1)
#define ICU_SUCCESS (0)
#define ICU_DEV_NAME "icu"
#define ICU_CMD_MAGIC (0xe220000)
enum
{
CMD_ICU_CLKGATING_DISABLE = ICU_CMD_MAGIC + 1,
CMD_ICU_CLKGATING_ENABLE,
CMD_ICU_INT_DISABLE,
CMD_ICU_INT_ENABLE,
CMD_ICU_GLOBAL_INT_DISABLE,
CMD_ICU_GLOBAL_INT_ENABLE,
CMD_GET_INTR_STATUS,
CMD_CLR_INTR_STATUS,
CMD_GET_INTR_RAW_STATUS,
CMD_CLR_INTR_RAW_STATUS,
CMD_CLK_PWR_DOWN,
CMD_CLK_PWR_UP,
CMD_CONF_PWM_PCLK,
CMD_CONF_PWM_LPOCLK,
CMD_TL410_CLK_PWR_DOWN,
CMD_TL410_CLK_PWR_UP,
CMD_CONF_PCLK_26M,
CMD_CONF_PCLK_DCO,
CMD_SET_JTAG_MODE,
CMD_GET_JTAG_MODE,
CMD_ARM_WAKEUP
};
/*CMD_CONF_PCLK*/
#define PCLK_POSI (0)
/*CMD_CONF_PWM_PCLK, CMD_CONF_PWM_LPOCLK*/
// *param = channel_id
/*CMD_CLK_PWR_DOWN CMD_CLK_PWR_UP*/
#define PWD_FFT_CLK_BIT (1 << 19)
#define PWD_USB_CLK_BIT (1 << 18)
#define PWD_SDIO_CLK_BIT (1 << 17)
#define PWD_TL410_WATCHDOG_BIT (1 << 16)
#define PWD_AUDIO_CLK_BIT (1 << 15)
#define PWD_PWM5_CLK_BIT (1 << 14)
#define PWD_PWM4_CLK_BIT (1 << 13)
#define PWD_PWM3_CLK_BIT (1 << 12)
#define PWD_PWM2_CLK_BIT (1 << 11)
#define PWD_PWM1_CLK_BIT (1 << 10)
#define PWD_PWM0_CLK_BIT (1 << 9)
#define PWD_ARM_WATCHDOG_CLK_BIT (1 << 8)
#define PWD_SARADC_CLK_BIT (1 << 7)
#define PWD_SPI_CLK_BIT (1 << 6)
#define PWD_I2C2_CLK_BIT (1 << 5)
#define PWD_I2S_PCM_CLK_BIT (1 << 4)
#define PWD_IRDA_CLK_BIT (1 << 3)
#define PWD_I2C1_CLK_BIT (1 << 2)
#define PWD_UART2_CLK_BIT (1 << 1)
#define PWD_UART1_CLK_BIT (1 << 0)
/* CMD_ICU_CLKGATING_DISABLE CMD_ICU_CLKGATING_ENABLE*/
#define CLKGATE_MAC_AHB_BIT (1 << 16)
#define CLKGATE_FFT_AHB_BIT (1 << 15)
#define CLKGATE_USB_AHB_BIT (1 << 14)
#define CLKGATE_SDIO_AHB_BIT (1 << 13)
#define CLKGATE_SARADC_APB_BIT (1 << 12)
#define CLKGATE_AUDIO_APB_BIT (1 << 11)
#define CLKGATE_PWM_APB_BIT (1 << 10)
#define CLKGATE_WATCHDOG_APB_BIT (1 << 9)
#define CLKGATE_GPIO_APB_BIT (1 << 8)
#define CLKGATE_SPI_APB_BIT (1 << 7)
#define CLKGATE_I2C2_APB_BIT (1 << 6)
#define CLKGATE_I2S_PCM_APB_BIT (1 << 5)
#define CLKGATE_IRDA_APB_BIT (1 << 4)
#define CLKGATE_I2C1_APB_BIT (1 << 3)
#define CLKGATE_UART2_APB_BIT (1 << 2)
#define CLKGATE_UART1_APB_BIT (1 << 1)
#define CLKGATE_ICU_APB_BIT (1 << 0)
/* CMD ICU_TL410_CLK_PWD*/
#define PWD_TL410_CLK_BIT (1 << 0)
/* ICU_JTAG_SELECT */
#define JTAG_ARM_MODE 0
#define JTAG_TL410_MODE 1
/*CMD_ICU_INT_DISABLE CMD_ICU_INT_ENABLE*/
#define FIQ_DPLL_UNLOCK_BIT (1 << 28)
#define FIQ_SPI_DMA_BIT (1 << 27)
#define FIQ_MAC_WAKEUP_BIT (1 << 26)
#define FIQ_MAILBOX1_BIT (1 << 25)
#define FIQ_MAILBOX0_BIT (1 << 24)
#define FIQ_SDIO_DMA_BIT (1 << 23)
#define FIQ_MAC_GENERAL_BIT (1 << 22)
#define FIQ_MAC_PROT_TRIGGER_BIT (1 << 21)
#define FIQ_MAC_TX_TRIGGER_BIT (1 << 20)
#define FIQ_MAC_RX_TRIGGER_BIT (1 << 19)
#define FIQ_MAC_TX_RX_MISC_BIT (1 << 18)
#define FIQ_MAC_TX_RX_TIMER_BIT (1 << 17)
#define FIQ_MODEM_BIT (1 << 16)
#define IRQ_GDMA_BIT (1 << 15)
#define IRQ_FFT_BIT (1 << 14)
#define IRQ_USB_BIT (1 << 13)
#define IRQ_SDIO_BIT (1 << 12)
#define IRQ_SARADC_BIT (1 << 11)
#define IRQ_AUDIO_BIT (1 << 10)
#define IRQ_PWM_BIT (1 << 9)
#define IRQ_TL410_WATCHDOG_BIT (1 << 8)
#define IRQ_GPIO_BIT (1 << 7)
#define IRQ_SPI_BIT (1 << 6)
#define IRQ_I2C2_BIT (1 << 5)
#define IRQ_I2S_PCM_BIT (1 << 4)
#define IRQ_IRDA_BIT (1 << 3)
#define IRQ_I2C1_BIT (1 << 2)
#define IRQ_UART2_BIT (1 << 1)
#define IRQ_UART1_BIT (1 << 0)
/* CMD_ICU_GLOBAL_INT_DISABLE CMD_ICU_GLOBAL_INT_ENABLE*/
#define GINTR_FIQ_BIT (1 << 1)
#define GINTR_IRQ_BIT (1 << 0)
/* CMD_ARM_WAKEUP */
#define MAC_ARM_WAKEUP_EN_BIT (1 << 26)
#define GPIO_ARM_WAKEUP_EN_BIT (1 << 7)
#define PWM_ARM_WAKEUP_EN_BIT (1 << 9)
#define UART2_ARM_WAKEUP_EN_BIT (1 << 1)
#define UART1_ARM_WAKEUP_EN_BIT (1 << 0)
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void icu_init(void);
extern void icu_exit(void);
#endif //_ICU_PUB_H_

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#ifndef _INTC_PUB_H_
#define _INTC_PUB_H_
#include "generic.h"
#if 1
#define FIQ_DPLL_UNLOCK (28)
#define FIQ_SPI_DMA (27)
#define FIQ_MAC_WAKEUP (26)
#define FIQ_MAILBOX1 (25)
#define FIQ_MAILBOX0 (24)
#define FIQ_SDIO_DMA (23)
#define FIQ_MAC_GENERAL (22)
#define FIQ_MAC_PROT_TRIGGER (21)
#define FIQ_MAC_TX_TRIGGER (20)
#define FIQ_MAC_RX_TRIGGER (19)
#define FIQ_MAC_TX_RX_MISC (18)
#define FIQ_MAC_TX_RX_TIMER (17)
#define FIQ_MODEM (16)
#define IRQ_GENERDMA (15)
#define IRQ_FFT (14)
#define IRQ_USB (13)
#define IRQ_SD (12)
#define IRQ_SARADC (11)
#define IRQ_AUDIO (10)
#define IRQ_PWM (9)
#define IRQ_TL410_WATCHDOG (8)
#define IRQ_GPIO (7)
#define IRQ_SPI (6)
#define IRQ_I2C2 (5)
#define IRQ_I2S_PCM (4)
#define IRQ_IRDA (3)
#define IRQ_I2C1 (2)
#define IRQ_UART2 (1)
#define IRQ_UART1 (0)
#endif
#if 2
#define PRI_FIQ_DPLL_UNLOCK (29)
#define PRI_FIQ_SPI_DMA (7)
#define PRI_FIQ_MAC_WAKEUP (9)
#define PRI_FIQ_MAILBOX1 (12)
#define PRI_FIQ_MAILBOX0 (11)
#define PRI_FIQ_SDIO_DMA (8)
#define PRI_FIQ_MAC_GENERAL (1)
#define PRI_FIQ_MAC_PROT_TRIGGER (6)
#define PRI_FIQ_MAC_TX_TRIGGER (3)
#define PRI_FIQ_MAC_RX_TRIGGER (4)
#define PRI_FIQ_MAC_TX_RX_MISC (5)
#define PRI_FIQ_MAC_TX_RX_TIMER (2)
#define PRI_FIQ_MODEM (10)
#define PRI_IRQ_GENERDMA (28)
#define PRI_IRQ_FFT (13)
#define PRI_IRQ_USB (14)
#define PRI_IRQ_SD (15)
#define PRI_IRQ_SARADC (16)
#define PRI_IRQ_AUDIO (27)
#define PRI_IRQ_PWM (17)
#define PRI_IRQ_TL410_WATCHDOG (18)
#define PRI_IRQ_GPIO (19)
#define PRI_IRQ_SPI (20)
#define PRI_IRQ_I2C2 (21)
#define PRI_IRQ_I2S_PCM (22)
#define PRI_IRQ_IRDA (23)
#define PRI_IRQ_I2C1 (24)
#define PRI_IRQ_UART2 (25)
#define PRI_IRQ_UART1 (26)
#endif
extern void intc_service_register(UINT8 int_num, UINT8 int_pri, FUNCPTR isr);
extern void intc_spurious(void);
extern void intc_enable(int index);
extern void intc_disable(int index);
#endif // _INTC_PUB_H_
// eof

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#ifndef _IRDA_PUB_H_
#define _IRDA_PUB_H_
#define IRDA_FAILURE (1)
#define IRDA_SUCCESS (0)
#define IRDA_DEV_NAME "irda"
#define IRDA_CMD_MAGIC (0xe290000)
enum
{
IRDA_CMD_ACTIVE = IRDA_CMD_MAGIC + 1,
IRDA_CMD_SET_POLARITY,
IRDA_CMD_SET_CLK,
IRDA_CMD_GET_KEY
};
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void irda_init(void);
void irda_exit(void);
void irda_isr(void);
#endif //_IRDA_PUB_H_

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#ifndef _MAC_PHY_BYPASS_PUB_H_
#define _MAC_PHY_BYPASS_PUB_H_
#define MPB_DEV_NAME "mac_phy_bypass"
#define MPB_CMD_MAGIC (0xcbe0000)
enum
{
MCMD_RX_MODE_BYPASS_MAC = MPB_CMD_MAGIC + 0,
MCMD_TX_MODE_BYPASS_MAC = MPB_CMD_MAGIC + 1,
MCMD_TX_LEGACY_SET_LEN,
MCMD_TX_HT_VHT_SET_LEN,
MCMD_STOP_BYPASS_MAC,
MCMD_START_BYPASS_MAC,
MCMD_SET_BANDWIDTH,
MCMD_SET_GI,
MCMD_BYPASS_TX_SET_RATE_MFORMAT,
};
/*MCMD_TX_BYPASS_MAC_RATE*/
#define PPDU_RATE_POSI (4)
#define PPDU_RATE_MASK (0xF)
#define PPDU_BANDWIDTH_POSI (6)
#define PPDU_BANDWIDTH_MASK (0x1)
#define PPDU_LEG_RATE_1MBPS (0x00)
#define PPDU_LEG_RATE_2MBPS (0x01)
#define PPDU_LEG_RATE_5_5MBPS (0x02)
#define PPDU_LEG_RATE_11MBPS (0x03)
#define PPDU_LEG_RATE_6MBPS (0x0B)
#define PPDU_LEG_RATE_9MBPS (0x0F)
#define PPDU_LEG_RATE_12MBPS (0x0A)
#define PPDU_LEG_RATE_18MBPS (0x0E)
#define PPDU_LEG_RATE_24MBPS (0x09)
#define PPDU_LEG_RATE_36MBPS (0x0D)
#define PPDU_LEG_RATE_48MBPS (0x08)
#define PPDU_LEG_RATE_54MBPS (0x0C)
typedef struct mbps_txs_mfr_st {
UINT32 mod_format;
UINT32 rate;
}MBPS_TXS_MFR_ST, *MBPS_TXS_MFR_PTR;
extern void mpb_init(void);
extern void mpb_exit(void);
#endif // _MAC_PHY_BYPASS_PUB_H_

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#ifndef _PWM_PUB_H_
#define _PWM_PUB_H_
#define PWM_FAILURE (1)
#define PWM_SUCCESS (0)
#define PWM_DEV_NAME "pwm"
#define PWM_CMD_MAGIC (0xe230000)
enum
{
CMD_PWM_UNIT_ENABLE = PWM_CMD_MAGIC + 1,
CMD_PWM_UINT_DISABLE,
CMD_PWM_IR_ENABLE,
CMD_PWM_IR_DISABLE,
CMD_PWM_IR_CLEAR,
CMD_PWM_INIT_PARAM,
CMD_PWM_CAP_GET
};
enum
{
PWM0 = 0,
PWM1,
PWM2,
PWM3,
PWM4,
PWM5,
PWM_COUNT
};
typedef void (*PFUNC)(UINT8);
#define PWM_ENABLE (0x01)
#define PWM_DISABLE (0x00)
#define PWM_INT_EN (0x01)
#define PWM_INT_DIS (0x00)
#define PMODE_PWM (0x00)
#define PMODE_TIMER (0x01)
#define PMODE_CAP_POS (0x02)
#define PMODE_CAP_NEG (0x03)
#define PWM_CLK_32K (0x00)
#define PWM_CLK_26M (0x01)
typedef struct
{
UINT8 channel;
/* cfg--PWM config
* bit[0]: PWM enable
* 0: PWM disable
* 1: PWM enable
* bit[1]: PWM interrupt enable
* 0: PWM interrupt disable
* 1: PWM interrupt enable
* bit[3:2]: PWM mode selection
* 00: PWM mode
* 01: TIMER
* 10: Capture Posedge
* 11: Capture Negedge
* bit[5:4]: PWM clock select
* 00: PWM clock 32KHz
* 01: PWM clock 26MHz
* 10/11: PWM clock DPLL
* bit[7:6]: reserved
*/
union
{
UINT8 val;
struct
{
UINT8 en: 1;
UINT8 int_en: 1;
UINT8 mode: 2;
UINT8 clk: 2;
UINT8 rsv: 2;
} bits;
} cfg;
UINT16 end_value;
UINT16 duty_cycle;
PFUNC p_Int_Handler;
} pwm_param_t;
typedef struct
{
UINT32 ucChannel;
UINT16 value;
} pwm_capture_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void pwm_init(void);
extern void pwm_exit(void);
extern void pwm_isr(void);
#endif //_PWM_PUB_H_

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#ifndef _RC_BEKEN_PUB_H_
#define _RC_BEKEN_PUB_H_
#endif // _RC_BEKEN_PUB_H_

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#ifndef _SARADC_PUB_H_
#define _SARADC_PUB_H_
#define SARADC_FAILURE (1)
#define SARADC_SUCCESS (0)
#define SARADC_DEV_NAME "saradc"
#define SARADC_CMD_MAGIC (0xe290000)
enum
{
SARADC_CMD_SET_MODE = SARADC_CMD_MAGIC + 1,
SARADC_CMD_SET_CHANNEL,
SARADC_CMD_SET_SAMPLE_RATE,
SARADC_CMD_SET_WAITING_TIME,
SARADC_CMD_SET_VALID_MODE,
SARADC_CMD_CLEAR_INT,
SARADC_CMD_SET_CLK_RATE,
SARADC_CMD_RUN_OR_STOP_ADC
};
#define ADC_CONFIG_MODE_SLEEP (0x00UL)
#define ADC_CONFIG_MODE_STEP (0x01UL)
#define ADC_CONFIG_MODE_SOFT_CTRL (0x02UL)
#define ADC_CONFIG_MODE_CONTINUE (0x03UL)
#define ADC_CONFIG_MODE_36DIV (0x00UL)
#define ADC_CONFIG_MODE_18DIV (0x01UL)
typedef struct
{
UINT16 *pData;
volatile UINT8 current_sample_data_cnt;
UINT8 current_read_data_cnt;
UINT8 data_buff_size;
UINT8 has_data; /* 0: has data 1: no data*/
UINT8 channel;
/* mode: ADC mode
* bit[0:1]: ADC operation mode
* 00: ADC power down mode
* 01: ADC one-step mode
* 10: ADC software control mode
* 11: ADC continuous mode
* bit[3:2]: ADC sample rate selection
* 00: adc_clk/36
* 01: adc_clk/18
* 10: Reserved
* 11: Reserved
* bit[7:4]: reserved
*/
UINT8 mode;
void (*p_Int_Handler)(void);
} saradc_desc_t;
typedef struct
{
UINT8 enable;
UINT8 channel;
} saradc_chan_t;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void saradc_init(void);
void saradc_exit(void);
void saradc_isr(void);
#endif //_SARADC_PUB_H_

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#ifndef _SDIO_PUB_H_
#define _SDIO_PUB_H_
#include "doubly_list.h"
//#define SDIO_TEST
#define SDIO_DEV_NAME "sdio"
#define SDIO_FAILURE ((UINT32)-1)
#define SDIO_SUCCESS (0)
#define BLOCK_LEN (512 * 8)
#define H2S_RD_SYNC (1)
#define H2S_WR_SYNC (2)
#define H2S_RD_SPECIAL (5)
#define S2H_WR_SPECIAL (6)
#define S2H_RD_SYNC (3)
#define S2H_WR_SYNC (4)
#define SDIO_DUMMY_BUFF_ADDR (0x100)
#define SDIO_DUMMY_LENGTH (0x100)
#define SDIO_CMD_GET_FREE_NODE (0xBB)
#define SDIO_CMD_REG_RX_CALLBACK (0xBC)
#define SDIO_CMD_PUSH_FREE_NODE (0xBD)
#define SDIO_CMD_GET_CNT_FREE_NODE (0xBE)
#define SDIO_CMD_CLEAR_TX_VALID (0xC0)
#define SDIO_CMD_SET_TX_VALID (0xC1)
#define SDIO_CMD_PEEK_H2S_COUNT (0xC2)
#define SDIO_CMD_PEEK_S2H_COUNT (0xC3)
typedef void (*SDIO_FUNC)(void *Lparam, void *Rparam);
typedef struct _sdio_mem_node_
{
LIST_HEADER_T node_list;
UINT8 *orig_addr;
UINT8 *addr;
UINT32 length;
SDIO_FUNC callback;
void *Lparam;
void *Rparam;
} SDIO_NODE_T, *SDIO_NODE_PTR;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void sdio_init(void);
extern void sdio_exit(void);
#endif // _SDIO_PUB_H_

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#ifndef _SPI_PUB_H_
#define _SPI_PUB_H_
#define SPI_FAILURE (1)
#define SPI_SUCCESS (0)
#define SPI_DEV_NAME "spi"
#define SPI_CMD_MAGIC (0xe250000)
enum
{
CMD_SPI_UNIT_ENABLE = SPI_CMD_MAGIC + 1,
CMD_SPI_SET_MSTEN,
CMD_SPI_SET_CKPHA,
CMD_SPI_SET_CKPOL,
CMD_SPI_SET_BITWIDTH,
CMD_SPI_SET_NSSID,
CMD_SPI_SET_CKR,
CMD_SPI_RXINT_EN,
CMD_SPI_TXINT_EN,
CMD_SPI_RXOVR_EN,
CMD_SPI_TXOVR_EN,
CMD_SPI_RXFIFO_CLR,
CMD_SPI_TXFIFO_CLR,
CMD_SPI_RXINT_MODE,
CMD_SPI_TXINT_MODE,
CMD_SPI_START_TRANS,
CMD_SPI_INIT_MSTEN,
CMD_SPI_GET_BUSY
};
typedef struct
{
UINT8 tx_remain_data_cnt;
UINT8 rx_remain_data_cnt;
UINT8 *p_tx_buf;
UINT8 *p_rx_buf;
UINT8 trans_done;
} spi_trans_t;
typedef enum
{
slave,
master
} spi_msten;
extern volatile spi_trans_t spi_trans;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
void spi_init(void);
void spi_exit(void);
void spi_isr(void);
#endif //_SPI_PUB_H_

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#ifndef _SCTRL_PUB_H_
#define _SCTRL_PUB_H_
#define SCTRL_DEV_NAME "sys_ctrl"
#define SCTRL_FAILURE ((UINT32)-1)
#define SCTRL_SUCCESS (0)
#define SCTRL_CMD_MAGIC (0xC123000)
enum
{
CMD_GET_CHIP_ID = SCTRL_CMD_MAGIC + 1,
CMD_GET_DEVICE_ID = SCTRL_CMD_MAGIC + 2,
CMD_GET_SCTRL_CONTROL,
CMD_SET_SCTRL_CONTROL,
CMD_SCTRL_MCLK_SELECT,
CMD_SCTRL_MCLK_DIVISION,
CMD_SCTRL_RESET_SET,
CMD_SCTRL_RESET_CLR,
CMD_SCTRL_MODEM_CORE_RESET,
CMD_SCTRL_MPIF_CLK_INVERT,
CMD_SCTRL_MODEM_SUBCHIP_RESET,
CMD_SCTRL_MAC_SUBSYS_RESET,
CMD_SCTRL_USB_SUBSYS_RESET,
CMD_SCTRL_DSP_SUBSYS_RESET,
CMD_SCTRL_BLK_ENABLE,
CMD_SCTRL_BLK_DISABLE,
CMD_SCTRL_DSP_POWERDOWN,
CMD_SCTRL_DSP_POWERUP,
CMD_SCTRL_USB_POWERDOWN,
CMD_SCTRL_USB_POWERUP,
CMD_SCTRL_MAC_POWERDOWN,
CMD_SCTRL_MAC_POWERUP,
CMD_SCTRL_MODEM_POWERDOWN,
CMD_SCTRL_MODEM_POWERUP,
CMD_SCTRL_CALI_DPLL,
CMD_SCTRL_BIAS_REG_SET,
CMD_SCTRL_BIAS_REG_CLEAN,
CMD_SCTRL_BIAS_REG_READ,
CMD_SCTRL_BIAS_REG_WRITE,
CMD_SCTRL_ANALOG_CTRL4_SET,
CMD_SCTRL_ANALOG_CTRL4_CLEAN,
CMD_SCTRL_SET_FLASH_DCO,
CMD_SCTRL_SET_FLASH_DPLL,
CMD_SCTRL_NORMAL_SLEEP,
CMD_SCTRL_NORMAL_WAKEUP,
CMD_SCTRL_RTOS_IDLE_SLEEP,
CMD_SCTRL_RTOS_IDLE_WAKEUP,
CMD_SCTRL_RTOS_DEEP_SLEEP,
};
/*CMD_SCTRL_MCLK_SELECT*/
#define MCLK_SELECT_DCO (0x0)
#define MCLK_SELECT_26M_XTAL (0x1)
#define MCLK_SELECT_DPLL (0x2)
#define MCLK_SELECT_LPO (0x3)
/*CMD_SCTRL_BLK_ENABLE CMD_SCTRL_BLK_DISABLE*/
#define BLK_BIT_LINEIN (1 << 19)
#define BLK_BIT_MIC_R_CHANNEL (1 << 18)
#define BLK_BIT_MIC_L_CHANNEL (1 << 17)
#define BLK_BIT_AUDIO_R_CHANNEL (1 << 16)
#define BLK_BIT_AUDIO_L_CHANNEL (1 << 15)
#define BLK_BIT_NC1 (1 << 14)
#define BLK_BIT_SARADC (1 << 13)
#define BLK_BIT_TEMPRATURE_SENSOR (1 << 12)
#define BLK_BIT_26M_XTAL_LOW_POWER (1 << 11)
#define BLK_BIT_XTAL2RF (1 << 10)
#define BLK_BIT_IO_LDO_LOW_POWER (1 << 09)
#define BLK_BIT_ANALOG_SYS_LDO (1 << 08)
#define BLK_BIT_DIGITAL_CORE_LDO_LOW_POWER (1 << 07)
#define BLK_BIT_NC0 (1 << 06)
#define BLK_BIT_DPLL_480M (1 << 05)
#define BLK_BIT_32K_XTAL (1 << 04)
#define BLK_BIT_26M_XTAL (1 << 03)
#define BLK_BIT_ROSC32K (1 << 02)
#define BLK_BIT_DCO (1 << 01)
#define BLK_BIT_FLASH (1 << 00)
/* CMD_SCTRL_RESET _SET/_CLR*/
#define PARAM_MODEM_CORE_RESET_BIT (1 << 6)
#define PARAM_TL410_EXT_WAIT_BIT (1 << 5)
#define PARAM_USB_SUBSYS_RESET_BIT (1 << 4)
#define PARAM_TL410_BOOT_BIT (1 << 3)
#define PARAM_MAC_SUBSYS_RESET_BIT (1 << 2)
#define PARAM_DSP_SUBSYS_RESET_BIT (1 << 1)
#define PARAM_MODEM_SUBCHIP_RESET_BIT (1 << 0)
/* CMD_GET_SCTRL_CONTROL CMD_SET_SCTRL_CONTROL*/
#define MCLK_MODE_DCO (0x0)
#define MCLK_MODE_26M_XTAL (0x1)
#define MCLK_MODE_DPLL (0x2)
#define MCLK_MODE_LPO (0x3)
/*CMD_SCTRL_BIAS_REG_SET CMD_SCTRL_BIAS_REG_CLEAN*/
#define PARAM_BIAS_CAL_OUT_POSI (16)
#define PARAM_BIAS_CAL_OUT_MASK (0x1F)
#define PARAM_LDO_VAL_MANUAL_POSI (8)
#define PARAM_LDO_VAL_MANUAL_MASK (0x1F)
#define PARAM_BIAS_CAL_MANUAL_BIT (1 << 4)
#define PARAM_BIAS_CAL_TRIGGER_BIT (1 << 0)
/*CMD_SCTRL_ANALOG_CTRL4_SET CMD_SCTRL_ANALOG_CTRL4_CLEAN*/
#define PARAM_VSEL_SYS_LDO_POSI (27)
#define PARAM_VSEL_SYS_LDO_MASK (0x3)
typedef union
{
UINT32 val;
struct
{
UINT32 mclk_mux: 2;
UINT32 resv0: 2;
UINT32 mclk_div: 4;
UINT32 flash_26m_select: 1;
UINT32 hclk_div2_en: 1;
UINT32 modem_clk480m_pwd: 1;
UINT32 mac_clk480m_pwd: 1;
UINT32 mpif_clk_inv: 1;
UINT32 sdio_clk_inv: 1;
UINT32 resv1: 18;
} bits;
} SYS_CTRL_U;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void sctrl_init(void);
extern void sctrl_exit(void);
extern void sctrl_normal_exit_sleep(void);
extern void sctrl_normal_enter_sleep(UINT32 peri_clk);
extern void sctrl_mcu_exit(void);
extern void sctrl_mcu_init(void);
extern void sctrl_mcu_sleep(UINT32 );
extern UINT32 sctrl_mcu_wakeup(void);
extern void sctrl_ps_dump();
extern void sctrl_rf_sleep(void);
extern void sctrl_rf_wakeup(void);
extern void sctrl_flash_select_dco(void);
#endif // _SCTRL_PUB_H_

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#ifndef _UART_PUB_H
#define _UART_PUB_H
#include <stdio.h>
#include "hal/soc/soc.h"
#if CFG_RELEASE_FIRMWARE
#define os_printf os_null_printf
#else
#if CFG_BACKGROUND_PRINT
#define os_printf os_null_printf
#else
#ifdef KEIL_SIMULATOR
#define os_printf os_null_printf
#else
#define os_printf bk_printf
#endif // KEIL_SIMULATOR
#endif // CFG_BACKGROUND_PRINT
#endif // CFG_RELEASE_FIRMWARE
#define warning_prf bk_printf
#define fatal_prf bk_printf
#define null_prf os_null_printf
#define UART_SUCCESS (0)
#define UART_FAILURE ((UINT32)-1)
#define UART2_DEV_NAME ("uart2") /*debug purpose*/
#define UART1_DEV_NAME ("uart1") /*comm purpose*/
#define UART_CMD_MAGIC (0xC124000)
#define UART1_PORT 0
#define UART2_PORT 1
enum
{
CMD_SEND_BACKGROUND = UART_CMD_MAGIC + 0,
CMD_UART_RESET = UART_CMD_MAGIC + 1,
CMD_RX_COUNT,
CMD_RX_PEEK,
CMD_UART_INIT,
CMD_SET_STOP_END,
};
/* CMD_RX_PEEK*/
#define URX_PEEK_SIG (0x0ee)
typedef struct _peek_rx_
{
UINT32 sig;
UINT32 len;
void *ptr;
} UART_PEEK_RX_T, *UART_PEEK_RX_PTR;
typedef struct
{
void (*uart_rx_cb)(uint8_t);
void (*uart_tx_cb)(uint8_t);
}bk_uart_cb_t;
extern bk_uart_cb_t bk_uart_cb;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void uart1_init(void);
extern void uart1_exit(void);
extern void uart1_isr(void);
extern void uart2_init(void);
extern void uart2_exit(void);
extern void uart2_isr(void);
extern INT32 os_null_printf(const char *fmt, ...);
extern void fatal_print(const char *fmt, ...);
extern INT32 uart_printf(const char *fmt, ...);
extern void bk_printf(const char *fmt, ...);
extern void uart_send_byte(UINT8 ch, UINT8 data);
extern void bk_send_string(UINT8 uport, const char *string);
extern void uart_wait_tx_over();
extern UINT8 uart_is_tx_fifo_empty(UINT8 uport);
extern UINT8 uart_is_tx_fifo_full(UINT8 uport);
extern INT32 uart_read_byte( UINT8 uport, UINT8 *byte );
extern void uart_write_byte(UINT8 uport, UINT8 data);
#endif // _UART_PUB_H

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#ifndef _USB_PUB_H_
#define _USB_PUB_H_
#include "include.h"
#define UVC_DEMO_SUPPORT102
#define USB_FAILURE (1)
#define USB_SUCCESS (0)
#define USB_DEV_NAME "usb"
typedef void (*USB_FPTR)(void *, void *);
#define USB_CMD_MAGIC (0xe550000)
enum
{
UCMD_RESET = USB_CMD_MAGIC + 1,
UCMD_MSC_REGISTER_FIDDLE_CB,
UCMD_UVC_REGISTER_CONFIG_NOTIFY_CB,
UCMD_UVC_REGISTER_RX_VSTREAM_CB,
UCMD_UVC_REGISTER_RX_VSTREAM_BUF_PTR,
UCMD_UVC_REGISTER_RX_VSTREAM_BUF_LEN,
UCMD_UVC_SET_PARAM,
UCMD_UVC_START_STREAM,
UCMD_UVC_STOP_STREAM,
UCMD_UVC_GET_CONNECT_STATUS,
UCMD_UVC_RECEIVE_VSTREAM,
UCMD_UVC_ENABLE_MJPEG,
UCMD_UVC_ENABLE_H264
};
/*UCMD_UVC_SET_PARAM*/
#define UVC_MUX_PARAM(resolution_id, fps) (fps + (resolution_id << 16))
#define UVC_DEMUX_FPS(param) (param & 0xffff)
#define UVC_DEMUX_ID(param) ((param >> 16) & 0xffff)
/*
* The value is defined in field wWidth and wHeight in 'Video Streaming MJPEG
Frame Type Descriptor'
*/
#ifdef UVC_DEMO_SUPPORT100
typedef enum
{
U2_FRAME_640_480 = 1,
U2_FRAME_640_360 = 2,
U2_FRAME_320_240 = 3,
U2_FRAME_168_120 = 4,
} E_FRAME_ID_USB20;
typedef enum
{
U1_FRAME_640_480 = 1,
U1_FRAME_160_120 = 2,
} E_FRAME_ID_USB11;
#elif defined(UVC_DEMO_SUPPORT102)
typedef enum
{
UVC_FRAME_352_288 = 0,
UVC_FRAME_320_240 = 1,
UVC_FRAME_640_360 = 2,
UVC_FRAME_640_480 = 3,
UVC_FRAME_COUNT
} E_FRAME_ID_USB20;
#endif
typedef enum
{
FPS_30 = 30,
FPS_25 = 25,
FPS_20 = 20,
FPS_15 = 15,
FPS_10 = 10,
FPS_5 = 5,
} E_FRAME_RATE_ID;
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void usb_init(void);
extern void usb_exit(void);
extern uint32_t MUSB_HfiRead( uint32_t first_block, uint32_t block_num, uint8_t
*dest);
extern uint32_t MUSB_HfiWrite( uint32_t first_block, uint32_t block_num, uint8_t
*dest);
extern void MGC_RegisterCBTransferComplete(FUNCPTR func);
extern uint8_t MUSB_GetConnect_Flag(void);
#endif //_USB_PUB_H_

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#ifndef _WDT_PUB_H_
#define _WDT_PUB_H_
#define WDT_FAILURE (1)
#define WDT_SUCCESS (0)
#define WDT_DEV_NAME "wdt"
#define WDT_CMD_MAGIC (0xe330000)
enum
{
WCMD_POWER_UP = WDT_CMD_MAGIC + 1,
WCMD_SET_PERIOD,
WCMD_RELOAD_PERIOD,
WCMD_POWER_DOWN
};
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void wdt_init(void);
extern void wdt_exit(void);
#endif //_WDT_PUB_H_

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#ifndef _APP_MUSIC_PUB_H_
#define _APP_MUSIC_PUB_H_
extern void media_thread_init(void);
extern void media_msg_sender(void const *param_ptr);
extern void key_init(void);
#endif

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#ifndef _BK7011_CAL_PUB_H_
#define _BK7011_CAL_PUB_H_
typedef struct tmp_pwr_st {
UINT8 mod;
UINT8 pa;
} TMP_PWR_ST, *TMP_PWR_PTR;
extern void calibration_main(void);
extern INT32 rwnx_cal_load_trx_rcbekn_reg_val(void);
extern void rwnx_cal_set_txpwr_by_rate(INT32 rate, UINT32 test_mode);
extern INT32 rwnx_cal_save_trx_rcbekn_reg_val(void);
extern void do_calibration_in_temp_dect(void);
extern void bk7011_cal_bias(void);
extern void bk7011_cal_dpll(void);
extern void rwnx_cal_set_txpwr(UINT32 pwr_gain);
extern int manual_cal_get_txpwr(UINT32 rate, UINT32 channel, UINT32 bandwidth, UINT32 *pwr_gain);
extern void manual_cal_save_txpwr(UINT32 rate, UINT32 channel, UINT32 pwr_gain);
extern UINT32 manual_cal_fitting_txpwr_tab(void);
extern void manual_cal_show_txpwr_tab(void);
extern UINT32 manual_cal_load_txpwr_tab_flash(void);
extern int manual_cal_save_txpwr_tab_to_flash(void);
extern int manual_cal_save_chipinfo_tab_to_flash(void);
extern UINT8 manual_cal_wirte_otp_flash(UINT32 addr, UINT32 len, UINT8 *buf);
extern UINT8 manual_cal_read_otp_flash(UINT32 addr, UINT32 len, UINT8 *buf);
extern UINT32 manual_cal_load_default_txpwr_tab(UINT32 is_ready_flash);
extern void manual_cal_set_dif_g_n40(UINT32 diff);
extern void manual_cal_get_current_temperature(void);
extern void bk7011_micopwr_config_tssi_read_prepare(void);
extern void bk7011_micopwr_tssi_read(void);
extern void bk7011_micopwr_tssi_show(void);
extern void manual_cal_tmp_pwr_init(UINT16 init_temp, UINT16 init_thre, UINT16 init_dist);
extern void manual_cal_tmp_pwr_init_reg(UINT16 reg_mod, UINT16 reg_pa);
extern void manual_cal_temp_pwr_unint(void);
extern TMP_PWR_PTR manual_cal_set_tmp_pwr(UINT16 cur_val, UINT16 thre, UINT16 *last);
extern UINT32 manual_cal_load_temp_tag_flash(void);
extern void rwnx_cal_set_reg_mod_pa(UINT16 reg_mod, UINT16 reg_pa);
extern void rwnx_cal_do_temp_detect(UINT16 cur_val, UINT16 thre, UINT16 *last);
#endif // _BK7011_CAL_PUB_H_

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#ifndef DRIVER_AUDIO_IF_PUB_H
#define DRIVER_AUDIO_IF_PUB_H
extern void aud_open(void);
extern void aud_close(void);
extern uint8_t aud_get_channel(void);
extern uint16_t aud_get_buffer_size(void);
extern void aud_fill_buffer( uint8_t *buff, uint16_t len );
extern uint16_t aud_get_buffer_length(uint8_t *buff, uint16_t len);
extern void aud_initial(uint32_t freq, uint32_t channels, uint32_t bits_per_sample);
extern uint16_t aud_get_fill_size(void);
extern int32_t aud_hw_init(void);
extern uint8_t is_aud_opened(void);
#endif

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#ifndef _DRIVER_CODEC_ES8374_PUB_H_
#define _DRIVER_CODEC_ES8374_PUB_H_
extern void es8374_codec_init(void);
extern void es8374_codec_configure(unsigned int fs, unsigned char datawidth);
extern void es8374_codec_close(void);
extern void es8374_codec_volume_control(unsigned char volume);
extern void es8374_codec_mute_control(BOOL enable);
#endif

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#ifndef _FAKE_CLOCK_PUB_H_
#define _FAKE_CLOCK_PUB_H_
#include "include.h"
#define FCLK_PWM_ID PWM0
#define FCLK_DURATION_MS 2
#define FCLK_SECOND (1000/FCLK_DURATION_MS)
extern UINT32 fclk_get_tick(void);
extern UINT32 fclk_get_second(void);
extern void fclk_reset_count(void);
extern void fclk_init(void);
extern UINT32 fclk_from_sec_to_tick(UINT32 sec);
#endif // _FAKE_CLOCK_PUB_H_
// eof

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#ifndef _FUNC_PUB_H_
#define _FUNC_PUB_H_
#define FUNC_DEBUG
#ifdef FUNC_DEBUG
#define FUNC_PRT os_printf
#define FUNC_WPRT warning_prf
#else
#define FUNC_PRT os_null_printf
#define FUNC_WPRT os_null_printf
#endif
extern UINT32 func_init(void);
#endif // _FUNC_PUB_H_
// eof

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#ifndef _FUSB_PUB_H_
#define _FUSB_PUB_H_
//#define FMSC_TEST
//#define FHID_TEST
#define FUVC_TEST
#define FUSB_FAILURE ((UINT32)-1)
#define FUSB_SUCCESS (0)
extern UINT32 fusb_init(void);
void fmsc_fiddle_process(void);
#endif
// eof

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#ifndef _HOSTAPD_INTF_PUB_H_
#define _HOSTAPD_INTF_PUB_H_
extern int hapd_intf_ioctl(unsigned long arg);
extern void hapd_intf_ke_rx_handle(INT32 dummy);
extern int hapd_intf_set_ap(void *beacon, int bcn_len, int head_len);
extern void wpa_buffer_scan_results(void);
extern void wpa_clear_scan_results(void);
extern void wpa_enable_traffic_port_at_opensystem(void);
#endif
// eof

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#include "rtos_pub.h"
#include "uart_pub.h"
#include "arm_arch.h"
#include "param_config.h"
#include "rw_pub.h"
#define PS_SUPPORT_MANUAL_SLEEP 0
typedef void (*ps_wakeup_cb)(void);

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#include "rtos_pub.h"
#include "uart_pub.h"
#include "arm_arch.h"
#include "param_config.h"
#include "rw_pub.h"
#include "target_util_pub.h"
#include "wlan_ui_pub.h"
#define CFG_MCU_PS_SELECT_120M 1
typedef struct mcu_ps{
UINT8 mcu_ps_on;
UINT8 hw_sleep ;
UINT8 first_sleep ;
UINT8 mcu_use_dco;
int peri_busy_count;
UINT32 mcu_prevent;
}MCU_PS_INFO;
#define MCU_PS_CONNECT CO_BIT(0)
#define MCU_PS_ADD_KEY CO_BIT(1)
extern MCU_PS_INFO mcu_ps_info;
extern void vTaskStepTick( const TickType_t );
extern void mcu_ps_init(void);
extern void mcu_ps_exit(void);
extern UINT32 mcu_power_save(UINT32 );
extern void mcu_prevent_clear(UINT32 );
extern void mcu_prevent_set(UINT32 );
extern void peri_busy_count_dec(void );
extern void peri_busy_count_add(void );
extern UINT32 peri_busy_count_get(void );
extern UINT32 mcu_prevent_get(void );

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#ifndef _MSG_PUB_H_
#define _MSG_PUB_H_
#define MSG_SUCCESS_RET (0)
#define MSG_FAILURE_RET (-1)
//-------按键触发状态定义---------
#define KEY_SHORT_UP 0x00
#define KEY_HOLD 0x4000
#define KEY_LONG 0x8000
#define KEY_LONG_UP 0xc000
#define KEY_DOUBLE_CLICK 0x2000
#define KEY_IRDA_LONG 0x1000
#define KEY_IRDA_SHORT 0x800
/* message table*/
#define KEY_MSG_GP (0x00000000) /* Attention: special msg*/
#define SDMUSIC_MSG_GP (0x10000000)
#define UDISK_MSG_GP (0x20000000)
#define LINEIN_MSG_GP (0x30000000)
#define OTHER_MSG_GP (0x40000000)
/* Name format: MSG_module_messageInformation
assume: message number is less than 65535 at one module
*/
enum
{
MSG_NULL = 0,
/* Attention: special msg for key press, from 0x00000000--0x00000fff*/
//-------按键消息值定义---------
MSG_KEY_0 = MSG_NULL + 0x1,
MSG_KEY_1,
MSG_KEY_2,
MSG_KEY_3,
MSG_KEY_4,
MSG_KEY_5,
MSG_KEY_6,
MSG_KEY_7,
MSG_KEY_8,
MSG_KEY_9,
MSG_BT_MIX_KEY,
MSG_KEY_PLAY,
MSG_KEY_STOP,
MSG_KEY_PLUS,
MSG_KEY_MINUS,
MSG_KEY_PREV,
MSG_KEY_NEXT,
MSG_KEY_VOL_DOWN,
MSG_KEY_VOL_UP,
MSG_KEY_MODE,
MSG_KEY_POWER,
MSG_KEY_CALL,
MSG_NO_KEY = 0xff,
/*sd music msg*/
MSG_SD_INIT = SDMUSIC_MSG_GP + 0x0000,
MSG_SD_ATTACH, /* sd attach or detach*/
MSG_SD_DETACH,
/*usb disk msg*/
MSG_UDISK_INIT = UDISK_MSG_GP + 0x0000,
MSG_USB_ATTACH,
MSG_USB_DETATCH,
/*linein msg*/
MSG_LINEIN_INIT = LINEIN_MSG_GP + 0x0000,
MSG_LINEIN_ATTACH,
MSG_LINEIN_DETACH,
/*other msg*/
MSG_LED_INIT = OTHER_MSG_GP + 0x0000,
MSG_DEBUG_UART_RX, /* debug uart gets datum*/
MSG_SDADC, /* sdadc*/
MSG_MUSIC_PLAY,
MSG_MUSIC_STOP,
MSG_POWER_DOWN,
MSG_POWER_UP,
MSG_IRDA_RX,
MSG_LOWPOWER_DETECT,
MSG_MEDIA_READ_ERR, /* mp3-mode,SD/Udisk read Err */
MSG_INPUT_TIMEOUT,
MSG_HALF_SECOND,
MSG_1S_TIMER
};
#endif
// EOF

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#ifndef _CFG_INFO_PUB_H
#define _CFG_INFO_PUB_H
#define INFO_TLV_HEADER (0x00564c54) // ASCII TLV
typedef enum{
AUTO_CONNECT_ITEM = 0x11111111,
WIFI_MODE_ITEM = 0x22222222,
DHCP_MODE_ITEM = 0x33333333,
WIFI_MAC_ITEM = 0x44444444,
SSID_KEY_ITEM = 0x55555555,
IP_CONFIG_ITEM = 0x66666666
}NET_INFO_ITEM;
typedef struct info_item_st
{
UINT32 type;
UINT32 len;
}INFO_ITEM_ST,TLV_HEADER_ST,*INFO_ITEM_ST_PTR;
typedef struct item_common_st
{
INFO_ITEM_ST head;
UINT32 value;
}ITEM_COMM_ST,*ITEM_COMM_ST_PTR;
typedef struct item_mac_addr_st
{
INFO_ITEM_ST head;
char mac[6];
char reserved[2];// 4bytes boundary
}ITEM_MAC_ADDR_ST,*ITEM_MAC_ADDR_ST_PTR;
typedef struct item_ssidkey_st
{
INFO_ITEM_ST head;
char wifi_ssid[32];
char wifi_key[64];
}ITEM_SSIDKEY_ST,*ITEM_SSIDKEY_ST_PTR;
typedef struct item_ip_config_st
{
INFO_ITEM_ST head;
char local_ip_addr[16];
char net_mask[16];
char gateway_ip_addr[16];
}ITEM_IP_CONFIG_ST,*ITEM_IP_CONFIG_ST_PTR;
UINT32 test_get_whole_tbl(UINT8 *ptr);
UINT32 save_info_item(NET_INFO_ITEM item,UINT8 *ptr0,UINT8*ptr1,UINT8 *ptr2);
UINT32 get_info_item(NET_INFO_ITEM item,UINT8 *ptr0,UINT8 *ptr1, UINT8 *ptr2);
#endif

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#ifndef _POWER_SAVE_PUB_H_
#define _POWER_SAVE_PUB_H_
#include "rtos_pub.h"
#include "uart_pub.h"
#include "arm_arch.h"
#include "param_config.h"
#include "rw_pub.h"
#include "target_util_pub.h"
#include "wlan_ui_pub.h"
#include "ps_debug_pub.h"
//#define PS_DEBUG
#ifdef PS_DEBUG
#define PS_PRT os_printf
#define PS_WPRT os_printf
#define PS_DBG os_printf
#else
#define PS_PRT os_null_printf
#define PS_WPRT os_null_printf
#define PS_DBG os_printf
#endif
#define PS_DTIM_WITH_NORMAL 0
#define PS_WAKEUP_MOTHOD_PWM1 0
#define PS_WAKEUP_MOTHOD_RW 1
#define PS_USE_PWM2 1
#if PS_USE_PWM2
#define PS_WAIT_BCN 1
#define PS_DTIM_PERI_WAKE_DELAY 1
#define PS_WAKE_DATA_DELAY 1
#endif
#define CFG_DTIM_LOW_VOLT 0
#define PS_XTAL26M_EN 1
#if (PS_XTAL26M_EN == 1)
#define PS_WAKEUP_TIME 96//88 // 96 //3 ms
#define PS_WAKE_WAIT_TIME 32
#define PS_MAX_WAKEUP_TIME 160 //5 ms
#else
//#define PS_WAKEUP_TIME 94 //3 ms
#endif
#define PS_MIN_BCN_INTV_TIME 3276 // 100ms
#define PS_MAX_WINDOWNS_TIME 402 //
#define PS_MAX_LOSS_BCN 10
#define PS_NEED_CK_AB_BCN 0
#define PS_CLOSE_PERI_CLK 0
#define FLASH_BASE (0x00803000)
#define REG_FLASH_CONF (FLASH_BASE + 7 * 4)
#define FLASH_CLK_CONF_POSI (0)
#define FLASH_CLK_CONF_MASK (0x0F)
#define MODEL_SEL_POSI (4)
#define MODEL_SEL_MASK (0x1F)
#define FWREN_FLASH_CPU (0x01UL << 9)
#define WRSR_DATA_POSI (10)
#define WRSR_DATA_MASK (0x00FFFF)
#define CRC_EN (0x01UL << 26)
#define ICU_BASE (0x00802000)
#define ICU_INTERRUPT_ENABLE (ICU_BASE + 16 * 4)
#define ICU_PERI_CLK_PWD (ICU_BASE + 2 * 4)
#define PWD_PWM2_CLK (1 << 11)
#define PWD_PWM1_CLK (1 << 10)
#define PWD_UART2_CLK (1 << 1)
#define PWD_UART1_CLK (1 << 0)
#define ICU_ARM_WAKEUP_EN (ICU_BASE + 20 * 4)
#define ICU_PWM_CLK_MUX (ICU_BASE + 1 * 4)
#define PWM_CLK_LPO (1)
#define PWM_CLK_PCLK (0)
#define PWM2_BIT (2)
typedef enum {
STA_GET_INIT = 0,
STA_GET_TRUE = 1,
STA_GET_FALSE = 2,
STA_GET_TIMEOUT = 3,
} PS_STA_BEACON_STATE;
typedef UINT8 PS_WAIT_STATUS;
typedef enum {
PS_BCN_SUCC = 0,
PS_BCN_LOSS_LEFT = 1,
PS_BCN_LOSS_RIGHT = 2,
PS_BCN_LOSS_MIDDLE = 3,
PS_BCN_LOSS_FIRST = 4,
} PS_BCN_STATUS;
typedef enum {
PS_BCN_STATUS_INIT = 0,
PS_BCN_STATUS_UP = 1,
PS_BCN_ABNORMAL_AT = 2,
PS_BCN_STATUS_DOWN = 3,
} PS_BCN_ABNORMAL_STATUS;
typedef enum {
PS_NO_PS_MODE = 0,
PS_STANDBY_PS_MODE = 1,
PS_MCU_PS_MODE = 2,
PS_DTIM_PS_MODE = 3,
PS_DTIM_PS_OPENING = 4,
PS_DTIM_PS_CLOSING = 5,
} PS_MODE_STATUS;
typedef enum {
PS_ARM_WAKEUP_NONE = 0,
PS_ARM_WAKEUP_RW = 1,
PS_DTIM_ARM_WAKEUP_PERI = 2,
PS_ARM_WAKEUP_PWM = 3,
PS_ARM_WAKEUP_USER = 4,
} PS_ARM_WAKEUP_WAY;
typedef enum {
PS_PWM2_LOW_POWER = 0,
PS_PWM2_CK_AB_BCN = 1,
PS_PWM2_CK_TIMEOUT = 2,
PS_PWM2_CK_DATA_OVER = 3,
} PS_PWM2_STATUS;
typedef enum {
PS_BCN_NO_CAL = 0,
PS_BCN_LOST_10 = 1,
} PS_BCN_CAL_STATUS;
typedef enum {
PS_LISTEN_MODE_DTIM = 0,
PS_LISTEN_MODE_INTERVAL = 1,
} PS_LISTEN_MODE;
typedef enum {
PS_FORBID_NO_ON = 1,
PS_FORBID_PREVENT = 2,
PS_FORBID_VIF_PREVENT = 3,
PS_FORBID_IN_DOZE = 4,
PS_FORBID_KEEVT_ON = 5,
PS_FORBID_BMSG_ON = 6,
PS_FORBID_TXING = 7,
PS_FORBID_HW_TIMER = 8,
PS_FORBID_TEMP_DETECT = 9,
} PS_FORBID_STATUS;
typedef struct ps_do_wkup_sem{
beken_semaphore_t wkup_sema;
struct co_list_hdr list;
}PS_DO_WKUP_SEM;
typedef struct ps_sta{
PS_BCN_ABNORMAL_STATUS ps_bcn_ab_status ;
PS_ARM_WAKEUP_WAY ps_arm_wakeup_way ;
UINT8 ps_real_sleep ;
UINT8 sleep_first;
UINT8 ps_can_sleep;
UINT8 if_wait_bcn;
UINT8 liston_int;
PS_LISTEN_MODE liston_mode;
UINT8 pwm2_clkmux;
PS_PWM2_STATUS pwm2_status;
UINT8 ps_dtim_period;
UINT8 ps_dtim_count;
UINT8 ps_dtim_multi;
volatile PS_STA_BEACON_STATE waited_beacon;
UINT8 ps_bcn_loss_cnt;
PS_BCN_CAL_STATUS ps_bcn_cal_status;
UINT16 PsWakeupTime;
UINT16 ps_beacon_int;
UINT16 PsDataWakeupWaitTimeMs ;
UINT16 PsPeriWakeupWaitTimeMs ;
UINT16 sleep_ms;
UINT32 nxmac_timer_v;
UINT32 pwm2_less_time;
UINT32 sleep_count ;
UINT32 next_ps_time;
struct co_list wk_list;
}STA_PS_INFO;
typedef enum {
PS_DEEP_WAKEUP_GPIO = 0,
PS_DEEP_WAKEUP_RTC = 1,
} PS_DEEP_WAKEUP_WAY;
typedef struct ps_deep_ctrl{
PS_DEEP_WAKEUP_WAY deep_wkway;
UINT32 gpio_lv;
UINT32 param;
}PS_DEEP_CTRL_PARAM;
typedef enum {
PS_BMSG_IOCTL_RF_ENABLE = 0,
PS_BMSG_IOCTL_RF_DISANABLE = 1,
PS_BMSG_IOCTL_MCU_ENABLE = 2,
PS_BMSG_IOCTL_MCU_DISANABLE = 3,
PS_BMSG_IOCTL_RF_USER_WKUP = 4,
} PS_BMSG_IOCTL_CMD;
enum
{
NEED_DISABLE = 0,
NEED_ME_DISABLE = 1,
NEED_REBOOT = 2,
};
#define NEED_DISABLE_BIT CO_BIT(NEED_DISABLE)
#define NEED_ME_DISABLE_BIT CO_BIT(NEED_ME_DISABLE)
#define NEED_REBOOT_BIT CO_BIT(NEED_REBOOT)
typedef struct sctrl_ps_save_values{
UINT32 peri_clk_cfg;
UINT32 int_enable_cfg;
}SCTRL_PS_SAVE_VALUES;
__INLINE struct ps_do_wkup_sem * list2sem(struct co_list_hdr const *l_list)
{
return (struct ps_do_wkup_sem *) (((uint8_t*)l_list) - offsetof(struct ps_do_wkup_sem, list));
}
extern volatile UINT8 ps_dtim_normal_enable;
extern STA_PS_INFO bk_ps_info;
extern volatile UINT32 sleep_check_count;
extern volatile PS_MODE_STATUS bk_ps_mode;
extern UINT16 bk_forbid_count;
extern bool ps_sleep_check(void);
extern int net_if_is_up(void);
extern void power_save_dtim_ps_init();
extern void power_save_init(void);
extern bool power_save_sleep(void);
extern void power_save_pwm1_enable(UINT16 period);
extern void power_save_pwm2_set_period(UINT16,UINT8);
extern void power_save_pwm2_enable();
extern void power_save_pwm1_disable(void );
extern void power_save_pwm2_disable(void );
extern bool rwnxl_if_idle(void);
extern void rwnxl_ask_idle(void);
extern int bmsg_is_empty(void);
extern u8 rwn_mgmt_is_only_sta_role_add(void);
extern void power_save_dtim_wake(UINT32 );
extern void ps_msg_process(UINT8 ioctl);
extern void power_save_wakeup_with_timer(UINT32 sleep_time);
extern void deep_sleep_wakeup_with_timer(UINT32 sleep_time);
extern void power_save_wakeup_with_peri( UINT8 uart2_wk,UINT32 gpio_index_map);
extern int power_save_dtim_enable();
extern int power_save_dtim_disable();
extern void power_save_wakeup_with_gpio(UINT32 gpio_index);
extern void deep_sleep_wakeup_with_gpio(UINT32 gpio_index);
extern void power_save_cal_bcn_liston_int(UINT16 bcn_int);
extern int ps_get_pwm2_less_ms();
extern void power_save_ieee_dtim_wakeup(void);
extern UINT16 power_save_forbid_trace(PS_FORBID_STATUS forbid);
extern void power_save_dump();
extern void power_save_rf_dtim_manual_do_wakeup(void);
extern void power_save_check_delay_time(void);
extern int power_save_dtim_ck_wakeup();
extern UINT8 power_save_me_ps_set_all_state(UINT8 state);
extern int power_save_dtim_disable_handler();
extern int power_save_dtim_enable_handler(void);
extern void sctrl_sta_ps_init(void);
extern void ps_set_key_prevent(void);
extern void ps_clear_key_prevent(void);
extern void ps_set_data_prevent(void);
extern void txl_cntrl_dec_pck_cnt(void);
extern void txl_cntrl_inc_pck_cnt(void);
extern bool power_save_rf_sleep_check( void );
extern void power_save_pwm2_init();
extern SCTRL_PS_SAVE_VALUES ps_saves[];
extern msg_sta_states msg_sta_old_state;
extern UINT8 ps_dis_flag;
extern UINT16 s_step_test;
#define PS_STA_DTIM_SWITCH ((bk_ps_mode == PS_DTIM_PS_MODE) \
&& net_if_is_up() \
&&g_wlan_general_param->role == CONFIG_ROLE_STA)
#define PS_STA_DTIM_CAN_SLEEP (PS_STA_DTIM_SWITCH \
&& (bk_ps_info.waited_beacon == STA_GET_TRUE \
/*|| bk_ps_info.waited_beacon == STA_GET_TIMEOUT*/) \
&& bk_ps_info.ps_can_sleep)
#endif // _POWER_SAVE_PUB_H_
// eof

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#include "rtos_pub.h"
#include "uart_pub.h"
#include "arm_arch.h"
#include "param_config.h"
#include "rw_pub.h"
#include "target_util_pub.h"
#define PS_USE_GPIO_TRACE 0
#define PS_NO_USE_GPIO_WAKE 1
#define PS_NO_USE_UART1_WAKE 0
#define PS_CK_GPIO (0x0802800 +(10*4))
#define PS_UP_GPIO (0x0802800 +(14*4))
#define PS_RX_GPIO (0x0802800 +(15*4))
#define PS_BCN_GPIO (0x0802800 +(11*4))
#define PS_DOWN_GPIO (0x0802800 +(17*4))
#define PS_PWM_GPIO (0x0802800 +(16*4))
#if PS_USE_GPIO_TRACE
#if PS_NO_USE_GPIO_WAKE
#define PS_DEBUG_UP_OUT (REG_WRITE(PS_UP_GPIO, 0x00))
#define PS_DEBUG_RX_OUT (REG_WRITE(PS_RX_GPIO, 0x00))
#else
#define PS_DEBUG_UP_OUT
#define PS_DEBUG_RX_OUT
#endif
#if PS_NO_USE_UART1_WAKE
#define PS_DEBUG_CK_OUT (REG_WRITE(PS_CK_GPIO, 0x00))
#define PS_DEBUG_BCN_OUT (REG_WRITE(PS_BCN_GPIO, 0x00))
#else
#define PS_DEBUG_CK_OUT
#define PS_DEBUG_BCN_OUT
#endif
#define PS_DEBUG_DOWN_OUT (REG_WRITE(PS_DOWN_GPIO, 0x00))
#define PS_DEBUG_PWM_OUT (REG_WRITE(PS_PWM_GPIO, 0x00))
#if PS_NO_USE_GPIO_WAKE
#define PS_DEBUG_UP_TRIGER (REG_WRITE(PS_UP_GPIO,(REG_READ(PS_UP_GPIO))^(0x2)))
#define PS_DEBUG_RX_TRIGER (REG_WRITE(PS_RX_GPIO,(REG_READ(PS_RX_GPIO))^(0x2)))
#else
#define PS_DEBUG_UP_TRIGER
#define PS_DEBUG_RX_TRIGER
#endif
#if PS_NO_USE_UART1_WAKE
#define PS_DEBUG_CK_TRIGER (REG_WRITE(PS_CK_GPIO,(REG_READ(PS_CK_GPIO))^(0x2)))
#define PS_DEBUG_BCN_TRIGER (REG_WRITE(PS_BCN_GPIO,(REG_READ(PS_BCN_GPIO))^(0x2)))
#define PS_DEBUG_BCN_HIGH (REG_WRITE(PS_BCN_GPIO,(REG_READ(PS_BCN_GPIO))|(0x2)))
#define PS_DEBUG_BCN_LOW (REG_WRITE(PS_BCN_GPIO,(REG_READ(PS_BCN_GPIO))&(~0x2)))
#else
#define PS_DEBUG_CK_TRIGER
#define PS_DEBUG_BCN_TRIGER
#endif
#define PS_DEBUG_DOWN_TRIGER (REG_WRITE(PS_DOWN_GPIO,(REG_READ(PS_DOWN_GPIO))^(0x2)))
#define PS_DEBUG_PWM_TRIGER (REG_WRITE(PS_PWM_GPIO,(REG_READ(PS_PWM_GPIO))^(0x2)))
#define PS_DEBUG_PWM_HIGH (REG_WRITE(PS_PWM_GPIO,(REG_READ(PS_PWM_GPIO))|(0x2)))
#define PS_DEBUG_PWM_LOW (REG_WRITE(PS_PWM_GPIO,(REG_READ(PS_PWM_GPIO))&(~0x2)))
#else
#define PS_DEBUG_UP_OUT
#define PS_DEBUG_RX_OUT
#define PS_DEBUG_CK_OUT
#define PS_DEBUG_BCN_OUT
#define PS_DEBUG_DOWN_OUT
#define PS_DEBUG_PWM_OUT
#define PS_DEBUG_UP_TRIGER
#define PS_DEBUG_RX_TRIGER
#define PS_DEBUG_CK_TRIGER
#define PS_DEBUG_BCN_TRIGER
#define PS_DEBUG_DOWN_TRIGER
#define PS_DEBUG_PWM_TRIGER
#endif

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#ifndef _PSEUDO_RANDOM_PUB_H_
#define _PSEUDO_RANDOM_PUB_H_
extern uint32_t prandom_get(void);
#endif // _PSEUDO_RANDOM_PUB_H_
// eof

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#ifndef _RW_PUB_H_
#define _RW_PUB_H_
#include "ke_msg.h"
#include "uart_pub.h"
#include "rtos_pub.h"
#include "rw_ieee80211.h"
#include "apm_task.h"
#include "me_task.h"
#include "mm_task.h"
#include "mm.h"
#include "lwip/netif.h"
#include "vif_mgmt.h"
#define RWI_DEBUG
#ifdef RWI_DEBUG
#define RWI_PRT os_printf
#define RWI_WPRT warning_prf
#else
#define RWI_PRT os_null_printf
#define RWI_WPRT os_null_printf
#endif
#define RW_SUCCESS (0)
#define RW_FAILURE ((UINT32)-1)
typedef struct cfg80211_connect_params
{
uint32_t flags;
uint32_t vif_idx;
uint8_t auth_type;
struct mac_addr bssid;
struct mac_ssid ssid;
struct scan_chan_tag chan;
uint16_t ie_len;
uint32_t ie_buf[64];
} CONNECT_PARAM_T;
typedef struct cfg80211_scan_params
{
uint8_t num_ssids;
uint8_t vif_idx;
struct mac_ssid ssids[SCAN_SSID_MAX];
struct mac_addr bssid;
} SCAN_PARAM_T;
typedef struct cfg80211_fast_scan_params
{
struct mac_ssid ssid;
struct mac_addr bssid;
uint16_t probe_delay;
uint16_t min_ch_time;
uint16_t max_ch_time;
uint16_t ch_num;
}FAST_SCAN_PARAM_T;
typedef struct cfg80211_disconnect_params
{
uint16_t reason_code;
uint8_t vif_idx;
}DISCONNECT_PARAM_T;
typedef struct scanu_rst_upload
{
UINT8 scanu_num;
struct sta_scan_res **res;
}SCAN_RST_UPLOAD_T, *SCAN_RST_UPLOAD_PTR;
typedef struct sta_scan_res
{
UINT8 bssid[6];
char ssid[32]; /**< The SSID of an access point. */
char on_channel; // 1: ds IE channel=center_freq, 0: !=
char channel;
UINT16 beacon_int;
UINT16 caps;
int level;
int security; // security type
UINT8 tsf[8];
UINT32 ie_len;
/* Followed by ie_len of IE data */
}SCAN_RST_ITEM_T, *SCAN_RST_ITEM_PTR;
typedef struct
{
char ssid[MAC_SSID_LEN];
char ap_power;
}AP_INFO_T;
typedef struct
{
uint16_t ap_num;
uint16_t ap_max;
AP_INFO_T *ap_list;
} SCAN_RESULT_SET;
typedef struct
{
FUNC_2PARAM_PTR cb;
void *ctxt_arg;
}IND_CALLBACK_T;
typedef struct
{
int8_t rssi;
uint8_t ssid[32];
uint8_t bssid[6];
uint16_t freq;
}BSS_INFO_T;
typedef enum {
MSG_IDLE = 0,
MSG_CONNECTING,
MSG_PASSWD_WRONG,
MSG_NO_AP_FOUND,
MSG_CONN_FAIL,
MSG_CONN_SUCCESS,
MSG_GOT_IP,
}msg_sta_states;
enum nl80211_iftype {
NL80211_IFTYPE_UNSPECIFIED,
NL80211_IFTYPE_ADHOC,
NL80211_IFTYPE_STATION,
NL80211_IFTYPE_AP,
NL80211_IFTYPE_AP_VLAN,
NL80211_IFTYPE_WDS,
NL80211_IFTYPE_MONITOR,
NL80211_IFTYPE_MESH_POINT,
NL80211_IFTYPE_P2P_CLIENT,
NL80211_IFTYPE_P2P_GO,
NL80211_IFTYPE_P2P_DEVICE,
NL80211_IFTYPE_OCB,
/* keep last */
NUM_NL80211_IFTYPES,
NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1
};
struct add_sta_st {
u16 aid;
u16 capability;
void *sta_addr;
u8 tx_supp_rates;
u8 ap_vif_idx;
} ;
typedef struct cfg80211_key_params
{
uint8_t cipher_suite;
uint8_t sta_idx;
uint8_t inst_nbr;
uint8_t key_idx;
uint8_t hw_key_idx;
struct mac_sec_key key;
} KEY_PARAM_T;
typedef struct msg_send_node
{
struct co_list_hdr hdr;
struct ke_msg *msg;
void *cfm;
beken_semaphore_t semaphore;
uint16_t reqid;
}MSG_SND_NODE_ST, *MSG_SND_NODE_PTR;
typedef struct bcn_param_st {
u32 *bcn_ptr;
u16 bcn_len;
u16 tim_oft;
u8 tim_len;
u8 vif_idx;
u16 flag;
u8* csa_oft;
} BCN_PARAM_ST, *BCN_PARAM_PTR;
typedef struct vif_info_tag VIF_INF_ST;
typedef struct vif_info_tag* VIF_INF_PTR;
typedef struct sta_info_tag STA_INF_ST;
typedef struct sta_info_tag* STA_INF_PTR;
extern struct co_list rw_msg_tx_head;
extern struct co_list rw_msg_rx_head;
extern void mt_msg_dispatch(UINT16 cmd, void *param);
extern void mr_kmsg_flush(void);
extern UINT32 mr_kmsg_fwd(struct ke_msg *msg);
extern UINT32 mr_kmsg_fuzzy_handle(void);
extern UINT32 mr_kmsg_exact_handle(UINT16 rsp);
extern void mhdr_assoc_cfm_cb(FUNC_2PARAM_PTR ind_cb, void *ctxt);
extern void mhdr_scanu_reg_cb(FUNC_2PARAM_PTR ind_cb, void *ctxt);
extern void mhdr_connect_user_cb(FUNC_2PARAM_PTR ind_cb, void *ctxt);
extern UINT32 rw_ieee80211_init(void);
extern UINT32 rw_ieee80211_get_centre_frequency(UINT32 chan_id);
extern UINT8 rw_ieee80211_get_chan_id(UINT32 freq);
extern void *sr_get_scan_results(void);
extern void sr_release_scan_results(SCAN_RST_UPLOAD_PTR ptr);
extern UINT32 rwm_transfer(UINT8 vif_idx, UINT8 *buf, UINT32 len);
extern void* rwm_transfer_pre(UINT8 vif_idx, UINT8 *buf, UINT32 len);
extern UINT32 rwm_uploaded_data_handle(UINT8 *upper_buf, UINT32 len);
extern UINT32 rwm_get_rx_valid_node_len(void);
extern void mhdr_set_station_status(msg_sta_states val);
extern msg_sta_states mhdr_get_station_status(void);
extern int rw_msg_send(const void *msg_params, uint16_t reqid, void *cfm);
extern int rw_msg_send_reset(void);
extern int rw_msg_send_start(void);
extern int rw_msg_send_me_config_req(void);
extern int rw_msg_send_me_chan_config_req(void);
extern int rw_msg_send_add_if(const unsigned char *mac,
enum nl80211_iftype iftype, bool p2p, struct mm_add_if_cfm *cfm);
extern int rw_msg_send_remove_if(u8 vif_index);
extern int rw_msg_send_apm_start_req(u8 vif_index, u8 channel,
struct apm_start_cfm *cfm);
extern int rw_msg_send_bcn_change(void *bcn_param);
extern int rw_msg_send_me_sta_add(struct add_sta_st *param,
struct me_sta_add_cfm *cfm);
extern int rw_msg_send_me_sta_del(u8 sta_idx, bool tdls_sta);
extern int rw_msg_me_set_control_port_req(bool opened, u8 sta_idx);
extern int rw_msg_send_key_add(KEY_PARAM_T *param, struct mm_key_add_cfm *cfm);
extern int rw_msg_send_key_del(u8 hw_key_idx);
extern int rw_msg_send_scanu_req(SCAN_PARAM_T *scan_param);
extern int rw_msg_send_connection_loss_ind(u8 vif_index);
extern int rw_msg_get_bss_info(u8 vif_idx, void *cfm);
extern int rw_msg_get_channel(void *cfm);
extern int rw_msg_set_filter(uint32_t filter);
extern int rw_msg_set_channel(uint32_t channel, void *cfm);
extern int rw_msg_send_scan_cancel_req(void *cfm);
extern int rw_msg_send_sm_disconnect_req(DISCONNECT_PARAM_T *param);
extern int rw_msg_send_sm_connect_req( CONNECT_PARAM_T *sme, void *cfm);
extern int rw_msg_send_tim_update(u8 vif_idx, u16 aid, u8 tx_status);
extern int rw_msg_send_apm_stop_req(u8 vif_index);
VIF_INF_PTR rwm_mgmt_vif_idx2ptr(UINT8 vif_idx);
VIF_INF_PTR rwm_mgmt_vif_type2ptr(UINT8 vif_type);
STA_INF_PTR rwm_mgmt_sta_idx2ptr(UINT8 staid);
STA_INF_PTR rwm_mgmt_sta_mac2ptr(void *mac);
UINT8 rwm_mgmt_sta_mac2idx(void *mac);
UINT8 rwm_mgmt_vif_mac2idx(void *mac);
UINT8 rwm_mgmt_vif_name2idx(char *name);
UINT8 rwm_mgmt_get_hwkeyidx(UINT8 vif_idx, UINT8 staid);
void rwm_mgmt_set_vif_netif(struct netif *net_if);
struct netif *rwm_mgmt_get_vif2netif(UINT8 vif_idx);
UINT8 rwm_mgmt_get_netif2vif(struct netif *netif);
UINT8 rwm_mgmt_tx_get_staidx(UINT8 vif_idx, void *dstmac);
u8 rwn_mgmt_is_only_sta_role_add(void);
void rwm_msdu_init(void);
void rwm_flush_txing_list(UINT8 sta_idx);
void rwm_msdu_ps_change_ind_handler(void *msg) ;
void rwm_msdu_send_txing_node(UINT8 sta_idx);
__INLINE u8 rwm_mgmt_is_ap_inface(u8 vif_idx)
{
return (vif_info_tab[vif_idx].type == VIF_AP);
}
__INLINE u8 rwm_mgmt_is_sta_inface(u8 vif_idx)
{
return (vif_info_tab[vif_idx].type == VIF_STA);
}
__INLINE void *rwm_mgmt_is_vif_first_used(void)
{
return((void *)co_list_pick(&vif_mgmt_env.used_list));
}
__INLINE void *rwm_mgmt_next(VIF_INF_PTR vif_entry)
{
return((void *)co_list_next(&vif_entry->list_hdr));
}
__INLINE u8 rwm_mgmt_get_type(u8 vif_idx)
{
return (vif_info_tab[vif_idx].type);
}
__INLINE void *rwm_mgmt_get_addr(u8 vif_idx)
{
return (&vif_info_tab[vif_idx].mac_addr);
}
extern UINT8 beacon[149];
#endif //_RW_PUB_H_
// eof

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#ifndef _RX_SENSITIVITY_H_
#define _RX_SENSITIVITY_H_
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void rs_test(void);
extern void rx_get_rx_result_begin(void);
extern void rx_get_rx_result_end(void);
extern UINT32 rs_set_channel(UINT32 channel_id);
extern UINT32 rs_set_mode(UINT32 mode);
extern void rx_clean_rx_statistic_result(void);
extern UINT32 rx_get_rx20M_statistic_result(void);
extern UINT32 rx_get_rx40M_statistic_result(void);
#endif //_RX_SENSITIVITY_H_
// eof

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#ifndef _SCHEDULE_PUB_H_
#define _SCHEDULE_PUB_H_
#endif // _SCHEDULE_PUB_H_
// eof

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#ifndef _SDIO_INTF_PUB_H_
#define _SDIO_INTF_PUB_H_
#include "sdio_pub.h"
#include "ke_msg.h"
#include "tx_swdesc.h"
#define SDIO_INTF_FAILURE ((UINT32)-1)
#define SDIO_INTF_SUCCESS (0)
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern UINT32 sdio_intf_init(void);
extern void sdio_emb_rxed_evt(int dummy);
extern UINT32 outbound_upload_data(UINT8 *buf_ptr, UINT32 len);
extern UINT32 sdio_get_free_node(UINT8 **buf_pptr, UINT32 buf_size);
extern void sdio_emb_rxed_evt(int dummy);
extern void inbound_cfm(void);
extern UINT32 sdio_emb_kmsg_fwd(struct ke_msg *msg);
extern UINT32 sdio_get_free_node_count(void);
extern UINT32 sdio_release_one_node(SDIO_NODE_PTR mem_node_ptr);
extern void sdio_trans_evt(int dummy);
extern SDIO_NODE_PTR sdio_get_rxed_node(void);
extern int sdio_trans_init(void);
#endif // _SDIO_INTF_PUB_H_

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#ifndef _TARGET_UTIL_PUB_H_
#define _TARGET_UTIL_PUB_H_
extern void delay(INT32 num);
extern void delay_ms(UINT32 ms_count);
extern void delay_sec(UINT32 ms_count);
extern void delay_tick(UINT32 tick_count);
#endif // _TARGET_UTIL_PUB_H_

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#ifndef _TX_EVM_PUB_H_
#define _TX_EVM_PUB_H_
#include "hal_desc.h"
#define TX_LEGACY_MODE (1)
#define TX_HT_VHT_MODE (2)
#define TX_LEGACY_DATA_LEN_MASK (0xFFF)
#define TX_HT_VHT_DATA_LEN_MASK (0xFFFFF)
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern void evm_via_mac_evt(INT32 dummy);
extern void evm_via_mac_begin(void);
extern void evm_via_mac_continue(void);
extern UINT32 evm_bypass_mac_set_tx_data_length(UINT32 is_legacy_mode, UINT32 len);
extern UINT32 evm_bypass_mac_set_rate_mformat(UINT32 ppdu_rate, UINT32 m_format);
extern void evm_bypass_mac_set_channel(UINT32 channel);
extern void evm_via_mac_set_channel(UINT32 channel);
extern void evm_bypass_mac_test(void);
extern void evm_via_mac_set_rate(HW_RATE_E rate, uint32_t is_2_4G);
extern void evm_set_bandwidth(UINT32 bandwidth);
extern void evm_stop_bypass_mac(void);
extern void evm_bypass_mac_set_guard_i_type(UINT32 gi_tpye);
extern void evm_start_bypass_mac(void);
extern void evm_bypass_set_single_carrier(void);
#endif //_TX_EVM_PUB_H_
// eof

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#ifndef _UART_DEBUG_PUB_H_
#define _UART_DEBUG_PUB_H_
#include "uart_pub.h"
/*******************************************************************************
* Function Declarations
*******************************************************************************/
extern UINT32 udebug_has_ctrlc(void);
extern UINT32 udebug_wait_ctrlc_exit(void);
extern UINT32 uart_debug_init(void);
#endif // _UART_DEBUG_PUB_H_

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#ifndef _WLAN_UI_PUB_
#define _WLAN_UI_PUB_
#pragma once
#include "include.h"
#include "rtos_pub.h"
#include "rw_pub.h"
#include <hal/wifi.h>
#define ICU_BASE (0x00802000)
#define ICU_INT_STATUS (ICU_BASE + 19 * 4)
enum {
WLAN_ENC_OPEN,
WLAN_ENC_WEP,
WLAN_ENC_CCMP,
WLAN_ENC_TKIP,
};
enum
{
WLAN_RX_BEACON, /* receive beacon packet */
WLAN_RX_PROBE_REQ, /* receive probe request packet */
WLAN_RX_PROBE_RES, /* receive probe response packet */
WLAN_RX_ACTION, /* receive action packet */
WLAN_RX_MANAGEMENT,/* receive ALL management packet */
WLAN_RX_DATA, /* receive ALL data packet */
WLAN_RX_MCAST_DATA,/* receive ALL multicast and broadcast packet */
WLAN_RX_ALL, /* receive ALL 802.11 packet */
};
OSStatus bk_wlan_start(hal_wifi_init_type_t* inNetworkInitPara);
OSStatus bk_wlan_start_sta_adv(hal_wifi_init_type_adv_t* inNetworkInitParaAdv);
OSStatus bk_wlan_get_ip_status(hal_wifi_ip_stat_t *outNetpara, hal_wifi_type_t inInterface);
OSStatus bk_wlan_get_link_status(hal_wifi_link_stat_t *outStatus);
void bk_wlan_start_scan(uint8_t adv);
int bk_wlan_monitor_rx_type(int type);
int bk_wlan_start_monitor(void);
int bk_wlan_stop_monitor(void);
int bk_wlan_set_channel_sync(int channel);
int bk_wlan_set_channel(int channel);
void bk_wlan_register_monitor_cb(monitor_data_cb_t fn);
void bk_wlan_enable_lsig(void);
void bk_wlan_disable_lsig(void);
monitor_data_cb_t bk_wlan_get_monitor_cb(void);
int bk_wlan_is_monitor_mode(void);
uint32_t bk_sta_cipher_is_open(void);
uint32_t bk_sta_cipher_is_wep(void);
int bk_sta_cipher_type(void);
int bk_wlan_stop(char mode);
OSStatus bk_wlan_start_sta(hal_wifi_init_type_t *inNetworkInitPara);
OSStatus bk_wlan_start_ap(hal_wifi_init_type_t *inNetworkInitPara);
OSStatus bk_wlan_set_ip_status(hal_wifi_ip_stat_t *inNetpara, hal_wifi_type_t inInterface);
void bk_wlan_ap_set_channel_config(uint8_t channel);
uint8_t bk_wlan_ap_get_channel_config(void);
uint32_t bk_wlan_ap_get_frequency(void);
uint32_t bk_wlan_get_INT_status(void);
extern int is_apm_bss_config_empty(void);
void bk_enter_deep_sleep(UINT32 gpio_index);
extern int bk_wlan_dtim_rf_ps_mode_enable(void );
int power_save_dtim_rf_ps_disable_send_msg(void);
int bk_wlan_dtim_rf_ps_mode_disable(void);
extern int bk_wlan_dtim_with_normal_open(void);
extern int bk_wlan_dtim_with_normal_close(void);
extern int bk_wlan_mcu_ps_mode_disable(void);
extern int bk_wlan_dtim_rf_ps_mode_do_wakeup();
extern int bk_wlan_mcu_suppress_and_sleep(UINT32);
extern int bk_wlan_mcu_ps_mode_enable(void);
extern int bk_wlan_mcu_ps_mode_disable(void);
enum
{
RF_SLEEP = 0,
MCU_SLEEP,
LOW_SLEEP,
DEEP_PS,
} ;
#define PS_RF_SLEEP_BIT CO_BIT(RF_SLEEP)
#define PS_MCU_SLEEP_BIT CO_BIT(MCU_SLEEP)
#define PS_DEEP_SLEEP_BIT CO_BIT(DEEP_PS)
typedef UINT32 BK_PS_LEVEL;
void bk_wlan_connection_loss(void);
void bk_wlan_start_assign_scan(UINT8 **ssid_ary, UINT8 ssid_num);
void bk_wlan_scan_ap_reg_cb(FUNC_2PARAM_PTR ind_cb);
unsigned char bk_wlan_get_scan_ap_result_numbers(void);
void bk_wlan_get_scan_ap_result(SCAN_RST_ITEM_PTR scan_rst_table,unsigned char get_scanu_num);
#ifdef CONFIG_AOS_MESH
void wlan_register_mesh_monitor_cb(monitor_data_cb_t fn);
monitor_data_cb_t wlan_get_mesh_monitor_cb(void);
int wlan_is_mesh_monitor_mode(void);
int wlan_set_mesh_bssid(uint8_t *bssid);
uint8_t *wlan_get_mesh_bssid(void);
#endif
#endif// _WLAN_UI_PUB_

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/**
****************************************************************************************
*
* @file co_bool.h
*
* @brief This file replaces the need to include stdint or stdbool typical headers,
* which may not be available in all toolchains, and adds new types
*
* Copyright (C) RivieraWaves 2011-2016
*
* $Rev: $
*
****************************************************************************************
*/
#ifndef _CO_BOOL_H_
#define _CO_BOOL_H_
#include <stdbool.h>
/// @} CO_BOOL
#endif // _CO_BOOL_H_

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/**
****************************************************************************************
*
* @file co_dlist.h
*
* Copyright (C) RivieraWaves 2011-2016
*
* @brief Double linked list structures definitions
*
****************************************************************************************
*/
#ifndef _CO_DLIST_H_
#define _CO_DLIST_H_
/**
****************************************************************************************
* @defgroup CO_DLIST CO_DLIST
* @ingroup COMMON
* @brief Double linked list management.
*
* This module contains the double linked list structures and handling functions.
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
// standard includes
#include "co_int.h"
#include "co_bool.h"
// for NULL and size_t
#include <stddef.h>
// for target dependent directives
#include "rwnx_config.h"
// for __INLINE
#include "compiler.h"
/*
* STRUCTURE DECLARATIONS
****************************************************************************************
*/
/// Double linked list element header.
struct co_dlist_hdr
{
/// Next element in the double linked list (NULL if last).
struct co_dlist_hdr *next;
/// Previous element in the double linked list (NULL if first).
struct co_dlist_hdr *prev;
};
/// Double link list.
struct co_dlist
{
/// First element.
struct co_dlist_hdr *first;
/// Last element.
struct co_dlist_hdr *last;
/// Number of element in the list.
uint32_t cnt;
#if NX_DEBUG
/// Maximum number of elements in the list.
uint32_t maxcnt;
/// Minimum number of elements in the list.
uint32_t mincnt;
#endif // NX_DEBUG
};
/*
* FUNCTION DECLARATIONS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Initialize the double linked list.
* @param[in, out] list Pointer to the double linked list.
****************************************************************************************
*/
void co_dlist_init(struct co_dlist *list);
/**
****************************************************************************************
* @brief Add an element at the end of the double linked list.
*
* @param[in,out] list Pointer to the double linked list.
* @param[in,out] list_hdr Pointer to the element to add at the end of the list.
****************************************************************************************
*/
void co_dlist_push_back(struct co_dlist *list,
struct co_dlist_hdr *list_hdr);
/**
****************************************************************************************
* @brief Add an element at the beginning of the double linked list.
*
* @param[in, out] list Pointer to the double linked list.
* @param[in, out] list_hdr Pointer to the element to add at the beginning of the list.
****************************************************************************************
*/
void co_dlist_push_front(struct co_dlist *list,
struct co_dlist_hdr *list_hdr);
/**
****************************************************************************************
* @brief Extract the first element of the double linked list.
*
* @param[in, out] list Pointer to the double linked list.
*
* @return The pointer to the element extracted, and NULL if the list is empty.
****************************************************************************************
*/
struct co_dlist_hdr* co_dlist_pop_front(struct co_dlist *list);
/**
****************************************************************************************
* @brief Search for a specific element in the list, and extract it if found.
*
* @param[in, out] list Pointer to the double linked list.
* @param[in] list_hdr Pointer to the searched element.
****************************************************************************************
*/
void co_dlist_extract(struct co_dlist *list,
struct co_dlist_hdr const *list_hdr);
/**
****************************************************************************************
* @brief Test if the list is empty.
*
* @param[in] list Pointer to the double linked list.
*
* @return true if the list is empty, false else otherwise.
****************************************************************************************
*/
__INLINE bool co_dlist_is_empty(struct co_dlist const * list)
{
bool listempty;
listempty = (list->first == NULL);
return (listempty);
}
/**
****************************************************************************************
* @brief Return the number of element of the list.
*
* @param[in, out] list Pointer to the double linked list.
*
* @return The number of elements in the list.
****************************************************************************************
*/
__INLINE uint32_t co_dlist_cnt(struct co_dlist const * list)
{
return(list->cnt);
}
/**
****************************************************************************************
* @brief Pick the first element from the list without removing it.
*
* @param[in] list Pointer to the double linked list.
*
* @return First element address. Returns NULL pointer if the list is empty.
****************************************************************************************
*/
__INLINE struct co_dlist_hdr *co_dlist_pick(struct co_dlist const * list)
{
return(list->first);
}
/**
****************************************************************************************
* @brief Return following element of a list element.
*
* @param[in] list_hdr Pointer to the double linked list element.
*
* @return The pointer to the next element.
****************************************************************************************
*/
__INLINE struct co_dlist_hdr *co_dlist_next(struct co_dlist_hdr const * list_hdr)
{
return(list_hdr->next);
}
/// @} end of group CODLIST
#endif // _CO_DLIST_H_

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/**
****************************************************************************************
*
* @file co_endian.h
*
* @brief Common endianness conversion functions
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _CO_ENDIAN_H_
#define _CO_ENDIAN_H_
/**
****************************************************************************************
* @defgroup CO_ENDIAN CO_ENDIAN
* @ingroup COMMON
* @brief Endianness conversion functions.
*
* This set of functions converts values between the local system
* and a external one. It is inspired from the <tt>htonl</tt>-like functions
* from the standard C library.
*
* Exemple:
* @code
* struct eth_header *header = get_header(); // get pointer on Eth II packet header
* uint16_t eth_id; // will contain the type of the packet
* eth_id = co_ntohs(header->eth_id); // retrieve the type with correct endianness
* @endcode
*
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "co_int.h"
#include "rwnx_config.h"
#include "compiler.h"
#include "arch.h"
/**
****************************************************************************************
* @brief Swap bytes of a 32 bits value.
* The swap is done in every case. Should not be called directly.
* @param[in] val32 The 32 bits value to swap.
* @return The 32 bit swapped value.
****************************************************************************************
*/
__INLINE uint32_t co_bswap32(uint32_t val32)
{
// GCC 4 define __builtin_bswap32(val32);
return (val32<<24) | ((val32<<8)&0xFF0000) | ((val32>>8)&0xFF00) | ((val32>>24)&0xFF);
}
/**
****************************************************************************************
* @brief Swap bytes of a 16 bits value.
* The swap is done in every case. Should not be called directly.
* @param[in] val16 The 16 bit value to swap.
* @return The 16 bit swapped value.
****************************************************************************************
*/
__INLINE uint16_t co_bswap16(uint16_t val16)
{
return ((val16<<8)&0xFF00) | ((val16>>8)&0xFF);
}
/// @} CO_ENDIAN
/** @defgroup CO_ENDIAN_NET Endianness (Network)
* @ingroup CO_ENDIAN
* @brief Endianness conversion functions for Network data
*
* Converts values between the local system and big-endian network data
* (e.g. IP, Ethernet, but NOT WLAN).
*
* The \b host term in the descriptions of these functions refers
* to the local system, i.e. \b application or \b embedded system.
* Therefore, these functions will behave differently depending on which
* side they are used. The reason of this terminology is to keep the
* same name than the standard C function.
*
* Behavior will depends on the endianness of the host:
* - little endian: swap bytes;
* - big endian: identity function.
* @addtogroup CO_ENDIAN_NET
* @{ */
/**
****************************************************************************************
* @brief Convert host to network long word.
*
* @param[in] hostlong Long word value to convert.
* @return The converted long word.
****************************************************************************************
*/
__INLINE uint32_t co_htonl(uint32_t hostlong)
{
#if !CPU_LE
return hostlong;
#else
return co_bswap32(hostlong);
#endif
}
/**
****************************************************************************************
* @brief Convert host to network short word.
*
* @param[in] hostshort Short word value to convert.
* @return The converted short word.
****************************************************************************************
*/
__INLINE uint16_t co_htons(uint16_t hostshort)
{
#if !CPU_LE
return hostshort;
#else
return co_bswap16(hostshort);
#endif
}
/**
****************************************************************************************
* @brief Convert network to host long word.
*
* @param[in] netlong Long word value to convert.
* @return The converted long word.
****************************************************************************************
*/
__INLINE uint32_t co_ntohl(uint32_t netlong)
{
return co_htonl(netlong);
}
/**
****************************************************************************************
* @brief Convert network to host short word.
*
* @param[in] netshort Short word value to convert.
* @return The converted short word.
****************************************************************************************
*/
__INLINE uint16_t co_ntohs(uint16_t netshort)
{
return co_htons(netshort);
}
/// @} CO_ENDIAN_NET
/** @defgroup CO_ENDIAN_WLAN Endianness (WLAN)
* @ingroup CO_ENDIAN
* @brief Endianness conversion functions for WLAN data
*
* Converts values between the local system and little-endian WLAN data.
*
* The \b host term in the descriptions of these functions refers
* to the local system (check \ref CO_ENDIAN_NET "this comment").
*
* Behavior will depends on the endianness of the host:
* - little endian: identity function;
* - big endian: swap bytes.
*
* @addtogroup CO_ENDIAN_WLAN
* @{ */
/**
****************************************************************************************
* @brief Convert host to wlan long word.
*
* @param[in] hostlong Long word value to convert.
* @return The converted long word.
****************************************************************************************
*/
__INLINE uint32_t co_htowl(uint32_t hostlong)
{
#if CPU_LE
return hostlong;
#else
return co_bswap32(hostlong);
#endif
}
/**
****************************************************************************************
* @brief Convert host to wlan short word.
*
* @param[in] hostshort Short word value to convert.
* @return The converted short word.
****************************************************************************************
*/
__INLINE uint16_t co_htows(uint16_t hostshort)
{
#if CPU_LE
return hostshort;
#else
return co_bswap16(hostshort);
#endif
}
/**
****************************************************************************************
* @brief Convert wlan to host long word.
*
* @param[in] wlanlong Long word value to convert.
* @return The converted long word.
****************************************************************************************
*/
__INLINE uint32_t co_wtohl(uint32_t wlanlong)
{
return co_htowl(wlanlong);
}
/**
****************************************************************************************
* @brief Convert wlan to host short word.
*
* @param[in] wlanshort Short word value to convert.
* @return The converted short word.
****************************************************************************************
*/
__INLINE uint16_t co_wtohs(uint16_t wlanshort)
{
return co_htows(wlanshort);
}
/// @} CO_ENDIAN_WLAN
#endif // _CO_ENDIAN_H_

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/**
****************************************************************************************
*
* @file co_int.h
*
* @brief This file replaces the need to include stdint or stdbool typical headers,
* which may not be available in all toolchains, and adds new types
*
* Copyright (C) RivieraWaves 2011-2016
*
* $Rev: $
*
****************************************************************************************
*/
#ifndef _CO_INT_H_
#define _CO_INT_H_
#include <stdint.h>
#include "typedef.h"
/// @} CO_INT
#endif // _CO_INT_H_

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/**
****************************************************************************************
*
* @file co_list.h
*
* Copyright (C) RivieraWaves 2011-2016
*
* @brief Common list structures definitions
*
****************************************************************************************
*/
#ifndef _CO_LIST_H_
#define _CO_LIST_H_
/**
****************************************************************************************
* @defgroup CO_LIST CO_LIST
* @ingroup COMMON
* @brief List management.
*
* This module contains the list structures and handling functions.
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "co_int.h"
#include "co_bool.h"
// for NULL and size_t
#include <stddef.h>
// for target dependent directives
#include "rwnx_config.h"
// for __INLINE
#include "compiler.h"
/*
* STRUCTURE DECLARATIONS
****************************************************************************************
*/
/// structure of a list element header
struct co_list_hdr
{
/// Pointer to the next element in the list
struct co_list_hdr *next;
};
/// structure of a list
struct co_list
{
/// pointer to first element of the list
struct co_list_hdr *first;
/// pointer to the last element
struct co_list_hdr *last;
};
/*
* FUNCTION DECLARATIONS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Initialize a list to defaults values.
* @param[in] list Pointer to the list structure.
****************************************************************************************
*/
void co_list_init(struct co_list *list);
/**
****************************************************************************************
* @brief Initialize a pool to default values, and initialize the relative free list.
*
* @param[in] list Pointer to the list structure
* @param[in] pool Pointer to the pool to be initialized
* @param[in] elmt_size Size of one element of the pool
* @param[in] elmt_cnt Nb of elements available in the pool
* @param[in] default_value Pointer to the default value of each element (may be NULL)
****************************************************************************************
*/
void co_list_pool_init(struct co_list *list,
void *pool,
size_t elmt_size,
uint32_t elmt_cnt,
void *default_value);
/**
****************************************************************************************
* @brief Add an element as last on the list.
*
* @param[in] list Pointer to the list structure
* @param[in] list_hdr Pointer to the header to add at the end of the list
****************************************************************************************
*/
void co_list_push_back(struct co_list *list,
struct co_list_hdr *list_hdr);
/**
****************************************************************************************
* @brief Add an element as first on the list.
*
* @param[in] list Pointer to the list structure
* @param[in] list_hdr Pointer to the header to add at the beginning of the list
****************************************************************************************
*/
void co_list_push_front(struct co_list *list,
struct co_list_hdr *list_hdr);
/**
****************************************************************************************
* @brief Extract the first element of the list.
*
* @param[in] list Pointer to the list structure
*
* @return The pointer to the element extracted, and NULL if the list is empty.
****************************************************************************************
*/
struct co_list_hdr *co_list_pop_front(struct co_list *list);
/**
****************************************************************************************
* @brief Search for a given element in the list, and extract it if found.
*
* @param[in] list Pointer to the list structure
* @param[in] list_hdr Pointer to the searched element
*
* @return CO_EMPTY if the list is empty, CO_FAIL if the element not found in the list,
* CO_OK else.
****************************************************************************************
*/
void co_list_extract(struct co_list *list,
struct co_list_hdr *list_hdr);
/**
****************************************************************************************
* @brief Searched a given element in the list.
*
* @param[in] list Pointer to the list structure
* @param[in] list_hdr Pointer to the searched element
*
* @return true if the element is found in the list, false otherwise
****************************************************************************************
*/
bool co_list_find(struct co_list *list,
struct co_list_hdr *list_hdr);
/**
****************************************************************************************
* @brief Insert an element in a sorted list.
*
* This primitive use a comparison function from the parameter list to select where the
* element must be inserted.
*
* @param[in] list Pointer to the list.
* @param[in] element Pointer to the element to insert.
* @param[in] cmp Comparison function (return true if first element has to be inserted
* before the second one).
*
* @return Pointer to the element found and removed (NULL otherwise).
****************************************************************************************
*/
void co_list_insert(struct co_list * const list,
struct co_list_hdr * const element,
bool (*cmp)(struct co_list_hdr const *elementA,
struct co_list_hdr const *elementB));
/**
****************************************************************************************
* @brief Insert an element in a sorted list after the provided element.
*
* This primitive use a comparison function from the parameter list to select where the
* element must be inserted.
*
* @param[in] list Pointer to the list.
* @param[in] prev_element Pointer to the element to find in the list
* @param[in] element Pointer to the element to insert.
*
* If prev_element is not found, the provided element is not inserted
****************************************************************************************
*/
void co_list_insert_after(struct co_list * const list,
struct co_list_hdr * const prev_element,
struct co_list_hdr * const element);
/**
****************************************************************************************
* @brief Insert an element in a sorted list before the provided element.
*
* This primitive use a comparison function from the parameter list to select where the
* element must be inserted.
*
* @param[in] list Pointer to the list.
* @param[in] next_element Pointer to the element to find in the list
* @param[in] element Pointer to the element to insert.
*
* If next_element is not found, the provided element is not inserted
****************************************************************************************
*/
void co_list_insert_before(struct co_list * const list,
struct co_list_hdr * const next_element,
struct co_list_hdr * const element);
/**
****************************************************************************************
* @brief Concatenate two lists.
* The resulting list is the list passed as the first parameter. The second list is
* emptied.
*
* @param[in] list1 First list (will get the result of the concatenation)
* @param[in] list2 Second list (will be emptied after the concatenation)
****************************************************************************************
*/
void co_list_concat(struct co_list *list1, struct co_list *list2);
/**
****************************************************************************************
* @brief Test if the list is empty.
*
* @param[in] list Pointer to the list structure.
*
* @return true if the list is empty, false else otherwise.
****************************************************************************************
*/
__INLINE bool co_list_is_empty(const struct co_list *const list)
{
bool listempty;
listempty = (list->first == NULL);
return (listempty);
}
/**
****************************************************************************************
* @brief Return the number of element of the list.
*
* @param[in] list Pointer to the list structure.
*
* @return The number of elements in the list.
****************************************************************************************
*/
uint32_t co_list_cnt(const struct co_list *const list);
/**
****************************************************************************************
* @brief Pick the first element from the list without removing it.
*
* @param[in] list Pointer to the list structure.
*
* @return First element address. Returns NULL pointer if the list is empty.
****************************************************************************************
*/
__INLINE struct co_list_hdr *co_list_pick(const struct co_list *const list)
{
return(list->first);
}
/**
****************************************************************************************
* @brief Pick the last element from the list without removing it.
*
* @param[in] list Pointer to the list structure.
*
* @return Last element address. Returns invalid value if the list is empty.
****************************************************************************************
*/
__INLINE struct co_list_hdr *co_list_pick_last(const struct co_list *const list)
{
return(list->last);
}
/**
****************************************************************************************
* @brief Return following element of a list element.
*
* @param[in] list_hdr Pointer to the list element.
*
* @return The pointer to the next element.
****************************************************************************************
*/
__INLINE struct co_list_hdr *co_list_next(const struct co_list_hdr *const list_hdr)
{
return(list_hdr->next);
}
/// @} end of group COLIST
#endif // _CO_LIST_H_

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/**
****************************************************************************************
*
* @file co_math.h
*
* @brief Common optimized math functions
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _CO_MATH_H_
#define _CO_MATH_H_
/**
*****************************************************************************************
* @defgroup CO_MATH CO_MATH
* @ingroup COMMON
* @brief Optimized math functions and other computations.
* @{
*****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include <stdint.h> // standard library
#include <stdlib.h> // standard library
#include "co_int.h" // standard integer definitions
#include "co_bool.h" // boolean definitions
#include "compiler.h" // for __INLINE
/*
* MACROS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Return value with one bit set.
*
* @param[in] pos Position of the bit to set.
*
* @return Value with one bit set. There is no return type since this is a macro and this
* will be resolved by the compiler upon assignment to an l-value.
****************************************************************************************
*/
#define CO_BIT(pos) (1UL<<(pos))
/**
****************************************************************************************
* @brief Align val on the multiple of 4 equal or nearest higher.
* @param[in] val Value to align.
* @return Value aligned.
****************************************************************************************
*/
#define CO_ALIGN4_HI(val) (((val)+3)&~3)
/**
****************************************************************************************
* @brief Align val on the multiple of 4 equal or nearest lower.
* @param[in] val Value to align.
* @return Value aligned.
****************************************************************************************
*/
#define CO_ALIGN4_LO(val) ((val)&~3)
/**
****************************************************************************************
* @brief Align val on the multiple of 2 equal or nearest higher.
* @param[in] val Value to align.
* @return Value aligned.
****************************************************************************************
*/
#define CO_ALIGN2_HI(val) (((val)+1)&~1)
/**
****************************************************************************************
* @brief Align val on the multiple of 2 equal or nearest lower.
* @param[in] val Value to align.
* @return Value aligned.
****************************************************************************************
*/
#define CO_ALIGN2_LO(val) ((val)&~1)
/*
* FUNCTION DEFINTIONS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Count leading zeros.
* @param[in] val Value to count the number of leading zeros on.
* @return Number of leading zeros when value is written as 32 bits.
****************************************************************************************
*/
__INLINE uint32_t co_clz(uint32_t val)
{
uint32_t tmp;
uint32_t shift = 0;
if (val == 0)
{
return 32;
}
tmp = val >> 16;
if (tmp)
{
shift = 16;
val = tmp;
}
tmp = val >> 8;
if (tmp)
{
shift += 8;
val = tmp;
}
tmp = val >> 4;
if (tmp)
{
shift += 4;
val = tmp;
}
tmp = val >> 2;
if (tmp)
{
shift += 2;
val = tmp;
}
tmp = val >> 1;
if (tmp)
{
shift += 1;
}
return (31 - shift);
}
/**
****************************************************************************************
* @brief Function to initialize the random seed.
* @param[in] seed The seed number to use to generate the random sequence.
****************************************************************************************
*/
__INLINE void co_random_init(uint32_t seed)
{
srand(seed);
}
/**
****************************************************************************************
* @brief Function to get an 8 bit random number.
* @return Random byte value.
****************************************************************************************
*/
__INLINE uint8_t co_rand_byte(void)
{
return (uint8_t)(rand() & 0xFF);
}
/**
****************************************************************************************
* @brief Function to get an 16 bit random number.
* @return Random half word value.
****************************************************************************************
*/
__INLINE uint16_t co_rand_hword(void)
{
return (uint16_t)(rand() & 0xFFFF);
}
/**
****************************************************************************************
* @brief Function to get an 32 bit random number.
* @return Random word value.
****************************************************************************************
*/
__INLINE uint32_t co_rand_word(void)
{
return (uint32_t)rand();
}
/**
****************************************************************************************
* @brief Function to return the smallest of 2 unsigned 32 bits words.
* @param[in] a First value
* @param[in] b Second value
* @return The smallest value between a and b
****************************************************************************************
*/
__INLINE uint32_t co_min(uint32_t a, uint32_t b)
{
return a < b ? a : b;
}
/**
****************************************************************************************
* @brief Function to return the greatest of 2 unsigned 32 bits words.
* @param[in] a First value
* @param[in] b Second value
* @return The greatest value between a and b
****************************************************************************************
*/
__INLINE uint32_t co_max(uint32_t a, uint32_t b)
{
return a > b ? a : b;
}
/**
****************************************************************************************
* @brief Function to return the absolute value of a signed integer.
* @param[in] val Value
* @return The absolute value of val.
****************************************************************************************
*/
__INLINE int co_abs(int val)
{
return val < 0 ? val*(-1) : val;
}
/**
****************************************************************************************
* @brief Compute a CRC32 on the buffer passed as parameter. The initial value of the
* computation is taken from crc parameter, allowing for incremental computation.
*
* @param[in] addr Pointer to the buffer on which the CRC has to be computed
* @param[in] len Length of the buffer
* @param[in] crc The initial value of the CRC computation
*
* @return The CRC computed on the buffer.
****************************************************************************************
*/
uint32_t co_crc32(uint32_t addr, uint32_t len, uint32_t crc);
/// @} CO_MATH
#endif // _CO_MATH_H_

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/**
****************************************************************************************
*
* @file co_pool.h
*
* Copyright (C) RivieraWaves 2011-2016
*
* @brief File Containing:
* - The declaration of the structures which are involved in the
* pool management operations.
* - The declaration of the APIs which are used to initialize the
* linked list of element within the pools as well as the APIs
* which are used to allocate/release elements from/to the pools.
*
****************************************************************************************
*/
#ifndef _CO_POOL_H_
#define _CO_POOL_H_
/**
****************************************************************************************
* @defgroup COMMON COMMON
* @ingroup MACSW
* @brief Module grouping the general purpose SW tools.
*
* This module contains the list management tools, math and endianess libraries, etc.
* @{
****************************************************************************************
*/
/**
****************************************************************************************
* @defgroup CO_POOL CO_POOL
* @ingroup COMMON
* @brief common module.
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "co_int.h"
/*
* STRUCTURE DECLARATIONS
****************************************************************************************
*/
/** Generic descriptor header of a pool element.
* Given that these structures are going to be located in cacheable memory area,
* the purpose of having it is to speed up the scanning through the list of
* buffers. Indeed since we want to avoid having to flush the cache prior to
* perform a DMA transfer, the buffers are located in non-cacheable
* memory area.
*/
struct co_pool_hdr
{
/// Pointer to the next descriptor in the list.
struct co_pool_hdr *next;
/// Pointer to the associated element residing in non-cacheable memory area.
void *element;
};
/// Structure containing the pool's information: free list pointer and remaining
/// number of elements available.
struct co_pool
{
/// Pointer to the first element available in the pool.
struct co_pool_hdr *first_ptr;
/// Number of elements remaining available in the pool
uint32_t freecnt;
};
/*
* FUNCTION DECLARATIONS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Initialize the pool.
*
* During initialization this function is in charge of building the linked lists of
* elements as well as initializing each element.
*
* @param[in] pool Pointer to the pool.
* @param[in] pool_hdr Pointer to the array of pool headers.
* @param[in] elements Pointer to the elements' array.
* @param[in] elem_size Size of an element belonging to the pool.
* @param[in] elem_cnt Number of element belonging to the pool.
*
****************************************************************************************
*/
void co_pool_init(struct co_pool *pool,
struct co_pool_hdr *pool_hdr,
void *elements,
uint32_t elem_size,
uint32_t elem_cnt);
/**
****************************************************************************************
* @brief Allocate elements from the pool.
*
* @param[in] pool Pointer to the pool from which elements have to be allocated.
* @param[in] nbelem Number of elements to allocate from the pool.
*
* @return Pointer to the list of element(s) allocated from the pool.
*
****************************************************************************************
*/
struct co_pool_hdr *co_pool_alloc(struct co_pool *pool,
uint32_t nbelem);
/**
****************************************************************************************
* @brief Release elements from the pool.
*
* @param[in] pool Pointer to the pool from which the elements are released.
* @param[in] elements Pointer to the list of elements that have to be released from the pool.
* @param[in] nbelem Number of element to release from the pool.
*
****************************************************************************************
*/
void co_pool_free(struct co_pool *pool,
struct co_pool_hdr *elements,
uint32_t nbelem);
/// @} end of group CO_POOL
/// @} end of group COMMON
#endif // _CO_POOL_H_

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/**
****************************************************************************************
*
* @file co_ring.h
*
* @brief definition of co_ring_array structure and related macros.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _CO_RING_H_
#define _CO_RING_H_
/**
****************************************************************************************
* @defgroup CO_RINGARRAY CO_RINGARRAY
* @ingroup COMMON
* @brief Ring buffer management.
*
* This module contains the ring buffer structure definition
* and its member function proto-types.
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "co_int.h"
#include "co_bool.h"
// for NULL
#include <stddef.h>
// for __INLINE
#include "compiler.h"
// for assertions
#include "arch.h"
/*
* STRUCTURE DECLARATIONS
****************************************************************************************
*/
/// Structure holds the information related to the ring.
struct co_ring
{
/// Used index from the heap.
uint8_t free_idx;
/// Free index from the heap.
uint8_t used_idx;
/// Number of used elements.
uint8_t used_count;
/// Total number of elements in ring.
uint8_t max_count;
};
/*
* FUNCTION DECLARATIONS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief This function initializes the co-ring array structure.
*
* @param[in] ring Pointer to ring instance holding the ring parameters.
* @param[in] max_count Number of elements in the ring.
****************************************************************************************
*/
__INLINE void co_ring_init(struct co_ring *ring, uint8_t max_count)
{
// sanity check
ASSERT_ERR(ring != NULL);
ASSERT_ERR(max_count != 0);
// initialize the ring
ring->free_idx = 0;
ring->used_idx = 0;
ring->used_count = 0;
ring->max_count = max_count;
}
/**
****************************************************************************************
* @brief Write an element onto the ring.
* @param[in] ring Pointer to the ring instance.
****************************************************************************************
*/
__INLINE void co_ring_write(struct co_ring *ring)
{
// sanity check
ASSERT_ERR(ring != NULL);
ASSERT_ERR(ring->used_count < ring->max_count);
// increment the index (roll over if necessary)
ring->free_idx++;
if (ring->free_idx == ring->max_count)
{
ring->free_idx = 0;
}
// increment the number of used elements
ring->used_count++;
}
/**
****************************************************************************************
* @brief Read an element from the ring.
* @param[in] ring Pointer to the ring instance.
****************************************************************************************
*/
__INLINE void co_ring_read(struct co_ring *ring)
{
// sanity check
ASSERT_ERR(ring != NULL);
ASSERT_ERR(ring->used_count > 0);
ASSERT_ERR(ring->used_count <= ring->max_count);
// increment the index (roll over if necessary)
ring->used_idx++;
if (ring->used_idx == ring->max_count)
{
ring->used_idx = 0;
}
// decrement the number of used elements
ring->used_count--;
}
/**
****************************************************************************************
* @brief Check if the ring is empty.
* @param[in] ring Pointer to the ring instance.
* @return true is the ring is empty, false otherwise.
****************************************************************************************
*/
__INLINE bool co_ring_empty(struct co_ring *ring)
{
// sanity check
ASSERT_ERR(ring != NULL);
ASSERT_ERR(ring->used_count <= ring->max_count);
return (ring->used_count == 0);
}
/**
****************************************************************************************
* @brief Check if the ring is full.
* @param[in] ring Pointer to the ring instance.
* @return true is the ring is full, false otherwise.
****************************************************************************************
*/
__INLINE bool co_ring_full(struct co_ring *ring)
{
// sanity check
ASSERT_ERR(ring != NULL);
ASSERT_ERR(ring->used_count <= ring->max_count);
return (ring->used_count == ring->max_count);
}
/// @} end of group COLIST
#endif // _CO_RING_H_

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/**
****************************************************************************************
*
* @file co_status.h
*
* @brief Status definitions.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _CO_STATUS_H_
#define _CO_STATUS_H_
/**
****************************************************************************************
* @defgroup CO_STATUS CO_STATUS
* @ingroup COMMON
* @brief Status definitions.
*
* The STATUS module contains the status definitions used in the stack.
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
// standard includes
#include "co_int.h"
/*
* DEFINITIONS
****************************************************************************************
*/
/// Status/error codes used in the MAC software.
enum
{
/// Successful
CO_OK,
/// Unuccessful
CO_FAIL,
/// Empty
CO_EMPTY,
/// Full
CO_FULL,
/// Bad parameters supplied
CO_BAD_PARAM,
/// Element not found
CO_NOT_FOUND,
/// No more element available
CO_NO_MORE_ELT_AVAILABLE,
/// No element currently in use
CO_NO_ELT_IN_USE,
/// Busy
CO_BUSY,
/// Operation already in progress
CO_OP_IN_PROGRESS,
};
/// @}
#endif // _CO_STATUS_H_

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/**
****************************************************************************************
*
* @file co_utils.h
*
* @brief Common utilities definitions
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef _CO_UTILS_H_
#define _CO_UTILS_H_
/**
****************************************************************************************
* @defgroup CO_UTILS CO_UTILS
* @ingroup COMMON
* @brief Common utilities
*
* This module contains the common utilities functions and macros
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "compiler.h"
#include <limits.h>
#include "co_math.h"
#ifndef CHAR_BIT
#define CHAR_BIT 8
#endif
/*
* MACROS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Converts a STA index in an Association Index.
* @param[in] sta_idx The station index.
* @return The association index
****************************************************************************************
*/
#define CO_STAIDX_TO_AID(sta_idx) ((sta_idx) + 1)
/**
****************************************************************************************
* @brief Get the index of an element in an array.
* @param[in] __element_ptr Pointer to the element
* @param[in] __array_ptr Pointer to the array
* @return The index of the element
****************************************************************************************
*/
#define CO_GET_INDEX(__element_ptr, __array_ptr) ((__element_ptr) - (__array_ptr))
/// Length of a char in bytes
#define CHAR_LEN (CHAR_BIT/8)
/**
****************************************************************************************
* @brief Converts a CPU pointer into a HW address
* This macro is used to convert a SW pointer into the corresponding HW address. With CPUs
* having native byte support, the value returned will be the same as the pointer passed.
* With TL4, the value returned is the pointer multiplied by 2.
* @param[in] ptr Pointer to be converted
* @return The corresponding HW address
****************************************************************************************
*/
#define CPU2HW(ptr) (((uint32_t)(ptr)) * CHAR_LEN)
/**
****************************************************************************************
* @brief Converts a HW address into a CPU pointer
* This macro is doing the reverse operation as @ref CPU2HW.
* @param[in] ptr Address to be converted
* @return The corresponding CPU pointer
****************************************************************************************
*/
#define HW2CPU(ptr) ((void *)(((uint32_t)(ptr)) / CHAR_LEN))
/**
****************************************************************************************
* @brief Return the size of a variable or type in bytes
* @param[in] a Variable for which the size is computed
* @return The size of the variable in bytes
****************************************************************************************
*/
#define sizeof_b(a) (sizeof(a) * CHAR_LEN)
/**
****************************************************************************************
* @brief Return the offset (in bytes) of a structure element
* @param[in] a Structure type
* @param[in] b Field name
* @return The of the field in bytes
****************************************************************************************
*/
#define offsetof_b(a, b) (offsetof(a, b) * CHAR_LEN)
/*
* FUNCTION DECLARATIONS
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Read an aligned 16 bits word.
* @param[in] ptr16 The address of the first byte of the 16 bits word.
* @return The 16 bits value.
****************************************************************************************
*/
__INLINE uint16_t co_read16(void const *ptr16)
{
return *((uint16_t*)ptr16);
}
/**
****************************************************************************************
* @brief Write an aligned 16 bits word.
* @param[in] ptr16 The address of the first byte of the 16 bits word.
* @param[in] value The value to write.
****************************************************************************************
*/
__INLINE void co_write16(void const *ptr16, uint32_t value)
{
*(uint16_t*)ptr16 = value;
}
/**
****************************************************************************************
* @brief Read an aligned 32 bit word.
* @param[in] ptr32 The address of the first byte of the 32 bit word.
* @return The 32 bit value.
****************************************************************************************
*/
__INLINE uint32_t co_read32(void const *ptr32)
{
return *((uint32_t*)ptr32);
}
/**
****************************************************************************************
* @brief Write an aligned 32 bits word.
* @param[in] ptr32 The address of the first byte of the 32 bits word.
* @param[in] value The value to write.
****************************************************************************************
*/
__INLINE void co_write32(void const *ptr32, uint32_t value)
{
*(uint32_t*)ptr32 = value;
}
/**
****************************************************************************************
* @brief Copy a 32-bit aligned buffer into another one
* The length in bytes is converted to the corresponding number of 32-bit words. If the
* byte length is not a multiple of 4, then additional bytes will be copied at the end
* of the buffer. It is the responsibility of the caller to ensure that these extra-byte
* copy won't corrupt the memory at the end of the destination buffer.
*
* @param[in] dst Pointer to the destination buffer
* @param[in] src Pointer to the source buffer
* @param[in] len Length to be copied (in bytes)
****************************************************************************************
*/
__INLINE void co_copy32(uint32_t *dst, uint32_t *src, uint32_t len)
{
len = CO_ALIGN4_HI(len)/4;
while (len--)
{
*dst++ = *src++;
}
}
/**
****************************************************************************************
* @brief Read a 8 bits word.
* @param[in] addr The address of the first byte of the 8 bits word.
* @return The read value
****************************************************************************************
*/
__INLINE uint8_t co_read8p(uint32_t addr)
{
return (*(uint8_t *)addr);
}
/**
****************************************************************************************
* @brief Write a 8 bits word.
* @param[in] addr The address of the first byte of the 8 bits word.
* @param[in] value The value to write.
****************************************************************************************
*/
__INLINE void co_write8p(uint32_t addr, uint8_t value)
{
*(uint8_t *)addr = value;
}
/**
****************************************************************************************
* @brief Read a packed 16 bits word.
* @param[in] addr The address of the first byte of the 16 bits word.
* @return The 16 bits value.
****************************************************************************************
*/
__INLINE uint16_t co_read16p(uint32_t addr)
{
struct co_read16_struct
{
__PACKED16 uint16_t val;
} *ptr = (struct co_read16_struct*)addr;
return ptr->val;
}
/**
****************************************************************************************
* @brief Write a packed 16 bits word.
* @param[in] addr The address of the first byte of the 16 bits word.
* @param[in] value The value to write.
****************************************************************************************
*/
__INLINE void co_write16p(uint32_t addr, uint16_t value)
{
uint8_t *dest = (uint8_t *)addr;
dest[0] = value & 0xff;
dest[1] = (value >> 8) & 0xff;
}
/**
****************************************************************************************
* @brief Read a packed 32 bits word.
* @param[in] addr The address of the first byte of the 32 bits word.
* @return The 32 bits value.
****************************************************************************************
*/
__INLINE uint32_t co_read32p(uint32_t addr)
{
struct co_read32_struct
{
__PACKED uint32_t val;
} *ptr = (struct co_read32_struct*) addr;
return ptr->val;
}
/**
****************************************************************************************
* @brief Write a packed 32 bits word.
* @param[in] addr The address of the first byte of the 32 bits word.
* @param[in] value The value to write.
****************************************************************************************
*/
__INLINE void co_write32p(uint32_t addr, uint32_t value)
{
struct co_read32_struct
{
__PACKED uint32_t val;
} *ptr = (struct co_read32_struct*) addr;
ptr->val = value;
}
/**
****************************************************************************************
* @brief Read a packed 64 bits word.
* @param[in] addr The address of the first byte of the 64 bits word.
* @return The 64 bits value.
****************************************************************************************
*/
__INLINE uint64_t co_read64p(uint32_t addr)
{
struct co_read64_struct
{
__PACKED uint64_t val;
} *ptr = (struct co_read64_struct*) addr;
return ptr->val;
}
/**
****************************************************************************************
* @brief Compare a packed byte buffer with a CPU byte array
* @param[in] pkd The address of the packed buffer.
* @param[in] ptr Pointer to the CPU byte array
* @param[in] len Length to be compared
*
* @return true if the buffers are equal, false otherwise
****************************************************************************************
*/
__INLINE bool co_cmp8p(uint32_t pkd, uint8_t const *ptr, uint32_t len)
{
while (len--)
{
if (co_read8p(pkd++) != (*ptr++ & 0xFF))
return false;
}
return true;
}
/**
****************************************************************************************
* @brief Copy and pack a byte array to another one
* @param[in] dst The address of the first byte of the packed buffer in which the data has
* to be copied.
* @param[in] src Pointer to the source buffer
* @param[in] len Length to be copied
****************************************************************************************
*/
__INLINE void co_pack8p(uint32_t dst, uint8_t const *src, uint32_t len)
{
while (len--)
{
co_write8p(dst++, *src++);
}
}
/**
****************************************************************************************
* @brief Copy and unpack a byte array to another one
* @param[in] dst Pointer to the first byte of the unpacked buffer in which the data has
* to be copied.
* @param[in] src Address of the packed source buffer
* @param[in] len Length to be copied
****************************************************************************************
*/
__INLINE void co_unpack8p(uint8_t *dst, uint32_t src, uint32_t len)
{
while (len--)
{
*dst++ = co_read8p(src++);
}
}
/**
****************************************************************************************
* @brief Copy a packed byte array to another packed byte array
* @param[in] dst The address of the first byte of the packed buffer in which the data has
* to be copied.
* @param[in] src Address of the source buffer
* @param[in] len Length to be copied
****************************************************************************************
*/
__INLINE void co_copy8p(uint32_t dst, uint32_t src, uint32_t len)
{
while (len--)
{
co_write8p(dst++, co_read8p(src++));
}
}
/// @} end of group COUTILS
#endif // _CO_UTILS_H_

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/**
****************************************************************************************
*
* @file ll.h
*
* @brief Declaration of low level functions.
*
* Copyright (C) RivieraWaves 2011-2016
*
****************************************************************************************
*/
#ifndef LL_H_
#define LL_H_
#include "co_int.h"
#include "compiler.h"
extern uint32_t platform_is_in_interrupt_context( void );
extern uint32_t platform_is_in_fiq_context( void );
#define GLOBAL_INT_DECLARATION() uint32_t fiq_tmp, irq_tmp
#define GLOBAL_INT_DISABLE() do{\
fiq_tmp = portDISABLE_FIQ();\
irq_tmp = portDISABLE_IRQ();\
}while(0)
#define GLOBAL_INT_RESTORE() do{ \
if(!fiq_tmp) \
{ \
portENABLE_FIQ(); \
} \
if(!irq_tmp) \
{ \
portENABLE_IRQ(); \
} \
}while(0)
#endif // LL_H_

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/*
* cc.h - Architecture environment, some compiler specific, some
* environment specific (probably should move env stuff
* to sys_arch.h.)
*
* Typedefs for the types used by lwip -
* u8_t, s8_t, u16_t, s16_t, u32_t, s32_t, mem_ptr_t
*
* Compiler hints for packing lwip's structures -
* PACK_STRUCT_FIELD(x)
* PACK_STRUCT_STRUCT
* PACK_STRUCT_BEGIN
* PACK_STRUCT_END
*
* Platform specific diagnostic output -
* LWIP_PLATFORM_DIAG(x) - non-fatal, print a message.
* LWIP_PLATFORM_ASSERT(x) - fatal, print message and abandon execution.
* Portability defines for printf formatters:
* U16_F, S16_F, X16_F, U32_F, S32_F, X32_F, SZT_F
*
* "lightweight" synchronization mechanisms -
* SYS_ARCH_DECL_PROTECT(x) - declare a protection state variable.
* SYS_ARCH_PROTECT(x) - enter protection mode.
* SYS_ARCH_UNPROTECT(x) - leave protection mode.
*
* If the compiler does not provide memset() this file must include a
* definition of it, or include a file which defines it.
*
* This file must either include a system-local <errno.h> which defines
* the standard *nix error codes, or it should #define LWIP_PROVIDE_ERRNO
* to make lwip/arch.h define the codes which are used throughout.
*/
#ifndef __CC_H__
#define __CC_H__
#include "typedef.h"
#include "uart_pub.h"
// for sys interrupt
#include "ll.h"
/*
* Typedefs for the types used by lwip -
* u8_t, s8_t, u16_t, s16_t, u32_t, s32_t, mem_ptr_t
*/
typedef unsigned char u8_t; /* Unsigned 8 bit quantity */
typedef signed char s8_t; /* Signed 8 bit quantity */
typedef unsigned short u16_t; /* Unsigned 16 bit quantity */
typedef signed short s16_t; /* Signed 16 bit quantity */
typedef unsigned long u32_t; /* Unsigned 32 bit quantity */
typedef signed long s32_t; /* Signed 32 bit quantity */
//typedef unsigned long mem_ptr_t; /* Unsigned 32 bit quantity */
typedef int intptr_t;
typedef unsigned int uintptr_t;
#define LWIP_MAILBOX_QUEUE 1
#define LWIP_TIMEVAL_PRIVATE 0
#define LWIP_NO_INTTYPES_H 1
#if defined(__GNUC__)
#define PACK_STRUCT_BEGIN
#define PACK_STRUCT_STRUCT __attribute__((packed))
#define PACK_STRUCT_FIELD(x) x
#elif defined(__ICCARM__)
#define PACK_STRUCT_BEGIN __packed
#define PACK_STRUCT_STRUCT
#define PACK_STRUCT_FIELD(x) x
#else
#define PACK_STRUCT_BEGIN
#define PACK_STRUCT_STRUCT
#define PACK_STRUCT_FIELD(x) x
#endif
/*
* Platform specific diagnostic output -
* LWIP_PLATFORM_DIAG(x) - non-fatal, print a message.
* LWIP_PLATFORM_ASSERT(x) - fatal, print message and abandon execution.
* Portability defines for printf formatters:
* U16_F, S16_F, X16_F, U32_F, S32_F, X32_F, SZT_F
*/
#ifndef LWIP_PLATFORM_ASSERT
#define LWIP_PLATFORM_ASSERT(x) \
do \
{ fatal_prf("Assertion \"%s\" failed at line %d in %s\n", x, __LINE__, __FILE__); \
} while(0)
#endif
#ifndef LWIP_PLATFORM_DIAG
#define LWIP_PLATFORM_DIAG(x) do {fatal_prf x ;} while(0)
#endif
#if LWIP_NO_INTTYPES_H
#define U8_F "2d"
#define X8_F "2x"
#define U16_F "4d"
#define S16_F "4d"
#define X16_F "4x"
#define U32_F "8ld"
#define S32_F "8ld"
#define X32_F "8lx"
#define SZT_F U32_F
#endif
/*
* unknow defination
*/
// cup byte order
#ifndef BYTE_ORDER
#define BYTE_ORDER LITTLE_ENDIAN
#endif
#define LWIP_RAND() ((uint32_t)rand())
#endif
// eof

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#ifndef __ETHERNETIF_H__
#define __ETHERNETIF_H__
#include "lwip/err.h"
#include "lwip/netif.h"
void ethernetif_recv(struct netif *netif, int total_len);
err_t ethernetif_init(struct netif *netif);
#endif

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#ifndef __LWIP_INTF_H__
#define __LWIP_INTF_H__
#define LWIP_INTF_DEBUG
#ifdef LWIP_INTF_DEBUG
#define LWIP_INTF_PRT warning_prf
#define LWIP_INTF_WARN warning_prf
#define LWIP_INTF_FATAL fatal_prf
#else
#define LWIP_INTF_PRT null_prf
#define LWIP_INTF_WARN null_prf
#define LWIP_INTF_FATAL null_prf
#endif
#endif
// eof

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#ifndef _LWIP_NETIF_ADDR_H_
#define _LWIP_NETIF_ADDR_H_
/** MLAN BSS type */
typedef enum _wifi_interface_type
{
WIFI_INTERFACE_TYPE_STA = 0,
WIFI_INTERFACE_TYPE_UAP = 1,
WIFI_INTERFACE_TYPE_ANY = 0xff,
} wifi_interface_type;
#define ADDR_TYPE_STATIC 1
#define ADDR_TYPE_DHCP 0
/** This data structure represents an IPv4 address */
struct ipv4_config {
/** DHCP_Disable DHCP_Client DHCP_Server */
unsigned addr_type;
/** The system's IP address in network order. */
unsigned address;
/** The system's default gateway in network order. */
unsigned gw;
/** The system's subnet mask in network order. */
unsigned netmask;
/** The system's primary dns server in network order. */
unsigned dns1;
/** The system's secondary dns server in network order. */
unsigned dns2;
};
/** Network IP configuration.
*
* This data structure represents the network IP configuration
* for IPv4 as well as IPv6 addresses
*/
struct wlan_ip_config {
#ifdef CONFIG_IPV6
/** The network IPv6 address configuration that should be
* associated with this interface. */
struct ipv6_config ipv6[MAX_IPV6_ADDRESSES];
#endif
/** The network IPv4 address configuration that should be
* associated with this interface. */
struct ipv4_config ipv4;
};
#endif

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