rel_1.6.0 init

This commit is contained in:
guocheng.kgc 2020-06-18 20:06:52 +08:00 committed by shengdong.dsd
commit 27b3e2883d
19359 changed files with 8093121 additions and 0 deletions

View file

@ -0,0 +1,128 @@
#include "hal/soc/soc.h"
//#include "serial_api.h"
#include <aos/kernel.h>
#include "rda59xx_daemon.h"
const hal_logic_partition_t hal_partitions[] =
{
#if 0
[HAL_PARTITION_BOOTLOADER] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "Bootloader",
.partition_start_addr = 0x18001000,
.partition_length = 0x3000, //12k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
#endif
[HAL_PARTITION_APPLICATION] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "Application",
.partition_start_addr = 0x18004000,
.partition_length = 0x91000,//580K bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_OTA_TEMP] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "OTA Storage",
.partition_start_addr = 0x18095000,
.partition_length = 0x5D000,//372K bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_1] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER1",
.partition_start_addr = 0x180F7000,
.partition_length = 0x1000, //4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_2] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER2",
.partition_start_addr = 0x180F8000,
.partition_length = 0x2000, //8k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_3] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER3",
.partition_start_addr = 0x180FA000,
.partition_length = 0x1000, //4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_4] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER4",
.partition_start_addr = 0x180FB000,
.partition_length = 0x1000, //4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_META_DATA] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "Meta Data",
.partition_start_addr = 0x180FC000,
.partition_length = 0x2000, //8k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_SYS_DATA] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "SYS RF Data",
.partition_start_addr = 0x180FE000,
.partition_length = 0x1000,
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
};
extern uart_dev_t uart_0;
/*
uart_dev_t uart_0 = {
0,
{921600, DATA_WIDTH_8BIT, NO_PARITY, STOP_BITS_1, FLOW_CONTROL_DISABLED},
NULL,
};
*/
int32_t rda_get_macaddr_from_flash(unsigned char *macaddr)
{
int ret;
if (NULL == macaddr) {
printf("%s ERR: null pointer\n", __func__);
return;
}
ret = rda5981_flash_read_mac_addr(macaddr);
if ((ret!=0) || (is_zero_ether_addr(macaddr))) {
#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT)
unsigned int out_len;
ret = mbedtls_hardware_poll(NULL, macaddr, 6, &out_len);
if (6 != out_len) {
printf("%s out_len err:%d\n", __func__, out_len);
}
#else
ret = rda_get_random_bytes(macaddr, 6);
#endif
macaddr[0] &= 0xfe; /* clear multicast bit */
macaddr[0] |= 0x02; /* set local assignment bit (IEEE802) */
/* write to flash */
rda5981_flash_write_mac_addr(macaddr);
printf("WARN: use randon mac\n");
}
return ret;
}
void board_init(void)
{
hal_uart_init(&uart_0);
}
void board_init_later(void)
{
printf("====board_init_later done===\r\n");
}

View file

@ -0,0 +1,10 @@
#define HARDWARE_REVISION "V1.0"
#define MODEL "UNO-91H"
#ifdef BOOTLOADER
#define STDIO_UART 0
#define STDIO_UART_BUADRATE 115200
#else
#define STDIO_UART 0
#define STDIO_UART_BUADRATE 115200
#endif

View file

@ -0,0 +1,89 @@
#include "hal/soc/soc.h"
#include "PeripheralNames.h"
#include "pwmout_api.h"
#define PWM_NUM 5
static pwmout_t PWM_OBJ[PWM_NUM];
static PinName PWM_MAP[PWM_NUM] = {
[0] = PD_0,
//[1] = PC_1,
//[2] = PB_0,
[1] = PD_1,
[2] = PD_2,
[3] = PD_3,
[4] = PB_3,
//[5] = PB_5,
//[6] = PB_6,
//[7] = PB_1
};
int32_t hal_pwm_init(pwm_dev_t *pwm){
if(pwm->port >= PWM_NUM){
return -1;
}
if(pwm->config.freq > 1000000 || pwm->config.freq < 200)
return -1;
if(pwm->config.duty_cycle > 1 || pwm->config.duty_cycle < 0)
return -1;
pwm->priv = &PWM_OBJ[pwm->port];
pwmout_init(pwm->priv, PWM_MAP[pwm->port]);
static int init_clk = 0;
if(!init_clk)
{
pwmout_clk_set(pwm->priv, 1, 0);
init_clk = 1;
}
return 0;
}
int32_t hal_pwm_clk(pwm_dev_t *pwm, int src, int div){
if(1 == src){
pwm->config.freq = 10000000;
}else{
pwm->config.freq = 16384;
}
pwmout_clk_set(pwm->priv, src, div);
return 0;
}
int32_t hal_pwm_period_us(pwm_dev_t *pwm, int us){
pwmout_period_us(pwm->priv, us);
return 0;
}
int32_t hal_pwm_write(pwm_dev_t *pwm, float percent){
pwm->config.duty_cycle = percent;
pwmout_write(pwm->priv, percent);
return 0;
}
int32_t hal_pwm_diff_write(pwm_dev_t *pwm, float percent){
pwm->config.duty_cycle = percent;
pwmout_diff_write(pwm->priv, percent);
return 0;
}
int32_t hal_pwm_sync_write(pwm_dev_t *pwm, float percent, uint8_t duty_sel){
pwm->config.duty_cycle = percent;
pwmout_sync_write(pwm->priv, percent, duty_sel);
return 0;
}
int32_t hal_pwm_start(pwm_dev_t *pwm){
int us = 1000000/pwm->config.freq;
pwmout_period_us(pwm->priv, us);
pwmout_write(pwm->priv, pwm->config.duty_cycle);
return 0;
}
int32_t hal_pwm_stop(pwm_dev_t *pwm){
pwmout_stop(pwm->priv);
return 0;
}
int32_t hal_pwm_finalize(pwm_dev_t *pwm){
pwmout_free(pwm->priv);
return 0;
}

View file

@ -0,0 +1,232 @@
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef K_CONFIG_H
#define K_CONFIG_H
/* chip level conf */
#ifndef RHINO_CONFIG_LITTLE_ENDIAN
#define RHINO_CONFIG_LITTLE_ENDIAN 1
#endif
#ifndef RHINO_CONFIG_CPU_STACK_DOWN
#define RHINO_CONFIG_CPU_STACK_DOWN 1
#endif
/* kernel feature conf */
#ifndef RHINO_CONFIG_SEM
#define RHINO_CONFIG_SEM 1
#endif
#ifndef RHINO_CONFIG_QUEUE
#define RHINO_CONFIG_QUEUE 1
#endif
#ifndef RHINO_CONFIG_TASK_SEM
#define RHINO_CONFIG_TASK_SEM 1
#endif
#ifndef RHINO_CONFIG_EVENT_FLAG
#define RHINO_CONFIG_EVENT_FLAG 1
#endif
#ifndef RHINO_CONFIG_TIMER
#define RHINO_CONFIG_TIMER 1
#endif
#ifndef RHINO_CONFIG_BUF_QUEUE
#define RHINO_CONFIG_BUF_QUEUE 1
#endif
#ifndef RHINO_CONFIG_MM_BLK
#define RHINO_CONFIG_MM_BLK 1
#endif
#ifndef RHINO_CONFIG_MM_DEBUG
#define RHINO_CONFIG_MM_DEBUG 1
#endif
#ifndef RHINO_CONFIG_MM_TLF
#define RHINO_CONFIG_MM_TLF 1
#endif
#define K_MM_STATISTIC 1
#ifndef RHINO_CONFIG_MM_MAXMSIZEBIT
#define RHINO_CONFIG_MM_MAXMSIZEBIT 19
#endif
#ifndef RHINO_CONFIG_GCC_RETADDR
#define RHINO_CONFIG_GCC_RETADDR 1
#endif
#ifndef RHINO_CONFIG_MM_LEAKCHECK
#define RHINO_CONFIG_MM_LEAKCHECK 0
#endif
#ifndef RHINO_CONFIG_RINGBUF_VENDOR
#define RHINO_CONFIG_RINGBUF_VENDOR 0
#endif
#ifndef RHINO_CONFIG_KOBJ_SET
#define RHINO_CONFIG_KOBJ_SET 1
#endif
/* kernel task conf */
#ifndef RHINO_CONFIG_TASK_SUSPEND
#define RHINO_CONFIG_TASK_SUSPEND 1
#endif
#ifndef RHINO_CONFIG_TASK_INFO
#define RHINO_CONFIG_TASK_INFO 1
#endif
#ifndef RHINO_CONFIG_TASK_DEL
#define RHINO_CONFIG_TASK_DEL 1
#endif
#ifndef RHINO_CONFIG_TASK_WAIT_ABORT
#define RHINO_CONFIG_TASK_WAIT_ABORT 1
#endif
#ifndef RHINO_CONFIG_TASK_STACK_OVF_CHECK
#define RHINO_CONFIG_TASK_STACK_OVF_CHECK 1
#endif
#ifndef RHINO_CONFIG_SCHED_RR
#define RHINO_CONFIG_SCHED_RR 1
#endif
#ifndef RHINO_CONFIG_TIME_SLICE_DEFAULT
#define RHINO_CONFIG_TIME_SLICE_DEFAULT 50
#endif
#ifndef RHINO_CONFIG_PRI_MAX
#define RHINO_CONFIG_PRI_MAX 62
#endif
#ifndef RHINO_CONFIG_USER_PRI_MAX
#define RHINO_CONFIG_USER_PRI_MAX (RHINO_CONFIG_PRI_MAX - 2)
#endif
/* kernel workqueue conf */
#ifndef RHINO_CONFIG_WORKQUEUE
#define RHINO_CONFIG_WORKQUEUE 1
#endif
#ifndef RHINO_CONFIG_WORKQUEUE_STACK_SIZE
#define RHINO_CONFIG_WORKQUEUE_STACK_SIZE 768
#endif
/* kernel mm_region conf */
#ifndef RHINO_CONFIG_MM_REGION_MUTEX
#define RHINO_CONFIG_MM_REGION_MUTEX 0
#endif
/* kernel timer&tick conf */
#ifndef RHINO_CONFIG_HW_COUNT
#define RHINO_CONFIG_HW_COUNT 0
#endif
#ifndef RHINO_CONFIG_TICK_TASK
#define RHINO_CONFIG_TICK_TASK 0
#endif
#if (RHINO_CONFIG_TICK_TASK > 0)
#ifndef RHINO_CONFIG_TICK_TASK_STACK_SIZE
#define RHINO_CONFIG_TICK_TASK_STACK_SIZE 256
#endif
#ifndef RHINO_CONFIG_TICK_TASK_PRI
#define RHINO_CONFIG_TICK_TASK_PRI 1
#endif
#endif
#ifndef RHINO_CONFIG_TICKLESS
#define RHINO_CONFIG_TICKLESS 0
#endif
#ifndef RHINO_CONFIG_TICKS_PER_SECOND
#define RHINO_CONFIG_TICKS_PER_SECOND 1000
#endif
/* must be 2^n size!, such as 1, 2, 4, 8, 16,32, etc....... */
#ifndef RHINO_CONFIG_TICK_HEAD_ARRAY
#define RHINO_CONFIG_TICK_HEAD_ARRAY 8
#endif
/*must reserve enough stack size for timer cb will consume*/
#ifndef RHINO_CONFIG_TIMER_TASK_STACK_SIZE
#define RHINO_CONFIG_TIMER_TASK_STACK_SIZE 300
#endif
#ifndef RHINO_CONFIG_TIMER_RATE
#define RHINO_CONFIG_TIMER_RATE 1
#endif
#ifndef RHINO_CONFIG_TIMER_TASK_PRI
#define RHINO_CONFIG_TIMER_TASK_PRI 5
#endif
/* kernel intrpt conf */
#ifndef RHINO_CONFIG_INTRPT_STACK_REMAIN_GET
#define RHINO_CONFIG_INTRPT_STACK_REMAIN_GET 0
#endif
#ifndef RHINO_CONFIG_INTRPT_STACK_OVF_CHECK
#define RHINO_CONFIG_INTRPT_STACK_OVF_CHECK 0
#endif
#ifndef RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL
#define RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL 188u
#endif
#ifndef RHINO_CONFIG_INTRPT_GUARD
#define RHINO_CONFIG_INTRPT_GUARD 0
#endif
/* kernel dyn alloc conf */
#ifndef RHINO_CONFIG_KOBJ_DYN_ALLOC
#define RHINO_CONFIG_KOBJ_DYN_ALLOC 1
#endif
#if (RHINO_CONFIG_KOBJ_DYN_ALLOC > 0)
#ifndef RHINO_CONFIG_K_DYN_QUEUE_MSG
#define RHINO_CONFIG_K_DYN_QUEUE_MSG 30
#endif
#ifndef RHINO_CONFIG_K_DYN_TASK_STACK
#define RHINO_CONFIG_K_DYN_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_K_DYN_MEM_TASK_PRI
#define RHINO_CONFIG_K_DYN_MEM_TASK_PRI 6
#endif
#endif
/* kernel idle conf */
#ifndef RHINO_CONFIG_IDLE_TASK_STACK_SIZE
#define RHINO_CONFIG_IDLE_TASK_STACK_SIZE 200
#endif
/* kernel hook conf */
#ifndef RHINO_CONFIG_USER_HOOK
#define RHINO_CONFIG_USER_HOOK 0
#endif
/* kernel stats conf */
#ifndef RHINO_CONFIG_SYSTEM_STATS
#define RHINO_CONFIG_SYSTEM_STATS 1
#endif
#ifndef RHINO_CONFIG_DISABLE_SCHED_STATS
#define RHINO_CONFIG_DISABLE_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_DISABLE_INTRPT_STATS
#define RHINO_CONFIG_DISABLE_INTRPT_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_STATS
#define RHINO_CONFIG_CPU_USAGE_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_PRI
#define RHINO_CONFIG_CPU_USAGE_TASK_PRI (RHINO_CONFIG_PRI_MAX - 2)
#endif
#ifndef RHINO_CONFIG_TASK_SCHED_STATS
#define RHINO_CONFIG_TASK_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_STACK
#define RHINO_CONFIG_CPU_USAGE_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_CPU_NUM
#define RHINO_CONFIG_CPU_NUM 1
#endif
/* kernel trace conf */
#ifndef RHINO_CONFIG_TRACE
#define RHINO_CONFIG_TRACE 0
#endif
#ifndef WIFI_CONFIG_SUPPORT_LOWPOWER
#define WIFI_CONFIG_SUPPORT_LOWPOWER 0
#endif
#ifndef WIFI_CONFIG_LISTENSET_BINIT
#define WIFI_CONFIG_LISTENSET_BINIT 1
#endif
#ifndef WIFI_CONFIG_LISTEN_INTERVAL
#define WIFI_CONFIG_LISTEN_INTERVAL 1
#endif
#ifndef WIFI_CONFIG_RECEIVE_DTIM
#define WIFI_CONFIG_RECEIVE_DTIM 1
#endif
#endif /* CONFIG_H */

View file

@ -0,0 +1,186 @@
.syntax unified
.arch armv7-m
/* Memory Model
The HEAP starts at the end of the DATA section and grows upward.
The STACK starts at the end of the RAM and grows downward.
The HEAP and stack STACK are only checked at compile time:
(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
This is just a check for the bare minimum for the Heap+Stack area before
aborting compilation, it is not the run time limit:
Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
*/
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x800
#endif
.space Stack_Size
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0x18000
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.space Heap_Size
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External interrupts */
.long SPIFLASH_IRQHandler /* 16: SPI Flash */
.long PTA_IRQHandler /* 17: PTA */
.long SDIO_IRQHandler /* 18: SDIO */
.long USBDMA_IRQHandler /* 19: USB DMA */
.long USB_IRQHandler /* 20: USB */
.long GPIO_IRQHandler /* 21: GPIO */
.long TIMER0_IRQHandler /* 22: Timer0 */
.long UART0_IRQHandler /* 23: UART0 */
.long MACHW_IRQHandler /* 24: MAC Hardware */
.long UART1_IRQHandler /* 25: UART1 */
.long AHBDMA_IRQHandler /* 26: AHB DMA */
.long PSRAM_IRQHandler /* 27: PSRAM */
.long SDMMC_IRQHandler /* 28: SDMMC */
.long EXIF_IRQHandler /* 29: EXIF */
.long I2C_IRQHandler /* 30: I2C */
.size __isr_vector, . - __isr_vector
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.
* _etext: End of code section, i.e., begin of data sections to copy from.
* __data_start__/__data_end__: RAM address range that data should be
* copied to. Both must be aligned to 4 bytes boundary. */
ldr r0, =__StackTop
msr msp, r0
ldr r0, =rda_ccfg_boot
blx r0
cmp r0, #0x01
bne Soft_Reset
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
.Lflash_to_ram_loop:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .Lflash_to_ram_loop
ldr r2, =__bss_start__
b .LoopFillZerobss
.FillZerobss:
movs r3, #0
str r3, [r2], #4
.LoopFillZerobss:
ldr r3, = __bss_end__
cmp r2, r3
bcc .FillZerobss
ldr r0, =SystemInit
blx r0
ldr r0, =entry_main
bx r0
Soft_Reset:
mov r1, #0x04
ldr r0, [r1]
bx r0
.pool
.size Reset_Handler, . - Reset_Handler
.text
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_default_handler handler_name
.align 1
.thumb_func
.weak \handler_name
.type \handler_name, %function
\handler_name :
b .
.size \handler_name, . - \handler_name
.endm
def_default_handler NMI_Handler
def_default_handler HardFault_Handler
def_default_handler MemManage_Handler
def_default_handler BusFault_Handler
def_default_handler UsageFault_Handler
def_default_handler SVC_Handler
def_default_handler DebugMon_Handler
def_default_handler PendSV_Handler
def_default_handler SysTick_Handler
def_default_handler Default_Handler
.macro def_irq_default_handler handler_name
.weak \handler_name
.set \handler_name, Default_Handler
.endm
def_irq_default_handler SPIFLASH_IRQHandler
def_irq_default_handler PTA_IRQHandler
def_irq_default_handler SDIO_IRQHandler
def_irq_default_handler USBDMA_IRQHandler
def_irq_default_handler USB_IRQHandler
def_irq_default_handler GPIO_IRQHandler
def_irq_default_handler TIMER0_IRQHandler
def_irq_default_handler UART0_IRQHandler
def_irq_default_handler MACHW_IRQHandler
def_irq_default_handler UART1_IRQHandler
def_irq_default_handler AHBDMA_IRQHandler
def_irq_default_handler PSRAM_IRQHandler
def_irq_default_handler SDMMC_IRQHandler
def_irq_default_handler EXIF_IRQHandler
def_irq_default_handler I2C_IRQHandler
.end

View file

@ -0,0 +1 @@
linux_only_targets="living_platform linkkit_gateway smart_outlet smart_outlet_meter smart_led_bulb smart_led_strip"

View file

@ -0,0 +1,199 @@
/* Linker script for Alios-Things RDA5981A*/
/* Linker script to configure memory regions. */
MEMORY
{
/* If ICache is enable, use virtual flash base address */
/* Use partition index: 0 */
FLASH (rx) : ORIGIN = 0x18004000, LENGTH = 580K
/* Use partition index: 1 */
/* FLASH (rx) : ORIGIN = 0x1807E000, LENGTH = 500K */
/* If ICache is disable, use real flash base address. Depends on macro: RDA_ICACHE_DISABLE */
/* Use partition index: 0 */
/* FLASH (rx) : ORIGIN = 0x14001000, LENGTH = 500K */
/* Use partition index: 1 */
/* FLASH (rx) : ORIGIN = 0x1407E000, LENGTH = 500K */
IRAM (rwx) : ORIGIN = 0x00100080, LENGTH = (128K - 0x80)
DRAM (rwx) : ORIGIN = 0x00180000, LENGTH = 96K
MACLIB_RAM(rwx) : ORIGIN = 0x40100000, LENGTH = 99K
AES_RAM(rwx) : ORIGIN = 0x40118C00, LENGTH = 1K
WLAN_RAM(rwx) : ORIGIN = 0x40119000, LENGTH = 28K
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* Following symbols can be used in code without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.isr_vector))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
. = ALIGN(4);
_etext = .;
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE (__fini_array_end = .);
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > IRAM
.bss :
{
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > IRAM
. = ALIGN(16);
__IramLeft = .;
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > IRAM
/* Set stack top to end of IRAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(IRAM) + LENGTH(IRAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + stack exceeds RAM limit */
ASSERT(__StackLimit >= __bss_end__, "region IRAM overflowed with stack")
__IramLeftLen = __StackLimit - __IramLeft;
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > DRAM
PROVIDE(__sbrk_start = ADDR(.heap));
PROVIDE(__krbs_start = ADDR(.heap) + SIZEOF(.heap));
PROVIDE(heap_start = __sbrk_start);
PROVIDE(heap_end = __HeapLimit);
PROVIDE(heap_len = heap_end - heap_start);
.ARM.attributes 0 : { *(.ARM.attributes) }
/* Code can explicitly ask for data to be
placed in these higher RAM banks where
they will be left uninitialized.
*/
.SECTIONRESERVED1 (NOLOAD):
{
*(SECTIONRESERVED1)
} > MACLIB_RAM
__SmemLeft = ORIGIN(AES_RAM);
.AHB1SMEM0 (NOLOAD):
{
*(AHB1SMEM0)
} > AES_RAM
.AHB1SMEM1 (NOLOAD):
{
*(AHB1SMEM1)
} > WLAN_RAM
__SmemLeftLen = ORIGIN(WLAN_RAM) + LENGTH(WLAN_RAM) - __SmemLeft;
}

View file

@ -0,0 +1,52 @@
NAME := board_uno-91h
JTAG := jlink
$(NAME)_TYPE := kernel
MODULE := UNO-91H
HOST_ARCH := Cortex-M4
HOST_MCU_FAMILY := rda5981x
$(NAME)_SOURCES := board.c \
hal_pwm.c \
startup_uno-91h.s
GLOBAL_INCLUDES += .
GLOBAL_DEFINES += STDIO_UART=0
GLOBAL_DEFINES += RHINO_CONFIG_TICK_TASK=0 RHINO_CONFIG_WORKQUEUE=0
GLOBAL_DEFINES += AOS_CLI_MINI_SIZE=1
GLOBAL_DEFINES += DELETE_HFILOP_CODE
ifeq ($(shell uname -o), Msys)
CURRENT_TIME = $(shell ${DATE} +%Y%m%d.%H%M)
endif
#CONFIG_SYSINFO_KERNEL_VERSION = AOS-R-1.3.4
CONFIG_SYSINFO_OS_VERSION := $(call get-os-version)
$(warning $(CONFIG_SYSINFO_OS_VERSION))
CONFIG_SYSINFO_PRODUCT_MODEL := ALI_AOS_RDA5981
CONFIG_SYSINFO_DEVICE_NAME := UNO-91H
GLOBAL_CFLAGS += -DSYSINFO_OS_VERSION=\"$(CONFIG_SYSINFO_OS_VERSION)\"
GLOBAL_CFLAGS += -DSYSINFO_PRODUCT_MODEL=\"$(CONFIG_SYSINFO_PRODUCT_MODEL)\"
GLOBAL_CFLAGS += -DSYSINFO_DEVICE_NAME=\"$(CONFIG_SYSINFO_DEVICE_NAME)\"
GLOBAL_CFLAGS += -DSYSINFO_KERNEL_VERSION=\"$(CONFIG_SYSINFO_KERNEL_VERSION)\"
GLOBAL_CFLAGS += -DSYSINFO_APP_VERSION=\"$(CONFIG_SYSINFO_APP_VERSION)\"
GLOBAL_LDFLAGS += -L $(SOURCE_ROOT)/board/uno-91h
$(NAME)_COMPONENTS += framework.uOTA.hal
# Global defines
GLOBAL_DEFINES += $$(if $$(NO_CRLF_STDIO_REPLACEMENT),,CRLF_STDIO_REPLACEMENT)
GLOBAL_CFLAGS += -DRDA5981X -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
GLOBAL_CFLAGS += -DRDA5981A
GLOBAL_LDFLAGS += -T uno-91h.ld
# Extra build target in mico_standard_targets.mk, include bootloader, and copy output file to eclipse debug file (copy_output_for_eclipse)
EXTRA_TARGET_MAKEFILES += $(MAKEFILES_PATH)/aos_standard_targets.mk
EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/gen_crc_bin.mk