mirror of
https://github.com/Ai-Thinker-Open/Ai-Thinker-Open_RTL8710BX_ALIOS_SDK.git
synced 2026-07-17 15:35:38 +00:00
rel_1.6.0 init
This commit is contained in:
guocheng.kgc
shengdong.dsd
commit
27b3e2883d
19359 changed files with 8093121 additions and 0 deletions
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/*
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* Copyright (C) 2015-2017 Alibaba Group Holding Limited
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*/
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#ifndef _ATCMD_CONFIG_PLATFORM_H_
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#define _ATCMD_CONFIG_PLATFORM_H_
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// AT uart
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#define AT_UART_PORT 1
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#endif
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10
Living_SDK/board/stm32l433rc-nucleo/aos/board.h
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10
Living_SDK/board/stm32l433rc-nucleo/aos/board.h
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#define HARDWARE_REVISION "V1.0"
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#define MODEL "STM32L4"
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#ifdef BOOTLOADER
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#define STDIO_UART 0
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#define STDIO_UART_BUADRATE 115200
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#else
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#define STDIO_UART 0
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#define STDIO_UART_BUADRATE 115200
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#endif
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32
Living_SDK/board/stm32l433rc-nucleo/aos/board_partition.c
Normal file
32
Living_SDK/board/stm32l433rc-nucleo/aos/board_partition.c
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#include "hal/soc/soc.h"
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#include <aos/kernel.h>
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/* Logic partition on flash devices */
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hal_logic_partition_t hal_partitions[HAL_PARTITION_MAX];
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void board_init(void)
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{
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hal_partitions[HAL_PARTITION_APPLICATION].partition_owner = HAL_FLASH_EMBEDDED;
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hal_partitions[HAL_PARTITION_APPLICATION].partition_description = "Application";
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hal_partitions[HAL_PARTITION_APPLICATION].partition_start_addr = 0x08000000;
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hal_partitions[HAL_PARTITION_APPLICATION].partition_length = 0x3C000; //240k bytes
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hal_partitions[HAL_PARTITION_APPLICATION].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN;
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hal_partitions[HAL_PARTITION_PARAMETER_1].partition_owner = HAL_FLASH_EMBEDDED;
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hal_partitions[HAL_PARTITION_PARAMETER_1].partition_description = "PARAMETER1";
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hal_partitions[HAL_PARTITION_PARAMETER_1].partition_start_addr = 0x0803C000;
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hal_partitions[HAL_PARTITION_PARAMETER_1].partition_length = 0x1000; // 4k bytes
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hal_partitions[HAL_PARTITION_PARAMETER_1].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN;
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hal_partitions[HAL_PARTITION_PARAMETER_2].partition_owner = HAL_FLASH_EMBEDDED;
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hal_partitions[HAL_PARTITION_PARAMETER_2].partition_description = "PARAMETER2";
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hal_partitions[HAL_PARTITION_PARAMETER_2].partition_start_addr = 0x0803D000;
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hal_partitions[HAL_PARTITION_PARAMETER_2].partition_length = 0x2000; //8k bytes
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hal_partitions[HAL_PARTITION_PARAMETER_2].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN;
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hal_partitions[HAL_PARTITION_PARAMETER_4].partition_owner = HAL_FLASH_EMBEDDED;
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hal_partitions[HAL_PARTITION_PARAMETER_4].partition_description = "PARAMETER4";
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hal_partitions[HAL_PARTITION_PARAMETER_4].partition_start_addr = 0x0803F000;
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hal_partitions[HAL_PARTITION_PARAMETER_4].partition_length = 0x1000; //4k bytes
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hal_partitions[HAL_PARTITION_PARAMETER_4].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN;
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}
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229
Living_SDK/board/stm32l433rc-nucleo/aos/k_config.h
Normal file
229
Living_SDK/board/stm32l433rc-nucleo/aos/k_config.h
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/*
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* Copyright (C) 2015-2017 Alibaba Group Holding Limited
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*/
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#ifndef CONFIG_H
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#define CONFIG_H
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/* chip level conf */
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#ifndef RHINO_CONFIG_LITTLE_ENDIAN
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#define RHINO_CONFIG_LITTLE_ENDIAN 1
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#endif
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#ifndef RHINO_CONFIG_CPU_STACK_DOWN
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#define RHINO_CONFIG_CPU_STACK_DOWN 1
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#endif
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/* kernel feature conf */
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#ifndef RHINO_CONFIG_SEM
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#define RHINO_CONFIG_SEM 1
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#endif
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#ifndef RHINO_CONFIG_QUEUE
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#define RHINO_CONFIG_QUEUE 1
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#endif
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#ifndef RHINO_CONFIG_TASK_SEM
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#define RHINO_CONFIG_TASK_SEM 1
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#endif
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#ifndef RHINO_CONFIG_EVENT_FLAG
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#define RHINO_CONFIG_EVENT_FLAG 1
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#endif
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#ifndef RHINO_CONFIG_TIMER
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#define RHINO_CONFIG_TIMER 1
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#endif
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#ifndef RHINO_CONFIG_BUF_QUEUE
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#define RHINO_CONFIG_BUF_QUEUE 1
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#endif
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#ifndef RHINO_CONFIG_MM_BLK
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#define RHINO_CONFIG_MM_BLK 1
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#endif
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#ifndef RHINO_CONFIG_MM_DEBUG
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#define RHINO_CONFIG_MM_DEBUG 1
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#endif
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#ifndef RHINO_CONFIG_MM_TLF
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#define RHINO_CONFIG_MM_TLF 1
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#endif
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#ifndef RHINO_CONFIG_MM_TLF_BLK_SIZE
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#define RHINO_CONFIG_MM_TLF_BLK_SIZE 8192
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#endif
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#define K_MM_STATISTIC 1
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#ifndef RHINO_CONFIG_MM_MAXMSIZEBIT
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#define RHINO_CONFIG_MM_MAXMSIZEBIT 19
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#endif
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#ifndef RHINO_CONFIG_GCC_RETADDR
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#define RHINO_CONFIG_GCC_RETADDR 1
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#endif
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#ifndef RHINO_CONFIG_MM_LEAKCHECK
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#define RHINO_CONFIG_MM_LEAKCHECK 0
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#endif
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#ifndef RHINO_CONFIG_RINGBUF_VENDOR
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#define RHINO_CONFIG_RINGBUF_VENDOR 0
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#endif
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#ifndef RHINO_CONFIG_KOBJ_SET
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#define RHINO_CONFIG_KOBJ_SET 1
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#endif
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/* kernel task conf */
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#ifndef RHINO_CONFIG_TASK_SUSPEND
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#define RHINO_CONFIG_TASK_SUSPEND 1
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#endif
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#ifndef RHINO_CONFIG_TASK_INFO
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#define RHINO_CONFIG_TASK_INFO 1
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#endif
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#ifndef RHINO_CONFIG_TASK_DEL
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#define RHINO_CONFIG_TASK_DEL 1
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#endif
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#ifndef RHINO_CONFIG_TASK_STACK_CUR_CHECK
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#define RHINO_CONFIG_TASK_STACK_CUR_CHECK 1
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#endif
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#ifndef RHINO_CONFIG_TASK_WAIT_ABORT
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#define RHINO_CONFIG_TASK_WAIT_ABORT 1
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#endif
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#ifndef RHINO_CONFIG_TASK_STACK_OVF_CHECK
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#define RHINO_CONFIG_TASK_STACK_OVF_CHECK 1
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#endif
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#ifndef RHINO_CONFIG_SCHED_RR
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#define RHINO_CONFIG_SCHED_RR 1
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#endif
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#ifndef RHINO_CONFIG_TIME_SLICE_DEFAULT
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#define RHINO_CONFIG_TIME_SLICE_DEFAULT 50
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#endif
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#ifndef RHINO_CONFIG_PRI_MAX
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#define RHINO_CONFIG_PRI_MAX 62
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#endif
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#ifndef RHINO_CONFIG_USER_PRI_MAX
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#define RHINO_CONFIG_USER_PRI_MAX (RHINO_CONFIG_PRI_MAX - 2)
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#endif
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/* kernel workqueue conf */
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#ifndef RHINO_CONFIG_WORKQUEUE
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#define RHINO_CONFIG_WORKQUEUE 1
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#endif
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#ifndef RHINO_CONFIG_WORKQUEUE_STACK_SIZE
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#define RHINO_CONFIG_WORKQUEUE_STACK_SIZE 768
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#endif
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/* kernel mm_region conf */
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#ifndef RHINO_CONFIG_MM_REGION_MUTEX
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#define RHINO_CONFIG_MM_REGION_MUTEX 0
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#endif
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/* kernel timer&tick conf */
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#ifndef RHINO_CONFIG_HW_COUNT
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#define RHINO_CONFIG_HW_COUNT 0
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#endif
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#ifndef RHINO_CONFIG_TICK_TASK
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#define RHINO_CONFIG_TICK_TASK 0
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#endif
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#if (RHINO_CONFIG_TICK_TASK > 0)
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#ifndef RHINO_CONFIG_TICK_TASK_STACK_SIZE
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#define RHINO_CONFIG_TICK_TASK_STACK_SIZE 256
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#endif
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#ifndef RHINO_CONFIG_TICK_TASK_PRI
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#define RHINO_CONFIG_TICK_TASK_PRI 1
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#endif
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#endif
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#ifndef RHINO_CONFIG_TICKLESS
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#define RHINO_CONFIG_TICKLESS 0
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#endif
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#ifndef RHINO_CONFIG_TICKS_PER_SECOND
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#define RHINO_CONFIG_TICKS_PER_SECOND 100
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#endif
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/* must be 2^n size!, such as 1, 2, 4, 8, 16,32, etc....... */
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#ifndef RHINO_CONFIG_TICK_HEAD_ARRAY
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#define RHINO_CONFIG_TICK_HEAD_ARRAY 8
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#endif
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/*must reserve enough stack size for timer cb will consume*/
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#ifndef RHINO_CONFIG_TIMER_TASK_STACK_SIZE
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#define RHINO_CONFIG_TIMER_TASK_STACK_SIZE 300
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#endif
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#ifndef RHINO_CONFIG_TIMER_RATE
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#define RHINO_CONFIG_TIMER_RATE 1
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#endif
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#ifndef RHINO_CONFIG_TIMER_TASK_PRI
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#define RHINO_CONFIG_TIMER_TASK_PRI 5
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#endif
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/* kernel intrpt conf */
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#ifndef RHINO_CONFIG_INTRPT_STACK_REMAIN_GET
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#define RHINO_CONFIG_INTRPT_STACK_REMAIN_GET 0
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#endif
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#ifndef RHINO_CONFIG_INTRPT_STACK_OVF_CHECK
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#define RHINO_CONFIG_INTRPT_STACK_OVF_CHECK 0
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#endif
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#ifndef RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL
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#define RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL 188u
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#endif
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#ifndef RHINO_CONFIG_INTRPT_GUARD
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#define RHINO_CONFIG_INTRPT_GUARD 0
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#endif
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/* kernel dyn alloc conf */
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#ifndef RHINO_CONFIG_KOBJ_DYN_ALLOC
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#define RHINO_CONFIG_KOBJ_DYN_ALLOC 1
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#endif
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#if (RHINO_CONFIG_KOBJ_DYN_ALLOC > 0)
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#ifndef RHINO_CONFIG_K_DYN_QUEUE_MSG
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#define RHINO_CONFIG_K_DYN_QUEUE_MSG 30
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#endif
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#ifndef RHINO_CONFIG_K_DYN_TASK_STACK
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#define RHINO_CONFIG_K_DYN_TASK_STACK 256
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#endif
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#ifndef RHINO_CONFIG_K_DYN_MEM_TASK_PRI
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#define RHINO_CONFIG_K_DYN_MEM_TASK_PRI 6
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#endif
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#endif
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/* kernel idle conf */
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#ifndef RHINO_CONFIG_IDLE_TASK_STACK_SIZE
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#define RHINO_CONFIG_IDLE_TASK_STACK_SIZE 200
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#endif
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/* kernel hook conf */
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#ifndef RHINO_CONFIG_USER_HOOK
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#define RHINO_CONFIG_USER_HOOK 0
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#endif
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/* kernel stats conf */
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#ifndef RHINO_CONFIG_SYSTEM_STATS
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#define RHINO_CONFIG_SYSTEM_STATS 1
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#endif
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#ifndef RHINO_CONFIG_DISABLE_SCHED_STATS
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#define RHINO_CONFIG_DISABLE_SCHED_STATS 0
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#endif
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#ifndef RHINO_CONFIG_DISABLE_INTRPT_STATS
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#define RHINO_CONFIG_DISABLE_INTRPT_STATS 0
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#endif
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#ifndef RHINO_CONFIG_CPU_USAGE_STATS
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#define RHINO_CONFIG_CPU_USAGE_STATS 0
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#endif
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#ifndef RHINO_CONFIG_CPU_USAGE_TASK_PRI
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#define RHINO_CONFIG_CPU_USAGE_TASK_PRI (RHINO_CONFIG_PRI_MAX - 2)
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#endif
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#ifndef RHINO_CONFIG_TASK_SCHED_STATS
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#define RHINO_CONFIG_TASK_SCHED_STATS 0
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#endif
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#ifndef RHINO_CONFIG_CPU_USAGE_TASK_STACK
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#define RHINO_CONFIG_CPU_USAGE_TASK_STACK 256
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#endif
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#ifndef RHINO_CONFIG_CPU_NUM
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#define RHINO_CONFIG_CPU_NUM 1
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#endif
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/* kernel trace conf */
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#ifndef RHINO_CONFIG_TRACE
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#define RHINO_CONFIG_TRACE 0
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#endif
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#ifndef RHINO_CONFIG_SYSTEM_STACK_SIZE
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#define RHINO_CONFIG_SYSTEM_STACK_SIZE 0x400
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#endif
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#endif /* CONFIG_H */
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108
Living_SDK/board/stm32l433rc-nucleo/aos/soc_init.c
Normal file
108
Living_SDK/board/stm32l433rc-nucleo/aos/soc_init.c
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/*
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* Copyright (C) 2015-2017 Alibaba Group Holding Limited
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*/
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#include <stdint.h>
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#include "hal/hal.h"
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#include "k_config.h"
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#define main st_main
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#include "Src/main.c"
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#if defined (__CC_ARM) && defined(__MICROLIB)
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#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
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#define GETCHAR_PROTOTYPE int fgetc(FILE *f)
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#elif defined(__ICCARM__)
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#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
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#define GETCHAR_PROTOTYPE int fgetc(FILE *f)
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#else
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/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf
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set to 'Yes') calls __io_putchar() */
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#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
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#define GETCHAR_PROTOTYPE int __io_getchar(void)
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#endif /* defined (__CC_ARM) && defined(__MICROLIB) */
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uart_dev_t uart_0;
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static void stduart_init(void);
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void stm32_soc_init(void)
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{
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HAL_Init();
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/* Configure the system clock */
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SystemClock_Config();
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/**Configure the Systick interrupt time
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*/
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HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/RHINO_CONFIG_TICKS_PER_SECOND);
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/* PendSV_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(PendSV_IRQn, 0x0f, 0);
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/*default uart init*/
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stduart_init();
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}
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static void stduart_init(void)
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{
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uart_0.port = STDIO_UART;
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uart_0.config.baud_rate = 115200;
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uart_0.config.data_width = DATA_WIDTH_8BIT;
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uart_0.config.flow_control = FLOW_CONTROL_DISABLED;
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uart_0.config.mode = MODE_TX_RX;
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uart_0.config.parity = NO_PARITY;
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uart_0.config.stop_bits = STOP_BITS_1;
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hal_uart_init(&uart_0);
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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HAL_IncTick();
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krhino_intrpt_enter();
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krhino_tick_proc();
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krhino_intrpt_exit();
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}
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/**
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* @brief Retargets the C library printf function to the USART.
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* @param None
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* @retval None
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*/
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PUTCHAR_PROTOTYPE
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{
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if (ch == '\n') {
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//hal_uart_send(&console_uart, (void *)"\r", 1, 30000);
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hal_uart_send(&uart_0, (void *)"\r", 1, 30000);
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}
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hal_uart_send(&uart_0, &ch, 1, 30000);
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return ch;
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}
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/**
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* @brief Retargets the C library scanf function to the USART.
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* @param None
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* @retval None
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*/
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GETCHAR_PROTOTYPE
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{
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/* Place your implementation of fgetc here */
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/* e.g. readwrite a character to the USART2 and Loop until the end of transmission */
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uint8_t ch = EOF;
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int32_t ret = -1;
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uint32_t recv_size;
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ret = hal_uart_recv_II(&uart_0, &ch, 1, &recv_size, HAL_WAIT_FOREVER);
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if (ret == 0) {
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return ch;
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} else {
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return -1;
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}
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}
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