mirror of
https://github.com/Ai-Thinker-Open/Ai-Thinker-Open_RTL8710BX_ALIOS_SDK.git
synced 2025-07-31 19:31:05 +00:00
rel_1.6.0 init
This commit is contained in:
guocheng.kgc
shengdong.dsd
commit
27b3e2883d
19359 changed files with 8093121 additions and 0 deletions
209
Living_SDK/board/mx1270/startup/board.c
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209
Living_SDK/board/mx1270/startup/board.c
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@ -0,0 +1,209 @@
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#include <stdio.h>
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#include "board.h"
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#include "lega_cm4.h"
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#include "lega_common.h"
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#include "systick_delay.h"
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#include "lega_uart.h"
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#include "lega_wdg.h"
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#include "lega_flash.h"
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#include "lega_common.h"
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#include "lega_wlan_api.h"
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#define EFUSE_SEL 0xd6
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#define SEL_VIRGIN 0x00
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#define SEL_MAC1 0x01
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#define SEL_MAC2 0x03
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#define SYS_APP_VERSION_SEG __attribute__((section("app_version_sec")))
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SYS_APP_VERSION_SEG const char app_version[] = SYSINFO_APP_VERSION;
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extern hal_wifi_module_t sim_aos_wifi_lega;
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extern void NVIC_init();
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extern int soc_pre_init(void);
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#ifdef ALIOS_SUPPORT
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extern void ota_roll_back_pro(void);
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#endif
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static void efuse_read(uint8_t *data,uint8_t addr,uint8_t len)
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{
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for (int i = 0; i < len; i++)
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{
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data[i] = lega_efuse_byte_read(addr + i);
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}
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}
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void efuse_info_update_cb(efuse_info_t *efuse_info)
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{
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printf("efuse_info_update\r\n");
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if (lega_efuse_byte_read(EFUSE_SEL) == SEL_MAC1)
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{
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efuse_read(efuse_info->mac_addr2,0x90,6);
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}else if(lega_efuse_byte_read(EFUSE_SEL) == SEL_MAC2)
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{
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efuse_read(efuse_info->mac_addr2,0xC8,6);
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}else{
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printf("empty mac\r\n");
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}
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efuse_read(&(efuse_info->freq_err),0x96,1);
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efuse_read(&(efuse_info->tmmt1),0x97,1);
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efuse_read(&(efuse_info->tmmt2),0x98,1);
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efuse_read(efuse_info->cal_tx_pwr2,0xAC,6);
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efuse_read(efuse_info->cal_tx_evm2,0xB5,6);
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efuse_read(efuse_info->cus_tx_pwr,0x99,19);
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efuse_read(efuse_info->cus_tx_total_pwr,0xB2,3);
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}
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static void wifi_common_init()
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{
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printf("start------wifi_hal\r\n");
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lega_wlan_register_efuse_info_update_cb(efuse_info_update_cb);
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hal_wifi_register_module(&sim_aos_wifi_lega);
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hal_wifi_init();
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}
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/***********************************************************
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* init IRQ, set priority and enable IRQ
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*
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**********************************************************/
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void NVIC_init()
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{
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//set irq priority, default set configLIBRARY_NORMAL_INTERRUPT_PRIORITY
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NVIC_SetPriority(UART0_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(UART1_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(UART2_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(CEVA_RW_IP_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(D_APLL_UNLOCK_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(D_SX_UNLOCK_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(SLEEP_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(WDG_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(FLASH_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(GPIO_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(TIMER_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(CRYPTOCELL310_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(DMA_CTRL_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(SPI0_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(SPI1_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(SPI2_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(I2C0_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(I2C1_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(SDIO_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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NVIC_SetPriority(PLF_WAKEUP_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
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}
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#ifdef ALIOS_SUPPORT
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uart_dev_t uart_0;
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void hal_uart1_callback_handler(char ch);
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#endif
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void uart_init(void)
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{
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#ifdef ALIOS_SUPPORT
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//uart_0.port=LEGA_UART1_INDEX;
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uart_0.port = PORT_UART_STD; /*logic port*/
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#ifdef HIGHFREQ_MCU160_SUPPORT
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uart_0.config.baud_rate=UART_BAUDRATE_1000000;
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#else
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uart_0.config.baud_rate=UART_BAUDRATE_115200;
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#endif
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uart_0.config.data_width = DATA_8BIT;
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uart_0.config.flow_control = FLOW_CTRL_DISABLED;
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uart_0.config.parity = PARITY_NO;
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uart_0.config.stop_bits = STOP_1BIT;
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//uart_0.priv = (void *)(hal_uart1_callback_handler);
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hal_uart_init(&uart_0);
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#endif
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}
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#ifdef HIGHFREQ_MCU160_SUPPORT
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//all peripheral reinit code should place here
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void peripheral_reinit(void)
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{
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uart_init();
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}
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#endif
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#ifdef SYSTEM_RECOVERY
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lega_wdg_dev_t lega_wdg;
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void wdg_init(void)
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{
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lega_wdg.port = 0;
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lega_wdg.config.timeout = WDG_TIMEOUT_MS;
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lega_wdg_init(&lega_wdg);
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}
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#endif
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/***********************************************************
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* init device, such as irq, system clock, uart
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**********************************************************/
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uint32_t system_bus_clk = SYSTEM_BUS_CLOCK_INIT;
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uint32_t system_core_clk = SYSTEM_CORE_CLOCK_INIT;
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void lega_devInit()
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{
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#ifdef _SPI_FLASH_ENABLE_
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lega_flash_init();
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#endif
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#ifdef ALIOS_SUPPORT
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ota_roll_back_pro();
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#endif
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#ifdef SYSTEM_RECOVERY
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wdg_init();
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#endif
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NVIC_init();
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#ifdef DCDC_PFMMODE_CLOSE
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lega_drv_close_dcdc_pfm();
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#endif
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lega_drv_rco_cal();
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SysTick_Config(SYSTEM_CORE_CLOCK/RHINO_CONFIG_TICKS_PER_SECOND);
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//init uart
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uart_init();
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#ifdef CFG_MIMO_UF
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//config to support smartconfig in MIMO scenario
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//lega_wlan_smartconfig_mimo_enable();
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#endif
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#ifdef ALIOS_SUPPORT
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hw_start_hal();
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#endif
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}
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/**************************************************
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* after task run use board_sys_init to init board
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**************************************************/
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int board_after_init(void)
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{
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lega_devInit();
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//hw_start_hal();
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//NVIC_init();
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tcpip_init( NULL, NULL );
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wifi_common_init();
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//init_uwifi();
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return 0;
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}
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/**************************************************
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* before task run use board_sys_init to init board
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**************************************************/
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void board_init(void)
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{
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#ifdef LEGA_A0V1
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// Clear RFA Only Mode
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REG_PMU_CTRL &= ~ENABLE_RFA_DEBUG;
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REG_WR(SYS_REG_BASE_FLASH_CLK, 0x01); //26MHz flash,default 13MHz
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#endif
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flash_partition_init();
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}
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82
Living_SDK/board/mx1270/startup/startup.c
Normal file
82
Living_SDK/board/mx1270/startup/startup.c
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@ -0,0 +1,82 @@
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/*
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* Copyright (C) 2015-2019 Alibaba Group Holding Limited
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*/
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#include "aos/init.h"
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#include "board.h"
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#include <k_api.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "lega_cm4.h"
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#include "systick_delay.h"
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/*
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main task stask size(byte)
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*/
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#define OS_MAIN_TASK_STACK (4096/4)
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#define OS_MAIN_TASK_PRI 32
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/* For user config
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kinit.argc = 0;
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kinit.argv = NULL;
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kinit.cli_enable = 1;
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*/
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static kinit_t kinit = {0, NULL, 1};
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static ktask_t *g_main_task;
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extern void board_init(void);
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static void sys_init(void)
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{
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board_after_init();
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/*aos components init including middleware and protocol and so on !*/
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aos_kernel_init(&kinit);
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}
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void HCLK_SW_IRQHandler(void)
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{
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SYS_CRM_CLR_HCLK_REC = 0x1;
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}
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void delay_nop(unsigned int dly)
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{
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volatile unsigned int i;
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for(i=dly; i>0; i--)
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{
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}
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}
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void ahb_sync_brid_open(void)
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{
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unsigned int is_using_sync_down = (REG_AHB_BUS_CTRL & (0x1<<1));
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if(!is_using_sync_down)
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{
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REG_AHB_BUS_CTRL |= (0x1<<1); //0x40000A90 bit1 sw_use_hsync
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__enable_irq();
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NVIC_EnableIRQ(24);
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__asm volatile("DSB");
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__asm volatile("WFI");
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__asm volatile("ISB");
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delay_nop(50);
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}
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}
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int main(void)
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{
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ahb_sync_brid_open();
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lega_flash_alg_cache_flush();
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|
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board_init();
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/*kernel init, malloc can use after this!*/
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krhino_init();
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/*main task to run */
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krhino_task_dyn_create(&g_main_task, "main_task", 0, OS_MAIN_TASK_PRI, 0, OS_MAIN_TASK_STACK, (task_entry_t)sys_init, 1);
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|
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/*kernel start schedule!*/
|
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krhino_start();
|
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|
||||
/*never run here*/
|
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return 0;
|
||||
}
|
||||
244
Living_SDK/board/mx1270/startup/startup_cm4.S
Normal file
244
Living_SDK/board/mx1270/startup/startup_cm4.S
Normal file
|
|
@ -0,0 +1,244 @@
|
|||
|
||||
/************************** startup_cm4.s **********************************************/
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
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.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
/* bl __libc_init_array */
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word intc_irq /* intc_irq CEVA RW IP Interrupt */
|
||||
.word SLEEP_IRQHandler /* Sleep Wake-Up Interrupt */
|
||||
.word WDG_IRQHandler /* Window WatchDog */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word GPIO_IRQHandler /* GPIO */
|
||||
.word TIMER_IRQHandler /* Timer interrupt */
|
||||
.word CRYPTOCELL310_IRQHandler /* CryptoCell 310 Interrupt */
|
||||
.word DMA_CTRL_IRQHandler /* Generic DMA Ctrl Interrupt */
|
||||
.word UART0_IRQHandler /* UART0 Interrupt */
|
||||
.word UART1_IRQHandler /* UART1 Interrupt */
|
||||
.word UART2_IRQHandler /* UART2 Interrupt */
|
||||
.word SPI0_IRQHandler /* SPI0 */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word I2C0_IRQHandler /* I2C0 */
|
||||
.word I2C1_IRQHandler /* I2C1 */
|
||||
.word SDIO_IRQHandler /* SDIO Combined Interrupt */
|
||||
.word D_APLL_UNLOCK_IRQHandler /* RF added: D_APLL_UNLOCK */
|
||||
.word D_SX_UNLOCK_IRQHandler /* RF added: D_SX_UNLOCK */
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
.word PLATFORM_WAKEUP_IRQHandler /*!< WiFi SOC Wake-Up Interrupt */
|
||||
.word HCLK_SW_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak intc_irq
|
||||
.thumb_set intc_irq,Default_Handler
|
||||
|
||||
.weak SLEEP_IRQHandler
|
||||
.thumb_set SLEEP_IRQHandler,Default_Handler
|
||||
|
||||
.weak WDG_IRQHandler
|
||||
.thumb_set WDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak GPIO_IRQHandler
|
||||
.thumb_set GPIO_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIMER_IRQHandler
|
||||
.thumb_set TIMER_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRYPTOCELL310_IRQHandler
|
||||
.thumb_set CRYPTOCELL310_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA_CTRL_IRQHandler
|
||||
.thumb_set DMA_CTRL_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART0_IRQHandler
|
||||
.thumb_set UART0_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART1_IRQHandler
|
||||
.thumb_set UART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART2_IRQHandler
|
||||
.thumb_set UART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI0_IRQHandler
|
||||
.thumb_set SPI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C0_IRQHandler
|
||||
.thumb_set I2C0_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler,Default_Handler
|
||||
|
||||
.weak D_APLL_UNLOCK_IRQHandler
|
||||
.thumb_set D_APLL_UNLOCK_IRQHandler,Default_Handler
|
||||
|
||||
.weak D_SX_UNLOCK_IRQHandler
|
||||
.thumb_set D_SX_UNLOCK_IRQHandler,Default_Handler
|
||||
|
||||
.weak PLATFORM_WAKEUP_IRQHandler
|
||||
.thumb_set PLATFORM_WAKEUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak HCLK_SW_IRQHandler
|
||||
.thumb_set HCLK_SW_IRQHandler,Default_Handler
|
||||
|
||||
|
||||
/*****************END OF FILE*********************/
|
||||
Loading…
Add table
Add a link
Reference in a new issue