rel_1.6.0 init

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guocheng.kgc 2020-06-18 20:06:52 +08:00 committed by shengdong.dsd
commit 27b3e2883d
19359 changed files with 8093121 additions and 0 deletions

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include "hal/soc/soc.h"
#include <aos/kernel.h>
#include <aos/aos.h>
/* Logic partition on flash devices */
const hal_logic_partition_t hal_partitions[] =
{
[HAL_PARTITION_BOOTLOADER] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "Bootloader",
.partition_start_addr = 0x0000B000,
.partition_length = 0x8000, //32k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
},
[HAL_PARTITION_APPLICATION] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "Application",
.partition_start_addr = 0x13000,
.partition_length = 0xB5000, //724k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_1] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER1",
.partition_start_addr = 0x000C8000,
.partition_length = 0x4000, // 16k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_2] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER2",
.partition_start_addr = 0x000CC000,
.partition_length = 0x4000, // 16k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
#if 0
[HAL_PARTITION_ATE] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "ATE",
.partition_start_addr = 0x000D0000,
.partition_length = 0x40000, //256k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
#endif
[HAL_PARTITION_OTA_TEMP] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "OTA Storage",
.partition_start_addr = 0x00110000,
.partition_length = 0xB5000, //724k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_3] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER3",
.partition_start_addr = 0x001C5000,
.partition_length = 0x1000, // 4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[HAL_PARTITION_PARAMETER_4] =
{
.partition_owner = HAL_FLASH_EMBEDDED,
.partition_description = "PARAMETER4",
.partition_start_addr = 0x001C6000,
.partition_length = 0x1000,// 4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
};
#define KEY_AWSS 12
static uint64_t awss_time = 0;
static gpio_dev_t gpio_key_awss;
static void key_poll_func(void *arg)
{
uint32_t level;
uint64_t diff;
hal_gpio_input_get(&gpio_key_awss, &level);
if (level == 0) {
aos_post_delayed_action(10, key_poll_func, NULL);
} else {
diff = aos_now_ms() - awss_time;
if (diff > 6000) { /*long long press */
awss_time = 0;
aos_post_event(EV_KEY, CODE_BOOT, VALUE_KEY_LLTCLICK);
} else if (diff > 2000) { /* long press */
awss_time = 0;
aos_post_event(EV_KEY, CODE_BOOT, VALUE_KEY_LTCLICK);
} else if (diff > 40) { /* short press */
awss_time = 0;
aos_post_event(EV_KEY, CODE_BOOT, VALUE_KEY_CLICK);
} else {
aos_post_delayed_action(10, key_poll_func, NULL);
}
}
}
static void key_proc_work(void *arg)
{
aos_schedule_call(key_poll_func, NULL);
}
static void handle_awss_key(void *arg)
{
uint32_t gpio_value;
hal_gpio_input_get(&gpio_key_awss, &gpio_value);
if (gpio_value == 0 && awss_time == 0) {
awss_time = aos_now_ms();
aos_loop_schedule_work(0, key_proc_work, NULL, NULL, NULL);
}
}
void board_init(void)
{
gpio_key_awss.port = KEY_AWSS;
gpio_key_awss.config = INPUT_PULL_UP;
hal_gpio_init(&gpio_key_awss);
hal_gpio_enable_irq(&gpio_key_awss, IRQ_TRIGGER_FALLING_EDGE, handle_awss_key, NULL);
}

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
#define HARDWARE_REVISION "V1.0"
#define MODEL "EMW5080"
#ifdef BOOTLOADER
#define STDIO_UART 0
#define STDIO_UART_BUADRATE 921600
#else
#define STDIO_UART 0
#define STDIO_UART_BUADRATE 921600
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
#define MICO_UNUSED 0xFF
typedef enum
{
MICO_SYS_LED,
MICO_RF_LED,
BOOT_SEL,
MFG_SEL,
EasyLink_BUTTON,
MICO_GPIO_1 ,
MICO_GPIO_2,
//MICO_GPIO_3,
MICO_GPIO_4,
MICO_GPIO_5,
MICO_GPIO_6,
MICO_GPIO_7,
MICO_GPIO_8,
MICO_GPIO_9,
MICO_GPIO_10,
//MICO_GPIO_11,
MICO_GPIO_12,
MICO_GPIO_13,
MICO_GPIO_14,
//MICO_GPIO_15,
//MICO_GPIO_16,
//MICO_GPIO_17,
MICO_GPIO_18,
MICO_GPIO_19,
MICO_GPIO_20,
MICO_GPIO_21,
MICO_GPIO_22,
MICO_GPIO_23,
//MICO_GPIO_24,
//MICO_GPIO_25,
//MICO_GPIO_26,
//MICO_GPIO_27,
//MICO_GPIO_28,
MICO_GPIO_29,
//MICO_GPIO_30,
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
MICO_GPIO_NONE,
} mico_gpio_t;
typedef enum
{
MICO_SPI_1,
MICO_SPI_2,
MICO_SPI_3,
MICO_SPI_MAX, /* Denotes the total number of SPI port aliases. Not a valid SPI alias */
MICO_SPI_NONE,
} mico_spi_t;
typedef enum
{
MICO_I2C_1,
MICO_I2C_2,
MICO_I2C_MAX, /* Denotes the total number of I2C port aliases. Not a valid I2C alias */
MICO_I2C_NONE,
} mico_i2c_t;
typedef enum
{
MICO_PWM_1,
MICO_PWM_2,
MICO_PWM_3,
MICO_PWM_4,
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
MICO_PWM_NONE,
} mico_pwm_t;
typedef enum
{
MICO_ADC_1,
MICO_ADC_2,
MICO_ADC_3,
MICO_ADC_MAX, /* Denotes the total number of ADC port aliases. Not a valid ADC alias */
MICO_ADC_NONE,
} mico_adc_t;
typedef enum
{
MICO_UART_1,
MICO_UART_2,
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
MICO_UART_NONE,
} mico_uart_t;
typedef enum
{
MICO_FLASH_EMBEDDED,
MICO_FLASH_SPI,
MICO_FLASH_MAX,
MICO_FLASH_NONE,
} mico_flash_t;
typedef enum
{
MICO_PARTITION_USER_MAX
} mico_user_partition_t;
#ifdef BOOTLOADER
#define STDIO_UART MICO_UART_NONE
#define STDIO_UART_BAUDRATE (115200)
#else
#define STDIO_UART MICO_UART_NONE
#define STDIO_UART_BAUDRATE (115200)
#endif
#define UART_FOR_APP MICO_UART_1
#define MFG_TEST MICO_UART_1
#define CLI_UART MICO_UART_1
/* Components connected to external I/Os*/
#define Standby_SEL (MICO_GPIO_29)
/* I/O connection <-> Peripheral Connections */
#define MICO_I2C_CP (MICO_I2C_1)
//#define USE_MICO_SPI_FLASH
#define MICO_FLASH_FOR_PARA MICO_FLASH_SPI
#define PARA_START_ADDRESS (uint32_t)0x00000020
#define PARA_END_ADDRESS (uint32_t)0x00003FFF
#define PARA_FLASH_SIZE (PARA_END_ADDRESS - PARA_START_ADDRESS + 1) /* 4k bytes*/
#ifdef __cplusplus
} /*extern "C" */
#endif

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/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef CONFIG_H
#define CONFIG_H
/* chip level conf */
#ifndef RHINO_CONFIG_LITTLE_ENDIAN
#define RHINO_CONFIG_LITTLE_ENDIAN 1
#endif
#ifndef RHINO_CONFIG_CPU_STACK_DOWN
#define RHINO_CONFIG_CPU_STACK_DOWN 1
#endif
/* kernel feature conf */
#ifndef RHINO_CONFIG_SEM
#define RHINO_CONFIG_SEM 1
#endif
#ifndef RHINO_CONFIG_QUEUE
#define RHINO_CONFIG_QUEUE 1
#endif
#ifndef RHINO_CONFIG_TASK_SEM
#define RHINO_CONFIG_TASK_SEM 1
#endif
#ifndef RHINO_CONFIG_EVENT_FLAG
#define RHINO_CONFIG_EVENT_FLAG 1
#endif
#ifndef RHINO_CONFIG_TIMER
#define RHINO_CONFIG_TIMER 1
#endif
#ifndef RHINO_CONFIG_BUF_QUEUE
#define RHINO_CONFIG_BUF_QUEUE 1
#endif
#ifndef RHINO_CONFIG_MM_BLK
#define RHINO_CONFIG_MM_BLK 1
#endif
#ifndef RHINO_CONFIG_MM_DEBUG
#define RHINO_CONFIG_MM_DEBUG 1
#endif
#ifndef RHINO_CONFIG_MM_TLF
#define RHINO_CONFIG_MM_TLF 1
#endif
#ifndef RHINO_CONFIG_MM_TLF_BLK_SIZE
#define RHINO_CONFIG_MM_TLF_BLK_SIZE 8192
#endif
#define K_MM_STATISTIC 1
#ifndef RHINO_CONFIG_MM_MAXMSIZEBIT
#define RHINO_CONFIG_MM_MAXMSIZEBIT 19
#endif
#ifndef RHINO_CONFIG_GCC_RETADDR
#define RHINO_CONFIG_GCC_RETADDR 1
#endif
#ifndef RHINO_CONFIG_MM_LEAKCHECK
#define RHINO_CONFIG_MM_LEAKCHECK 1
#endif
#ifndef RHINO_CONFIG_RINGBUF_VENDOR
#define RHINO_CONFIG_RINGBUF_VENDOR 0
#endif
#ifndef RHINO_CONFIG_KOBJ_SET
#define RHINO_CONFIG_KOBJ_SET 1
#endif
/* kernel task conf */
#ifndef RHINO_CONFIG_TASK_SUSPEND
#define RHINO_CONFIG_TASK_SUSPEND 1
#endif
#ifndef RHINO_CONFIG_TASK_INFO
#define RHINO_CONFIG_TASK_INFO 1
#endif
#ifndef RHINO_CONFIG_TASK_DEL
#define RHINO_CONFIG_TASK_DEL 1
#endif
#ifndef RHINO_CONFIG_TASK_STACK_CUR_CHECK
#define RHINO_CONFIG_TASK_STACK_CUR_CHECK 1
#endif
#ifndef RHINO_CONFIG_TASK_WAIT_ABORT
#define RHINO_CONFIG_TASK_WAIT_ABORT 1
#endif
#ifndef RHINO_CONFIG_TASK_STACK_OVF_CHECK
#define RHINO_CONFIG_TASK_STACK_OVF_CHECK 1
#endif
#ifndef RHINO_CONFIG_SCHED_RR
#define RHINO_CONFIG_SCHED_RR 1
#endif
#ifndef RHINO_CONFIG_TIME_SLICE_DEFAULT
#define RHINO_CONFIG_TIME_SLICE_DEFAULT 50
#endif
#ifndef RHINO_CONFIG_PRI_MAX
#define RHINO_CONFIG_PRI_MAX 62
#endif
#ifndef RHINO_CONFIG_USER_PRI_MAX
#define RHINO_CONFIG_USER_PRI_MAX (RHINO_CONFIG_PRI_MAX - 2)
#endif
/* kernel workqueue conf */
#ifndef RHINO_CONFIG_WORKQUEUE
#define RHINO_CONFIG_WORKQUEUE 1
#endif
#ifndef RHINO_CONFIG_WORKQUEUE_STACK_SIZE
#define RHINO_CONFIG_WORKQUEUE_STACK_SIZE 768
#endif
/* kernel mm_region conf */
#ifndef RHINO_CONFIG_MM_REGION_MUTEX
#define RHINO_CONFIG_MM_REGION_MUTEX 0
#endif
/* kernel timer&tick conf */
#ifndef RHINO_CONFIG_HW_COUNT
#define RHINO_CONFIG_HW_COUNT 0
#endif
#ifndef RHINO_CONFIG_TICK_TASK
#define RHINO_CONFIG_TICK_TASK 0
#endif
#if (RHINO_CONFIG_TICK_TASK > 0)
#ifndef RHINO_CONFIG_TICK_TASK_STACK_SIZE
#define RHINO_CONFIG_TICK_TASK_STACK_SIZE 256
#endif
#ifndef RHINO_CONFIG_TICK_TASK_PRI
#define RHINO_CONFIG_TICK_TASK_PRI 1
#endif
#endif
#ifndef RHINO_CONFIG_TICKLESS
#define RHINO_CONFIG_TICKLESS 0
#endif
#ifndef RHINO_CONFIG_TICKS_PER_SECOND
#define RHINO_CONFIG_TICKS_PER_SECOND 1000
#endif
/* must be 2^n size!, such as 1, 2, 4, 8, 16,32, etc....... */
#ifndef RHINO_CONFIG_TICK_HEAD_ARRAY
#define RHINO_CONFIG_TICK_HEAD_ARRAY 8
#endif
/*must reserve enough stack size for timer cb will consume*/
#ifndef RHINO_CONFIG_TIMER_TASK_STACK_SIZE
#define RHINO_CONFIG_TIMER_TASK_STACK_SIZE 300
#endif
#ifndef RHINO_CONFIG_TIMER_RATE
#define RHINO_CONFIG_TIMER_RATE 1
#endif
#ifndef RHINO_CONFIG_TIMER_TASK_PRI
#define RHINO_CONFIG_TIMER_TASK_PRI 5
#endif
/* kernel intrpt conf */
#ifndef RHINO_CONFIG_INTRPT_STACK_REMAIN_GET
#define RHINO_CONFIG_INTRPT_STACK_REMAIN_GET 0
#endif
#ifndef RHINO_CONFIG_INTRPT_STACK_OVF_CHECK
#define RHINO_CONFIG_INTRPT_STACK_OVF_CHECK 0
#endif
#ifndef RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL
#define RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL 188u
#endif
#ifndef RHINO_CONFIG_INTRPT_GUARD
#define RHINO_CONFIG_INTRPT_GUARD 0
#endif
/* kernel dyn alloc conf */
#ifndef RHINO_CONFIG_KOBJ_DYN_ALLOC
#define RHINO_CONFIG_KOBJ_DYN_ALLOC 1
#endif
#if (RHINO_CONFIG_KOBJ_DYN_ALLOC > 0)
#ifndef RHINO_CONFIG_K_DYN_QUEUE_MSG
#define RHINO_CONFIG_K_DYN_QUEUE_MSG 30
#endif
#ifndef RHINO_CONFIG_K_DYN_TASK_STACK
#define RHINO_CONFIG_K_DYN_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_K_DYN_MEM_TASK_PRI
#define RHINO_CONFIG_K_DYN_MEM_TASK_PRI 6
#endif
#endif
/* kernel idle conf */
#ifndef RHINO_CONFIG_IDLE_TASK_STACK_SIZE
#define RHINO_CONFIG_IDLE_TASK_STACK_SIZE 200
#endif
/* kernel hook conf */
#ifndef RHINO_CONFIG_USER_HOOK
#define RHINO_CONFIG_USER_HOOK 0
#endif
/* kernel stats conf */
#ifndef RHINO_CONFIG_SYSTEM_STATS
#define RHINO_CONFIG_SYSTEM_STATS 1
#endif
#ifndef RHINO_CONFIG_DISABLE_SCHED_STATS
#define RHINO_CONFIG_DISABLE_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_DISABLE_INTRPT_STATS
#define RHINO_CONFIG_DISABLE_INTRPT_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_STATS
#define RHINO_CONFIG_CPU_USAGE_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_PRI
#define RHINO_CONFIG_CPU_USAGE_TASK_PRI (RHINO_CONFIG_PRI_MAX - 2)
#endif
#ifndef RHINO_CONFIG_TASK_SCHED_STATS
#define RHINO_CONFIG_TASK_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_STACK
#define RHINO_CONFIG_CPU_USAGE_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_CPU_NUM
#define RHINO_CONFIG_CPU_NUM 1
#endif
/* kernel trace conf */
#ifndef RHINO_CONFIG_TRACE
#define RHINO_CONFIG_TRACE 0
#endif
#ifndef configUSE_WAKELOCK_PMU
#define configUSE_WAKELOCK_PMU 1
#endif
#ifndef WIFI_CONFIG_SUPPORT_LOWPOWER
#define WIFI_CONFIG_SUPPORT_LOWPOWER 0
#endif
#ifndef WIFI_CONFIG_LISTENSET_BINIT
#define WIFI_CONFIG_LISTENSET_BINIT 0
#endif
#ifndef WIFI_CONFIG_LISTEN_INTERVAL
#define WIFI_CONFIG_LISTEN_INTERVAL 1
#endif
#ifndef WIFI_CONFIG_RECEIVE_DTIM
#define WIFI_CONFIG_RECEIVE_DTIM 1
#endif
#endif /* CONFIG_H */

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NAME := board_mk5080
JTAG := jlink_swd
$(NAME)_TYPE := kernel
MODULE := EMW5080
HOST_ARCH := Cortex-M4
HOST_MCU_FAMILY := rtl8710bn
SUPPORT_BINS := no
EXTRA_ATE_BIN := on
$(NAME)_SOURCES := board.c
GLOBAL_INCLUDES += .
GLOBAL_DEFINES += STDIO_UART=0 USE_MX1290
CONFIG_SYSINFO_PRODUCT_MODEL := ALI_AOS_MK5080
CONFIG_SYSINFO_DEVICE_NAME := MK5080
GLOBAL_CFLAGS += -DSYSINFO_PRODUCT_MODEL=\"$(CONFIG_SYSINFO_PRODUCT_MODEL)\"
GLOBAL_CFLAGS += -DSYSINFO_DEVICE_NAME=\"$(CONFIG_SYSINFO_DEVICE_NAME)\"
#GLOBAL_CFLAGS += -DSYSINFO_KERNEL_VERSION=\"$(CONFIG_SYSINFO_KERNEL_VERSION)\"
#GLOBAL_CFLAGS += -DSYSINFO_APP_VERSION=\"$(CONFIG_SYSINFO_APP_VERSION)\"
#include $(SOURCE_ROOT)/board/rtl8710bn/export-rom_symbol_v01.txt
#GLOBAL_CFLAGS += -L $(SOURCE_ROOT)/board/mk5080
# Extra build target in mico_standard_targets.mk, include bootloader, and copy output file to eclipse debug file (copy_output_for_eclipse)
EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/pick.mk

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