j3d1/Ai-Thinker-Open_RTL8710BX_ALIOS_SDK
1
0
Fork 0
mirror of https://github.com/Ai-Thinker-Open/Ai-Thinker-Open_RTL8710BX_ALIOS_SDK.git synced 2026-07-13 05:25:38 +00:00
Code Issues Projects Releases Packages Wiki Activity

rel_1.6.0 init

Browse source
This commit is contained in:
guocheng.kgc 2020-06-18 20:06:52 +08:00 • committed by shengdong.dsd
commit 27b3e2883d
19359 changed files with 8093121 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

229
Living_SDK/board/hobbit1_evb/include/k_config_bk.h Normal file
View file

@ -0,0 +1,229 @@
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef CONFIG_H
#define CONFIG_H
/* chip level conf */
#ifndef RHINO_CONFIG_LITTLE_ENDIAN
#define RHINO_CONFIG_LITTLE_ENDIAN 1
#endif
#ifndef RHINO_CONFIG_CPU_STACK_DOWN
#define RHINO_CONFIG_CPU_STACK_DOWN 1
#endif
/* kernel feature conf */
#ifndef RHINO_CONFIG_SEM
#define RHINO_CONFIG_SEM 1
#endif
#ifndef RHINO_CONFIG_QUEUE
#define RHINO_CONFIG_QUEUE 1
#endif
#ifndef RHINO_CONFIG_TASK_SEM
#define RHINO_CONFIG_TASK_SEM 1
#endif
#ifndef RHINO_CONFIG_EVENT_FLAG
#define RHINO_CONFIG_EVENT_FLAG 1
#endif
#ifndef RHINO_CONFIG_TIMER
#define RHINO_CONFIG_TIMER 1
#endif
#ifndef RHINO_CONFIG_BUF_QUEUE
#define RHINO_CONFIG_BUF_QUEUE 1
#endif
#ifndef RHINO_CONFIG_MM_BLK
#define RHINO_CONFIG_MM_BLK 1
#endif
#ifndef RHINO_CONFIG_MM_DEBUG
#define RHINO_CONFIG_MM_DEBUG 1
#endif
#ifndef RHINO_CONFIG_MM_TLF
#define RHINO_CONFIG_MM_TLF 1
#endif
#ifndef RHINO_CONFIG_MM_TLF_BLK_SIZE
#define RHINO_CONFIG_MM_TLF_BLK_SIZE 8192
#endif
#define K_MM_STATISTIC 1
#ifndef RHINO_CONFIG_MM_MAXMSIZEBIT
#define RHINO_CONFIG_MM_MAXMSIZEBIT 19
#endif
#ifndef RHINO_CONFIG_GCC_RETADDR
#define RHINO_CONFIG_GCC_RETADDR 1
#endif
#ifndef RHINO_CONFIG_MM_LEAKCHECK
#define RHINO_CONFIG_MM_LEAKCHECK 1
#endif
#ifndef RHINO_CONFIG_RINGBUF_VENDOR
#define RHINO_CONFIG_RINGBUF_VENDOR 0
#endif
#ifndef RHINO_CONFIG_KOBJ_SET
#define RHINO_CONFIG_KOBJ_SET 1
#endif
/* kernel task conf */
#ifndef RHINO_CONFIG_TASK_SUSPEND
#define RHINO_CONFIG_TASK_SUSPEND 1
#endif
#ifndef RHINO_CONFIG_TASK_INFO
#define RHINO_CONFIG_TASK_INFO 1
#endif
#ifndef RHINO_CONFIG_TASK_DEL
#define RHINO_CONFIG_TASK_DEL 1
#endif
#ifndef RHINO_CONFIG_MM_LEAKCHECK
#define RHINO_CONFIG_MM_LEAKCHECK 1
#endif
#ifndef RHINO_CONFIG_TASK_STACK_CUR_CHECK
#define RHINO_CONFIG_TASK_STACK_CUR_CHECK 1
#endif
#ifndef RHINO_CONFIG_TASK_WAIT_ABORT
#define RHINO_CONFIG_TASK_WAIT_ABORT 1
#endif
#ifndef RHINO_CONFIG_TASK_STACK_OVF_CHECK
#define RHINO_CONFIG_TASK_STACK_OVF_CHECK 1
#endif
#ifndef RHINO_CONFIG_SCHED_RR
#define RHINO_CONFIG_SCHED_RR 1
#endif
#ifndef RHINO_CONFIG_TIME_SLICE_DEFAULT
#define RHINO_CONFIG_TIME_SLICE_DEFAULT 50
#endif
#ifndef RHINO_CONFIG_PRI_MAX
#define RHINO_CONFIG_PRI_MAX 62
#endif
#ifndef RHINO_CONFIG_USER_PRI_MAX
#define RHINO_CONFIG_USER_PRI_MAX (RHINO_CONFIG_PRI_MAX - 2)
#endif
/* kernel workqueue conf */
#ifndef RHINO_CONFIG_WORKQUEUE
#define RHINO_CONFIG_WORKQUEUE 1
#endif
#ifndef RHINO_CONFIG_WORKQUEUE_STACK_SIZE
#define RHINO_CONFIG_WORKQUEUE_STACK_SIZE 768
#endif
/* kernel mm_region conf */
#ifndef RHINO_CONFIG_MM_REGION_MUTEX
#define RHINO_CONFIG_MM_REGION_MUTEX 0
#endif
/* kernel timer&tick conf */
#ifndef RHINO_CONFIG_HW_COUNT
#define RHINO_CONFIG_HW_COUNT 0
#endif
#ifndef RHINO_CONFIG_TICK_TASK
#define RHINO_CONFIG_TICK_TASK 0
#endif
#if (RHINO_CONFIG_TICK_TASK > 0)
#ifndef RHINO_CONFIG_TICK_TASK_STACK_SIZE
#define RHINO_CONFIG_TICK_TASK_STACK_SIZE 256
#endif
#ifndef RHINO_CONFIG_TICK_TASK_PRI
#define RHINO_CONFIG_TICK_TASK_PRI 1
#endif
#endif
#ifndef RHINO_CONFIG_TICKLESS
#define RHINO_CONFIG_TICKLESS 0
#endif
#ifndef RHINO_CONFIG_TICKS_PER_SECOND
#define RHINO_CONFIG_TICKS_PER_SECOND 500
#endif
/* must be 2^n size!, such as 1, 2, 4, 8, 16,32, etc....... */
#ifndef RHINO_CONFIG_TICK_HEAD_ARRAY
#define RHINO_CONFIG_TICK_HEAD_ARRAY 8
#endif
/*must reserve enough stack size for timer cb will consume*/
#ifndef RHINO_CONFIG_TIMER_TASK_STACK_SIZE
#define RHINO_CONFIG_TIMER_TASK_STACK_SIZE 300
#endif
#ifndef RHINO_CONFIG_TIMER_RATE
#define RHINO_CONFIG_TIMER_RATE 1
#endif
#ifndef RHINO_CONFIG_TIMER_TASK_PRI
#define RHINO_CONFIG_TIMER_TASK_PRI 5
#endif
/* kernel intrpt conf */
#ifndef RHINO_CONFIG_INTRPT_STACK_REMAIN_GET
#define RHINO_CONFIG_INTRPT_STACK_REMAIN_GET 0
#endif
#ifndef RHINO_CONFIG_INTRPT_STACK_OVF_CHECK
#define RHINO_CONFIG_INTRPT_STACK_OVF_CHECK 1
#endif
#ifndef RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL
#define RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL 188u
#endif
#ifndef RHINO_CONFIG_INTRPT_GUARD
#define RHINO_CONFIG_INTRPT_GUARD 0
#endif
/* kernel dyn alloc conf */
#ifndef RHINO_CONFIG_KOBJ_DYN_ALLOC
#define RHINO_CONFIG_KOBJ_DYN_ALLOC 1
#endif
#if (RHINO_CONFIG_KOBJ_DYN_ALLOC > 0)
#ifndef RHINO_CONFIG_K_DYN_QUEUE_MSG
#define RHINO_CONFIG_K_DYN_QUEUE_MSG 30
#endif
#ifndef RHINO_CONFIG_K_DYN_TASK_STACK
#define RHINO_CONFIG_K_DYN_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_K_DYN_MEM_TASK_PRI
#define RHINO_CONFIG_K_DYN_MEM_TASK_PRI 6
#endif
#endif
/* kernel idle conf */
#ifndef RHINO_CONFIG_IDLE_TASK_STACK_SIZE
#define RHINO_CONFIG_IDLE_TASK_STACK_SIZE 200
#endif
/* kernel hook conf */
#ifndef RHINO_CONFIG_USER_HOOK
#define RHINO_CONFIG_USER_HOOK 1
#endif
/* kernel stats conf */
#ifndef RHINO_CONFIG_SYSTEM_STATS
#define RHINO_CONFIG_SYSTEM_STATS 1
#endif
#ifndef RHINO_CONFIG_DISABLE_SCHED_STATS
#define RHINO_CONFIG_DISABLE_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_DISABLE_INTRPT_STATS
#define RHINO_CONFIG_DISABLE_INTRPT_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_STATS
#define RHINO_CONFIG_CPU_USAGE_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_PRI
#define RHINO_CONFIG_CPU_USAGE_TASK_PRI (RHINO_CONFIG_PRI_MAX - 2)
#endif
#ifndef RHINO_CONFIG_TASK_SCHED_STATS
#define RHINO_CONFIG_TASK_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_STACK
#define RHINO_CONFIG_CPU_USAGE_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_CPU_NUM
#define RHINO_CONFIG_CPU_NUM 1
#endif
/* kernel trace conf */
#ifndef RHINO_CONFIG_TRACE
#define RHINO_CONFIG_TRACE 0
#endif
#endif /* CONFIG_H */

340
Living_SDK/board/hobbit1_evb/include/lwipopts.h Normal file
View file

@ -0,0 +1,340 @@
/**
* @file
*
* lwIP Options Configuration
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef LWIP_LWIPOPTS_H
#define LWIP_LWIPOPTS_H
//#include "lwip/arch.h"
#include <csi_config.h>
#define LWIP_MEM_OPTIMIZER 1
#define LWIP_SIZE_OPTIMIZER 1
/**
* Include user defined options first. Anything not defined in these files
* will be set to standard values. Override anything you dont like!
*/
/*
-------------- NO SYS --------------
*/
#define NO_SYS 0
#define SYS_LIGHTWEIGHT_PROT (NO_SYS == 0)
/*
----------- Core locking -----------
*/
#define LWIP_TCPIP_CORE_LOCKING 0
#define MEMP_OVERFLOW_CHECK 1
/*
---------- Memory options ----------
*/
/* If MEM_LIBC_MALLOC and MEMP_MEM_MALLOC are defined to 1,
MEM_SIZE and MEMP_NUM_XXX will be invalid */
#define MEM_LIBC_MALLOC 0
#define MEMP_MEM_MALLOC 0
#define MEM_ALIGNMENT 4
/* Application data is used for packet buffer directly */
#if LWIP_MEM_OPTIMIZER
#define MEM_SIZE 3216
#else
#define MEM_SIZE 6144//(1600+500)
#endif
/*
---------- Internal Memory Pool Sizes ----------
*/
#define MEMP_NUM_PBUF 2
#define MEMP_NUM_RAW_PCB 1
#define MEMP_NUM_UDP_PCB 4
#define MEMP_NUM_TCP_PCB 2
#define MEMP_NUM_TCP_PCB_LISTEN 1
#define MEMP_NUM_TCP_SEG 8
#define MEMP_NUM_REASSDATA 2
#define MEMP_NUM_FRAG_PBUF 2
#define MEMP_NUM_ARP_QUEUE 8
#define MEMP_NUM_NETBUF 2
#define MEMP_NUM_NETCONN 5
#define MEMP_NUM_TCPIP_MSG_API 4
#define MEMP_NUM_TCPIP_MSG_INPKT 4
#if LWIP_MEM_OPTIMIZER
#define PBUF_POOL_SIZE 3
#else
#define PBUF_POOL_SIZE 4
#endif
#define LWIP_PRIVATE_FD_SET 1
/*
---------- ARP options ----------
*/
#define LWIP_ARP 1
/*
---------- IP options ----------
*/
#define LWIP_IPV4 1
#define IP_FORWARD 0
#define IP_OPTIONS_ALLOWED 1
#define IP_REASSEMBLY 0
#define IP_FRAG 0
#define IP_REASS_MAXAGE 3
#define IP_REASS_MAX_PBUFS 4
#define IP_FRAG_USES_STATIC_BUF 0
/*
---------- ICMP options ----------
*/
#define LWIP_ICMP 1
/*
---------- RAW options ----------
*/
#define LWIP_RAW 1
/*
---------- DHCP options ----------
*/
#define LWIP_DHCP 1
#define DHCP_DOES_ARP_CHECK 0
/*
---------- AUTOIP options ----------
*/
#define LWIP_AUTOIP 0
/*
---------- SNMP options ----------
*/
#define LWIP_SNMP 0
/*
---------- IGMP options ----------
*/
#define LWIP_IGMP 1
/*
---------- DNS options -----------
*/
#define LWIP_DNS 1
#define LWIP_DNS_SECURE 0
#if LWIP_MEM_OPTIMIZER
#define DNS_MAX_NAME_LENGTH 64 //default is 256
#endif
/*
---------- UDP options ----------
*/
#define LWIP_UDP 1
/*
---------- TCP options ----------
*/
#define LWIP_TCP 1
#define TCP_WND (1 * TCP_MSS)
#define TCP_QUEUE_OOSEQ 0
#if LWIP_MEM_OPTIMIZER
#define TCP_MSS 536
#else
#define TCP_MSS 1460 //1440(IPV6)//1460(IPV4)
#endif
/* lwip_sanity_check, TCP_SND_BUF must be at least as much as (2 * TCP_MSS) */
#define TCP_SND_BUF (2 * TCP_MSS)
#define LWIP_LISTEN_BACKLOG 0
#define TCP_OVERSIZE TCP_MSS
/*
---------- Pbuf options ----------
*/
#define PBUF_LINK_HLEN 16
//#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN)
#define PBUF_POOL_BUFSIZE 512
/*
---------- Network Interfaces options ----------
*/
/*
---------- LOOPIF options ----------
*/
#define LWIP_HAVE_LOOPIF 0
/*
---------- Thread options ----------
*/
#define TCPIP_MBOX_SIZE 16
#define DEFAULT_ACCEPTMBOX_SIZE 8
#define DEFAULT_RAW_RECVMBOX_SIZE 4
#define DEFAULT_UDP_RECVMBOX_SIZE 8
#define DEFAULT_TCP_RECVMBOX_SIZE 8
#define TCPIP_THREAD_STACKSIZE 1024
#define TCPIP_THREAD_PRIO 7
/*
---------- Sequential layer options ----------
*/
#define LWIP_NETCONN 1
/*
---------- Socket options ----------
*/
#define LWIP_SOCKET 1
#define LWIP_COMPAT_SOCKETS 1
#define LWIP_POSIX_SOCKETS_IO_NAMES 1
#define LWIP_SOCKET_OFFSET 20
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVTIMEO 1
#define SO_REUSE 1
#define LWIP_SO_BINDTODEVICE 0
#define LWIP_SOCKET_SEND_NOCOPY 0
/*
---------- Statistics options ----------
*/
#if LWIP_SIZE_OPTIMIZER
#define LWIP_STATS 0
#define LWIP_STATS_DISPLAY 0
#else
#define LWIP_STATS 1
#define LWIP_STATS_DISPLAY 1
#endif
#define LINK_STATS 0
#define ETHARP_STATS 0
#define IP_STATS 0
#define IPFRAG_STATS 0
#define ICMP_STATS 0
#define IGMP_STATS 0
#define UDP_STATS 0
#define TCP_STATS 0
//#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0))
//#define MEMP_STATS (MEMP_MEM_MALLOC == 0)
//#define SYS_STATS (NO_SYS == 0)
#define IP6_STATS 0
#define ICMP6_STATS 0
#define IP6_FRAG_STATS 0
#define MLD6_STATS 0
#define ND6_STATS 0
#define MIB2_STATS 0
/*
---------- Checksum options ----------
*/
/*
---------- IPv6 options ---------------
*/
#define LWIP_IPV6 0
#define LWIP_IPV6_FRAG 0
#define LWIP_ICMP6 1
#define LWIP_IPV6_REASS 0
#define LWIP_IPV6_MLD 0
#define LWIP_ND6_MAX_MULTICAST_SOLICIT 10
/*
---------- Hook options ---------------
*/
//#define LWIP_HOOK_IP4_ROUTE_SRC lwip_ip4_route_src
/*
---------- Debugging options ----------
*/
//#define LWIP_DEBUG
#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL
#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE|LWIP_DBG_STATE|LWIP_DBG_FRESH|LWIP_DBG_HALT)
#define MEM_DEBUG LWIP_DBG_OFF
#define MEMP_DEBUG LWIP_DBG_OFF
#define PBUF_DEBUG LWIP_DBG_OFF
#define API_LIB_DEBUG LWIP_DBG_OFF
#define API_MSG_DEBUG LWIP_DBG_OFF
#define TCPIP_DEBUG LWIP_DBG_OFF
#define NETIF_DEBUG LWIP_DBG_OFF
#define SOCKETS_DEBUG LWIP_DBG_OFF
#define IP_DEBUG LWIP_DBG_OFF
#define IP_REASS_DEBUG LWIP_DBG_OFF
#define RAW_DEBUG LWIP_DBG_OFF
#define ICMP_DEBUG LWIP_DBG_OFF
#define UDP_DEBUG LWIP_DBG_OFF
#define TCP_DEBUG LWIP_DBG_OFF
#define TCP_INPUT_DEBUG LWIP_DBG_OFF
#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF
#define TCP_RTO_DEBUG LWIP_DBG_OFF
#define TCP_CWND_DEBUG LWIP_DBG_OFF
#define TCP_WND_DEBUG LWIP_DBG_OFF
#define TCP_FR_DEBUG LWIP_DBG_OFF
#define TCP_QLEN_DEBUG LWIP_DBG_OFF
#define TCP_RST_DEBUG LWIP_DBG_OFF
#if LWIP_SIZE_OPTIMIZER
#define LWIP_NOASSERT 1
#endif
/*
---------- Performance tracking options ----------
*/
/*
---------- PPP options ----------
*/
#define PPP_SUPPORT 0
#define LWIP_NETIF_API 1
/*
---------- Extend options ----------
*/
#define LWIP_XR_EXT_MBUF_SUPPORT 0
#define LWIP_XR_EXT 0
#define LWIP_EXT_SIM_ARP 0
#define LWIP_EXT_ZWP_LIMITED 0
#endif /* LWIP_LWIPOPTS_H */

106
Living_SDK/board/hobbit1_evb/include/pin.h Normal file
View file

@ -0,0 +1,106 @@
/*
* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/******************************************************************************
* @file pin.h
* @brief header File for pin definition
* @version V1.0
* @date 02. June 2017
******************************************************************************/
#ifndef HOBBIT1_2_PIN_H
#define HOBBIT1_2_PIN_H
#include <stdint.h>
#include "pin_name.h"
#define CONSOLE_TXD PA10_ADC2_TXD0//PA2_TXD0_SPI0MISO
#define CONSOLE_RXD PA11_ACMP0N_ADC3_RXD0//PA3_RXD0_SPI0MOSI
#define CONSOLE_IDX 0
#define UART_TXD1 PA17_TXD1_ADC9//PA21_SPI1SCK_TRIG1_TXD1
#define UART_RXD1 PA16_RXD1_ADC8//PA20_SPI1SSN2_TRIG0_RXD1
#define UART_TXD2 PA24_TXD2_I2SMCLK_SPI1SSN0
#define UART_RXD2 PA25_RXD2_I2SSCK_SPI1SSN1
#define SPI0_TX PA2_TXD0_SPI0MISO
#define SPI0_RX PA3_RXD0_SPI0MOSI
#define SPI0_CLK PA4_CTS0_PWM0_SPI0SCK_TRIG0
#define SPI0_CS PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define SPI1_TX PA22_SPI1MISO_PWM0_ADC10
#define SPI1_RX PA23_SPI1MOSI_PWM1_ADC11
#define SPI1_CLK PA21_SPI1SCK_TRIG1_TXD1
#define SPI1_CS PA18_SPI1SSN0_ACMP0O
#define TEST_SPI_IDX 1
#define IIC_SCL0 PA6_SPI0MOSI_PWM6_SCL0
#define IIC_SDA0 PA7_SPI0SSN_PWM7_SDA0
#define IIC_SCL1 PC0_SCL1_CTS1_PWM10_ADC14
#define IIC_SDA1 PC1_SDA1_RTS1_PWM11_ADC15
#define TEST_IIC_IDX 1
#define UART_PINS { {PA2_TXD0_SPI0MISO,PA3_RXD0_SPI0MOSI},\
{PA21_SPI1SCK_TRIG1_TXD1,PA20_SPI1SSN2_TRIG0_RXD1},\
{PA24_TXD2_I2SMCLK_SPI1SSN0,PA25_RXD2_I2SSCK_SPI1SSN1} }
#define UART_PINS { {PA2_TXD0_SPI0MISO,PA3_RXD0_SPI0MOSI},\
{PA21_SPI1SCK_TRIG1_TXD1,PA20_SPI1SSN2_TRIG0_RXD1},\
{PA24_TXD2_I2SMCLK_SPI1SSN0,PA25_RXD2_I2SSCK_SPI1SSN1} }
#define PWM_CH0 PA4_CTS0_PWM0_SPI0SCK_TRIG0
#define PWM_CH1 PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define PWM_CH2 PB0_SCL0_PWM2_I2SMCLK
#define PWM_CH3 PB1_SDA0_PWM3_I2SSCK
#define PWM_CH4 PB2_SPI0SCK_PWM4_I2SWS
#define PWM_CH5 PB3_SPI0MISO_PWM5_I2SSD
#define GPIO_EXAMPLE_PORT PORTA
#define GPIO_EXAMPLE_PIN PA17_TXD1_ADC9
#define CTS_GPIO_TEST_PIN PA18_SPI1SSN0_ACMP0O
#define CTS_GPIO_TEST_PORT PORTA
#define EXAMPLE_BOARD_GPIO_PIN_NAME "TX1"
#define CTS_BOARD_GPIO_PIN_NAME "PA18"
/****Ethernet Drvier****/
#define PIN_ETH_INT PA20_SPI1SSN2_TRIG0_RXD1
#define PIN_ETH_RST PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define ETH_SPI_TX PB3_SPI0MISO_PWM5_I2SSD//PA2_TXD0_SPI0MISO
#define ETH_SPI_RX PA6_SPI0MOSI_PWM6_SCL0//PA3_RXD0_SPI0MOSI
#define ETH_SPI_CLK PB2_SPI0SCK_PWM4_I2SWS//PA4_CTS0_PWM0_SPI0SCK_TRIG0
#define ETH_SPI_CS PA7_SPI0SSN_PWM7_SDA0//PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define ETH_SPI_IDX 0
#define ADC_PIN0 PA8_WKUP_ADC0_ACMP0P
#define ADC_PIN1 PA9_BOOT_ADC1_PWMFAULT
#define ADC_PIN2 PA10_ADC2_TXD0
#define ADC_PIN3 PA11_ACMP0N_ADC3_RXD0
#define ADC_PIN4 PA12_PWM8_TCK_ADC4
#define ADC_PIN5 PA13_PWM9_TMS_ADC5
#define ADC_PIN6 PA14_PWM10_ADC6
#define ADC_PIN7 PA15_PWM11_ADC7
#define ADC_PIN8 PA16_RXD1_ADC8
#define ADC_PIN9 PA17_TXD1_ADC9
#define ADC_PIN10 PA22_SPI1MISO_PWM0_ADC10
#define ADC_PIN11 PA23_SPI1MOSI_PWM1_ADC11
#define ADC_PIN12 PA26_CTS2_I2SWS_ADC12
#define ADC_PIN13 PA27_RTS2_I2SSD_ADC13
#define ADC_PIN14 PC0_SCL1_CTS1_PWM10_ADC14
#define ADC_PIN15 PC1_SDA1_RTS1_PWM11_ADC15
#define ADC_PINS_MAX_NUM 16
#endif /* HOBBIT1_2_PIN_H */