rel_1.6.0 init

This commit is contained in:
guocheng.kgc 2020-06-18 20:06:52 +08:00 committed by shengdong.dsd
commit 27b3e2883d
19359 changed files with 8093121 additions and 0 deletions

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/*
* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/******************************************************************************
* @file board_init.c
* @brief CSI Source File for board init
* @version V1.0
* @date 02. June 2017
******************************************************************************/
#include <stdio.h>
#include <stdint.h>
#include "drv_usart.h"
#include "soc.h"
#include <csi_core.h>
#include <csi_config.h>
#include "pin.h"
#include "hal/soc/soc.h"
#include <aos/kernel.h>
extern usart_handle_t console_handle;
extern void hobbit_ioreuse_initial(void);
hal_logic_partition_t hal_partitions[7];
void __attribute__((weak)) board_init(void)
{
hal_partitions[0].partition_owner = HAL_FLASH_EMBEDDED;
hal_partitions[0].partition_description = "BOOTLOADER_MTB";
hal_partitions[0].partition_start_addr = 0x10000000;
hal_partitions[0].partition_length = 0x200; //512 bytes
hal_partitions[0].partition_options = PAR_OPT_READ_EN;
hal_partitions[1].partition_owner = HAL_FLASH_EMBEDDED;
hal_partitions[1].partition_description = "BOOTLOADER";
hal_partitions[1].partition_start_addr = 0x10000200;
hal_partitions[1].partition_length = 0x5600; //22016 bytes
hal_partitions[1].partition_options = PAR_OPT_READ_EN;
hal_partitions[2].partition_owner = HAL_FLASH_EMBEDDED;
hal_partitions[2].partition_description = "TEE";
hal_partitions[2].partition_start_addr = 0x10005800;
hal_partitions[2].partition_length = 0x5000; //20K bytes
hal_partitions[2].partition_options = PAR_OPT_READ_EN;
hal_partitions[3].partition_owner = HAL_FLASH_EMBEDDED;
hal_partitions[3].partition_description = "FACTORYSETTINGS";
hal_partitions[3].partition_start_addr = 0x1000A800;
hal_partitions[3].partition_length = 0x400; //1K bytes
hal_partitions[3].partition_options = PAR_OPT_READ_EN;
hal_partitions[4].partition_owner = HAL_FLASH_EMBEDDED;
hal_partitions[4].partition_description = "IMAGES_MTB";
hal_partitions[4].partition_start_addr = 0x1000AC00;
hal_partitions[4].partition_length = 0x1000; //4K bytes
hal_partitions[4].partition_options = PAR_OPT_READ_EN;
hal_partitions[5].partition_owner = HAL_FLASH_EMBEDDED;
hal_partitions[5].partition_description = "REE";
hal_partitions[5].partition_start_addr = 0x1000BC00;
hal_partitions[5].partition_length = 0x25000; //153600 bytes
hal_partitions[5].partition_options = PAR_OPT_READ_EN;
hal_partitions[6].partition_owner = HAL_FLASH_EMBEDDED;
hal_partitions[6].partition_description = "KV";
hal_partitions[6].partition_start_addr = 0x1003D800;
hal_partitions[6].partition_length = 0x800; //4K bytes
hal_partitions[6].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN;
*(volatile uint32_t *)0x50006004 |= 0x40000;
hobbit_ioreuse_initial();
/* init the console*/
console_handle = csi_usart_initialize(CONSOLE_IDX, NULL);
/* config the UART */
csi_usart_config(console_handle, 115200, USART_MODE_ASYNCHRONOUS, USART_PARITY_NONE, USART_STOP_BITS_1, USART_DATA_BITS_8);
}

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/*
* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/******************************************************************************
* @file gcc_csky.ld
* @brief csky linker file
* @version V1.0
* @date 02. June 2017
******************************************************************************/
MEMORY
{
ROM : ORIGIN = 0x0 , LENGTH = 0x1FFF /* ROM 8KB*/
EFLASH : ORIGIN = 0x1000bc00 , LENGTH = 0x3F7FF /* E-FLASH 254KB*/
SRAM : ORIGIN = 0x60001000 , LENGTH = 0x13000 /* on-chip SRAM 80KB*/
}
PROVIDE (__StackTop = 0x60014000);
REGION_ALIAS("REGION_TEXT", EFLASH);
REGION_ALIAS("REGION_RODATA", EFLASH);
REGION_ALIAS("REGION_DATA", SRAM);
REGION_ALIAS("REGION_BSS", SRAM);
ENTRY(Reset_Handler)
SECTIONS
{
.text : AT(ADDR(.text)){
. = ALIGN(0x4) ;
*startup.o(*.text)
*startup.o(.vectors)
__stext = . ;
*(.text)
*(.text*)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.gnu.linkonce.t*)
*(.glue_7t)
*(.glue_7)
*(.jcr)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN (4) ;
PROVIDE(__ctbp = .);
*(.call_table_data)
*(.call_table_text)
. = ALIGN(0x10) ;
__etext = . ;
} > REGION_TEXT
.rodata : AT(LOADADDR(.text) + SIZEOF(.text)){
. = ALIGN(0x4) ;
__srodata = .;
*(.rdata)
*(.rdata*)
*(.rdata1)
*(.rdata.*)
*(.rodata)
*(.rodata1)
*(.rodata*)
*(.rodata.*)
*(.rodata.str1.4)
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(0x4) ;
__erodata = .;
} > REGION_RODATA
.data : AT(LOADADDR(.rodata) + SIZEOF(.rodata)){
. = ALIGN(0x4) ;
__sdata = . ;
__data_start__ = . ;
data_start = . ;
*(.got.plt)
*(.got)
*(.gnu.linkonce.r*)
*(.data)
*(.data*)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
*(.data1)
*(.gcc_except_table)
*(.gcc_except_table*)
__start_init_call = .;
*(.initcall.init)
__stop_init_call = .;
__start_cmd = .;
*(.bootloaddata.cmd)
. = ALIGN(4) ;
__stop_cmd = .;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(__libc_atexit)
*(__libc_subinit)
*(__libc_subfreeres)
*(.note.ABI-tag)
. = ALIGN(0x4) ;
__edata = .;
__data_end__ = .;
} > REGION_DATA
.bss : {
. = ALIGN(0x4) ;
__sbss = ALIGN(0x4) ;
__bss_start__ = . ;
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.scommon)
*(.dynbss)
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(0x4) ;
__ebss = . ;
__end = . ;
end = . ;
__bss_end__ = .;
} > REGION_BSS
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > REGION_BSS
.gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } > REGION_BSS
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
.gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
.eh_frame_hdr : { *(.eh_frame_hdr) }
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
}
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
}
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
}
.junk 0 : { *(.rel*) *(.rela*) }
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
}

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.global __main
.weak __main
.global __e_rom
.weak __e_rom
.global __s_ram_data_1
.weak __s_ram_data_1
.global __e_ram_data_1
.weak __e_ram_data_1
.global __s_ram_bss_1
.weak __s_ram_bss_1
.global __e_ram_bss_1
.weak __e_ram_bss_1
.global __s_ram_data_2
.weak __s_ram_data_2
.global __e_ram_data_2
.weak __e_ram_data_2
.global __s_ram_bss_2
.weak __s_ram_bss_2
.global __e_ram_bss_2
.weak __e_ram_bss_2
.global __s_ram_data_3
.weak __s_ram_data_3
.global __e_ram_data_3
.weak __e_ram_data_3
.global __s_ram_bss_3
.weak __s_ram_bss_3
.global __e_ram_bss_3
.weak __e_ram_bss_3
.global __s_ram_data_4
.weak __s_ram_data_4
.global __e_ram_data_4
.weak __e_ram_data_4
.global __s_ram_bss_4
.weak __s_ram_bss_4
.global __e_ram_bss_4
.weak __e_ram_bss_4
.global __s_ram_data_5
.weak __s_ram_data_5
.global __e_ram_data_5
.weak __e_ram_data_5
.global __s_ram_bss_5
.weak __s_ram_bss_5
.global __e_ram_bss_5
.weak __e_ram_bss_5
.global __CDKInternalChipInitHandler
.weak __CDKInternalChipInitHandler
.text
.align 3
__bss_initialization:
subu a2, a3
lsri a2, 2
cmpnei a2, 0
bf 2f
movi a1, 0
1:
stw a1, (a3)
addi a3, 4
subi a2, 1
cmpnei a2, 0
bt 1b
2:
jmp r15
__rom_decompression:
cmphs a1, a2
bt 4f
3:
ld.w a3, (a0, 0)
st.w a3, (a1, 0)
addi a0, 4
addi a1, 4
cmphs a1, a2
bf 3b
4:
jmp r15
__main:
mov r6, r15
lrw a3, __s_ram_bss_1
lrw a2, __e_ram_bss_1
bsr __bss_initialization
lrw a3, __s_ram_bss_2
lrw a2, __e_ram_bss_2
bsr __bss_initialization
lrw a3, __s_ram_bss_3
lrw a2, __e_ram_bss_3
bsr __bss_initialization
lrw a3, __s_ram_bss_4
lrw a2, __e_ram_bss_4
bsr __bss_initialization
lrw a3, __s_ram_bss_5
lrw a2, __e_ram_bss_5
bsr __bss_initialization
lrw a0, __e_rom
lrw a1, __s_ram_data_1
lrw a2, __e_ram_data_1
bsr __rom_decompression
lrw a1, __s_ram_data_2
lrw a2, __e_ram_data_2
bsr __rom_decompression
lrw a1, __s_ram_data_3
lrw a2, __e_ram_data_3
bsr __rom_decompression
lrw a1, __s_ram_data_4
lrw a2, __e_ram_data_4
bsr __rom_decompression
lrw a1, __s_ram_data_5
lrw a2, __e_ram_data_5
bsr __rom_decompression
#ifdef __CSKYABIV2__
subi sp, 4
stw r6, (sp, 0)
lrw a0, __CDKInternalChipInitHandler
cmpnei a0, 0
bf 1f
jsr a0
1:
lrw a0, main
jsr a0
#else
subi sp, 8
stw r6, (sp, 0)
lrw a0, __CDKInternalChipInitHandler
cmpnei a0, 0
bf 1f
jsri __CDKInternalChipInitHandler
1:
jsri main
#endif
ldw r15, (sp, 0)
#ifdef __CSKYABIV2__
addi sp, 4
#else
addi sp, 8
#endif
jmp r15

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Csky GNU Linker
======================================================================
Section Cross References
======================================================================
Removing Unused input sections from the image.
Removing .data(Obj/crt0.o), (0 bytes).
Removing .data(Obj/main.o), (0 bytes).
Removing .bss(Obj/main.o), (0 bytes).
Removing .data(Obj/__rt_entry.o), (0 bytes).
Removing .bss(Obj/__rt_entry.o), (0 bytes).
5 unused seciton(s) (total 0 bytes) removed from the image.
======================================================================
Image Symbol Table
Local Symbols
Symbol Name Value Type Size Section
__rt_entry.S 0x00000000 df 0 *ABS*
main.c 0x00000000 df 0 *ABS*
$d 0x60008040 0 .text
$t 0x60008040 0 .text
$d 0x60008060 0 .text
$d 0x60008070 0 .text
$t 0x60008070 0 .text
$t 0x60008074 0 .text
__bss_initialization 0x60008074 0 .text
__rom_decompression 0x6000808a 0 .text
$d 0x60008100 0 .text
Stack_Mem 0x60008180 0 .bss
Global Symbols
Symbol Name Value Type Size Section
__e_ram_bss_2 0x00000000 w 0 *UND*
__e_ram_bss_3 0x00000000 w 0 *UND*
__e_ram_bss_4 0x00000000 w 0 *UND*
__e_ram_bss_5 0x00000000 w 0 *UND*
__e_ram_data_1 0x00000000 w 0 *UND*
__e_ram_data_2 0x00000000 w 0 *UND*
__e_ram_data_3 0x00000000 w 0 *UND*
__e_ram_data_4 0x00000000 w 0 *UND*
__e_ram_data_5 0x00000000 w 0 *UND*
__e_rom 0x00000000 w 0 *UND*
__s_ram_bss_2 0x00000000 w 0 *UND*
__s_ram_bss_3 0x00000000 w 0 *UND*
__s_ram_bss_4 0x00000000 w 0 *UND*
__s_ram_bss_5 0x00000000 w 0 *UND*
__s_ram_data_1 0x00000000 w 0 *UND*
__s_ram_data_2 0x00000000 w 0 *UND*
__s_ram_data_3 0x00000000 w 0 *UND*
__s_ram_data_4 0x00000000 w 0 *UND*
__s_ram_data_5 0x00000000 w 0 *UND*
ckcpu_vsr_table 0x60008000 0 .text
__stext 0x60008040 0 .text
Reset_Handler 0x60008040 w 0 .text
__bkpt_label 0x60008056 0 .text
Default_handler 0x6000805a 0 .text
Access_Error_Handler 0x6000805a w 0 .text
Auto_FINT_Handler 0x6000805a w 0 .text
Auto_INT_Handler 0x6000805a w 0 .text
Breakpoint_Exception_Handler 0x6000805a w 0 .text
Divided_By_Zero_Handler 0x6000805a w 0 .text
Idly4_Error_Handler 0x6000805a w 0 .text
Illegal_Handler 0x6000805a w 0 .text
Misaligned_Access_Handler 0x6000805a w 0 .text
Privlege_Violation_Handler 0x6000805a w 0 .text
Reserved_FP_Handler 0x6000805a w 0 .text
Reserved_HAI_Handler 0x6000805a w 0 .text
TLB_Data_Empty_Handler 0x6000805a w 0 .text
TLB_Ins_Empty_Handler 0x6000805a w 0 .text
Trace_Exection_Handler 0x6000805a w 0 .text
Unrecoverable_Error_Handler 0x6000805a w 0 .text
main 0x60008070 F 4 .text
__main 0x6000809c w 0 .text
__etext 0x60008160 0 .text
__data_start 0x60008160 0 .data
__erodata 0x60008160 0 .data
__sdata 0x60008160 0 .data
__srodata 0x60008160 0 .data
data_start 0x60008160 0 .data
__edata 0x60008180 0 .data
__s_ram_bss_1 0x60008180 0 .bss
__sbss 0x60008180 0 .bss
__e_ram_bss_1 0x60008280 0 .bss
__end 0x60008280 0 .bss
__initial_sp 0x60008280 0 .bss
end 0x60008280 0 .bss
(w:Weak d:Deubg F:Function f:File name O:Zero)
======================================================================
Memory Map of the image
Image Entry point : 0x60008040
Region MEM (Base: 0x60008000, Size: 0x00000280, Max: 0x00008000)
Base Addr Size Type Attr Idx Section Name Object
0x60008040 0x00000030 Code RO 16 .text Obj/crt0.o
0x60008070 0x00000004 Code RO 21 .text Obj/main.o
0x60008074 0x000000e4 Code RO 32 .text Obj/__rt_entry.o
0x60008158 0x00000008 PAD
0x60008160 0x00000004 LD_GEN RW
0x60008164 0x0000001c PAD
0x60008180 0x00000100 Zero RW 18 .bss Obj/crt0.o
Region *default* (Base: 0x00000000, Size: 0x00000059, Max: 0xffffffff)
Base Addr Size Type Attr Idx Section Name Object
======================================================================
Image component sizes
Code RO Data RW Data ZI Data Debug Object Name
0 0 0 0 0 linker stubs
48 0 0 256 0 Obj/crt0.o
4 0 0 0 449 Obj/main.o
228 0 0 0 0 Obj/__rt_entry.o
------------------------------------------------------------
280 0 0 256 449 Object Totals
8 0 0 0 0 Pad
0 0 0 0 0 LD_GEN
------------------------------------------------------------
======================================================================
Code RO Data RW Data ZI Data Debug
288 0 0 256 449 Grand Totals
288 0 0 256 449 Elf Image Totals
288 0 0 0 0 ROM Totals
======================================================================
Total RO Size (Code + RO Data) 288 ( 0.28kB)
Total RW Size (RW Data + ZI Data) 256 ( 0.25kB)
Total ROM Size (Code + RO Data + RW Data) 288 ( 0.28kB)
======================================================================

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# Revision information
# |----------------------------------------------------------------------------|
# | Ver | Date | Releaser | Comments |
# |----------------------------------------------------------------------------|
# | 0.1 | 20170904 | Nick.Hu | Initial version |
# |----------------------------------------------------------------------------|
# |----------------------------------------------
# |Bootloader.mtb 10000000 0.5
# |Bootloader(ckdiff, rcvy) 10000200 21.5
# |Tee OS 10005800 20
# |Factory settings 1000A800 1
# |Images.mtb 1000AC00 3
# |Ree OS(Prim) 1000BC00 150
# |Fota(misc) 10031400 54
# |KV Data 1003E800 2
# |OTP 1003F800 2
# |----------------------------------------------
set $psr=0xc0000000
##Load mtb
download ihex verify=yes $(ProjectPath)../../../platform/mcu/csky/generated/hexs/mtb.hex
##Load bootloader binary
download ihex verify=yes $(ProjectPath)../../../platform/mcu/csky/generated/hexs/boot.hex
##Load tee os binary
download ihex verify=yes $(ProjectPath)../../../platform/mcu/csky/generated/hexs/tee.hex
##Load yoc binary
download ihex verify=yes $(ProjectPath)../../../platform/mcu/csky/generated/hexs/prim.hex

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# Revision information
# |----------------------------------------------------------------------------|
# | Ver | Date | Releaser | Comments |
# |----------------------------------------------------------------------------|
# | 0.1 | 20170904 | Nick.Hu | Initial version |
# |----------------------------------------------------------------------------|
# |----------------------------------------------
# |Bootloader.mtb 10000000 0.5
# |Bootloader(ckdiff, rcvy) 10000200 21.5
# |Tee OS 10005800 20
# |Factory settings 1000A800 1
# |Images.mtb 1000AC00 3
# |Ree OS(Prim) 1000BC00 150
# |Fota(misc) 10031400 54
# |KV Data 1003E800 2
# |OTP 1003F800 2
# |----------------------------------------------
set *0x4000202c=0xc0206
set *0x40002004=0x8
set $pc=0x1000bc00
#set $pc=0x10000200
#set $pc=0x10000800
set $psr=0xc0000000

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<?xml version="1.0" encoding="UTF-8"?>
<Project Name="yocprj" Version="1">
<Dependencies Name="Debug"/>
<Description>CPU: ck802</Description>
<Dependencies Name="BuildSet"/>
<VirtualDirectory Name="scrpit">
<File Name="script/gdbinit">
<FileOption/>
</File>
<File Name="script/flashinit">
<FileOption/>
</File>
</VirtualDirectory>
<MonitorProgress>
<FlashOperate>320</FlashOperate>
<DebugLaunch>42</DebugLaunch>
</MonitorProgress>
<BuildConfigs>
<BuildConfig Name="BuildSet">
<Target>
<ROMBank Selected="1">
<ROM1>
<InUse>yes</InUse>
<Start>0x20000000</Start>
<Size>0x1000</Size>
</ROM1>
<ROM2>
<InUse>no</InUse>
<Start/>
<Size/>
</ROM2>
<ROM3>
<InUse>no</InUse>
<Start/>
<Size/>
</ROM3>
<ROM4>
<InUse>no</InUse>
<Start/>
<Size/>
</ROM4>
<ROM5>
<InUse>no</InUse>
<Start/>
<Size/>
</ROM5>
</ROMBank>
<RAMBank>
<RAM1>
<InUse>no</InUse>
<Start>0x20001000</Start>
<Size>0x1000</Size>
<Init>yes</Init>
</RAM1>
<RAM2>
<InUse>no</InUse>
<Start/>
<Size/>
<Init>yes</Init>
</RAM2>
<RAM3>
<InUse>no</InUse>
<Start/>
<Size/>
<Init>yes</Init>
</RAM3>
<RAM4>
<InUse>no</InUse>
<Start/>
<Size/>
<Init>yes</Init>
</RAM4>
<RAM5>
<InUse>no</InUse>
<Start/>
<Size/>
<Init>yes</Init>
</RAM5>
</RAMBank>
<CPU>ck802</CPU>
<UseMiniLib>yes</UseMiniLib>
<Endian>little</Endian>
<UseHardFloat>no</UseHardFloat>
<UseEnhancedLRW>no</UseEnhancedLRW>
<UseContinueBuild>no</UseContinueBuild>
</Target>
<Output>
<OutputName>$(ProjectName)</OutputName>
<Type>Executable</Type>
<CreateHexFile>no</CreateHexFile>
<Preprocessor>no</Preprocessor>
<Disasm>no</Disasm>
<CallGraph>no</CallGraph>
<Map>no</Map>
</Output>
<User>
<BeforeCompile>
<RunUserProg>no</RunUserProg>
<UserProgName/>
</BeforeCompile>
<BeforeMake>
<RunUserProg>no</RunUserProg>
<UserProgName/>
</BeforeMake>
<AfterMake>
<RunUserProg>no</RunUserProg>
<UserProgName/>
</AfterMake>
</User>
<Compiler>
<Define>CONFIG_CSKY_MMU=0</Define>
<Undefine/>
<Optim>Optimize size (-Os)</Optim>
<DebugLevel>Default (-g)</DebugLevel>
<IncludePath/>
<OtherFlags>-ffunction-sections -fdata-sections</OtherFlags>
<Verbose>no</Verbose>
<Ansi>no</Ansi>
<Syntax>no</Syntax>
<Pedantic>no</Pedantic>
<PedanticErr>no</PedanticErr>
<InhibitWarn>no</InhibitWarn>
<AllWarn>yes</AllWarn>
<WarnErr>no</WarnErr>
<OneElfS>no</OneElfS>
<Fstrict>no</Fstrict>
</Compiler>
<Asm>
<Define>CONFIG_CKCPU_MMU=0</Define>
<Undefine/>
<IncludePath/>
<OtherFlags/>
<DebugLevel>gdwarf2</DebugLevel>
</Asm>
<Linker>
<Garbage>yes</Garbage>
<LDFile/>
<LibName/>
<LibPath/>
<OtherFlags/>
<AutoLDFile>no</AutoLDFile>
</Linker>
<Debug>
<LoadApplicationAtStartup>no</LoadApplicationAtStartup>
<Connector>ICE</Connector>
<StopAt>no</StopAt>
<StopAtText>main</StopAtText>
<InitFile>$(ProjectPath)script/gdbinit</InitFile>
<AutoRun>no</AutoRun>
<ResetType>Hard Reset</ResetType>
<SoftResetVal>0</SoftResetVal>
<ResetAfterLoad>no</ResetAfterLoad>
<ConfigICE>
<IP>127.0.0.1</IP>
<PORT>1025</PORT>
<Clock>12000</Clock>
<Delay>10</Delay>
<DDC>yes</DDC>
<TRST>no</TRST>
<Connect>Normal</Connect>
<ResetType>Hard Reset</ResetType>
<SoftResetVal>0</SoftResetVal>
<RTOSType>Bare Metal</RTOSType>
<DownloadToFlash>no</DownloadToFlash>
<ResetAfterConnect>no</ResetAfterConnect>
</ConfigICE>
<ConfigSIM>
<SIMTarget>soccfg/cskyv2/rhea802.xml</SIMTarget>
<OtherFlags/>
<NoGraphic>yes</NoGraphic>
<Log>no</Log>
</ConfigSIM>
</Debug>
<Flash>
<InitFile>$(ProjectPath)script/flashinit</InitFile>
<Erase>Erase Sectors</Erase>
<Algorithms Path="$(CDKPath)/CSKY/Flash/">hobbit1_2_OTP_CDK.elf</Algorithms>
<Program>yes</Program>
<Verify>yes</Verify>
<ResetAndRun>no</ResetAndRun>
</Flash>
</BuildConfig>
</BuildConfigs>
<DebugSessions>
<watchExpressions/>
<memoryExpressions>;;;</memoryExpressions>
<statistics>;;MHZ</statistics>
<peripheralTabs/>
<WatchDisplayFormat>0</WatchDisplayFormat>
<LocalDisplayFormat>0</LocalDisplayFormat>
</DebugSessions>
</Project>

View file

@ -0,0 +1,119 @@
##
## Auto Generated makefile by CDK
## Do not modify this file, and any manual changes will be erased!!!
##
## BuildSet
ProjectName :=yocprj
ConfigurationName :=BuildSet
WorkspacePath :=C:/Users/hgewo/AppData/Roaming/cdk/default_workspace19/
ProjectPath :=E:/cskygit/newyoc/tools/cdk/hobbit1_2_evb_images_programmer/
IntermediateDirectory :=Obj
OutDir :=$(IntermediateDirectory)
User :=hgewo
Date :=09/01/2018
CDKPath :=D:/Program Files (x86)/C-Sky/C-Sky Development Kit
LinkerName :=csky-abiv2-elf-gcc
LinkerNameoption :=
SIZE :=csky-abiv2-elf-size
READELF :=csky-abiv2-elf-readelf
CHECKSUM :=crc32
SharedObjectLinkerName :=
ObjectSuffix :=.o
DependSuffix :=.d
PreprocessSuffix :=.i
DisassemSuffix :=.asm
IHexSuffix :=.ihex
ExeSuffix :=.elf
LibSuffix :=.a
DebugSwitch :=-g
IncludeSwitch :=-I
LibrarySwitch :=-l
OutputSwitch :=-o
ElfInfoSwitch :=-hlS
LibraryPathSwitch :=-L
PreprocessorSwitch :=-D
UnPreprocessorSwitch :=-U
SourceSwitch :=-c
ObjdumpSwitch :=-S
ObjcopySwitch :=-O ihex
OutputFile :=$(ProjectName)
ObjectSwitch :=-o
ArchiveOutputSwitch :=
PreprocessOnlySwitch :=-E
ObjectsFileList :="yocprj.txt"
MakeDirCommand :=mkdir
LinkOptions :=-mcpu=ck802 -nostartfiles -Wl,--gc-sections -T""
IncludeCPath :=
IncludeAPath :=
Libs :=
ArLibs :=
LibPath :=
##
## Common variables
## AR, CXX, CC, AS, CXXFLAGS and CFLAGS can be overriden using an environment variables
##
AR :=csky-abiv2-elf-ar rcu
CXX :=csky-abiv2-elf-g++
CC :=csky-abiv2-elf-gcc
AS :=csky-abiv2-elf-gcc
OBJDUMP :=csky-abiv2-elf-objdump
OBJCOPY :=csky-abiv2-elf-objcopy
CXXFLAGS :=-mcpu=ck802 $(PreprocessorSwitch)CONFIG_CSKY_MMU=0 -Os -g -Wall -ffunction-sections -fdata-sections
CFLAGS :=-mcpu=ck802 $(PreprocessorSwitch)CONFIG_CSKY_MMU=0 -Os -g -Wall -ffunction-sections -fdata-sections
ASFLAGS :=-mcpu=ck802 $(PreprocessorSwitch)CONFIG_CKCPU_MMU=0 -Wa,--gdwarf2
Objects=
##
## Main Build Targets
##
.PHONY: all clean PreBuild PostBuild MakeIntermediateDirs
all: $(IntermediateDirectory)/$(OutputFile)
$(IntermediateDirectory)/$(OutputFile): $(IntermediateDirectory)/.d $(Objects)
@echo "" > $(IntermediateDirectory)/.d
@echo linking...
@$(LinkerName) $(OutputSwitch)"$(IntermediateDirectory)/$(OutputFile)$(ExeSuffix)" $(LinkerNameoption) @$(ObjectsFileList) $(LibPath) $(Libs) $(LinkOptions)
@echo size of target:
@$(SIZE) "$(ProjectPath)$(IntermediateDirectory)/$(OutputFile)$(ExeSuffix)"
@echo -n "checksum value of target: "
@$(CHECKSUM) "$(ProjectPath)/$(IntermediateDirectory)/$(OutputFile)$(ExeSuffix)"
MakeIntermediateDirs:
@test -d Obj || $(MakeDirCommand) Obj
@test -d Lst || $(MakeDirCommand) Lst
$(IntermediateDirectory)/.d:
@test -d Obj || $(MakeDirCommand) Obj
@test -d Lst || $(MakeDirCommand) Lst
PreBuild:
##
## Objects
##
$(IntermediateDirectory)/__rt_entry$(ObjectSuffix): $(IntermediateDirectory)/__rt_entry$(DependSuffix)
@$(AS) $(SourceSwitch) "$(ProjectPath)/$(IntermediateDirectory)/__rt_entry.S" $(ASFLAGS) $(ObjectSwitch)$(IntermediateDirectory)/__rt_entry$(ObjectSuffix) $(IncludeAPath)
@rm -f $(IntermediateDirectory)/__rt_entry.S
$(IntermediateDirectory)/__rt_entry$(DependSuffix):
@$(CC) $(CFLAGS) $(IncludeAPath) -MG -MP -MT$(IntermediateDirectory)/__rt_entry$(ObjectSuffix) -MF$(IntermediateDirectory)/__rt_entry$(DependSuffix) -MM "$(ProjectPath)/$(IntermediateDirectory)/__rt_entry.S"
-include $(IntermediateDirectory)/*$(DependSuffix)
##
## Clean
##
clean:
@echo Cleaning target...
@rm -rf $(IntermediateDirectory)/ $(ObjectsFileList) yocprj.mk Lst/
clean_internal:
@rm -rf $(IntermediateDirectory)/*.o $(IntermediateDirectory)/.d $(IntermediateDirectory)/*.d $(IntermediateDirectory)/*.a $(IntermediateDirectory)/*.elf $(IntermediateDirectory)/*.ihex Lst/

View file

@ -0,0 +1,49 @@
NAME := board_hobbit1_2
JTAG := jlink
$(NAME)_TYPE := kernel
MODULE := HOBBIT1_2
HOST_CHIP := hobbit1_2
HOST_ARCH := ck802
HOST_MCU_FAMILY := csky
SUPPORT_BINS := no
#$(NAME)_COMPONENTS := tfs
#CONFIG_LIB_TFS := y
#CONFIG_TFS_ID2_RSA := y
#CONFIG_TFS_ID2_3DES := n
#CONFIG_TFS_EMULATE := n
#CONFIG_TFS_ON_LINE := n
#CONFIG_TFS_OPENSSL := n
#CONFIG_TFS_MBEDTLS := n
#CONFIG_TFS_ALICRYPTO := n
#CONFIG_TFS_DEBUG := n
#CONFIG_TFS_TEE := n
#CONFIG_TFS_SW := y
#CONFIG_TFS_TEST := n
$(NAME)_SOURCES := board_init.c
$(NAME)_SOURCES += net/ethernetif.c
GLOBAL_INCLUDES += include/
GLOBAL_DEFINES += STDIO_UART=0 MBEDTLS_AES_ROM_TABLES=1
define get-os-version
"AOS-R"-$(CURRENT_TIME)
endef
CONFIG_SYSINFO_OS_VERSION := $(call get-os-version)
CONFIG_SYSINFO_PRODUCT_MODEL := ALI_AOS_CKHOBBIT
CONFIG_SYSINFO_DEVICE_NAME := CKHOBBIT
GLOBAL_CFLAGS += -DSYSINFO_OS_VERSION=\"$(CONFIG_SYSINFO_OS_VERSION)\"
GLOBAL_CFLAGS += -DSYSINFO_PRODUCT_MODEL=\"$(CONFIG_SYSINFO_PRODUCT_MODEL)\"
GLOBAL_CFLAGS += -DSYSINFO_DEVICE_NAME=\"$(CONFIG_SYSINFO_DEVICE_NAME)\"
GLOBAL_CFLAGS += -std=gnu99
#GLOBAL_LDFLAGS += -L $(SOURCE_ROOT)/board/ckhobbit1_2
GLOBAL_LDFLAGS += -Wl,-ckmap='ckhobbit1_2.map' -Wl,-zmax-page-size=1024 -lm
# Extra build target in mico_standard_targets.mk, include bootloader, and copy output file to eclipse debug file (copy_output_for_eclipse)
EXTRA_TARGET_MAKEFILES += $(MAKEFILES_PATH)/aos_standard_targets.mk
EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/gen_crc_bin.mk

View file

@ -0,0 +1,229 @@
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef CONFIG_H
#define CONFIG_H
/* chip level conf */
#ifndef RHINO_CONFIG_LITTLE_ENDIAN
#define RHINO_CONFIG_LITTLE_ENDIAN 1
#endif
#ifndef RHINO_CONFIG_CPU_STACK_DOWN
#define RHINO_CONFIG_CPU_STACK_DOWN 1
#endif
/* kernel feature conf */
#ifndef RHINO_CONFIG_SEM
#define RHINO_CONFIG_SEM 1
#endif
#ifndef RHINO_CONFIG_QUEUE
#define RHINO_CONFIG_QUEUE 1
#endif
#ifndef RHINO_CONFIG_TASK_SEM
#define RHINO_CONFIG_TASK_SEM 1
#endif
#ifndef RHINO_CONFIG_EVENT_FLAG
#define RHINO_CONFIG_EVENT_FLAG 1
#endif
#ifndef RHINO_CONFIG_TIMER
#define RHINO_CONFIG_TIMER 1
#endif
#ifndef RHINO_CONFIG_BUF_QUEUE
#define RHINO_CONFIG_BUF_QUEUE 1
#endif
#ifndef RHINO_CONFIG_MM_BLK
#define RHINO_CONFIG_MM_BLK 1
#endif
#ifndef RHINO_CONFIG_MM_DEBUG
#define RHINO_CONFIG_MM_DEBUG 1
#endif
#ifndef RHINO_CONFIG_MM_TLF
#define RHINO_CONFIG_MM_TLF 1
#endif
#ifndef RHINO_CONFIG_MM_TLF_BLK_SIZE
#define RHINO_CONFIG_MM_TLF_BLK_SIZE 8192
#endif
#define K_MM_STATISTIC 1
#ifndef RHINO_CONFIG_MM_MAXMSIZEBIT
#define RHINO_CONFIG_MM_MAXMSIZEBIT 19
#endif
#ifndef RHINO_CONFIG_GCC_RETADDR
#define RHINO_CONFIG_GCC_RETADDR 1
#endif
#ifndef RHINO_CONFIG_MM_LEAKCHECK
#define RHINO_CONFIG_MM_LEAKCHECK 1
#endif
#ifndef RHINO_CONFIG_RINGBUF_VENDOR
#define RHINO_CONFIG_RINGBUF_VENDOR 0
#endif
#ifndef RHINO_CONFIG_KOBJ_SET
#define RHINO_CONFIG_KOBJ_SET 1
#endif
/* kernel task conf */
#ifndef RHINO_CONFIG_TASK_SUSPEND
#define RHINO_CONFIG_TASK_SUSPEND 1
#endif
#ifndef RHINO_CONFIG_TASK_INFO
#define RHINO_CONFIG_TASK_INFO 1
#endif
#ifndef RHINO_CONFIG_TASK_DEL
#define RHINO_CONFIG_TASK_DEL 1
#endif
#ifndef RHINO_CONFIG_MM_LEAKCHECK
#define RHINO_CONFIG_MM_LEAKCHECK 1
#endif
#ifndef RHINO_CONFIG_TASK_STACK_CUR_CHECK
#define RHINO_CONFIG_TASK_STACK_CUR_CHECK 1
#endif
#ifndef RHINO_CONFIG_TASK_WAIT_ABORT
#define RHINO_CONFIG_TASK_WAIT_ABORT 1
#endif
#ifndef RHINO_CONFIG_TASK_STACK_OVF_CHECK
#define RHINO_CONFIG_TASK_STACK_OVF_CHECK 1
#endif
#ifndef RHINO_CONFIG_SCHED_RR
#define RHINO_CONFIG_SCHED_RR 1
#endif
#ifndef RHINO_CONFIG_TIME_SLICE_DEFAULT
#define RHINO_CONFIG_TIME_SLICE_DEFAULT 50
#endif
#ifndef RHINO_CONFIG_PRI_MAX
#define RHINO_CONFIG_PRI_MAX 62
#endif
#ifndef RHINO_CONFIG_USER_PRI_MAX
#define RHINO_CONFIG_USER_PRI_MAX (RHINO_CONFIG_PRI_MAX - 2)
#endif
/* kernel workqueue conf */
#ifndef RHINO_CONFIG_WORKQUEUE
#define RHINO_CONFIG_WORKQUEUE 1
#endif
#ifndef RHINO_CONFIG_WORKQUEUE_STACK_SIZE
#define RHINO_CONFIG_WORKQUEUE_STACK_SIZE 768
#endif
/* kernel mm_region conf */
#ifndef RHINO_CONFIG_MM_REGION_MUTEX
#define RHINO_CONFIG_MM_REGION_MUTEX 0
#endif
/* kernel timer&tick conf */
#ifndef RHINO_CONFIG_HW_COUNT
#define RHINO_CONFIG_HW_COUNT 0
#endif
#ifndef RHINO_CONFIG_TICK_TASK
#define RHINO_CONFIG_TICK_TASK 0
#endif
#if (RHINO_CONFIG_TICK_TASK > 0)
#ifndef RHINO_CONFIG_TICK_TASK_STACK_SIZE
#define RHINO_CONFIG_TICK_TASK_STACK_SIZE 256
#endif
#ifndef RHINO_CONFIG_TICK_TASK_PRI
#define RHINO_CONFIG_TICK_TASK_PRI 1
#endif
#endif
#ifndef RHINO_CONFIG_TICKLESS
#define RHINO_CONFIG_TICKLESS 0
#endif
#ifndef RHINO_CONFIG_TICKS_PER_SECOND
#define RHINO_CONFIG_TICKS_PER_SECOND 500
#endif
/* must be 2^n size!, such as 1, 2, 4, 8, 16,32, etc....... */
#ifndef RHINO_CONFIG_TICK_HEAD_ARRAY
#define RHINO_CONFIG_TICK_HEAD_ARRAY 8
#endif
/*must reserve enough stack size for timer cb will consume*/
#ifndef RHINO_CONFIG_TIMER_TASK_STACK_SIZE
#define RHINO_CONFIG_TIMER_TASK_STACK_SIZE 300
#endif
#ifndef RHINO_CONFIG_TIMER_RATE
#define RHINO_CONFIG_TIMER_RATE 1
#endif
#ifndef RHINO_CONFIG_TIMER_TASK_PRI
#define RHINO_CONFIG_TIMER_TASK_PRI 5
#endif
/* kernel intrpt conf */
#ifndef RHINO_CONFIG_INTRPT_STACK_REMAIN_GET
#define RHINO_CONFIG_INTRPT_STACK_REMAIN_GET 0
#endif
#ifndef RHINO_CONFIG_INTRPT_STACK_OVF_CHECK
#define RHINO_CONFIG_INTRPT_STACK_OVF_CHECK 1
#endif
#ifndef RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL
#define RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL 188u
#endif
#ifndef RHINO_CONFIG_INTRPT_GUARD
#define RHINO_CONFIG_INTRPT_GUARD 0
#endif
/* kernel dyn alloc conf */
#ifndef RHINO_CONFIG_KOBJ_DYN_ALLOC
#define RHINO_CONFIG_KOBJ_DYN_ALLOC 1
#endif
#if (RHINO_CONFIG_KOBJ_DYN_ALLOC > 0)
#ifndef RHINO_CONFIG_K_DYN_QUEUE_MSG
#define RHINO_CONFIG_K_DYN_QUEUE_MSG 30
#endif
#ifndef RHINO_CONFIG_K_DYN_TASK_STACK
#define RHINO_CONFIG_K_DYN_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_K_DYN_MEM_TASK_PRI
#define RHINO_CONFIG_K_DYN_MEM_TASK_PRI 6
#endif
#endif
/* kernel idle conf */
#ifndef RHINO_CONFIG_IDLE_TASK_STACK_SIZE
#define RHINO_CONFIG_IDLE_TASK_STACK_SIZE 200
#endif
/* kernel hook conf */
#ifndef RHINO_CONFIG_USER_HOOK
#define RHINO_CONFIG_USER_HOOK 1
#endif
/* kernel stats conf */
#ifndef RHINO_CONFIG_SYSTEM_STATS
#define RHINO_CONFIG_SYSTEM_STATS 1
#endif
#ifndef RHINO_CONFIG_DISABLE_SCHED_STATS
#define RHINO_CONFIG_DISABLE_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_DISABLE_INTRPT_STATS
#define RHINO_CONFIG_DISABLE_INTRPT_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_STATS
#define RHINO_CONFIG_CPU_USAGE_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_PRI
#define RHINO_CONFIG_CPU_USAGE_TASK_PRI (RHINO_CONFIG_PRI_MAX - 2)
#endif
#ifndef RHINO_CONFIG_TASK_SCHED_STATS
#define RHINO_CONFIG_TASK_SCHED_STATS 0
#endif
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_STACK
#define RHINO_CONFIG_CPU_USAGE_TASK_STACK 256
#endif
#ifndef RHINO_CONFIG_CPU_NUM
#define RHINO_CONFIG_CPU_NUM 1
#endif
/* kernel trace conf */
#ifndef RHINO_CONFIG_TRACE
#define RHINO_CONFIG_TRACE 0
#endif
#endif /* CONFIG_H */

View file

@ -0,0 +1,340 @@
/**
* @file
*
* lwIP Options Configuration
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef LWIP_LWIPOPTS_H
#define LWIP_LWIPOPTS_H
//#include "lwip/arch.h"
#include <csi_config.h>
#define LWIP_MEM_OPTIMIZER 1
#define LWIP_SIZE_OPTIMIZER 1
/**
* Include user defined options first. Anything not defined in these files
* will be set to standard values. Override anything you dont like!
*/
/*
-------------- NO SYS --------------
*/
#define NO_SYS 0
#define SYS_LIGHTWEIGHT_PROT (NO_SYS == 0)
/*
----------- Core locking -----------
*/
#define LWIP_TCPIP_CORE_LOCKING 0
#define MEMP_OVERFLOW_CHECK 1
/*
---------- Memory options ----------
*/
/* If MEM_LIBC_MALLOC and MEMP_MEM_MALLOC are defined to 1,
MEM_SIZE and MEMP_NUM_XXX will be invalid */
#define MEM_LIBC_MALLOC 0
#define MEMP_MEM_MALLOC 0
#define MEM_ALIGNMENT 4
/* Application data is used for packet buffer directly */
#if LWIP_MEM_OPTIMIZER
#define MEM_SIZE 3216
#else
#define MEM_SIZE 6144//(1600+500)
#endif
/*
---------- Internal Memory Pool Sizes ----------
*/
#define MEMP_NUM_PBUF 2
#define MEMP_NUM_RAW_PCB 1
#define MEMP_NUM_UDP_PCB 4
#define MEMP_NUM_TCP_PCB 2
#define MEMP_NUM_TCP_PCB_LISTEN 1
#define MEMP_NUM_TCP_SEG 8
#define MEMP_NUM_REASSDATA 2
#define MEMP_NUM_FRAG_PBUF 2
#define MEMP_NUM_ARP_QUEUE 8
#define MEMP_NUM_NETBUF 2
#define MEMP_NUM_NETCONN 5
#define MEMP_NUM_TCPIP_MSG_API 4
#define MEMP_NUM_TCPIP_MSG_INPKT 4
#if LWIP_MEM_OPTIMIZER
#define PBUF_POOL_SIZE 3
#else
#define PBUF_POOL_SIZE 4
#endif
#define LWIP_PRIVATE_FD_SET 1
/*
---------- ARP options ----------
*/
#define LWIP_ARP 1
/*
---------- IP options ----------
*/
#define LWIP_IPV4 1
#define IP_FORWARD 0
#define IP_OPTIONS_ALLOWED 1
#define IP_REASSEMBLY 0
#define IP_FRAG 0
#define IP_REASS_MAXAGE 3
#define IP_REASS_MAX_PBUFS 4
#define IP_FRAG_USES_STATIC_BUF 0
/*
---------- ICMP options ----------
*/
#define LWIP_ICMP 1
/*
---------- RAW options ----------
*/
#define LWIP_RAW 1
/*
---------- DHCP options ----------
*/
#define LWIP_DHCP 1
#define DHCP_DOES_ARP_CHECK 0
/*
---------- AUTOIP options ----------
*/
#define LWIP_AUTOIP 0
/*
---------- SNMP options ----------
*/
#define LWIP_SNMP 0
/*
---------- IGMP options ----------
*/
#define LWIP_IGMP 1
/*
---------- DNS options -----------
*/
#define LWIP_DNS 1
#define LWIP_DNS_SECURE 0
#if LWIP_MEM_OPTIMIZER
#define DNS_MAX_NAME_LENGTH 64 //default is 256
#endif
/*
---------- UDP options ----------
*/
#define LWIP_UDP 1
/*
---------- TCP options ----------
*/
#define LWIP_TCP 1
#define TCP_WND (1 * TCP_MSS)
#define TCP_QUEUE_OOSEQ 0
#if LWIP_MEM_OPTIMIZER
#define TCP_MSS 536
#else
#define TCP_MSS 1460 //1440(IPV6)//1460(IPV4)
#endif
/* lwip_sanity_check, TCP_SND_BUF must be at least as much as (2 * TCP_MSS) */
#define TCP_SND_BUF (2 * TCP_MSS)
#define LWIP_LISTEN_BACKLOG 0
#define TCP_OVERSIZE TCP_MSS
/*
---------- Pbuf options ----------
*/
#define PBUF_LINK_HLEN 16
//#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN)
#define PBUF_POOL_BUFSIZE 512
/*
---------- Network Interfaces options ----------
*/
/*
---------- LOOPIF options ----------
*/
#define LWIP_HAVE_LOOPIF 0
/*
---------- Thread options ----------
*/
#define TCPIP_MBOX_SIZE 16
#define DEFAULT_ACCEPTMBOX_SIZE 8
#define DEFAULT_RAW_RECVMBOX_SIZE 4
#define DEFAULT_UDP_RECVMBOX_SIZE 8
#define DEFAULT_TCP_RECVMBOX_SIZE 8
#define TCPIP_THREAD_STACKSIZE 1024
#define TCPIP_THREAD_PRIO 7
/*
---------- Sequential layer options ----------
*/
#define LWIP_NETCONN 1
/*
---------- Socket options ----------
*/
#define LWIP_SOCKET 1
#define LWIP_COMPAT_SOCKETS 1
#define LWIP_POSIX_SOCKETS_IO_NAMES 1
#define LWIP_SOCKET_OFFSET 20
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVTIMEO 1
#define SO_REUSE 1
#define LWIP_SO_BINDTODEVICE 0
#define LWIP_SOCKET_SEND_NOCOPY 0
/*
---------- Statistics options ----------
*/
#if LWIP_SIZE_OPTIMIZER
#define LWIP_STATS 0
#define LWIP_STATS_DISPLAY 0
#else
#define LWIP_STATS 1
#define LWIP_STATS_DISPLAY 1
#endif
#define LINK_STATS 0
#define ETHARP_STATS 0
#define IP_STATS 0
#define IPFRAG_STATS 0
#define ICMP_STATS 0
#define IGMP_STATS 0
#define UDP_STATS 0
#define TCP_STATS 0
//#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0))
//#define MEMP_STATS (MEMP_MEM_MALLOC == 0)
//#define SYS_STATS (NO_SYS == 0)
#define IP6_STATS 0
#define ICMP6_STATS 0
#define IP6_FRAG_STATS 0
#define MLD6_STATS 0
#define ND6_STATS 0
#define MIB2_STATS 0
/*
---------- Checksum options ----------
*/
/*
---------- IPv6 options ---------------
*/
#define LWIP_IPV6 0
#define LWIP_IPV6_FRAG 0
#define LWIP_ICMP6 1
#define LWIP_IPV6_REASS 0
#define LWIP_IPV6_MLD 0
#define LWIP_ND6_MAX_MULTICAST_SOLICIT 10
/*
---------- Hook options ---------------
*/
//#define LWIP_HOOK_IP4_ROUTE_SRC lwip_ip4_route_src
/*
---------- Debugging options ----------
*/
//#define LWIP_DEBUG
#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL
#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE|LWIP_DBG_STATE|LWIP_DBG_FRESH|LWIP_DBG_HALT)
#define MEM_DEBUG LWIP_DBG_OFF
#define MEMP_DEBUG LWIP_DBG_OFF
#define PBUF_DEBUG LWIP_DBG_OFF
#define API_LIB_DEBUG LWIP_DBG_OFF
#define API_MSG_DEBUG LWIP_DBG_OFF
#define TCPIP_DEBUG LWIP_DBG_OFF
#define NETIF_DEBUG LWIP_DBG_OFF
#define SOCKETS_DEBUG LWIP_DBG_OFF
#define IP_DEBUG LWIP_DBG_OFF
#define IP_REASS_DEBUG LWIP_DBG_OFF
#define RAW_DEBUG LWIP_DBG_OFF
#define ICMP_DEBUG LWIP_DBG_OFF
#define UDP_DEBUG LWIP_DBG_OFF
#define TCP_DEBUG LWIP_DBG_OFF
#define TCP_INPUT_DEBUG LWIP_DBG_OFF
#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF
#define TCP_RTO_DEBUG LWIP_DBG_OFF
#define TCP_CWND_DEBUG LWIP_DBG_OFF
#define TCP_WND_DEBUG LWIP_DBG_OFF
#define TCP_FR_DEBUG LWIP_DBG_OFF
#define TCP_QLEN_DEBUG LWIP_DBG_OFF
#define TCP_RST_DEBUG LWIP_DBG_OFF
#if LWIP_SIZE_OPTIMIZER
#define LWIP_NOASSERT 1
#endif
/*
---------- Performance tracking options ----------
*/
/*
---------- PPP options ----------
*/
#define PPP_SUPPORT 0
#define LWIP_NETIF_API 1
/*
---------- Extend options ----------
*/
#define LWIP_XR_EXT_MBUF_SUPPORT 0
#define LWIP_XR_EXT 0
#define LWIP_EXT_SIM_ARP 0
#define LWIP_EXT_ZWP_LIMITED 0
#endif /* LWIP_LWIPOPTS_H */

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/*
* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/******************************************************************************
* @file pin.h
* @brief header File for pin definition
* @version V1.0
* @date 02. June 2017
******************************************************************************/
#ifndef HOBBIT1_2_PIN_H
#define HOBBIT1_2_PIN_H
#include <stdint.h>
#include "pin_name.h"
#define CONSOLE_TXD PA10_ADC2_TXD0//PA2_TXD0_SPI0MISO
#define CONSOLE_RXD PA11_ACMP0N_ADC3_RXD0//PA3_RXD0_SPI0MOSI
#define CONSOLE_IDX 0
#define UART_TXD1 PA17_TXD1_ADC9//PA21_SPI1SCK_TRIG1_TXD1
#define UART_RXD1 PA16_RXD1_ADC8//PA20_SPI1SSN2_TRIG0_RXD1
#define UART_TXD2 PA24_TXD2_I2SMCLK_SPI1SSN0
#define UART_RXD2 PA25_RXD2_I2SSCK_SPI1SSN1
#define SPI0_TX PA2_TXD0_SPI0MISO
#define SPI0_RX PA3_RXD0_SPI0MOSI
#define SPI0_CLK PA4_CTS0_PWM0_SPI0SCK_TRIG0
#define SPI0_CS PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define SPI1_TX PA22_SPI1MISO_PWM0_ADC10
#define SPI1_RX PA23_SPI1MOSI_PWM1_ADC11
#define SPI1_CLK PA21_SPI1SCK_TRIG1_TXD1
#define SPI1_CS PA18_SPI1SSN0_ACMP0O
#define TEST_SPI_IDX 1
#define IIC_SCL0 PA6_SPI0MOSI_PWM6_SCL0
#define IIC_SDA0 PA7_SPI0SSN_PWM7_SDA0
#define IIC_SCL1 PC0_SCL1_CTS1_PWM10_ADC14
#define IIC_SDA1 PC1_SDA1_RTS1_PWM11_ADC15
#define TEST_IIC_IDX 1
#define UART_PINS { {PA2_TXD0_SPI0MISO,PA3_RXD0_SPI0MOSI},\
{PA21_SPI1SCK_TRIG1_TXD1,PA20_SPI1SSN2_TRIG0_RXD1},\
{PA24_TXD2_I2SMCLK_SPI1SSN0,PA25_RXD2_I2SSCK_SPI1SSN1} }
#define UART_PINS { {PA2_TXD0_SPI0MISO,PA3_RXD0_SPI0MOSI},\
{PA21_SPI1SCK_TRIG1_TXD1,PA20_SPI1SSN2_TRIG0_RXD1},\
{PA24_TXD2_I2SMCLK_SPI1SSN0,PA25_RXD2_I2SSCK_SPI1SSN1} }
#define PWM_CH0 PA4_CTS0_PWM0_SPI0SCK_TRIG0
#define PWM_CH1 PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define PWM_CH2 PB0_SCL0_PWM2_I2SMCLK
#define PWM_CH3 PB1_SDA0_PWM3_I2SSCK
#define PWM_CH4 PB2_SPI0SCK_PWM4_I2SWS
#define PWM_CH5 PB3_SPI0MISO_PWM5_I2SSD
#define GPIO_EXAMPLE_PORT PORTA
#define GPIO_EXAMPLE_PIN PA17_TXD1_ADC9
#define CTS_GPIO_TEST_PIN PA18_SPI1SSN0_ACMP0O
#define CTS_GPIO_TEST_PORT PORTA
#define EXAMPLE_BOARD_GPIO_PIN_NAME "TX1"
#define CTS_BOARD_GPIO_PIN_NAME "PA18"
/****Ethernet Drvier****/
#define PIN_ETH_INT PA20_SPI1SSN2_TRIG0_RXD1
#define PIN_ETH_RST PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define ETH_SPI_TX PB3_SPI0MISO_PWM5_I2SSD//PA2_TXD0_SPI0MISO
#define ETH_SPI_RX PA6_SPI0MOSI_PWM6_SCL0//PA3_RXD0_SPI0MOSI
#define ETH_SPI_CLK PB2_SPI0SCK_PWM4_I2SWS//PA4_CTS0_PWM0_SPI0SCK_TRIG0
#define ETH_SPI_CS PA7_SPI0SSN_PWM7_SDA0//PA5_RTS0_PWM1_SPI0SSN_TRIG1
#define ETH_SPI_IDX 0
#define ADC_PIN0 PA8_WKUP_ADC0_ACMP0P
#define ADC_PIN1 PA9_BOOT_ADC1_PWMFAULT
#define ADC_PIN2 PA10_ADC2_TXD0
#define ADC_PIN3 PA11_ACMP0N_ADC3_RXD0
#define ADC_PIN4 PA12_PWM8_TCK_ADC4
#define ADC_PIN5 PA13_PWM9_TMS_ADC5
#define ADC_PIN6 PA14_PWM10_ADC6
#define ADC_PIN7 PA15_PWM11_ADC7
#define ADC_PIN8 PA16_RXD1_ADC8
#define ADC_PIN9 PA17_TXD1_ADC9
#define ADC_PIN10 PA22_SPI1MISO_PWM0_ADC10
#define ADC_PIN11 PA23_SPI1MOSI_PWM1_ADC11
#define ADC_PIN12 PA26_CTS2_I2SWS_ADC12
#define ADC_PIN13 PA27_RTS2_I2SSD_ADC13
#define ADC_PIN14 PC0_SCL1_CTS1_PWM10_ADC14
#define ADC_PIN15 PC1_SDA1_RTS1_PWM11_ADC15
#define ADC_PINS_MAX_NUM 16
#endif /* HOBBIT1_2_PIN_H */

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/*
* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* Ethernet Interface Skeleton
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
/*
* This file is a skeleton for developing Ethernet network interface
* drivers for lwIP. Add code to the low_level functions and do a
* search-and-replace for the word "ethernetif" to replace it with
* something that better describes your network interface.
*/
#include <csi_config.h>
#ifdef CONFIG_NETIF_ETH
//#include <csi_syslog.h>
#include <aos/aos.h>
#include <string.h>
#include "lwip/opt.h"
#include "lwip/def.h"
#include "lwip/mem.h"
#include "lwip/pbuf.h"
#include "lwip/stats.h"
#include "lwip/snmp.h"
#include "lwip/ethip6.h"
#include "lwip/etharp.h"
#include "lwip/sys.h"
#include "lwip/netif.h"
#include "lwip/tcpip.h"
#include "csi_core.h"
#include "csi_kernel.h"
#include "netif/ethernet.h"
#include "pin.h"
#include "drv_spi.h"
#include "drv_gpio.h"
#include "drv_eth.h"
#include "drv_eth_phy.h"
#include "drv_eth_mac.h"
#include <errno.h>
#ifdef CONFIG_TEE_CA
#include <drv_tee.h>
#endif
#include <aos/list.h>
#include "lwip/sockets.h"
/* Define those to better describe your network interface. */
#define IFNAME0 'e'
#define IFNAME1 'n'
#define NIC_MBOX_SIZE 32
#define NETIF_TASK_STACKSIZE 1024 /* unit 1 byte */
#define NETIF_TASK_PRIO 8
#define THIS_MODULE MODULE_DEV_ETH
#ifndef CONFIG_NET_INIT_OPEN
static int nic_link_stat = 0;
#else
int nic_link_stat = 0;
uint8_t g_init_flag = 0;
#endif
eth_phy_handle_t eth_phy_handle;
eth_mac_handle_t eth_mac_handle;
k_timer_handle_t timer_send_handle;
/**
* Helper struct to hold private data used to operate your ethernet interface.
* Keeping the ethernet address of the MAC in this struct is not necessary
* as it is already kept in the struct netif.
* But this is only an example, anyway...
*/
struct ethernetif {
struct eth_addr *ethaddr;
/* Add whatever per-interface state that is needed here. */
};
struct netif lwip_netif;
static sys_mbox_t mbox_nic_Int;
struct nic_msg {
dlist_t node;
struct netif *netif;
uint32_t event;
};
dlist_t nic_msg_list;
struct nic_msg nic_msg_node[NIC_MBOX_SIZE];
/* Forward declarations. */
extern int32_t csi_eth_mac_ex_send_frame_begin(eth_mac_handle_t handle, uint32_t len);
extern int32_t csi_eth_mac_ex_send_frame(eth_mac_handle_t handle, const uint8_t *frame, uint32_t len, uint32_t flags);
extern int32_t csi_eth_mac_ex_send_frame_end(eth_mac_handle_t handle);
extern int32_t csi_eth_mac_ex_read_frame(eth_mac_handle_t handle, uint8_t *frame, uint32_t len);
extern int32_t csi_eth_mac_ex_read_frame_begin(eth_mac_handle_t handle);
extern int32_t csi_eth_mac_ex_read_frame_end(eth_mac_handle_t handle);
static void ethernetif_input(struct netif *netif);
static int nic_net_restart(const uint8_t *macaddrs);
void nic_task(void *arg);
int32_t g_fn_phy_read(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
{
return 0;
}
int32_t g_fn_phy_write(uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
{
return 0;
}
/**
* netif_set_rs_count.
*
* @param NULL
*
*/
void netif_set_rs_count(struct netif *netif, uint8_t value)
{
#if LWIP_IPV6
netif->rs_count = value;
#endif
}
/**
* get network link status.
*
* @param NULL
*
*/
int yoc_net_get_link_status(void)
{
return nic_link_stat;
}
/**
* In this function, send a sem for net reset.
* csios_net_hwreset.
*
* @param NULL
*
*/
int yoc_net_hwreset(void)
{
LOG("NET RESET NOW.");
uint32_t lpsr = csi_irq_save();
nic_net_restart(lwip_netif.hwaddr);
csi_irq_restore(lpsr);
return 0;
}
static void eth_mac_signal_event(int32_t idx, uint32_t event)
{
int i = 0;
if (nic_msg_list.next == nic_msg_list.prev) {
LOG("list empty, event=%d lost", event);
dlist_init(&nic_msg_list);
for (i = 0; i < NIC_MBOX_SIZE; i++) {
dlist_add_tail(&nic_msg_node[i].node, &nic_msg_list);
}
return;
}
/* not need to modify msg, it's like a semaphore */
struct nic_msg *evt = (struct nic_msg *)nic_msg_list.next;
dlist_del(&evt->node);
evt->event = event;
sys_mbox_trypost(&mbox_nic_Int, evt);
}
/**
* enc28j60_net_restart.
*
* @param macaddr for net
*
*/
static int nic_net_restart(const uint8_t *macaddrs)
{
int ret = -1;
/* restart init */
eth_mac_handle = csi_eth_mac_initialize(0, eth_mac_signal_event);
/* enable irq */
ret = csi_eth_mac_control(eth_mac_handle, CSI_ETH_MAC_CONTROL_RX, 1);
return ret;
}
void nic_send_timeout_cb(void *arg)
{
LOG("nic_send_timeout_cb");
uint32_t lpsr = csi_irq_save();
csi_eth_mac_initialize(0, eth_mac_signal_event);
csi_eth_mac_control(eth_mac_handle, CSI_ETH_MAC_CONTROL_RX, 1);
csi_irq_restore(lpsr);
}
/**
* In this function, the hardware should be initialized.
* Called from ethernetif_init().
*
* @param netif the already initialized lwip network interface structure
* for this ethernetif
*/
static void low_level_init(struct netif *netif)
{
#ifndef CONFIG_ETH_MACADDR
#ifdef CONFIG_TEE_CA
int random;
csi_tee_rand_generate((uint8_t *)&random, 4);
#else
int random = rand();
#endif
#endif
int i;
/* set MAC hardware address length */
netif->hwaddr_len = NETIF_MAX_HWADDR_LEN; //ETHARP_HWADDR_LEN;
/* set MAC hardware address */
#ifdef CONFIG_ETH_MACADDR
netif->hwaddr[0] = (CONFIG_ETH_MACADDR >> 40) & 0xff;
netif->hwaddr[1] = (CONFIG_ETH_MACADDR >> 32) & 0xff;
netif->hwaddr[2] = (CONFIG_ETH_MACADDR >> 24) & 0xff;
netif->hwaddr[3] = (CONFIG_ETH_MACADDR >> 16) & 0xff;
netif->hwaddr[4] = (CONFIG_ETH_MACADDR >> 8) & 0xff;
netif->hwaddr[5] = (CONFIG_ETH_MACADDR) & 0xff;
#else
netif->hwaddr[0] = 0x00;
netif->hwaddr[1] = 0x11;
netif->hwaddr[2] = 0x22;
netif->hwaddr[3] = (random >> 16) & 0xFF;
netif->hwaddr[4] = (random >> 8) & 0xFF;
netif->hwaddr[5] = (random) & 0xFF;
#endif
/* maximum transfer unit */
netif->mtu = TCP_MSS + 54 + 10; /* net head + redundance */
/* device capabilities */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
#if LWIP_IPV6 && LWIP_IPV6_MLD
/*
* For hardware/netifs that implement MAC filtering.
* All-nodes link-local is handled by default, so we must let the hardware know
* to allow multicast packets in.
* Should set mld_mac_filter previously. */
if (netif->mld_mac_filter != NULL) {
ip6_addr_t ip6_allnodes_ll;
ip6_addr_set_allnodes_linklocal(&ip6_allnodes_ll);
netif->mld_mac_filter(netif, &ip6_allnodes_ll, NETIF_ADD_MAC_FILTER);
}
#endif /* LWIP_IPV6 && LWIP_IPV6_MLD */
csi_eth_mac_set_macaddr(eth_mac_handle, (const eth_mac_addr_t *)netif->hwaddr);
eth_phy_handle = csi_eth_phy_initialize(g_fn_phy_read, g_fn_phy_write);
eth_mac_handle = csi_eth_mac_initialize(0, eth_mac_signal_event);
if (eth_mac_handle != NULL) {
LOG("csi_eth init OK");
}
nic_link_stat = csi_eth_phy_get_linkstate(eth_phy_handle);
/* Do whatever else is needed to initialize interface. */
sys_mbox_new(&mbox_nic_Int, NIC_MBOX_SIZE);
timer_send_handle = csi_kernel_timer_new(nic_send_timeout_cb, KTIMER_TYPE_ONCE, NULL);
dlist_init(&nic_msg_list);
for (i = 0; i < NIC_MBOX_SIZE; i++) {
dlist_add_tail(&nic_msg_node[i].node, &nic_msg_list);
}
LOG("MAC: %02x:%02x:%02x:%02x:%02x:%02x", netif->hwaddr[0], netif->hwaddr[1], netif->hwaddr[2], netif->hwaddr[3], netif->hwaddr[4], netif->hwaddr[5]);
csi_eth_mac_control(eth_mac_handle, CSI_ETH_MAC_CONTROL_RX, 1);
sys_thread_new("nic_task", nic_task, &lwip_netif, NETIF_TASK_STACKSIZE, NETIF_TASK_PRIO);
}
/**
* This function should do the actual transmission of the packet. The packet is
* contained in the pbuf that is passed to the function. This pbuf
* might be chained.
*
* @param netif the lwip network interface structure for this ethernetif
* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
* @return ERR_OK if the packet could be sent
* an err_t value if the packet couldn't be sent
*
* @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
* strange results. You might consider waiting for space in the DMA queue
* to become available since the stack doesn't retry to send a packet
* dropped because of memory failure (except for the TCP timers).
*/
#ifdef CONFIG_ETH_ENC28J60_USE_PBUF
static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
struct pbuf *q = NULL;
int l = 0;
#if ETH_PAD_SIZE
pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */
#endif
csi_kernel_timer_stop(timer_send_handle);
csi_kernel_timer_start(timer_send_handle, csi_kernel_ms2tick(10000));
uint32_t lpsr = csi_irq_save();
csi_eth_mac_ex_send_frame_begin(eth_mac_handle, p->tot_len);
for (q = p; q != NULL; q = q->next) {
csi_eth_mac_ex_send_frame(eth_mac_handle, q->payload, q->len, 0);
l = l + q->len;
}
csi_eth_mac_ex_send_frame_end(eth_mac_handle);
csi_irq_restore(lpsr);
MIB2_STATS_NETIF_ADD(netif, ifoutoctets, p->tot_len);
if (((u8_t *)p->payload)[0] & 1) {
/* broadcast or multicast packet */
MIB2_STATS_NETIF_INC(netif, ifoutnucastpkts);
} else {
/* unicast packet */
MIB2_STATS_NETIF_INC(netif, ifoutucastpkts);
}
/* increase ifoutdiscards or ifouterrors on error */
#if ETH_PAD_SIZE
pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */
#endif
LINK_STATS_INC(link.xmit);
return ERR_OK;
}
/**
* Should allocate a pbuf and transfer the bytes of the incoming
* packet from the interface into the pbuf.
*
* @param netif the lwip network interface structure for this ethernetif
* @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error
*/
static struct pbuf *low_level_input(struct netif *netif)
{
struct pbuf *p, *q;
int32_t len;
int l = 0;
/* Obtain the size of the packet and put it into the "len"
variable. */
len = csi_eth_mac_ex_read_frame_begin(eth_mac_handle);
if (len < 0) {
/* errors in rx buffer, reset enc28j60 */
LOG("err rxb, rst");
eth_mac_handle = csi_eth_mac_initialize(0, eth_mac_signal_event);
csi_eth_mac_control(eth_mac_handle, CSI_ETH_MAC_CONTROL_RX, 1);
return NULL;
} else if (len == 0) {
return NULL;
}
#if ETH_PAD_SIZE
len += ETH_PAD_SIZE; /* allow room for Ethernet padding */
#endif
/* We allocate a pbuf chain of pbufs from the pool. */
p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
if (p != NULL) {
#if ETH_PAD_SIZE
pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */
#endif
/* We iterate over the pbuf chain until we have read the entire
* packet into the pbuf. */
for (q = p; q != NULL; q = q->next) {
/* Read enough bytes to fill this pbuf in the chain. The
* available data in the pbuf is given by the q->len
* variable.
* This does not necessarily have to be a memcpy, you can also preallocate
* pbufs for a DMA-enabled MAC and after receiving truncate it to the
* actually received size. In this case, ensure the tot_len member of the
* pbuf is the sum of the chained pbuf len members.
*/
/* read data into(q->payload, q->len); */
csi_eth_mac_ex_read_frame(eth_mac_handle, (u8_t *)q->payload, q->len);
l = l + q->len;
}
csi_eth_mac_ex_read_frame_end(eth_mac_handle);
MIB2_STATS_NETIF_ADD(netif, ifinoctets, p->tot_len);
if (((u8_t *)p->payload)[0] & 1) {
/* broadcast or multicast packet */
MIB2_STATS_NETIF_INC(netif, ifinnucastpkts);
} else {
/* unicast packet */
MIB2_STATS_NETIF_INC(netif, ifinucastpkts);
}
#if ETH_PAD_SIZE
pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */
#endif
LINK_STATS_INC(link.recv);
} else {
/* drop packet(); */
/* error to allocate a pbuf chain of pbufs from the pool */
LOG("err alloc pbuf");
LINK_STATS_INC(link.memerr);
LINK_STATS_INC(link.drop);
MIB2_STATS_NETIF_INC(netif, ifindiscards);
}
return p;
}
#else
uint8_t Data_Buf[1528];
uint8_t Tx_Data_Buf[1528];
static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
struct pbuf *q = NULL;
int l = 0;
#if ETH_PAD_SIZE
pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */
#endif
csi_kernel_timer_stop(timer_send_handle);
csi_kernel_timer_start(timer_send_handle, csi_kernel_ms2tick(10000));
uint32_t lpsr = csi_irq_save();
for (q = p; q != NULL; q = q->next) {
memcpy((u8_t *)&Tx_Data_Buf[l], q->payload, q->len);
l = l + q->len;
}
csi_eth_mac_send_frame(eth_mac_handle, Tx_Data_Buf, p->tot_len, 0);
csi_irq_restore(lpsr);
MIB2_STATS_NETIF_ADD(netif, ifoutoctets, p->tot_len);
if (((u8_t *)p->payload)[0] & 1) {
/* broadcast or multicast packet */
MIB2_STATS_NETIF_INC(netif, ifoutnucastpkts);
} else {
/* unicast packet */
MIB2_STATS_NETIF_INC(netif, ifoutucastpkts);
}
/* increase ifoutdiscards or ifouterrors on error */
#if ETH_PAD_SIZE
pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */
#endif
LINK_STATS_INC(link.xmit);
return ERR_OK;
}
/**
* Should allocate a pbuf and transfer the bytes of the incoming
* packet from the interface into the pbuf.
*
* @param netif the lwip network interface structure for this ethernetif
* @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error
*/
static struct pbuf *low_level_input(struct netif *netif)
{
struct pbuf *p, *q;
int32_t len;
int l = 0;
/* Obtain the size of the packet and put it into the "len"
variable. */
len = csi_eth_mac_read_frame(eth_mac_handle, Data_Buf, MAX_FRAMELEN);
if (len < 0) {
/* errors in rx buffer, reset enc28j60 */
LOG("err rxb, rst");
eth_mac_handle = csi_eth_mac_initialize(0, eth_mac_signal_event);
csi_eth_mac_control(eth_mac_handle, CSI_ETH_MAC_CONTROL_RX, 1);
return NULL;
} else if (len == 0) {
return NULL;
}
#if ETH_PAD_SIZE
len += ETH_PAD_SIZE; /* allow room for Ethernet padding */
#endif
/* We allocate a pbuf chain of pbufs from the pool. */
p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
if (p != NULL) {
#if ETH_PAD_SIZE
pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */
#endif
/* We iterate over the pbuf chain until we have read the entire
* packet into the pbuf. */
for (q = p; q != NULL; q = q->next) {
/* Read enough bytes to fill this pbuf in the chain. The
* available data in the pbuf is given by the q->len
* variable.
* This does not necessarily have to be a memcpy, you can also preallocate
* pbufs for a DMA-enabled MAC and after receiving truncate it to the
* actually received size. In this case, ensure the tot_len member of the
* pbuf is the sum of the chained pbuf len members.
*/
/* read data into(q->payload, q->len); */
memcpy((u8_t *)q->payload, (u8_t *)&Data_Buf[l], q->len);
l = l + q->len;
}
MIB2_STATS_NETIF_ADD(netif, ifinoctets, p->tot_len);
if (((u8_t *)p->payload)[0] & 1) {
/* broadcast or multicast packet */
MIB2_STATS_NETIF_INC(netif, ifinnucastpkts);
} else {
/* unicast packet */
MIB2_STATS_NETIF_INC(netif, ifinucastpkts);
}
#if ETH_PAD_SIZE
pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */
#endif
LINK_STATS_INC(link.recv);
} else {
/* drop packet(); */
/* error to allocate a pbuf chain of pbufs from the pool */
LOG("err alloc pbuf");
LINK_STATS_INC(link.memerr);
LINK_STATS_INC(link.drop);
MIB2_STATS_NETIF_INC(netif, ifindiscards);
}
return p;
}
#endif
/**
* This function should be called when a packet is ready to be read
* from the interface. It uses the function low_level_input() that
* should handle the actual reception of bytes from the network
* interface. Then the type of the received packet is determined and
* the appropriate input function is called.
*
* @param netif the lwip network interface structure for this ethernetif
*/
static void ethernetif_input(struct netif *netif)
{
//struct ethernetif *ethernetif;
struct pbuf *p;
//ethernetif = netif->state;
/* move received packet into a new pbuf */
uint32_t lpsr = csi_irq_save();
p = low_level_input(netif);
csi_irq_restore(lpsr);
/* if no packet could be read, silently ignore this */
if (p != NULL) {
/* pass all packets to ethernet_input, which decides what packets it supports */
if (netif->input(p, netif) != ERR_OK) {
LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\r\n"));
pbuf_free(p);
p = NULL;
}
}
}
/**
* Should be called at the beginning of the program to set up the
* network interface. It calls the function low_level_init() to do the
* actual setup of the hardware.
*
* This function should be passed as a parameter to netif_add().
*
* @param netif the lwip network interface structure for this ethernetif
* @return ERR_OK if the loopif is initialized
* ERR_MEM if private data couldn't be allocated
* any other err_t on error
*/
err_t ethernetif_init(struct netif *netif)
{
struct ethernetif *ethernetif;
LWIP_ASSERT("netif != NULL", (netif != NULL));
ethernetif = mem_malloc(sizeof(struct ethernetif));
if (ethernetif == NULL) {
LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\r\n"));
return ERR_MEM;
}
#if LWIP_NETIF_HOSTNAME
/* Initialize interface hostname */
netif->hostname = "cksy-lwip";
#endif /* LWIP_NETIF_HOSTNAME */
/*
* Initialize the snmp variables and counters inside the struct netif.
* The last argument should be replaced with your link speed, in units
* of bits per second.
*/
// MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);
netif->state = ethernetif;
netif->name[0] = IFNAME0;
netif->name[1] = IFNAME1;
/* We directly use etharp_output() here to save a function call.
* You can instead declare your own function an call etharp_output()
* from it if you have to do some checks before sending (e.g. if link
* is available...) */
#if LWIP_IPV4
netif->output = etharp_output;
#endif
#if LWIP_IPV6
netif->output_ip6 = ethip6_output;
#endif /* LWIP_IPV6 */
netif->linkoutput = low_level_output;
ethernetif->ethaddr = (struct eth_addr *) & (netif->hwaddr[0]);
/* initialize the hardware */
low_level_init(netif);
return ERR_OK;
}
void nic_task(void *arg)
{
struct netif *netif = arg;
struct nic_msg *msg;
int link_status;
while (1) {
sys_arch_mbox_fetch(&mbox_nic_Int, (void **)&msg, 0);
do {
csi_kernel_timer_stop(timer_send_handle);
if (msg->event == CSI_ETH_MAC_EVENT_LINK_CHANGE) {
uint32_t lpsr = csi_irq_save();
/* don't disable interrupt that may lost interrupt */
link_status = csi_eth_phy_get_linkstate(eth_phy_handle);
csi_irq_restore(lpsr);
if ((link_status != -1)) {
nic_link_stat = link_status;
LOG("Ethernet:link %s", (nic_link_stat == 1) ? "up" : "down");
}
} else if (msg->event == CSI_ETH_MAC_EVENT_RX_FRAME) {
ethernetif_input(netif);
/*if there are packets in rx buffer, interrupt will be triggered again*/
} else if (msg->event == CSI_ETH_MAC_EVENT_TX_FRAME) {
}
dlist_add_tail(&msg->node, &nic_msg_list);
} while (sys_arch_mbox_tryfetch(&mbox_nic_Int, (void **)&msg) == ERR_OK);
csi_eth_mac_control(eth_mac_handle, CSI_ETH_MAC_CONTROL_RX, 1);
}
}
/********************************************************************************
* Name:
* netif_proto_init
*
* Description:
* the network card init call low_level_init()
*
* Parameter:
* netif:struct for network card
*
* Return:
* the status of init
********************************************************************************/
static void tcpip_init_done(void *arg)
{
#if LWIP_IPV4
ip4_addr_t ipaddr, netmask, gw;
memset(&ipaddr, 0, sizeof(ipaddr));
memset(&netmask, 0, sizeof(netmask));
memset(&gw, 0, sizeof(gw));
netif_add(&lwip_netif, &ipaddr, &netmask, &gw, NULL, ethernetif_init, tcpip_input);
#endif
#if LWIP_IPV6
#if !LWIP_IPV4
netif_add(&lwip_netif, NULL, ethernetif_init, tcpip_input);
#endif
netif_create_ip6_linklocal_address(&lwip_netif, 1);
lwip_netif.ip6_autoconfig_enabled = 1;
#endif
netif_set_default(&lwip_netif);
netif_set_up(&lwip_netif);
}
/********************************************************************************
* Name:
* netif_proto_init
*
* Description:
* the network card init call low_level_init()
*
* Parameter:
* netif:struct for network card
*
* Return:
* the status of init
********************************************************************************/
int lwip_tcpip_init(void)
{
#ifdef PERF
perf_init("/tmp/minimal.perf");
#endif /* PERF */
tcpip_init(tcpip_init_done, NULL);
LOG("TCP/IP initialized.");
return 0;
}
#endif /* CONFIG_NETIF_ETH */