mirror of
https://github.com/Ai-Thinker-Open/Ai-Thinker-Open_RTL8710BX_ALIOS_SDK.git
synced 2025-02-06 20:35:22 +00:00
187 lines
6 KiB
ArmAsm
187 lines
6 KiB
ArmAsm
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.syntax unified
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.arch armv7-m
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/* Memory Model
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The HEAP starts at the end of the DATA section and grows upward.
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The STACK starts at the end of the RAM and grows downward.
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The HEAP and stack STACK are only checked at compile time:
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(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
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This is just a check for the bare minimum for the Heap+Stack area before
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aborting compilation, it is not the run time limit:
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Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
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*/
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0x800
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#endif
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.space Stack_Size
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0x18000
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.space Heap_Size
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long MemManage_Handler /* MPU Fault Handler */
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.long BusFault_Handler /* Bus Fault Handler */
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.long UsageFault_Handler /* Usage Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long DebugMon_Handler /* Debug Monitor Handler */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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/* External interrupts */
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.long SPIFLASH_IRQHandler /* 16: SPI Flash */
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.long PTA_IRQHandler /* 17: PTA */
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.long SDIO_IRQHandler /* 18: SDIO */
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.long USBDMA_IRQHandler /* 19: USB DMA */
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.long USB_IRQHandler /* 20: USB */
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.long GPIO_IRQHandler /* 21: GPIO */
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.long TIMER0_IRQHandler /* 22: Timer0 */
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.long UART0_IRQHandler /* 23: UART0 */
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.long MACHW_IRQHandler /* 24: MAC Hardware */
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.long UART1_IRQHandler /* 25: UART1 */
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.long AHBDMA_IRQHandler /* 26: AHB DMA */
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.long PSRAM_IRQHandler /* 27: PSRAM */
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.long SDMMC_IRQHandler /* 28: SDMMC */
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.long EXIF_IRQHandler /* 29: EXIF */
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.long I2C_IRQHandler /* 30: I2C */
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* _etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r0, =__StackTop
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msr msp, r0
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ldr r0, =rda_ccfg_boot
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blx r0
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cmp r0, #0x01
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bne Soft_Reset
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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.Lflash_to_ram_loop:
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cmp r2, r3
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ittt lt
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ldrlt r0, [r1], #4
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strlt r0, [r2], #4
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blt .Lflash_to_ram_loop
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ldr r2, =__bss_start__
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b .LoopFillZerobss
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.FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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.LoopFillZerobss:
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ldr r3, = __bss_end__
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cmp r2, r3
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bcc .FillZerobss
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ldr r0, =SystemInit
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blx r0
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ldr r0, =entry_main
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bx r0
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Soft_Reset:
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mov r1, #0x04
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ldr r0, [r1]
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bx r0
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.pool
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.size Reset_Handler, . - Reset_Handler
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.text
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_default_handler handler_name
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.align 1
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.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
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def_default_handler NMI_Handler
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def_default_handler HardFault_Handler
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def_default_handler MemManage_Handler
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def_default_handler BusFault_Handler
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def_default_handler UsageFault_Handler
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def_default_handler SVC_Handler
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def_default_handler DebugMon_Handler
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def_default_handler PendSV_Handler
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def_default_handler SysTick_Handler
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def_default_handler Default_Handler
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.macro def_irq_default_handler handler_name
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.weak \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_default_handler SPIFLASH_IRQHandler
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def_irq_default_handler PTA_IRQHandler
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def_irq_default_handler SDIO_IRQHandler
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def_irq_default_handler USBDMA_IRQHandler
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def_irq_default_handler USB_IRQHandler
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def_irq_default_handler GPIO_IRQHandler
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def_irq_default_handler TIMER0_IRQHandler
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def_irq_default_handler UART0_IRQHandler
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def_irq_default_handler MACHW_IRQHandler
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def_irq_default_handler UART1_IRQHandler
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def_irq_default_handler AHBDMA_IRQHandler
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def_irq_default_handler PSRAM_IRQHandler
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def_irq_default_handler SDMMC_IRQHandler
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def_irq_default_handler EXIF_IRQHandler
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def_irq_default_handler I2C_IRQHandler
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.end
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